intel_lvds.c 30 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067
  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. */
  29. #include <acpi/button.h>
  30. #include <linux/dmi.h>
  31. #include <linux/i2c.h>
  32. #include <linux/slab.h>
  33. #include "drmP.h"
  34. #include "drm.h"
  35. #include "drm_crtc.h"
  36. #include "drm_edid.h"
  37. #include "intel_drv.h"
  38. #include "i915_drm.h"
  39. #include "i915_drv.h"
  40. #include <linux/acpi.h>
  41. /* Private structure for the integrated LVDS support */
  42. struct intel_lvds {
  43. struct intel_encoder base;
  44. struct edid *edid;
  45. int fitting_mode;
  46. u32 pfit_control;
  47. u32 pfit_pgm_ratios;
  48. bool pfit_dirty;
  49. struct drm_display_mode *fixed_mode;
  50. };
  51. static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder)
  52. {
  53. return container_of(encoder, struct intel_lvds, base.base);
  54. }
  55. static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector)
  56. {
  57. return container_of(intel_attached_encoder(connector),
  58. struct intel_lvds, base);
  59. }
  60. /**
  61. * Sets the power state for the panel.
  62. */
  63. static void intel_lvds_enable(struct intel_lvds *intel_lvds)
  64. {
  65. struct drm_device *dev = intel_lvds->base.base.dev;
  66. struct drm_i915_private *dev_priv = dev->dev_private;
  67. u32 ctl_reg, lvds_reg;
  68. if (HAS_PCH_SPLIT(dev)) {
  69. ctl_reg = PCH_PP_CONTROL;
  70. lvds_reg = PCH_LVDS;
  71. } else {
  72. ctl_reg = PP_CONTROL;
  73. lvds_reg = LVDS;
  74. }
  75. I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
  76. if (intel_lvds->pfit_dirty) {
  77. /*
  78. * Enable automatic panel scaling so that non-native modes
  79. * fill the screen. The panel fitter should only be
  80. * adjusted whilst the pipe is disabled, according to
  81. * register description and PRM.
  82. */
  83. DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
  84. intel_lvds->pfit_control,
  85. intel_lvds->pfit_pgm_ratios);
  86. if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000)) {
  87. DRM_ERROR("timed out waiting for panel to power off\n");
  88. } else {
  89. I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);
  90. I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);
  91. intel_lvds->pfit_dirty = false;
  92. }
  93. }
  94. I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
  95. POSTING_READ(lvds_reg);
  96. intel_panel_enable_backlight(dev);
  97. }
  98. static void intel_lvds_disable(struct intel_lvds *intel_lvds)
  99. {
  100. struct drm_device *dev = intel_lvds->base.base.dev;
  101. struct drm_i915_private *dev_priv = dev->dev_private;
  102. u32 ctl_reg, lvds_reg;
  103. if (HAS_PCH_SPLIT(dev)) {
  104. ctl_reg = PCH_PP_CONTROL;
  105. lvds_reg = PCH_LVDS;
  106. } else {
  107. ctl_reg = PP_CONTROL;
  108. lvds_reg = LVDS;
  109. }
  110. intel_panel_disable_backlight(dev);
  111. I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
  112. if (intel_lvds->pfit_control) {
  113. if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000))
  114. DRM_ERROR("timed out waiting for panel to power off\n");
  115. I915_WRITE(PFIT_CONTROL, 0);
  116. intel_lvds->pfit_dirty = true;
  117. }
  118. I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
  119. POSTING_READ(lvds_reg);
  120. }
  121. static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
  122. {
  123. struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
  124. if (mode == DRM_MODE_DPMS_ON)
  125. intel_lvds_enable(intel_lvds);
  126. else
  127. intel_lvds_disable(intel_lvds);
  128. /* XXX: We never power down the LVDS pairs. */
  129. }
  130. static int intel_lvds_mode_valid(struct drm_connector *connector,
  131. struct drm_display_mode *mode)
  132. {
  133. struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
  134. struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode;
  135. if (mode->hdisplay > fixed_mode->hdisplay)
  136. return MODE_PANEL;
  137. if (mode->vdisplay > fixed_mode->vdisplay)
  138. return MODE_PANEL;
  139. return MODE_OK;
  140. }
  141. static void
  142. centre_horizontally(struct drm_display_mode *mode,
  143. int width)
  144. {
  145. u32 border, sync_pos, blank_width, sync_width;
  146. /* keep the hsync and hblank widths constant */
  147. sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
  148. blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
  149. sync_pos = (blank_width - sync_width + 1) / 2;
  150. border = (mode->hdisplay - width + 1) / 2;
  151. border += border & 1; /* make the border even */
  152. mode->crtc_hdisplay = width;
  153. mode->crtc_hblank_start = width + border;
  154. mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
  155. mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
  156. mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
  157. }
  158. static void
  159. centre_vertically(struct drm_display_mode *mode,
  160. int height)
  161. {
  162. u32 border, sync_pos, blank_width, sync_width;
  163. /* keep the vsync and vblank widths constant */
  164. sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
  165. blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
  166. sync_pos = (blank_width - sync_width + 1) / 2;
  167. border = (mode->vdisplay - height + 1) / 2;
  168. mode->crtc_vdisplay = height;
  169. mode->crtc_vblank_start = height + border;
  170. mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
  171. mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
  172. mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
  173. }
  174. static inline u32 panel_fitter_scaling(u32 source, u32 target)
  175. {
  176. /*
  177. * Floating point operation is not supported. So the FACTOR
  178. * is defined, which can avoid the floating point computation
  179. * when calculating the panel ratio.
  180. */
  181. #define ACCURACY 12
  182. #define FACTOR (1 << ACCURACY)
  183. u32 ratio = source * FACTOR / target;
  184. return (FACTOR * ratio + FACTOR/2) / FACTOR;
  185. }
  186. static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
  187. struct drm_display_mode *mode,
  188. struct drm_display_mode *adjusted_mode)
  189. {
  190. struct drm_device *dev = encoder->dev;
  191. struct drm_i915_private *dev_priv = dev->dev_private;
  192. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
  193. struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
  194. struct drm_encoder *tmp_encoder;
  195. u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
  196. /* Should never happen!! */
  197. if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
  198. DRM_ERROR("Can't support LVDS on pipe A\n");
  199. return false;
  200. }
  201. /* Should never happen!! */
  202. list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
  203. if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
  204. DRM_ERROR("Can't enable LVDS and another "
  205. "encoder on the same pipe\n");
  206. return false;
  207. }
  208. }
  209. /*
  210. * We have timings from the BIOS for the panel, put them in
  211. * to the adjusted mode. The CRTC will be set up for this mode,
  212. * with the panel scaling set up to source from the H/VDisplay
  213. * of the original mode.
  214. */
  215. intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode);
  216. if (HAS_PCH_SPLIT(dev)) {
  217. intel_pch_panel_fitting(dev, intel_lvds->fitting_mode,
  218. mode, adjusted_mode);
  219. return true;
  220. }
  221. /* Native modes don't need fitting */
  222. if (adjusted_mode->hdisplay == mode->hdisplay &&
  223. adjusted_mode->vdisplay == mode->vdisplay)
  224. goto out;
  225. /* 965+ wants fuzzy fitting */
  226. if (INTEL_INFO(dev)->gen >= 4)
  227. pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
  228. PFIT_FILTER_FUZZY);
  229. /*
  230. * Enable automatic panel scaling for non-native modes so that they fill
  231. * the screen. Should be enabled before the pipe is enabled, according
  232. * to register description and PRM.
  233. * Change the value here to see the borders for debugging
  234. */
  235. I915_WRITE(BCLRPAT_A, 0);
  236. I915_WRITE(BCLRPAT_B, 0);
  237. switch (intel_lvds->fitting_mode) {
  238. case DRM_MODE_SCALE_CENTER:
  239. /*
  240. * For centered modes, we have to calculate border widths &
  241. * heights and modify the values programmed into the CRTC.
  242. */
  243. centre_horizontally(adjusted_mode, mode->hdisplay);
  244. centre_vertically(adjusted_mode, mode->vdisplay);
  245. border = LVDS_BORDER_ENABLE;
  246. break;
  247. case DRM_MODE_SCALE_ASPECT:
  248. /* Scale but preserve the aspect ratio */
  249. if (INTEL_INFO(dev)->gen >= 4) {
  250. u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  251. u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  252. /* 965+ is easy, it does everything in hw */
  253. if (scaled_width > scaled_height)
  254. pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
  255. else if (scaled_width < scaled_height)
  256. pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
  257. else if (adjusted_mode->hdisplay != mode->hdisplay)
  258. pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
  259. } else {
  260. u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  261. u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  262. /*
  263. * For earlier chips we have to calculate the scaling
  264. * ratio by hand and program it into the
  265. * PFIT_PGM_RATIO register
  266. */
  267. if (scaled_width > scaled_height) { /* pillar */
  268. centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
  269. border = LVDS_BORDER_ENABLE;
  270. if (mode->vdisplay != adjusted_mode->vdisplay) {
  271. u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
  272. pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  273. bits << PFIT_VERT_SCALE_SHIFT);
  274. pfit_control |= (PFIT_ENABLE |
  275. VERT_INTERP_BILINEAR |
  276. HORIZ_INTERP_BILINEAR);
  277. }
  278. } else if (scaled_width < scaled_height) { /* letter */
  279. centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
  280. border = LVDS_BORDER_ENABLE;
  281. if (mode->hdisplay != adjusted_mode->hdisplay) {
  282. u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
  283. pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  284. bits << PFIT_VERT_SCALE_SHIFT);
  285. pfit_control |= (PFIT_ENABLE |
  286. VERT_INTERP_BILINEAR |
  287. HORIZ_INTERP_BILINEAR);
  288. }
  289. } else
  290. /* Aspects match, Let hw scale both directions */
  291. pfit_control |= (PFIT_ENABLE |
  292. VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
  293. VERT_INTERP_BILINEAR |
  294. HORIZ_INTERP_BILINEAR);
  295. }
  296. break;
  297. case DRM_MODE_SCALE_FULLSCREEN:
  298. /*
  299. * Full scaling, even if it changes the aspect ratio.
  300. * Fortunately this is all done for us in hw.
  301. */
  302. if (mode->vdisplay != adjusted_mode->vdisplay ||
  303. mode->hdisplay != adjusted_mode->hdisplay) {
  304. pfit_control |= PFIT_ENABLE;
  305. if (INTEL_INFO(dev)->gen >= 4)
  306. pfit_control |= PFIT_SCALING_AUTO;
  307. else
  308. pfit_control |= (VERT_AUTO_SCALE |
  309. VERT_INTERP_BILINEAR |
  310. HORIZ_AUTO_SCALE |
  311. HORIZ_INTERP_BILINEAR);
  312. }
  313. break;
  314. default:
  315. break;
  316. }
  317. out:
  318. /* If not enabling scaling, be consistent and always use 0. */
  319. if ((pfit_control & PFIT_ENABLE) == 0) {
  320. pfit_control = 0;
  321. pfit_pgm_ratios = 0;
  322. }
  323. /* Make sure pre-965 set dither correctly */
  324. if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
  325. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  326. if (pfit_control != intel_lvds->pfit_control ||
  327. pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) {
  328. intel_lvds->pfit_control = pfit_control;
  329. intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios;
  330. intel_lvds->pfit_dirty = true;
  331. }
  332. dev_priv->lvds_border_bits = border;
  333. /*
  334. * XXX: It would be nice to support lower refresh rates on the
  335. * panels to reduce power consumption, and perhaps match the
  336. * user's requested refresh rate.
  337. */
  338. return true;
  339. }
  340. static void intel_lvds_prepare(struct drm_encoder *encoder)
  341. {
  342. struct drm_device *dev = encoder->dev;
  343. struct drm_i915_private *dev_priv = dev->dev_private;
  344. struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
  345. /* We try to do the minimum that is necessary in order to unlock
  346. * the registers for mode setting.
  347. *
  348. * On Ironlake, this is quite simple as we just set the unlock key
  349. * and ignore all subtleties. (This may cause some issues...)
  350. *
  351. * Prior to Ironlake, we must disable the pipe if we want to adjust
  352. * the panel fitter. However at all other times we can just reset
  353. * the registers regardless.
  354. */
  355. if (HAS_PCH_SPLIT(dev)) {
  356. I915_WRITE(PCH_PP_CONTROL,
  357. I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
  358. } else if (intel_lvds->pfit_dirty) {
  359. I915_WRITE(PP_CONTROL,
  360. (I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS)
  361. & ~POWER_TARGET_ON);
  362. } else {
  363. I915_WRITE(PP_CONTROL,
  364. I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
  365. }
  366. }
  367. static void intel_lvds_commit(struct drm_encoder *encoder)
  368. {
  369. struct drm_device *dev = encoder->dev;
  370. struct drm_i915_private *dev_priv = dev->dev_private;
  371. struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
  372. /* Undo any unlocking done in prepare to prevent accidental
  373. * adjustment of the registers.
  374. */
  375. if (HAS_PCH_SPLIT(dev)) {
  376. u32 val = I915_READ(PCH_PP_CONTROL);
  377. if ((val & PANEL_UNLOCK_REGS) == PANEL_UNLOCK_REGS)
  378. I915_WRITE(PCH_PP_CONTROL, val & 0x3);
  379. } else {
  380. u32 val = I915_READ(PP_CONTROL);
  381. if ((val & PANEL_UNLOCK_REGS) == PANEL_UNLOCK_REGS)
  382. I915_WRITE(PP_CONTROL, val & 0x3);
  383. }
  384. /* Always do a full power on as we do not know what state
  385. * we were left in.
  386. */
  387. intel_lvds_enable(intel_lvds);
  388. }
  389. static void intel_lvds_mode_set(struct drm_encoder *encoder,
  390. struct drm_display_mode *mode,
  391. struct drm_display_mode *adjusted_mode)
  392. {
  393. /*
  394. * The LVDS pin pair will already have been turned on in the
  395. * intel_crtc_mode_set since it has a large impact on the DPLL
  396. * settings.
  397. */
  398. }
  399. /**
  400. * Detect the LVDS connection.
  401. *
  402. * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
  403. * connected and closed means disconnected. We also send hotplug events as
  404. * needed, using lid status notification from the input layer.
  405. */
  406. static enum drm_connector_status
  407. intel_lvds_detect(struct drm_connector *connector, bool force)
  408. {
  409. struct drm_device *dev = connector->dev;
  410. enum drm_connector_status status = connector_status_connected;
  411. /* ACPI lid methods were generally unreliable in this generation, so
  412. * don't even bother.
  413. */
  414. if (IS_GEN2(dev) || IS_GEN3(dev))
  415. return connector_status_connected;
  416. return status;
  417. }
  418. /**
  419. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  420. */
  421. static int intel_lvds_get_modes(struct drm_connector *connector)
  422. {
  423. struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
  424. struct drm_device *dev = connector->dev;
  425. struct drm_display_mode *mode;
  426. if (intel_lvds->edid)
  427. return drm_add_edid_modes(connector, intel_lvds->edid);
  428. mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode);
  429. if (mode == 0)
  430. return 0;
  431. drm_mode_probed_add(connector, mode);
  432. return 1;
  433. }
  434. static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
  435. {
  436. DRM_DEBUG_KMS("Skipping forced modeset for %s\n", id->ident);
  437. return 1;
  438. }
  439. /* The GPU hangs up on these systems if modeset is performed on LID open */
  440. static const struct dmi_system_id intel_no_modeset_on_lid[] = {
  441. {
  442. .callback = intel_no_modeset_on_lid_dmi_callback,
  443. .ident = "Toshiba Tecra A11",
  444. .matches = {
  445. DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  446. DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
  447. },
  448. },
  449. { } /* terminating entry */
  450. };
  451. /*
  452. * Lid events. Note the use of 'modeset_on_lid':
  453. * - we set it on lid close, and reset it on open
  454. * - we use it as a "only once" bit (ie we ignore
  455. * duplicate events where it was already properly
  456. * set/reset)
  457. * - the suspend/resume paths will also set it to
  458. * zero, since they restore the mode ("lid open").
  459. */
  460. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  461. void *unused)
  462. {
  463. struct drm_i915_private *dev_priv =
  464. container_of(nb, struct drm_i915_private, lid_notifier);
  465. struct drm_device *dev = dev_priv->dev;
  466. struct drm_connector *connector = dev_priv->int_lvds_connector;
  467. /*
  468. * check and update the status of LVDS connector after receiving
  469. * the LID nofication event.
  470. */
  471. if (connector)
  472. connector->status = connector->funcs->detect(connector,
  473. false);
  474. /* Don't force modeset on machines where it causes a GPU lockup */
  475. if (dmi_check_system(intel_no_modeset_on_lid))
  476. return NOTIFY_OK;
  477. if (!acpi_lid_open()) {
  478. dev_priv->modeset_on_lid = 1;
  479. return NOTIFY_OK;
  480. }
  481. if (!dev_priv->modeset_on_lid)
  482. return NOTIFY_OK;
  483. dev_priv->modeset_on_lid = 0;
  484. mutex_lock(&dev->mode_config.mutex);
  485. drm_helper_resume_force_mode(dev);
  486. mutex_unlock(&dev->mode_config.mutex);
  487. return NOTIFY_OK;
  488. }
  489. /**
  490. * intel_lvds_destroy - unregister and free LVDS structures
  491. * @connector: connector to free
  492. *
  493. * Unregister the DDC bus for this connector then free the driver private
  494. * structure.
  495. */
  496. static void intel_lvds_destroy(struct drm_connector *connector)
  497. {
  498. struct drm_device *dev = connector->dev;
  499. struct drm_i915_private *dev_priv = dev->dev_private;
  500. if (dev_priv->lid_notifier.notifier_call)
  501. acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
  502. drm_sysfs_connector_remove(connector);
  503. drm_connector_cleanup(connector);
  504. kfree(connector);
  505. }
  506. static int intel_lvds_set_property(struct drm_connector *connector,
  507. struct drm_property *property,
  508. uint64_t value)
  509. {
  510. struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
  511. struct drm_device *dev = connector->dev;
  512. if (property == dev->mode_config.scaling_mode_property) {
  513. struct drm_crtc *crtc = intel_lvds->base.base.crtc;
  514. if (value == DRM_MODE_SCALE_NONE) {
  515. DRM_DEBUG_KMS("no scaling not supported\n");
  516. return -EINVAL;
  517. }
  518. if (intel_lvds->fitting_mode == value) {
  519. /* the LVDS scaling property is not changed */
  520. return 0;
  521. }
  522. intel_lvds->fitting_mode = value;
  523. if (crtc && crtc->enabled) {
  524. /*
  525. * If the CRTC is enabled, the display will be changed
  526. * according to the new panel fitting mode.
  527. */
  528. drm_crtc_helper_set_mode(crtc, &crtc->mode,
  529. crtc->x, crtc->y, crtc->fb);
  530. }
  531. }
  532. return 0;
  533. }
  534. static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
  535. .dpms = intel_lvds_dpms,
  536. .mode_fixup = intel_lvds_mode_fixup,
  537. .prepare = intel_lvds_prepare,
  538. .mode_set = intel_lvds_mode_set,
  539. .commit = intel_lvds_commit,
  540. };
  541. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  542. .get_modes = intel_lvds_get_modes,
  543. .mode_valid = intel_lvds_mode_valid,
  544. .best_encoder = intel_best_encoder,
  545. };
  546. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  547. .dpms = drm_helper_connector_dpms,
  548. .detect = intel_lvds_detect,
  549. .fill_modes = drm_helper_probe_single_connector_modes,
  550. .set_property = intel_lvds_set_property,
  551. .destroy = intel_lvds_destroy,
  552. };
  553. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  554. .destroy = intel_encoder_destroy,
  555. };
  556. static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  557. {
  558. DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
  559. return 1;
  560. }
  561. /* These systems claim to have LVDS, but really don't */
  562. static const struct dmi_system_id intel_no_lvds[] = {
  563. {
  564. .callback = intel_no_lvds_dmi_callback,
  565. .ident = "Apple Mac Mini (Core series)",
  566. .matches = {
  567. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  568. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  569. },
  570. },
  571. {
  572. .callback = intel_no_lvds_dmi_callback,
  573. .ident = "Apple Mac Mini (Core 2 series)",
  574. .matches = {
  575. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  576. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  577. },
  578. },
  579. {
  580. .callback = intel_no_lvds_dmi_callback,
  581. .ident = "MSI IM-945GSE-A",
  582. .matches = {
  583. DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  584. DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  585. },
  586. },
  587. {
  588. .callback = intel_no_lvds_dmi_callback,
  589. .ident = "Dell Studio Hybrid",
  590. .matches = {
  591. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  592. DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  593. },
  594. },
  595. {
  596. .callback = intel_no_lvds_dmi_callback,
  597. .ident = "AOpen Mini PC",
  598. .matches = {
  599. DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  600. DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  601. },
  602. },
  603. {
  604. .callback = intel_no_lvds_dmi_callback,
  605. .ident = "AOpen Mini PC MP915",
  606. .matches = {
  607. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  608. DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  609. },
  610. },
  611. {
  612. .callback = intel_no_lvds_dmi_callback,
  613. .ident = "AOpen i915GMm-HFS",
  614. .matches = {
  615. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  616. DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
  617. },
  618. },
  619. {
  620. .callback = intel_no_lvds_dmi_callback,
  621. .ident = "Aopen i945GTt-VFA",
  622. .matches = {
  623. DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  624. },
  625. },
  626. {
  627. .callback = intel_no_lvds_dmi_callback,
  628. .ident = "Clientron U800",
  629. .matches = {
  630. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  631. DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
  632. },
  633. },
  634. { } /* terminating entry */
  635. };
  636. /**
  637. * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
  638. * @dev: drm device
  639. * @connector: LVDS connector
  640. *
  641. * Find the reduced downclock for LVDS in EDID.
  642. */
  643. static void intel_find_lvds_downclock(struct drm_device *dev,
  644. struct drm_display_mode *fixed_mode,
  645. struct drm_connector *connector)
  646. {
  647. struct drm_i915_private *dev_priv = dev->dev_private;
  648. struct drm_display_mode *scan;
  649. int temp_downclock;
  650. temp_downclock = fixed_mode->clock;
  651. list_for_each_entry(scan, &connector->probed_modes, head) {
  652. /*
  653. * If one mode has the same resolution with the fixed_panel
  654. * mode while they have the different refresh rate, it means
  655. * that the reduced downclock is found for the LVDS. In such
  656. * case we can set the different FPx0/1 to dynamically select
  657. * between low and high frequency.
  658. */
  659. if (scan->hdisplay == fixed_mode->hdisplay &&
  660. scan->hsync_start == fixed_mode->hsync_start &&
  661. scan->hsync_end == fixed_mode->hsync_end &&
  662. scan->htotal == fixed_mode->htotal &&
  663. scan->vdisplay == fixed_mode->vdisplay &&
  664. scan->vsync_start == fixed_mode->vsync_start &&
  665. scan->vsync_end == fixed_mode->vsync_end &&
  666. scan->vtotal == fixed_mode->vtotal) {
  667. if (scan->clock < temp_downclock) {
  668. /*
  669. * The downclock is already found. But we
  670. * expect to find the lower downclock.
  671. */
  672. temp_downclock = scan->clock;
  673. }
  674. }
  675. }
  676. if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
  677. /* We found the downclock for LVDS. */
  678. dev_priv->lvds_downclock_avail = 1;
  679. dev_priv->lvds_downclock = temp_downclock;
  680. DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
  681. "Normal clock %dKhz, downclock %dKhz\n",
  682. fixed_mode->clock, temp_downclock);
  683. }
  684. }
  685. /*
  686. * Enumerate the child dev array parsed from VBT to check whether
  687. * the LVDS is present.
  688. * If it is present, return 1.
  689. * If it is not present, return false.
  690. * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  691. */
  692. static bool lvds_is_present_in_vbt(struct drm_device *dev,
  693. u8 *i2c_pin)
  694. {
  695. struct drm_i915_private *dev_priv = dev->dev_private;
  696. int i;
  697. if (!dev_priv->child_dev_num)
  698. return true;
  699. for (i = 0; i < dev_priv->child_dev_num; i++) {
  700. struct child_device_config *child = dev_priv->child_dev + i;
  701. /* If the device type is not LFP, continue.
  702. * We have to check both the new identifiers as well as the
  703. * old for compatibility with some BIOSes.
  704. */
  705. if (child->device_type != DEVICE_TYPE_INT_LFP &&
  706. child->device_type != DEVICE_TYPE_LFP)
  707. continue;
  708. if (child->i2c_pin)
  709. *i2c_pin = child->i2c_pin;
  710. /* However, we cannot trust the BIOS writers to populate
  711. * the VBT correctly. Since LVDS requires additional
  712. * information from AIM blocks, a non-zero addin offset is
  713. * a good indicator that the LVDS is actually present.
  714. */
  715. if (child->addin_offset)
  716. return true;
  717. /* But even then some BIOS writers perform some black magic
  718. * and instantiate the device without reference to any
  719. * additional data. Trust that if the VBT was written into
  720. * the OpRegion then they have validated the LVDS's existence.
  721. */
  722. if (dev_priv->opregion.vbt)
  723. return true;
  724. }
  725. return false;
  726. }
  727. static bool intel_lvds_ddc_probe(struct drm_device *dev, u8 pin)
  728. {
  729. struct drm_i915_private *dev_priv = dev->dev_private;
  730. u8 buf = 0;
  731. struct i2c_msg msgs[] = {
  732. {
  733. .addr = 0xA0,
  734. .flags = 0,
  735. .len = 1,
  736. .buf = &buf,
  737. },
  738. };
  739. struct i2c_adapter *i2c = &dev_priv->gmbus[pin].adapter;
  740. /* XXX this only appears to work when using GMBUS */
  741. if (intel_gmbus_is_forced_bit(i2c))
  742. return true;
  743. return i2c_transfer(i2c, msgs, 1) == 1;
  744. }
  745. /**
  746. * intel_lvds_init - setup LVDS connectors on this device
  747. * @dev: drm device
  748. *
  749. * Create the connector, register the LVDS DDC bus, and try to figure out what
  750. * modes we can display on the LVDS panel (if present).
  751. */
  752. bool intel_lvds_init(struct drm_device *dev)
  753. {
  754. struct drm_i915_private *dev_priv = dev->dev_private;
  755. struct intel_lvds *intel_lvds;
  756. struct intel_encoder *intel_encoder;
  757. struct intel_connector *intel_connector;
  758. struct drm_connector *connector;
  759. struct drm_encoder *encoder;
  760. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  761. struct drm_crtc *crtc;
  762. u32 lvds;
  763. int pipe;
  764. u8 pin;
  765. /* Skip init on machines we know falsely report LVDS */
  766. if (dmi_check_system(intel_no_lvds))
  767. return false;
  768. pin = GMBUS_PORT_PANEL;
  769. if (!lvds_is_present_in_vbt(dev, &pin)) {
  770. DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  771. return false;
  772. }
  773. if (HAS_PCH_SPLIT(dev)) {
  774. if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  775. return false;
  776. if (dev_priv->edp.support) {
  777. DRM_DEBUG_KMS("disable LVDS for eDP support\n");
  778. return false;
  779. }
  780. }
  781. if (!intel_lvds_ddc_probe(dev, pin)) {
  782. DRM_DEBUG_KMS("LVDS did not respond to DDC probe\n");
  783. return false;
  784. }
  785. intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL);
  786. if (!intel_lvds) {
  787. return false;
  788. }
  789. intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
  790. if (!intel_connector) {
  791. kfree(intel_lvds);
  792. return false;
  793. }
  794. if (!HAS_PCH_SPLIT(dev)) {
  795. intel_lvds->pfit_control = I915_READ(PFIT_CONTROL);
  796. }
  797. intel_encoder = &intel_lvds->base;
  798. encoder = &intel_encoder->base;
  799. connector = &intel_connector->base;
  800. drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
  801. DRM_MODE_CONNECTOR_LVDS);
  802. drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
  803. DRM_MODE_ENCODER_LVDS);
  804. intel_connector_attach_encoder(intel_connector, intel_encoder);
  805. intel_encoder->type = INTEL_OUTPUT_LVDS;
  806. intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
  807. intel_encoder->crtc_mask = (1 << 1);
  808. if (INTEL_INFO(dev)->gen >= 5)
  809. intel_encoder->crtc_mask |= (1 << 0);
  810. drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
  811. drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  812. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  813. connector->interlace_allowed = false;
  814. connector->doublescan_allowed = false;
  815. /* create the scaling mode property */
  816. drm_mode_create_scaling_mode_property(dev);
  817. /*
  818. * the initial panel fitting mode will be FULL_SCREEN.
  819. */
  820. drm_connector_attach_property(&intel_connector->base,
  821. dev->mode_config.scaling_mode_property,
  822. DRM_MODE_SCALE_ASPECT);
  823. intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT;
  824. /*
  825. * LVDS discovery:
  826. * 1) check for EDID on DDC
  827. * 2) check for VBT data
  828. * 3) check to see if LVDS is already on
  829. * if none of the above, no panel
  830. * 4) make sure lid is open
  831. * if closed, act like it's not there for now
  832. */
  833. /*
  834. * Attempt to get the fixed panel mode from DDC. Assume that the
  835. * preferred mode is the right one.
  836. */
  837. intel_lvds->edid = drm_get_edid(connector,
  838. &dev_priv->gmbus[pin].adapter);
  839. if (intel_lvds->edid) {
  840. if (drm_add_edid_modes(connector,
  841. intel_lvds->edid)) {
  842. drm_mode_connector_update_edid_property(connector,
  843. intel_lvds->edid);
  844. } else {
  845. kfree(intel_lvds->edid);
  846. intel_lvds->edid = NULL;
  847. }
  848. }
  849. if (!intel_lvds->edid) {
  850. /* Didn't get an EDID, so
  851. * Set wide sync ranges so we get all modes
  852. * handed to valid_mode for checking
  853. */
  854. connector->display_info.min_vfreq = 0;
  855. connector->display_info.max_vfreq = 200;
  856. connector->display_info.min_hfreq = 0;
  857. connector->display_info.max_hfreq = 200;
  858. }
  859. list_for_each_entry(scan, &connector->probed_modes, head) {
  860. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  861. intel_lvds->fixed_mode =
  862. drm_mode_duplicate(dev, scan);
  863. intel_find_lvds_downclock(dev,
  864. intel_lvds->fixed_mode,
  865. connector);
  866. goto out;
  867. }
  868. }
  869. /* Failed to get EDID, what about VBT? */
  870. if (dev_priv->lfp_lvds_vbt_mode) {
  871. intel_lvds->fixed_mode =
  872. drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
  873. if (intel_lvds->fixed_mode) {
  874. intel_lvds->fixed_mode->type |=
  875. DRM_MODE_TYPE_PREFERRED;
  876. goto out;
  877. }
  878. }
  879. /*
  880. * If we didn't get EDID, try checking if the panel is already turned
  881. * on. If so, assume that whatever is currently programmed is the
  882. * correct mode.
  883. */
  884. /* Ironlake: FIXME if still fail, not try pipe mode now */
  885. if (HAS_PCH_SPLIT(dev))
  886. goto failed;
  887. lvds = I915_READ(LVDS);
  888. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  889. crtc = intel_get_crtc_for_pipe(dev, pipe);
  890. if (crtc && (lvds & LVDS_PORT_EN)) {
  891. intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc);
  892. if (intel_lvds->fixed_mode) {
  893. intel_lvds->fixed_mode->type |=
  894. DRM_MODE_TYPE_PREFERRED;
  895. goto out;
  896. }
  897. }
  898. /* If we still don't have a mode after all that, give up. */
  899. if (!intel_lvds->fixed_mode)
  900. goto failed;
  901. out:
  902. if (HAS_PCH_SPLIT(dev)) {
  903. u32 pwm;
  904. pipe = (I915_READ(PCH_LVDS) & LVDS_PIPEB_SELECT) ? 1 : 0;
  905. /* make sure PWM is enabled and locked to the LVDS pipe */
  906. pwm = I915_READ(BLC_PWM_CPU_CTL2);
  907. if (pipe == 0 && (pwm & PWM_PIPE_B))
  908. I915_WRITE(BLC_PWM_CPU_CTL2, pwm & ~PWM_ENABLE);
  909. if (pipe)
  910. pwm |= PWM_PIPE_B;
  911. else
  912. pwm &= ~PWM_PIPE_B;
  913. I915_WRITE(BLC_PWM_CPU_CTL2, pwm | PWM_ENABLE);
  914. pwm = I915_READ(BLC_PWM_PCH_CTL1);
  915. pwm |= PWM_PCH_ENABLE;
  916. I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
  917. }
  918. dev_priv->lid_notifier.notifier_call = intel_lid_notify;
  919. if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
  920. DRM_DEBUG_KMS("lid notifier registration failed\n");
  921. dev_priv->lid_notifier.notifier_call = NULL;
  922. }
  923. /* keep the LVDS connector */
  924. dev_priv->int_lvds_connector = connector;
  925. drm_sysfs_connector_add(connector);
  926. return true;
  927. failed:
  928. DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  929. drm_connector_cleanup(connector);
  930. drm_encoder_cleanup(encoder);
  931. kfree(intel_lvds);
  932. kfree(intel_connector);
  933. return false;
  934. }