pmc.c 2.4 KB

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  1. /*
  2. * arch/powerpc/kernel/pmc.c
  3. *
  4. * Copyright (C) 2004 David Gibson, IBM Corporation.
  5. * Includes code formerly from arch/ppc/kernel/perfmon.c:
  6. * Author: Andy Fleming
  7. * Copyright (c) 2004 Freescale Semiconductor, Inc
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version
  12. * 2 of the License, or (at your option) any later version.
  13. */
  14. #include <linux/config.h>
  15. #include <linux/errno.h>
  16. #include <linux/spinlock.h>
  17. #include <linux/module.h>
  18. #include <asm/processor.h>
  19. #include <asm/pmc.h>
  20. #if defined(CONFIG_FSL_BOOKE) && !defined(CONFIG_E200)
  21. static void dummy_perf(struct pt_regs *regs)
  22. {
  23. unsigned int pmgc0 = mfpmr(PMRN_PMGC0);
  24. pmgc0 &= ~PMGC0_PMIE;
  25. mtpmr(PMRN_PMGC0, pmgc0);
  26. }
  27. #elif defined(CONFIG_PPC64) || defined(CONFIG_6xx)
  28. #ifndef MMCR0_PMAO
  29. #define MMCR0_PMAO 0
  30. #endif
  31. /* Ensure exceptions are disabled */
  32. static void dummy_perf(struct pt_regs *regs)
  33. {
  34. unsigned int mmcr0 = mfspr(SPRN_MMCR0);
  35. mmcr0 &= ~(MMCR0_PMXE|MMCR0_PMAO);
  36. mtspr(SPRN_MMCR0, mmcr0);
  37. }
  38. #else
  39. static void dummy_perf(struct pt_regs *regs)
  40. {
  41. }
  42. #endif
  43. static DEFINE_SPINLOCK(pmc_owner_lock);
  44. static void *pmc_owner_caller; /* mostly for debugging */
  45. perf_irq_t perf_irq = dummy_perf;
  46. int reserve_pmc_hardware(perf_irq_t new_perf_irq)
  47. {
  48. int err = 0;
  49. spin_lock(&pmc_owner_lock);
  50. if (pmc_owner_caller) {
  51. printk(KERN_WARNING "reserve_pmc_hardware: "
  52. "PMC hardware busy (reserved by caller %p)\n",
  53. pmc_owner_caller);
  54. err = -EBUSY;
  55. goto out;
  56. }
  57. pmc_owner_caller = __builtin_return_address(0);
  58. perf_irq = new_perf_irq ? : dummy_perf;
  59. out:
  60. spin_unlock(&pmc_owner_lock);
  61. return err;
  62. }
  63. EXPORT_SYMBOL_GPL(reserve_pmc_hardware);
  64. void release_pmc_hardware(void)
  65. {
  66. spin_lock(&pmc_owner_lock);
  67. WARN_ON(! pmc_owner_caller);
  68. pmc_owner_caller = NULL;
  69. perf_irq = dummy_perf;
  70. spin_unlock(&pmc_owner_lock);
  71. }
  72. EXPORT_SYMBOL_GPL(release_pmc_hardware);
  73. #ifdef CONFIG_PPC64
  74. void power4_enable_pmcs(void)
  75. {
  76. unsigned long hid0;
  77. hid0 = mfspr(SPRN_HID0);
  78. hid0 |= 1UL << (63 - 20);
  79. /* POWER4 requires the following sequence */
  80. asm volatile(
  81. "sync\n"
  82. "mtspr %1, %0\n"
  83. "mfspr %0, %1\n"
  84. "mfspr %0, %1\n"
  85. "mfspr %0, %1\n"
  86. "mfspr %0, %1\n"
  87. "mfspr %0, %1\n"
  88. "mfspr %0, %1\n"
  89. "isync" : "=&r" (hid0) : "i" (SPRN_HID0), "0" (hid0):
  90. "memory");
  91. }
  92. #endif /* CONFIG_PPC64 */