patch_hdmi.c 69 KB

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  1. /*
  2. *
  3. * patch_hdmi.c - routines for HDMI/DisplayPort codecs
  4. *
  5. * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
  6. * Copyright (c) 2006 ATI Technologies Inc.
  7. * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
  8. * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
  9. *
  10. * Authors:
  11. * Wu Fengguang <wfg@linux.intel.com>
  12. *
  13. * Maintained by:
  14. * Wu Fengguang <wfg@linux.intel.com>
  15. *
  16. * This program is free software; you can redistribute it and/or modify it
  17. * under the terms of the GNU General Public License as published by the Free
  18. * Software Foundation; either version 2 of the License, or (at your option)
  19. * any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful, but
  22. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  23. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  24. * for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; if not, write to the Free Software Foundation,
  28. * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  29. */
  30. #include <linux/init.h>
  31. #include <linux/delay.h>
  32. #include <linux/slab.h>
  33. #include <linux/module.h>
  34. #include <sound/core.h>
  35. #include <sound/jack.h>
  36. #include <sound/asoundef.h>
  37. #include <sound/tlv.h>
  38. #include "hda_codec.h"
  39. #include "hda_local.h"
  40. #include "hda_jack.h"
  41. static bool static_hdmi_pcm;
  42. module_param(static_hdmi_pcm, bool, 0644);
  43. MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  44. /*
  45. * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
  46. * could support N independent pipes, each of them can be connected to one or
  47. * more ports (DVI, HDMI or DisplayPort).
  48. *
  49. * The HDA correspondence of pipes/ports are converter/pin nodes.
  50. */
  51. #define MAX_HDMI_CVTS 8
  52. #define MAX_HDMI_PINS 8
  53. struct hdmi_spec_per_cvt {
  54. hda_nid_t cvt_nid;
  55. int assigned;
  56. unsigned int channels_min;
  57. unsigned int channels_max;
  58. u32 rates;
  59. u64 formats;
  60. unsigned int maxbps;
  61. };
  62. /* max. connections to a widget */
  63. #define HDA_MAX_CONNECTIONS 32
  64. struct hdmi_spec_per_pin {
  65. hda_nid_t pin_nid;
  66. int num_mux_nids;
  67. hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  68. struct hda_codec *codec;
  69. struct hdmi_eld sink_eld;
  70. struct delayed_work work;
  71. int repoll_count;
  72. bool non_pcm;
  73. bool chmap_set; /* channel-map override by ALSA API? */
  74. unsigned char chmap[8]; /* ALSA API channel-map */
  75. };
  76. struct hdmi_spec {
  77. int num_cvts;
  78. struct hdmi_spec_per_cvt cvts[MAX_HDMI_CVTS];
  79. hda_nid_t cvt_nids[MAX_HDMI_CVTS];
  80. int num_pins;
  81. struct hdmi_spec_per_pin pins[MAX_HDMI_PINS];
  82. struct hda_pcm pcm_rec[MAX_HDMI_PINS];
  83. unsigned int channels_max; /* max over all cvts */
  84. /*
  85. * Non-generic ATI/NVIDIA specific
  86. */
  87. struct hda_multi_out multiout;
  88. struct hda_pcm_stream pcm_playback;
  89. };
  90. struct hdmi_audio_infoframe {
  91. u8 type; /* 0x84 */
  92. u8 ver; /* 0x01 */
  93. u8 len; /* 0x0a */
  94. u8 checksum;
  95. u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
  96. u8 SS01_SF24;
  97. u8 CXT04;
  98. u8 CA;
  99. u8 LFEPBL01_LSV36_DM_INH7;
  100. };
  101. struct dp_audio_infoframe {
  102. u8 type; /* 0x84 */
  103. u8 len; /* 0x1b */
  104. u8 ver; /* 0x11 << 2 */
  105. u8 CC02_CT47; /* match with HDMI infoframe from this on */
  106. u8 SS01_SF24;
  107. u8 CXT04;
  108. u8 CA;
  109. u8 LFEPBL01_LSV36_DM_INH7;
  110. };
  111. union audio_infoframe {
  112. struct hdmi_audio_infoframe hdmi;
  113. struct dp_audio_infoframe dp;
  114. u8 bytes[0];
  115. };
  116. /*
  117. * CEA speaker placement:
  118. *
  119. * FLH FCH FRH
  120. * FLW FL FLC FC FRC FR FRW
  121. *
  122. * LFE
  123. * TC
  124. *
  125. * RL RLC RC RRC RR
  126. *
  127. * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
  128. * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
  129. */
  130. enum cea_speaker_placement {
  131. FL = (1 << 0), /* Front Left */
  132. FC = (1 << 1), /* Front Center */
  133. FR = (1 << 2), /* Front Right */
  134. FLC = (1 << 3), /* Front Left Center */
  135. FRC = (1 << 4), /* Front Right Center */
  136. RL = (1 << 5), /* Rear Left */
  137. RC = (1 << 6), /* Rear Center */
  138. RR = (1 << 7), /* Rear Right */
  139. RLC = (1 << 8), /* Rear Left Center */
  140. RRC = (1 << 9), /* Rear Right Center */
  141. LFE = (1 << 10), /* Low Frequency Effect */
  142. FLW = (1 << 11), /* Front Left Wide */
  143. FRW = (1 << 12), /* Front Right Wide */
  144. FLH = (1 << 13), /* Front Left High */
  145. FCH = (1 << 14), /* Front Center High */
  146. FRH = (1 << 15), /* Front Right High */
  147. TC = (1 << 16), /* Top Center */
  148. };
  149. /*
  150. * ELD SA bits in the CEA Speaker Allocation data block
  151. */
  152. static int eld_speaker_allocation_bits[] = {
  153. [0] = FL | FR,
  154. [1] = LFE,
  155. [2] = FC,
  156. [3] = RL | RR,
  157. [4] = RC,
  158. [5] = FLC | FRC,
  159. [6] = RLC | RRC,
  160. /* the following are not defined in ELD yet */
  161. [7] = FLW | FRW,
  162. [8] = FLH | FRH,
  163. [9] = TC,
  164. [10] = FCH,
  165. };
  166. struct cea_channel_speaker_allocation {
  167. int ca_index;
  168. int speakers[8];
  169. /* derived values, just for convenience */
  170. int channels;
  171. int spk_mask;
  172. };
  173. /*
  174. * ALSA sequence is:
  175. *
  176. * surround40 surround41 surround50 surround51 surround71
  177. * ch0 front left = = = =
  178. * ch1 front right = = = =
  179. * ch2 rear left = = = =
  180. * ch3 rear right = = = =
  181. * ch4 LFE center center center
  182. * ch5 LFE LFE
  183. * ch6 side left
  184. * ch7 side right
  185. *
  186. * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
  187. */
  188. static int hdmi_channel_mapping[0x32][8] = {
  189. /* stereo */
  190. [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
  191. /* 2.1 */
  192. [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
  193. /* Dolby Surround */
  194. [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
  195. /* surround40 */
  196. [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
  197. /* 4ch */
  198. [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
  199. /* surround41 */
  200. [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
  201. /* surround50 */
  202. [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
  203. /* surround51 */
  204. [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
  205. /* 7.1 */
  206. [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
  207. };
  208. /*
  209. * This is an ordered list!
  210. *
  211. * The preceding ones have better chances to be selected by
  212. * hdmi_channel_allocation().
  213. */
  214. static struct cea_channel_speaker_allocation channel_allocations[] = {
  215. /* channel: 7 6 5 4 3 2 1 0 */
  216. { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
  217. /* 2.1 */
  218. { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
  219. /* Dolby Surround */
  220. { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
  221. /* surround40 */
  222. { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
  223. /* surround41 */
  224. { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
  225. /* surround50 */
  226. { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
  227. /* surround51 */
  228. { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
  229. /* 6.1 */
  230. { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
  231. /* surround71 */
  232. { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
  233. { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
  234. { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
  235. { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
  236. { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
  237. { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
  238. { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
  239. { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
  240. { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
  241. { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
  242. { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
  243. { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
  244. { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
  245. { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
  246. { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
  247. { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
  248. { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
  249. { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
  250. { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
  251. { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
  252. { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
  253. { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
  254. { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
  255. { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
  256. { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
  257. { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
  258. { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
  259. { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
  260. { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
  261. { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
  262. { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
  263. { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
  264. { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
  265. { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
  266. { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
  267. { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
  268. { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
  269. { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
  270. { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
  271. { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
  272. { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
  273. { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
  274. };
  275. /*
  276. * HDMI routines
  277. */
  278. static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
  279. {
  280. int pin_idx;
  281. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
  282. if (spec->pins[pin_idx].pin_nid == pin_nid)
  283. return pin_idx;
  284. snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
  285. return -EINVAL;
  286. }
  287. static int hinfo_to_pin_index(struct hdmi_spec *spec,
  288. struct hda_pcm_stream *hinfo)
  289. {
  290. int pin_idx;
  291. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
  292. if (&spec->pcm_rec[pin_idx].stream[0] == hinfo)
  293. return pin_idx;
  294. snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
  295. return -EINVAL;
  296. }
  297. static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
  298. {
  299. int cvt_idx;
  300. for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
  301. if (spec->cvts[cvt_idx].cvt_nid == cvt_nid)
  302. return cvt_idx;
  303. snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
  304. return -EINVAL;
  305. }
  306. static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
  307. struct snd_ctl_elem_info *uinfo)
  308. {
  309. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  310. struct hdmi_spec *spec;
  311. int pin_idx;
  312. spec = codec->spec;
  313. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  314. pin_idx = kcontrol->private_value;
  315. uinfo->count = spec->pins[pin_idx].sink_eld.eld_size;
  316. return 0;
  317. }
  318. static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
  319. struct snd_ctl_elem_value *ucontrol)
  320. {
  321. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  322. struct hdmi_spec *spec;
  323. int pin_idx;
  324. spec = codec->spec;
  325. pin_idx = kcontrol->private_value;
  326. memcpy(ucontrol->value.bytes.data,
  327. spec->pins[pin_idx].sink_eld.eld_buffer, ELD_MAX_SIZE);
  328. return 0;
  329. }
  330. static struct snd_kcontrol_new eld_bytes_ctl = {
  331. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  332. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  333. .name = "ELD",
  334. .info = hdmi_eld_ctl_info,
  335. .get = hdmi_eld_ctl_get,
  336. };
  337. static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
  338. int device)
  339. {
  340. struct snd_kcontrol *kctl;
  341. struct hdmi_spec *spec = codec->spec;
  342. int err;
  343. kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
  344. if (!kctl)
  345. return -ENOMEM;
  346. kctl->private_value = pin_idx;
  347. kctl->id.device = device;
  348. err = snd_hda_ctl_add(codec, spec->pins[pin_idx].pin_nid, kctl);
  349. if (err < 0)
  350. return err;
  351. return 0;
  352. }
  353. #ifdef BE_PARANOID
  354. static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
  355. int *packet_index, int *byte_index)
  356. {
  357. int val;
  358. val = snd_hda_codec_read(codec, pin_nid, 0,
  359. AC_VERB_GET_HDMI_DIP_INDEX, 0);
  360. *packet_index = val >> 5;
  361. *byte_index = val & 0x1f;
  362. }
  363. #endif
  364. static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
  365. int packet_index, int byte_index)
  366. {
  367. int val;
  368. val = (packet_index << 5) | (byte_index & 0x1f);
  369. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
  370. }
  371. static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
  372. unsigned char val)
  373. {
  374. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
  375. }
  376. static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
  377. {
  378. /* Unmute */
  379. if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
  380. snd_hda_codec_write(codec, pin_nid, 0,
  381. AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
  382. /* Enable pin out: some machines with GM965 gets broken output when
  383. * the pin is disabled or changed while using with HDMI
  384. */
  385. snd_hda_codec_write(codec, pin_nid, 0,
  386. AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
  387. }
  388. static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
  389. {
  390. return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
  391. AC_VERB_GET_CVT_CHAN_COUNT, 0);
  392. }
  393. static void hdmi_set_channel_count(struct hda_codec *codec,
  394. hda_nid_t cvt_nid, int chs)
  395. {
  396. if (chs != hdmi_get_channel_count(codec, cvt_nid))
  397. snd_hda_codec_write(codec, cvt_nid, 0,
  398. AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
  399. }
  400. /*
  401. * Channel mapping routines
  402. */
  403. /*
  404. * Compute derived values in channel_allocations[].
  405. */
  406. static void init_channel_allocations(void)
  407. {
  408. int i, j;
  409. struct cea_channel_speaker_allocation *p;
  410. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  411. p = channel_allocations + i;
  412. p->channels = 0;
  413. p->spk_mask = 0;
  414. for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
  415. if (p->speakers[j]) {
  416. p->channels++;
  417. p->spk_mask |= p->speakers[j];
  418. }
  419. }
  420. }
  421. static int get_channel_allocation_order(int ca)
  422. {
  423. int i;
  424. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  425. if (channel_allocations[i].ca_index == ca)
  426. break;
  427. }
  428. return i;
  429. }
  430. /*
  431. * The transformation takes two steps:
  432. *
  433. * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
  434. * spk_mask => (channel_allocations[]) => ai->CA
  435. *
  436. * TODO: it could select the wrong CA from multiple candidates.
  437. */
  438. static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
  439. {
  440. int i;
  441. int ca = 0;
  442. int spk_mask = 0;
  443. char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
  444. /*
  445. * CA defaults to 0 for basic stereo audio
  446. */
  447. if (channels <= 2)
  448. return 0;
  449. /*
  450. * expand ELD's speaker allocation mask
  451. *
  452. * ELD tells the speaker mask in a compact(paired) form,
  453. * expand ELD's notions to match the ones used by Audio InfoFrame.
  454. */
  455. for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
  456. if (eld->spk_alloc & (1 << i))
  457. spk_mask |= eld_speaker_allocation_bits[i];
  458. }
  459. /* search for the first working match in the CA table */
  460. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  461. if (channels == channel_allocations[i].channels &&
  462. (spk_mask & channel_allocations[i].spk_mask) ==
  463. channel_allocations[i].spk_mask) {
  464. ca = channel_allocations[i].ca_index;
  465. break;
  466. }
  467. }
  468. snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
  469. snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
  470. ca, channels, buf);
  471. return ca;
  472. }
  473. static void hdmi_debug_channel_mapping(struct hda_codec *codec,
  474. hda_nid_t pin_nid)
  475. {
  476. #ifdef CONFIG_SND_DEBUG_VERBOSE
  477. int i;
  478. int slot;
  479. for (i = 0; i < 8; i++) {
  480. slot = snd_hda_codec_read(codec, pin_nid, 0,
  481. AC_VERB_GET_HDMI_CHAN_SLOT, i);
  482. printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
  483. slot >> 4, slot & 0xf);
  484. }
  485. #endif
  486. }
  487. static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
  488. hda_nid_t pin_nid,
  489. bool non_pcm,
  490. int ca)
  491. {
  492. int i;
  493. int err;
  494. int order;
  495. int non_pcm_mapping[8];
  496. order = get_channel_allocation_order(ca);
  497. if (hdmi_channel_mapping[ca][1] == 0) {
  498. for (i = 0; i < channel_allocations[order].channels; i++)
  499. hdmi_channel_mapping[ca][i] = i | (i << 4);
  500. for (; i < 8; i++)
  501. hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
  502. }
  503. if (non_pcm) {
  504. for (i = 0; i < channel_allocations[order].channels; i++)
  505. non_pcm_mapping[i] = i | (i << 4);
  506. for (; i < 8; i++)
  507. non_pcm_mapping[i] = 0xf | (i << 4);
  508. }
  509. for (i = 0; i < 8; i++) {
  510. err = snd_hda_codec_write(codec, pin_nid, 0,
  511. AC_VERB_SET_HDMI_CHAN_SLOT,
  512. non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]);
  513. if (err) {
  514. snd_printdd(KERN_NOTICE
  515. "HDMI: channel mapping failed\n");
  516. break;
  517. }
  518. }
  519. hdmi_debug_channel_mapping(codec, pin_nid);
  520. }
  521. struct channel_map_table {
  522. unsigned char map; /* ALSA API channel map position */
  523. unsigned char cea_slot; /* CEA slot value */
  524. int spk_mask; /* speaker position bit mask */
  525. };
  526. static struct channel_map_table map_tables[] = {
  527. { SNDRV_CHMAP_FL, 0x00, FL },
  528. { SNDRV_CHMAP_FR, 0x01, FR },
  529. { SNDRV_CHMAP_RL, 0x04, RL },
  530. { SNDRV_CHMAP_RR, 0x05, RR },
  531. { SNDRV_CHMAP_LFE, 0x02, LFE },
  532. { SNDRV_CHMAP_FC, 0x03, FC },
  533. { SNDRV_CHMAP_RLC, 0x06, RLC },
  534. { SNDRV_CHMAP_RRC, 0x07, RRC },
  535. {} /* terminator */
  536. };
  537. /* from ALSA API channel position to speaker bit mask */
  538. static int to_spk_mask(unsigned char c)
  539. {
  540. struct channel_map_table *t = map_tables;
  541. for (; t->map; t++) {
  542. if (t->map == c)
  543. return t->spk_mask;
  544. }
  545. return 0;
  546. }
  547. /* from ALSA API channel position to CEA slot */
  548. static int to_cea_slot(unsigned char c)
  549. {
  550. struct channel_map_table *t = map_tables;
  551. for (; t->map; t++) {
  552. if (t->map == c)
  553. return t->cea_slot;
  554. }
  555. return 0x0f;
  556. }
  557. /* from CEA slot to ALSA API channel position */
  558. static int from_cea_slot(unsigned char c)
  559. {
  560. struct channel_map_table *t = map_tables;
  561. for (; t->map; t++) {
  562. if (t->cea_slot == c)
  563. return t->map;
  564. }
  565. return 0;
  566. }
  567. /* from speaker bit mask to ALSA API channel position */
  568. static int spk_to_chmap(int spk)
  569. {
  570. struct channel_map_table *t = map_tables;
  571. for (; t->map; t++) {
  572. if (t->spk_mask == spk)
  573. return t->map;
  574. }
  575. return 0;
  576. }
  577. /* get the CA index corresponding to the given ALSA API channel map */
  578. static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
  579. {
  580. int i, spks = 0, spk_mask = 0;
  581. for (i = 0; i < chs; i++) {
  582. int mask = to_spk_mask(map[i]);
  583. if (mask) {
  584. spk_mask |= mask;
  585. spks++;
  586. }
  587. }
  588. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  589. if ((chs == channel_allocations[i].channels ||
  590. spks == channel_allocations[i].channels) &&
  591. (spk_mask & channel_allocations[i].spk_mask) ==
  592. channel_allocations[i].spk_mask)
  593. return channel_allocations[i].ca_index;
  594. }
  595. return -1;
  596. }
  597. /* set up the channel slots for the given ALSA API channel map */
  598. static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
  599. hda_nid_t pin_nid,
  600. int chs, unsigned char *map)
  601. {
  602. int i;
  603. for (i = 0; i < 8; i++) {
  604. int val, err;
  605. if (i < chs)
  606. val = to_cea_slot(map[i]);
  607. else
  608. val = 0xf;
  609. val |= (i << 4);
  610. err = snd_hda_codec_write(codec, pin_nid, 0,
  611. AC_VERB_SET_HDMI_CHAN_SLOT, val);
  612. if (err)
  613. return -EINVAL;
  614. }
  615. return 0;
  616. }
  617. /* store ALSA API channel map from the current default map */
  618. static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
  619. {
  620. int i;
  621. for (i = 0; i < 8; i++) {
  622. if (i < channel_allocations[ca].channels)
  623. map[i] = from_cea_slot((hdmi_channel_mapping[ca][i] >> 4) & 0x0f);
  624. else
  625. map[i] = 0;
  626. }
  627. }
  628. static void hdmi_setup_channel_mapping(struct hda_codec *codec,
  629. hda_nid_t pin_nid, bool non_pcm, int ca,
  630. int channels, unsigned char *map,
  631. bool chmap_set)
  632. {
  633. if (!non_pcm && chmap_set) {
  634. hdmi_manual_setup_channel_mapping(codec, pin_nid,
  635. channels, map);
  636. } else {
  637. hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
  638. hdmi_setup_fake_chmap(map, ca);
  639. }
  640. }
  641. /*
  642. * Audio InfoFrame routines
  643. */
  644. /*
  645. * Enable Audio InfoFrame Transmission
  646. */
  647. static void hdmi_start_infoframe_trans(struct hda_codec *codec,
  648. hda_nid_t pin_nid)
  649. {
  650. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  651. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
  652. AC_DIPXMIT_BEST);
  653. }
  654. /*
  655. * Disable Audio InfoFrame Transmission
  656. */
  657. static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
  658. hda_nid_t pin_nid)
  659. {
  660. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  661. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
  662. AC_DIPXMIT_DISABLE);
  663. }
  664. static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
  665. {
  666. #ifdef CONFIG_SND_DEBUG_VERBOSE
  667. int i;
  668. int size;
  669. size = snd_hdmi_get_eld_size(codec, pin_nid);
  670. printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
  671. for (i = 0; i < 8; i++) {
  672. size = snd_hda_codec_read(codec, pin_nid, 0,
  673. AC_VERB_GET_HDMI_DIP_SIZE, i);
  674. printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
  675. }
  676. #endif
  677. }
  678. static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
  679. {
  680. #ifdef BE_PARANOID
  681. int i, j;
  682. int size;
  683. int pi, bi;
  684. for (i = 0; i < 8; i++) {
  685. size = snd_hda_codec_read(codec, pin_nid, 0,
  686. AC_VERB_GET_HDMI_DIP_SIZE, i);
  687. if (size == 0)
  688. continue;
  689. hdmi_set_dip_index(codec, pin_nid, i, 0x0);
  690. for (j = 1; j < 1000; j++) {
  691. hdmi_write_dip_byte(codec, pin_nid, 0x0);
  692. hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
  693. if (pi != i)
  694. snd_printd(KERN_INFO "dip index %d: %d != %d\n",
  695. bi, pi, i);
  696. if (bi == 0) /* byte index wrapped around */
  697. break;
  698. }
  699. snd_printd(KERN_INFO
  700. "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
  701. i, size, j);
  702. }
  703. #endif
  704. }
  705. static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
  706. {
  707. u8 *bytes = (u8 *)hdmi_ai;
  708. u8 sum = 0;
  709. int i;
  710. hdmi_ai->checksum = 0;
  711. for (i = 0; i < sizeof(*hdmi_ai); i++)
  712. sum += bytes[i];
  713. hdmi_ai->checksum = -sum;
  714. }
  715. static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
  716. hda_nid_t pin_nid,
  717. u8 *dip, int size)
  718. {
  719. int i;
  720. hdmi_debug_dip_size(codec, pin_nid);
  721. hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
  722. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  723. for (i = 0; i < size; i++)
  724. hdmi_write_dip_byte(codec, pin_nid, dip[i]);
  725. }
  726. static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
  727. u8 *dip, int size)
  728. {
  729. u8 val;
  730. int i;
  731. if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
  732. != AC_DIPXMIT_BEST)
  733. return false;
  734. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  735. for (i = 0; i < size; i++) {
  736. val = snd_hda_codec_read(codec, pin_nid, 0,
  737. AC_VERB_GET_HDMI_DIP_DATA, 0);
  738. if (val != dip[i])
  739. return false;
  740. }
  741. return true;
  742. }
  743. static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx,
  744. bool non_pcm,
  745. struct snd_pcm_substream *substream)
  746. {
  747. struct hdmi_spec *spec = codec->spec;
  748. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  749. hda_nid_t pin_nid = per_pin->pin_nid;
  750. int channels = substream->runtime->channels;
  751. struct hdmi_eld *eld;
  752. int ca;
  753. union audio_infoframe ai;
  754. eld = &spec->pins[pin_idx].sink_eld;
  755. if (!eld->monitor_present)
  756. return;
  757. if (!non_pcm && per_pin->chmap_set)
  758. ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
  759. else
  760. ca = hdmi_channel_allocation(eld, channels);
  761. if (ca < 0)
  762. ca = 0;
  763. memset(&ai, 0, sizeof(ai));
  764. if (eld->conn_type == 0) { /* HDMI */
  765. struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
  766. hdmi_ai->type = 0x84;
  767. hdmi_ai->ver = 0x01;
  768. hdmi_ai->len = 0x0a;
  769. hdmi_ai->CC02_CT47 = channels - 1;
  770. hdmi_ai->CA = ca;
  771. hdmi_checksum_audio_infoframe(hdmi_ai);
  772. } else if (eld->conn_type == 1) { /* DisplayPort */
  773. struct dp_audio_infoframe *dp_ai = &ai.dp;
  774. dp_ai->type = 0x84;
  775. dp_ai->len = 0x1b;
  776. dp_ai->ver = 0x11 << 2;
  777. dp_ai->CC02_CT47 = channels - 1;
  778. dp_ai->CA = ca;
  779. } else {
  780. snd_printd("HDMI: unknown connection type at pin %d\n",
  781. pin_nid);
  782. return;
  783. }
  784. /*
  785. * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
  786. * sizeof(*dp_ai) to avoid partial match/update problems when
  787. * the user switches between HDMI/DP monitors.
  788. */
  789. if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
  790. sizeof(ai))) {
  791. snd_printdd("hdmi_setup_audio_infoframe: "
  792. "pin=%d channels=%d\n",
  793. pin_nid,
  794. channels);
  795. hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
  796. channels, per_pin->chmap,
  797. per_pin->chmap_set);
  798. hdmi_stop_infoframe_trans(codec, pin_nid);
  799. hdmi_fill_audio_infoframe(codec, pin_nid,
  800. ai.bytes, sizeof(ai));
  801. hdmi_start_infoframe_trans(codec, pin_nid);
  802. } else {
  803. /* For non-pcm audio switch, setup new channel mapping
  804. * accordingly */
  805. if (per_pin->non_pcm != non_pcm)
  806. hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
  807. channels, per_pin->chmap,
  808. per_pin->chmap_set);
  809. }
  810. per_pin->non_pcm = non_pcm;
  811. }
  812. /*
  813. * Unsolicited events
  814. */
  815. static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
  816. static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
  817. {
  818. struct hdmi_spec *spec = codec->spec;
  819. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  820. int pin_nid;
  821. int pin_idx;
  822. struct hda_jack_tbl *jack;
  823. jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
  824. if (!jack)
  825. return;
  826. pin_nid = jack->nid;
  827. jack->jack_dirty = 1;
  828. _snd_printd(SND_PR_VERBOSE,
  829. "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
  830. codec->addr, pin_nid,
  831. !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
  832. pin_idx = pin_nid_to_pin_index(spec, pin_nid);
  833. if (pin_idx < 0)
  834. return;
  835. hdmi_present_sense(&spec->pins[pin_idx], 1);
  836. snd_hda_jack_report_sync(codec);
  837. }
  838. static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
  839. {
  840. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  841. int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
  842. int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
  843. int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
  844. printk(KERN_INFO
  845. "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
  846. codec->addr,
  847. tag,
  848. subtag,
  849. cp_state,
  850. cp_ready);
  851. /* TODO */
  852. if (cp_state)
  853. ;
  854. if (cp_ready)
  855. ;
  856. }
  857. static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
  858. {
  859. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  860. int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
  861. if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
  862. snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
  863. return;
  864. }
  865. if (subtag == 0)
  866. hdmi_intrinsic_event(codec, res);
  867. else
  868. hdmi_non_intrinsic_event(codec, res);
  869. }
  870. /*
  871. * Callbacks
  872. */
  873. /* HBR should be Non-PCM, 8 channels */
  874. #define is_hbr_format(format) \
  875. ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
  876. static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
  877. hda_nid_t pin_nid, u32 stream_tag, int format)
  878. {
  879. int pinctl;
  880. int new_pinctl = 0;
  881. if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
  882. pinctl = snd_hda_codec_read(codec, pin_nid, 0,
  883. AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
  884. new_pinctl = pinctl & ~AC_PINCTL_EPT;
  885. if (is_hbr_format(format))
  886. new_pinctl |= AC_PINCTL_EPT_HBR;
  887. else
  888. new_pinctl |= AC_PINCTL_EPT_NATIVE;
  889. snd_printdd("hdmi_setup_stream: "
  890. "NID=0x%x, %spinctl=0x%x\n",
  891. pin_nid,
  892. pinctl == new_pinctl ? "" : "new-",
  893. new_pinctl);
  894. if (pinctl != new_pinctl)
  895. snd_hda_codec_write(codec, pin_nid, 0,
  896. AC_VERB_SET_PIN_WIDGET_CONTROL,
  897. new_pinctl);
  898. }
  899. if (is_hbr_format(format) && !new_pinctl) {
  900. snd_printdd("hdmi_setup_stream: HBR is not supported\n");
  901. return -EINVAL;
  902. }
  903. snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
  904. return 0;
  905. }
  906. /*
  907. * HDA PCM callbacks
  908. */
  909. static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
  910. struct hda_codec *codec,
  911. struct snd_pcm_substream *substream)
  912. {
  913. struct hdmi_spec *spec = codec->spec;
  914. struct snd_pcm_runtime *runtime = substream->runtime;
  915. int pin_idx, cvt_idx, mux_idx = 0;
  916. struct hdmi_spec_per_pin *per_pin;
  917. struct hdmi_eld *eld;
  918. struct hdmi_spec_per_cvt *per_cvt = NULL;
  919. /* Validate hinfo */
  920. pin_idx = hinfo_to_pin_index(spec, hinfo);
  921. if (snd_BUG_ON(pin_idx < 0))
  922. return -EINVAL;
  923. per_pin = &spec->pins[pin_idx];
  924. eld = &per_pin->sink_eld;
  925. /* Dynamically assign converter to stream */
  926. for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
  927. per_cvt = &spec->cvts[cvt_idx];
  928. /* Must not already be assigned */
  929. if (per_cvt->assigned)
  930. continue;
  931. /* Must be in pin's mux's list of converters */
  932. for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
  933. if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
  934. break;
  935. /* Not in mux list */
  936. if (mux_idx == per_pin->num_mux_nids)
  937. continue;
  938. break;
  939. }
  940. /* No free converters */
  941. if (cvt_idx == spec->num_cvts)
  942. return -ENODEV;
  943. /* Claim converter */
  944. per_cvt->assigned = 1;
  945. hinfo->nid = per_cvt->cvt_nid;
  946. snd_hda_codec_write(codec, per_pin->pin_nid, 0,
  947. AC_VERB_SET_CONNECT_SEL,
  948. mux_idx);
  949. snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
  950. /* Initially set the converter's capabilities */
  951. hinfo->channels_min = per_cvt->channels_min;
  952. hinfo->channels_max = per_cvt->channels_max;
  953. hinfo->rates = per_cvt->rates;
  954. hinfo->formats = per_cvt->formats;
  955. hinfo->maxbps = per_cvt->maxbps;
  956. /* Restrict capabilities by ELD if this isn't disabled */
  957. if (!static_hdmi_pcm && eld->eld_valid) {
  958. snd_hdmi_eld_update_pcm_info(eld, hinfo);
  959. if (hinfo->channels_min > hinfo->channels_max ||
  960. !hinfo->rates || !hinfo->formats) {
  961. per_cvt->assigned = 0;
  962. hinfo->nid = 0;
  963. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  964. return -ENODEV;
  965. }
  966. }
  967. /* Store the updated parameters */
  968. runtime->hw.channels_min = hinfo->channels_min;
  969. runtime->hw.channels_max = hinfo->channels_max;
  970. runtime->hw.formats = hinfo->formats;
  971. runtime->hw.rates = hinfo->rates;
  972. snd_pcm_hw_constraint_step(substream->runtime, 0,
  973. SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  974. return 0;
  975. }
  976. /*
  977. * HDA/HDMI auto parsing
  978. */
  979. static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
  980. {
  981. struct hdmi_spec *spec = codec->spec;
  982. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  983. hda_nid_t pin_nid = per_pin->pin_nid;
  984. if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
  985. snd_printk(KERN_WARNING
  986. "HDMI: pin %d wcaps %#x "
  987. "does not support connection list\n",
  988. pin_nid, get_wcaps(codec, pin_nid));
  989. return -EINVAL;
  990. }
  991. per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
  992. per_pin->mux_nids,
  993. HDA_MAX_CONNECTIONS);
  994. return 0;
  995. }
  996. static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
  997. {
  998. struct hda_codec *codec = per_pin->codec;
  999. struct hdmi_eld *eld = &per_pin->sink_eld;
  1000. hda_nid_t pin_nid = per_pin->pin_nid;
  1001. /*
  1002. * Always execute a GetPinSense verb here, even when called from
  1003. * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
  1004. * response's PD bit is not the real PD value, but indicates that
  1005. * the real PD value changed. An older version of the HD-audio
  1006. * specification worked this way. Hence, we just ignore the data in
  1007. * the unsolicited response to avoid custom WARs.
  1008. */
  1009. int present = snd_hda_pin_sense(codec, pin_nid);
  1010. bool eld_valid = false;
  1011. memset(eld, 0, offsetof(struct hdmi_eld, eld_buffer));
  1012. eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
  1013. if (eld->monitor_present)
  1014. eld_valid = !!(present & AC_PINSENSE_ELDV);
  1015. _snd_printd(SND_PR_VERBOSE,
  1016. "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
  1017. codec->addr, pin_nid, eld->monitor_present, eld_valid);
  1018. if (eld_valid) {
  1019. if (!snd_hdmi_get_eld(eld, codec, pin_nid))
  1020. snd_hdmi_show_eld(eld);
  1021. else if (repoll) {
  1022. queue_delayed_work(codec->bus->workq,
  1023. &per_pin->work,
  1024. msecs_to_jiffies(300));
  1025. }
  1026. }
  1027. }
  1028. static void hdmi_repoll_eld(struct work_struct *work)
  1029. {
  1030. struct hdmi_spec_per_pin *per_pin =
  1031. container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
  1032. if (per_pin->repoll_count++ > 6)
  1033. per_pin->repoll_count = 0;
  1034. hdmi_present_sense(per_pin, per_pin->repoll_count);
  1035. }
  1036. static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
  1037. hda_nid_t nid);
  1038. static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
  1039. {
  1040. struct hdmi_spec *spec = codec->spec;
  1041. unsigned int caps, config;
  1042. int pin_idx;
  1043. struct hdmi_spec_per_pin *per_pin;
  1044. int err;
  1045. caps = snd_hda_query_pin_caps(codec, pin_nid);
  1046. if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
  1047. return 0;
  1048. config = snd_hda_codec_get_pincfg(codec, pin_nid);
  1049. if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
  1050. return 0;
  1051. if (snd_BUG_ON(spec->num_pins >= MAX_HDMI_PINS))
  1052. return -E2BIG;
  1053. if (codec->vendor_id == 0x80862807)
  1054. intel_haswell_fixup_connect_list(codec, pin_nid);
  1055. pin_idx = spec->num_pins;
  1056. per_pin = &spec->pins[pin_idx];
  1057. per_pin->pin_nid = pin_nid;
  1058. per_pin->non_pcm = false;
  1059. err = hdmi_read_pin_conn(codec, pin_idx);
  1060. if (err < 0)
  1061. return err;
  1062. spec->num_pins++;
  1063. return 0;
  1064. }
  1065. static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
  1066. {
  1067. struct hdmi_spec *spec = codec->spec;
  1068. int cvt_idx;
  1069. struct hdmi_spec_per_cvt *per_cvt;
  1070. unsigned int chans;
  1071. int err;
  1072. if (snd_BUG_ON(spec->num_cvts >= MAX_HDMI_CVTS))
  1073. return -E2BIG;
  1074. chans = get_wcaps(codec, cvt_nid);
  1075. chans = get_wcaps_channels(chans);
  1076. cvt_idx = spec->num_cvts;
  1077. per_cvt = &spec->cvts[cvt_idx];
  1078. per_cvt->cvt_nid = cvt_nid;
  1079. per_cvt->channels_min = 2;
  1080. if (chans <= 16) {
  1081. per_cvt->channels_max = chans;
  1082. if (chans > spec->channels_max)
  1083. spec->channels_max = chans;
  1084. }
  1085. err = snd_hda_query_supported_pcm(codec, cvt_nid,
  1086. &per_cvt->rates,
  1087. &per_cvt->formats,
  1088. &per_cvt->maxbps);
  1089. if (err < 0)
  1090. return err;
  1091. spec->cvt_nids[spec->num_cvts++] = cvt_nid;
  1092. return 0;
  1093. }
  1094. static int hdmi_parse_codec(struct hda_codec *codec)
  1095. {
  1096. hda_nid_t nid;
  1097. int i, nodes;
  1098. nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
  1099. if (!nid || nodes < 0) {
  1100. snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
  1101. return -EINVAL;
  1102. }
  1103. for (i = 0; i < nodes; i++, nid++) {
  1104. unsigned int caps;
  1105. unsigned int type;
  1106. caps = get_wcaps(codec, nid);
  1107. type = get_wcaps_type(caps);
  1108. if (!(caps & AC_WCAP_DIGITAL))
  1109. continue;
  1110. switch (type) {
  1111. case AC_WID_AUD_OUT:
  1112. hdmi_add_cvt(codec, nid);
  1113. break;
  1114. case AC_WID_PIN:
  1115. hdmi_add_pin(codec, nid);
  1116. break;
  1117. }
  1118. }
  1119. #ifdef CONFIG_PM
  1120. /* We're seeing some problems with unsolicited hot plug events on
  1121. * PantherPoint after S3, if this is not enabled */
  1122. if (codec->vendor_id == 0x80862806)
  1123. codec->bus->power_keep_link_on = 1;
  1124. /*
  1125. * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
  1126. * can be lost and presence sense verb will become inaccurate if the
  1127. * HDA link is powered off at hot plug or hw initialization time.
  1128. */
  1129. else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
  1130. AC_PWRST_EPSS))
  1131. codec->bus->power_keep_link_on = 1;
  1132. #endif
  1133. return 0;
  1134. }
  1135. /*
  1136. */
  1137. static char *get_hdmi_pcm_name(int idx)
  1138. {
  1139. static char names[MAX_HDMI_PINS][8];
  1140. sprintf(&names[idx][0], "HDMI %d", idx);
  1141. return &names[idx][0];
  1142. }
  1143. static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
  1144. {
  1145. struct hda_spdif_out *spdif;
  1146. bool non_pcm;
  1147. mutex_lock(&codec->spdif_mutex);
  1148. spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
  1149. non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
  1150. mutex_unlock(&codec->spdif_mutex);
  1151. return non_pcm;
  1152. }
  1153. /*
  1154. * HDMI callbacks
  1155. */
  1156. static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1157. struct hda_codec *codec,
  1158. unsigned int stream_tag,
  1159. unsigned int format,
  1160. struct snd_pcm_substream *substream)
  1161. {
  1162. hda_nid_t cvt_nid = hinfo->nid;
  1163. struct hdmi_spec *spec = codec->spec;
  1164. int pin_idx = hinfo_to_pin_index(spec, hinfo);
  1165. hda_nid_t pin_nid = spec->pins[pin_idx].pin_nid;
  1166. bool non_pcm;
  1167. non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
  1168. hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
  1169. hdmi_setup_audio_infoframe(codec, pin_idx, non_pcm, substream);
  1170. return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
  1171. }
  1172. static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
  1173. struct hda_codec *codec,
  1174. struct snd_pcm_substream *substream)
  1175. {
  1176. snd_hda_codec_cleanup_stream(codec, hinfo->nid);
  1177. return 0;
  1178. }
  1179. static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
  1180. struct hda_codec *codec,
  1181. struct snd_pcm_substream *substream)
  1182. {
  1183. struct hdmi_spec *spec = codec->spec;
  1184. int cvt_idx, pin_idx;
  1185. struct hdmi_spec_per_cvt *per_cvt;
  1186. struct hdmi_spec_per_pin *per_pin;
  1187. if (hinfo->nid) {
  1188. cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
  1189. if (snd_BUG_ON(cvt_idx < 0))
  1190. return -EINVAL;
  1191. per_cvt = &spec->cvts[cvt_idx];
  1192. snd_BUG_ON(!per_cvt->assigned);
  1193. per_cvt->assigned = 0;
  1194. hinfo->nid = 0;
  1195. pin_idx = hinfo_to_pin_index(spec, hinfo);
  1196. if (snd_BUG_ON(pin_idx < 0))
  1197. return -EINVAL;
  1198. per_pin = &spec->pins[pin_idx];
  1199. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  1200. per_pin->chmap_set = false;
  1201. memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
  1202. }
  1203. return 0;
  1204. }
  1205. static const struct hda_pcm_ops generic_ops = {
  1206. .open = hdmi_pcm_open,
  1207. .close = hdmi_pcm_close,
  1208. .prepare = generic_hdmi_playback_pcm_prepare,
  1209. .cleanup = generic_hdmi_playback_pcm_cleanup,
  1210. };
  1211. /*
  1212. * ALSA API channel-map control callbacks
  1213. */
  1214. static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
  1215. struct snd_ctl_elem_info *uinfo)
  1216. {
  1217. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1218. struct hda_codec *codec = info->private_data;
  1219. struct hdmi_spec *spec = codec->spec;
  1220. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1221. uinfo->count = spec->channels_max;
  1222. uinfo->value.integer.min = 0;
  1223. uinfo->value.integer.max = SNDRV_CHMAP_LAST;
  1224. return 0;
  1225. }
  1226. static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
  1227. unsigned int size, unsigned int __user *tlv)
  1228. {
  1229. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1230. struct hda_codec *codec = info->private_data;
  1231. struct hdmi_spec *spec = codec->spec;
  1232. const unsigned int valid_mask =
  1233. FL | FR | RL | RR | LFE | FC | RLC | RRC;
  1234. unsigned int __user *dst;
  1235. int chs, count = 0;
  1236. if (size < 8)
  1237. return -ENOMEM;
  1238. if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
  1239. return -EFAULT;
  1240. size -= 8;
  1241. dst = tlv + 2;
  1242. for (chs = 2; chs <= spec->channels_max; chs++) {
  1243. int i, c;
  1244. struct cea_channel_speaker_allocation *cap;
  1245. cap = channel_allocations;
  1246. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
  1247. int chs_bytes = chs * 4;
  1248. if (cap->channels != chs)
  1249. continue;
  1250. if (cap->spk_mask & ~valid_mask)
  1251. continue;
  1252. if (size < 8)
  1253. return -ENOMEM;
  1254. if (put_user(SNDRV_CTL_TLVT_CHMAP_VAR, dst) ||
  1255. put_user(chs_bytes, dst + 1))
  1256. return -EFAULT;
  1257. dst += 2;
  1258. size -= 8;
  1259. count += 8;
  1260. if (size < chs_bytes)
  1261. return -ENOMEM;
  1262. size -= chs_bytes;
  1263. count += chs_bytes;
  1264. for (c = 7; c >= 0; c--) {
  1265. int spk = cap->speakers[c];
  1266. if (!spk)
  1267. continue;
  1268. if (put_user(spk_to_chmap(spk), dst))
  1269. return -EFAULT;
  1270. dst++;
  1271. }
  1272. }
  1273. }
  1274. if (put_user(count, tlv + 1))
  1275. return -EFAULT;
  1276. return 0;
  1277. }
  1278. static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
  1279. struct snd_ctl_elem_value *ucontrol)
  1280. {
  1281. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1282. struct hda_codec *codec = info->private_data;
  1283. struct hdmi_spec *spec = codec->spec;
  1284. int pin_idx = kcontrol->private_value;
  1285. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1286. int i;
  1287. for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
  1288. ucontrol->value.integer.value[i] = per_pin->chmap[i];
  1289. return 0;
  1290. }
  1291. static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
  1292. struct snd_ctl_elem_value *ucontrol)
  1293. {
  1294. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1295. struct hda_codec *codec = info->private_data;
  1296. struct hdmi_spec *spec = codec->spec;
  1297. int pin_idx = kcontrol->private_value;
  1298. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1299. unsigned int ctl_idx;
  1300. struct snd_pcm_substream *substream;
  1301. unsigned char chmap[8];
  1302. int i, ca, prepared = 0;
  1303. ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1304. substream = snd_pcm_chmap_substream(info, ctl_idx);
  1305. if (!substream || !substream->runtime)
  1306. return 0; /* just for avoiding error from alsactl restore */
  1307. switch (substream->runtime->status->state) {
  1308. case SNDRV_PCM_STATE_OPEN:
  1309. case SNDRV_PCM_STATE_SETUP:
  1310. break;
  1311. case SNDRV_PCM_STATE_PREPARED:
  1312. prepared = 1;
  1313. break;
  1314. default:
  1315. return -EBUSY;
  1316. }
  1317. memset(chmap, 0, sizeof(chmap));
  1318. for (i = 0; i < ARRAY_SIZE(chmap); i++)
  1319. chmap[i] = ucontrol->value.integer.value[i];
  1320. if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
  1321. return 0;
  1322. ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
  1323. if (ca < 0)
  1324. return -EINVAL;
  1325. per_pin->chmap_set = true;
  1326. memcpy(per_pin->chmap, chmap, sizeof(chmap));
  1327. if (prepared)
  1328. hdmi_setup_audio_infoframe(codec, pin_idx, per_pin->non_pcm,
  1329. substream);
  1330. return 0;
  1331. }
  1332. static int generic_hdmi_build_pcms(struct hda_codec *codec)
  1333. {
  1334. struct hdmi_spec *spec = codec->spec;
  1335. int pin_idx;
  1336. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1337. struct hda_pcm *info;
  1338. struct hda_pcm_stream *pstr;
  1339. info = &spec->pcm_rec[pin_idx];
  1340. info->name = get_hdmi_pcm_name(pin_idx);
  1341. info->pcm_type = HDA_PCM_TYPE_HDMI;
  1342. info->own_chmap = true;
  1343. pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
  1344. pstr->substreams = 1;
  1345. pstr->ops = generic_ops;
  1346. /* other pstr fields are set in open */
  1347. }
  1348. codec->num_pcms = spec->num_pins;
  1349. codec->pcm_info = spec->pcm_rec;
  1350. return 0;
  1351. }
  1352. static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
  1353. {
  1354. char hdmi_str[32] = "HDMI/DP";
  1355. struct hdmi_spec *spec = codec->spec;
  1356. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1357. int pcmdev = spec->pcm_rec[pin_idx].device;
  1358. if (pcmdev > 0)
  1359. sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
  1360. return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
  1361. }
  1362. static int generic_hdmi_build_controls(struct hda_codec *codec)
  1363. {
  1364. struct hdmi_spec *spec = codec->spec;
  1365. int err;
  1366. int pin_idx;
  1367. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1368. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1369. err = generic_hdmi_build_jack(codec, pin_idx);
  1370. if (err < 0)
  1371. return err;
  1372. err = snd_hda_create_dig_out_ctls(codec,
  1373. per_pin->pin_nid,
  1374. per_pin->mux_nids[0],
  1375. HDA_PCM_TYPE_HDMI);
  1376. if (err < 0)
  1377. return err;
  1378. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  1379. /* add control for ELD Bytes */
  1380. err = hdmi_create_eld_ctl(codec,
  1381. pin_idx,
  1382. spec->pcm_rec[pin_idx].device);
  1383. if (err < 0)
  1384. return err;
  1385. hdmi_present_sense(per_pin, 0);
  1386. }
  1387. /* add channel maps */
  1388. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1389. struct snd_pcm_chmap *chmap;
  1390. struct snd_kcontrol *kctl;
  1391. int i;
  1392. err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
  1393. SNDRV_PCM_STREAM_PLAYBACK,
  1394. NULL, 0, pin_idx, &chmap);
  1395. if (err < 0)
  1396. return err;
  1397. /* override handlers */
  1398. chmap->private_data = codec;
  1399. kctl = chmap->kctl;
  1400. for (i = 0; i < kctl->count; i++)
  1401. kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
  1402. kctl->info = hdmi_chmap_ctl_info;
  1403. kctl->get = hdmi_chmap_ctl_get;
  1404. kctl->put = hdmi_chmap_ctl_put;
  1405. kctl->tlv.c = hdmi_chmap_ctl_tlv;
  1406. }
  1407. return 0;
  1408. }
  1409. static int generic_hdmi_init_per_pins(struct hda_codec *codec)
  1410. {
  1411. struct hdmi_spec *spec = codec->spec;
  1412. int pin_idx;
  1413. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1414. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1415. struct hdmi_eld *eld = &per_pin->sink_eld;
  1416. per_pin->codec = codec;
  1417. INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
  1418. snd_hda_eld_proc_new(codec, eld, pin_idx);
  1419. }
  1420. return 0;
  1421. }
  1422. static int generic_hdmi_init(struct hda_codec *codec)
  1423. {
  1424. struct hdmi_spec *spec = codec->spec;
  1425. int pin_idx;
  1426. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1427. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1428. hda_nid_t pin_nid = per_pin->pin_nid;
  1429. hdmi_init_pin(codec, pin_nid);
  1430. snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
  1431. }
  1432. return 0;
  1433. }
  1434. static void generic_hdmi_free(struct hda_codec *codec)
  1435. {
  1436. struct hdmi_spec *spec = codec->spec;
  1437. int pin_idx;
  1438. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1439. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1440. struct hdmi_eld *eld = &per_pin->sink_eld;
  1441. cancel_delayed_work(&per_pin->work);
  1442. snd_hda_eld_proc_free(codec, eld);
  1443. }
  1444. flush_workqueue(codec->bus->workq);
  1445. kfree(spec);
  1446. }
  1447. static const struct hda_codec_ops generic_hdmi_patch_ops = {
  1448. .init = generic_hdmi_init,
  1449. .free = generic_hdmi_free,
  1450. .build_pcms = generic_hdmi_build_pcms,
  1451. .build_controls = generic_hdmi_build_controls,
  1452. .unsol_event = hdmi_unsol_event,
  1453. };
  1454. static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
  1455. hda_nid_t nid)
  1456. {
  1457. struct hdmi_spec *spec = codec->spec;
  1458. hda_nid_t conns[4];
  1459. int nconns;
  1460. nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
  1461. if (nconns == spec->num_cvts &&
  1462. !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
  1463. return;
  1464. /* override pins connection list */
  1465. snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid);
  1466. snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
  1467. }
  1468. #define INTEL_VENDOR_NID 0x08
  1469. #define INTEL_GET_VENDOR_VERB 0xf81
  1470. #define INTEL_SET_VENDOR_VERB 0x781
  1471. #define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
  1472. #define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
  1473. static void intel_haswell_enable_all_pins(struct hda_codec *codec,
  1474. const struct hda_fixup *fix, int action)
  1475. {
  1476. unsigned int vendor_param;
  1477. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1478. return;
  1479. vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
  1480. INTEL_GET_VENDOR_VERB, 0);
  1481. if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
  1482. return;
  1483. vendor_param |= INTEL_EN_ALL_PIN_CVTS;
  1484. vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
  1485. INTEL_SET_VENDOR_VERB, vendor_param);
  1486. if (vendor_param == -1)
  1487. return;
  1488. snd_hda_codec_update_widgets(codec);
  1489. return;
  1490. }
  1491. static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
  1492. {
  1493. unsigned int vendor_param;
  1494. vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
  1495. INTEL_GET_VENDOR_VERB, 0);
  1496. if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
  1497. return;
  1498. /* enable DP1.2 mode */
  1499. vendor_param |= INTEL_EN_DP12;
  1500. snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
  1501. INTEL_SET_VENDOR_VERB, vendor_param);
  1502. }
  1503. /* available models for fixup */
  1504. enum {
  1505. INTEL_HASWELL,
  1506. };
  1507. static const struct hda_model_fixup hdmi_models[] = {
  1508. {.id = INTEL_HASWELL, .name = "Haswell"},
  1509. {}
  1510. };
  1511. static const struct snd_pci_quirk hdmi_fixup_tbl[] = {
  1512. SND_PCI_QUIRK(0x8086, 0x2010, "Haswell", INTEL_HASWELL),
  1513. {} /* terminator */
  1514. };
  1515. static const struct hda_fixup hdmi_fixups[] = {
  1516. [INTEL_HASWELL] = {
  1517. .type = HDA_FIXUP_FUNC,
  1518. .v.func = intel_haswell_enable_all_pins,
  1519. },
  1520. };
  1521. static int patch_generic_hdmi(struct hda_codec *codec)
  1522. {
  1523. struct hdmi_spec *spec;
  1524. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  1525. if (spec == NULL)
  1526. return -ENOMEM;
  1527. codec->spec = spec;
  1528. snd_hda_pick_fixup(codec, hdmi_models, hdmi_fixup_tbl, hdmi_fixups);
  1529. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  1530. if (codec->vendor_id == 0x80862807)
  1531. intel_haswell_fixup_enable_dp12(codec);
  1532. if (hdmi_parse_codec(codec) < 0) {
  1533. codec->spec = NULL;
  1534. kfree(spec);
  1535. return -EINVAL;
  1536. }
  1537. codec->patch_ops = generic_hdmi_patch_ops;
  1538. generic_hdmi_init_per_pins(codec);
  1539. init_channel_allocations();
  1540. return 0;
  1541. }
  1542. /*
  1543. * Shared non-generic implementations
  1544. */
  1545. static int simple_playback_build_pcms(struct hda_codec *codec)
  1546. {
  1547. struct hdmi_spec *spec = codec->spec;
  1548. struct hda_pcm *info = spec->pcm_rec;
  1549. unsigned int chans;
  1550. struct hda_pcm_stream *pstr;
  1551. codec->num_pcms = 1;
  1552. codec->pcm_info = info;
  1553. chans = get_wcaps(codec, spec->cvts[0].cvt_nid);
  1554. chans = get_wcaps_channels(chans);
  1555. info->name = get_hdmi_pcm_name(0);
  1556. info->pcm_type = HDA_PCM_TYPE_HDMI;
  1557. pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
  1558. *pstr = spec->pcm_playback;
  1559. pstr->nid = spec->cvts[0].cvt_nid;
  1560. if (pstr->channels_max <= 2 && chans && chans <= 16)
  1561. pstr->channels_max = chans;
  1562. return 0;
  1563. }
  1564. /* unsolicited event for jack sensing */
  1565. static void simple_hdmi_unsol_event(struct hda_codec *codec,
  1566. unsigned int res)
  1567. {
  1568. snd_hda_jack_set_dirty_all(codec);
  1569. snd_hda_jack_report_sync(codec);
  1570. }
  1571. /* generic_hdmi_build_jack can be used for simple_hdmi, too,
  1572. * as long as spec->pins[] is set correctly
  1573. */
  1574. #define simple_hdmi_build_jack generic_hdmi_build_jack
  1575. static int simple_playback_build_controls(struct hda_codec *codec)
  1576. {
  1577. struct hdmi_spec *spec = codec->spec;
  1578. int err;
  1579. err = snd_hda_create_spdif_out_ctls(codec,
  1580. spec->cvts[0].cvt_nid,
  1581. spec->cvts[0].cvt_nid);
  1582. if (err < 0)
  1583. return err;
  1584. return simple_hdmi_build_jack(codec, 0);
  1585. }
  1586. static int simple_playback_init(struct hda_codec *codec)
  1587. {
  1588. struct hdmi_spec *spec = codec->spec;
  1589. hda_nid_t pin = spec->pins[0].pin_nid;
  1590. snd_hda_codec_write(codec, pin, 0,
  1591. AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
  1592. /* some codecs require to unmute the pin */
  1593. if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
  1594. snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
  1595. AMP_OUT_UNMUTE);
  1596. snd_hda_jack_detect_enable(codec, pin, pin);
  1597. return 0;
  1598. }
  1599. static void simple_playback_free(struct hda_codec *codec)
  1600. {
  1601. struct hdmi_spec *spec = codec->spec;
  1602. kfree(spec);
  1603. }
  1604. /*
  1605. * Nvidia specific implementations
  1606. */
  1607. #define Nv_VERB_SET_Channel_Allocation 0xF79
  1608. #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
  1609. #define Nv_VERB_SET_Audio_Protection_On 0xF98
  1610. #define Nv_VERB_SET_Audio_Protection_Off 0xF99
  1611. #define nvhdmi_master_con_nid_7x 0x04
  1612. #define nvhdmi_master_pin_nid_7x 0x05
  1613. static const hda_nid_t nvhdmi_con_nids_7x[4] = {
  1614. /*front, rear, clfe, rear_surr */
  1615. 0x6, 0x8, 0xa, 0xc,
  1616. };
  1617. static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
  1618. /* set audio protect on */
  1619. { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
  1620. /* enable digital output on pin widget */
  1621. { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1622. {} /* terminator */
  1623. };
  1624. static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
  1625. /* set audio protect on */
  1626. { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
  1627. /* enable digital output on pin widget */
  1628. { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1629. { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1630. { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1631. { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1632. { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1633. {} /* terminator */
  1634. };
  1635. #ifdef LIMITED_RATE_FMT_SUPPORT
  1636. /* support only the safe format and rate */
  1637. #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
  1638. #define SUPPORTED_MAXBPS 16
  1639. #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
  1640. #else
  1641. /* support all rates and formats */
  1642. #define SUPPORTED_RATES \
  1643. (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
  1644. SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
  1645. SNDRV_PCM_RATE_192000)
  1646. #define SUPPORTED_MAXBPS 24
  1647. #define SUPPORTED_FORMATS \
  1648. (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
  1649. #endif
  1650. static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
  1651. {
  1652. snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
  1653. return 0;
  1654. }
  1655. static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
  1656. {
  1657. snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
  1658. return 0;
  1659. }
  1660. static unsigned int channels_2_6_8[] = {
  1661. 2, 6, 8
  1662. };
  1663. static unsigned int channels_2_8[] = {
  1664. 2, 8
  1665. };
  1666. static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
  1667. .count = ARRAY_SIZE(channels_2_6_8),
  1668. .list = channels_2_6_8,
  1669. .mask = 0,
  1670. };
  1671. static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
  1672. .count = ARRAY_SIZE(channels_2_8),
  1673. .list = channels_2_8,
  1674. .mask = 0,
  1675. };
  1676. static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
  1677. struct hda_codec *codec,
  1678. struct snd_pcm_substream *substream)
  1679. {
  1680. struct hdmi_spec *spec = codec->spec;
  1681. struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
  1682. switch (codec->preset->id) {
  1683. case 0x10de0002:
  1684. case 0x10de0003:
  1685. case 0x10de0005:
  1686. case 0x10de0006:
  1687. hw_constraints_channels = &hw_constraints_2_8_channels;
  1688. break;
  1689. case 0x10de0007:
  1690. hw_constraints_channels = &hw_constraints_2_6_8_channels;
  1691. break;
  1692. default:
  1693. break;
  1694. }
  1695. if (hw_constraints_channels != NULL) {
  1696. snd_pcm_hw_constraint_list(substream->runtime, 0,
  1697. SNDRV_PCM_HW_PARAM_CHANNELS,
  1698. hw_constraints_channels);
  1699. } else {
  1700. snd_pcm_hw_constraint_step(substream->runtime, 0,
  1701. SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  1702. }
  1703. return snd_hda_multi_out_dig_open(codec, &spec->multiout);
  1704. }
  1705. static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
  1706. struct hda_codec *codec,
  1707. struct snd_pcm_substream *substream)
  1708. {
  1709. struct hdmi_spec *spec = codec->spec;
  1710. return snd_hda_multi_out_dig_close(codec, &spec->multiout);
  1711. }
  1712. static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1713. struct hda_codec *codec,
  1714. unsigned int stream_tag,
  1715. unsigned int format,
  1716. struct snd_pcm_substream *substream)
  1717. {
  1718. struct hdmi_spec *spec = codec->spec;
  1719. return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
  1720. stream_tag, format, substream);
  1721. }
  1722. static const struct hda_pcm_stream simple_pcm_playback = {
  1723. .substreams = 1,
  1724. .channels_min = 2,
  1725. .channels_max = 2,
  1726. .ops = {
  1727. .open = simple_playback_pcm_open,
  1728. .close = simple_playback_pcm_close,
  1729. .prepare = simple_playback_pcm_prepare
  1730. },
  1731. };
  1732. static const struct hda_codec_ops simple_hdmi_patch_ops = {
  1733. .build_controls = simple_playback_build_controls,
  1734. .build_pcms = simple_playback_build_pcms,
  1735. .init = simple_playback_init,
  1736. .free = simple_playback_free,
  1737. .unsol_event = simple_hdmi_unsol_event,
  1738. };
  1739. static int patch_simple_hdmi(struct hda_codec *codec,
  1740. hda_nid_t cvt_nid, hda_nid_t pin_nid)
  1741. {
  1742. struct hdmi_spec *spec;
  1743. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  1744. if (!spec)
  1745. return -ENOMEM;
  1746. codec->spec = spec;
  1747. spec->multiout.num_dacs = 0; /* no analog */
  1748. spec->multiout.max_channels = 2;
  1749. spec->multiout.dig_out_nid = cvt_nid;
  1750. spec->num_cvts = 1;
  1751. spec->num_pins = 1;
  1752. spec->cvts[0].cvt_nid = cvt_nid;
  1753. spec->pins[0].pin_nid = pin_nid;
  1754. spec->pcm_playback = simple_pcm_playback;
  1755. codec->patch_ops = simple_hdmi_patch_ops;
  1756. return 0;
  1757. }
  1758. static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
  1759. int channels)
  1760. {
  1761. unsigned int chanmask;
  1762. int chan = channels ? (channels - 1) : 1;
  1763. switch (channels) {
  1764. default:
  1765. case 0:
  1766. case 2:
  1767. chanmask = 0x00;
  1768. break;
  1769. case 4:
  1770. chanmask = 0x08;
  1771. break;
  1772. case 6:
  1773. chanmask = 0x0b;
  1774. break;
  1775. case 8:
  1776. chanmask = 0x13;
  1777. break;
  1778. }
  1779. /* Set the audio infoframe channel allocation and checksum fields. The
  1780. * channel count is computed implicitly by the hardware. */
  1781. snd_hda_codec_write(codec, 0x1, 0,
  1782. Nv_VERB_SET_Channel_Allocation, chanmask);
  1783. snd_hda_codec_write(codec, 0x1, 0,
  1784. Nv_VERB_SET_Info_Frame_Checksum,
  1785. (0x71 - chan - chanmask));
  1786. }
  1787. static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
  1788. struct hda_codec *codec,
  1789. struct snd_pcm_substream *substream)
  1790. {
  1791. struct hdmi_spec *spec = codec->spec;
  1792. int i;
  1793. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
  1794. 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
  1795. for (i = 0; i < 4; i++) {
  1796. /* set the stream id */
  1797. snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
  1798. AC_VERB_SET_CHANNEL_STREAMID, 0);
  1799. /* set the stream format */
  1800. snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
  1801. AC_VERB_SET_STREAM_FORMAT, 0);
  1802. }
  1803. /* The audio hardware sends a channel count of 0x7 (8ch) when all the
  1804. * streams are disabled. */
  1805. nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
  1806. return snd_hda_multi_out_dig_close(codec, &spec->multiout);
  1807. }
  1808. static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
  1809. struct hda_codec *codec,
  1810. unsigned int stream_tag,
  1811. unsigned int format,
  1812. struct snd_pcm_substream *substream)
  1813. {
  1814. int chs;
  1815. unsigned int dataDCC2, channel_id;
  1816. int i;
  1817. struct hdmi_spec *spec = codec->spec;
  1818. struct hda_spdif_out *spdif;
  1819. mutex_lock(&codec->spdif_mutex);
  1820. spdif = snd_hda_spdif_out_of_nid(codec, spec->cvts[0].cvt_nid);
  1821. chs = substream->runtime->channels;
  1822. dataDCC2 = 0x2;
  1823. /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
  1824. if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
  1825. snd_hda_codec_write(codec,
  1826. nvhdmi_master_con_nid_7x,
  1827. 0,
  1828. AC_VERB_SET_DIGI_CONVERT_1,
  1829. spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
  1830. /* set the stream id */
  1831. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
  1832. AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
  1833. /* set the stream format */
  1834. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
  1835. AC_VERB_SET_STREAM_FORMAT, format);
  1836. /* turn on again (if needed) */
  1837. /* enable and set the channel status audio/data flag */
  1838. if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
  1839. snd_hda_codec_write(codec,
  1840. nvhdmi_master_con_nid_7x,
  1841. 0,
  1842. AC_VERB_SET_DIGI_CONVERT_1,
  1843. spdif->ctls & 0xff);
  1844. snd_hda_codec_write(codec,
  1845. nvhdmi_master_con_nid_7x,
  1846. 0,
  1847. AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
  1848. }
  1849. for (i = 0; i < 4; i++) {
  1850. if (chs == 2)
  1851. channel_id = 0;
  1852. else
  1853. channel_id = i * 2;
  1854. /* turn off SPDIF once;
  1855. *otherwise the IEC958 bits won't be updated
  1856. */
  1857. if (codec->spdif_status_reset &&
  1858. (spdif->ctls & AC_DIG1_ENABLE))
  1859. snd_hda_codec_write(codec,
  1860. nvhdmi_con_nids_7x[i],
  1861. 0,
  1862. AC_VERB_SET_DIGI_CONVERT_1,
  1863. spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
  1864. /* set the stream id */
  1865. snd_hda_codec_write(codec,
  1866. nvhdmi_con_nids_7x[i],
  1867. 0,
  1868. AC_VERB_SET_CHANNEL_STREAMID,
  1869. (stream_tag << 4) | channel_id);
  1870. /* set the stream format */
  1871. snd_hda_codec_write(codec,
  1872. nvhdmi_con_nids_7x[i],
  1873. 0,
  1874. AC_VERB_SET_STREAM_FORMAT,
  1875. format);
  1876. /* turn on again (if needed) */
  1877. /* enable and set the channel status audio/data flag */
  1878. if (codec->spdif_status_reset &&
  1879. (spdif->ctls & AC_DIG1_ENABLE)) {
  1880. snd_hda_codec_write(codec,
  1881. nvhdmi_con_nids_7x[i],
  1882. 0,
  1883. AC_VERB_SET_DIGI_CONVERT_1,
  1884. spdif->ctls & 0xff);
  1885. snd_hda_codec_write(codec,
  1886. nvhdmi_con_nids_7x[i],
  1887. 0,
  1888. AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
  1889. }
  1890. }
  1891. nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
  1892. mutex_unlock(&codec->spdif_mutex);
  1893. return 0;
  1894. }
  1895. static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
  1896. .substreams = 1,
  1897. .channels_min = 2,
  1898. .channels_max = 8,
  1899. .nid = nvhdmi_master_con_nid_7x,
  1900. .rates = SUPPORTED_RATES,
  1901. .maxbps = SUPPORTED_MAXBPS,
  1902. .formats = SUPPORTED_FORMATS,
  1903. .ops = {
  1904. .open = simple_playback_pcm_open,
  1905. .close = nvhdmi_8ch_7x_pcm_close,
  1906. .prepare = nvhdmi_8ch_7x_pcm_prepare
  1907. },
  1908. };
  1909. static int patch_nvhdmi_2ch(struct hda_codec *codec)
  1910. {
  1911. struct hdmi_spec *spec;
  1912. int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
  1913. nvhdmi_master_pin_nid_7x);
  1914. if (err < 0)
  1915. return err;
  1916. codec->patch_ops.init = nvhdmi_7x_init_2ch;
  1917. /* override the PCM rates, etc, as the codec doesn't give full list */
  1918. spec = codec->spec;
  1919. spec->pcm_playback.rates = SUPPORTED_RATES;
  1920. spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
  1921. spec->pcm_playback.formats = SUPPORTED_FORMATS;
  1922. return 0;
  1923. }
  1924. static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
  1925. {
  1926. struct hdmi_spec *spec = codec->spec;
  1927. int err = simple_playback_build_pcms(codec);
  1928. spec->pcm_rec[0].own_chmap = true;
  1929. return err;
  1930. }
  1931. static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
  1932. {
  1933. struct hdmi_spec *spec = codec->spec;
  1934. struct snd_pcm_chmap *chmap;
  1935. int err;
  1936. err = simple_playback_build_controls(codec);
  1937. if (err < 0)
  1938. return err;
  1939. /* add channel maps */
  1940. err = snd_pcm_add_chmap_ctls(spec->pcm_rec[0].pcm,
  1941. SNDRV_PCM_STREAM_PLAYBACK,
  1942. snd_pcm_alt_chmaps, 8, 0, &chmap);
  1943. if (err < 0)
  1944. return err;
  1945. switch (codec->preset->id) {
  1946. case 0x10de0002:
  1947. case 0x10de0003:
  1948. case 0x10de0005:
  1949. case 0x10de0006:
  1950. chmap->channel_mask = (1U << 2) | (1U << 8);
  1951. break;
  1952. case 0x10de0007:
  1953. chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
  1954. }
  1955. return 0;
  1956. }
  1957. static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
  1958. {
  1959. struct hdmi_spec *spec;
  1960. int err = patch_nvhdmi_2ch(codec);
  1961. if (err < 0)
  1962. return err;
  1963. spec = codec->spec;
  1964. spec->multiout.max_channels = 8;
  1965. spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
  1966. codec->patch_ops.init = nvhdmi_7x_init_8ch;
  1967. codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
  1968. codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
  1969. /* Initialize the audio infoframe channel mask and checksum to something
  1970. * valid */
  1971. nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
  1972. return 0;
  1973. }
  1974. /*
  1975. * ATI-specific implementations
  1976. *
  1977. * FIXME: we may omit the whole this and use the generic code once after
  1978. * it's confirmed to work.
  1979. */
  1980. #define ATIHDMI_CVT_NID 0x02 /* audio converter */
  1981. #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */
  1982. static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1983. struct hda_codec *codec,
  1984. unsigned int stream_tag,
  1985. unsigned int format,
  1986. struct snd_pcm_substream *substream)
  1987. {
  1988. struct hdmi_spec *spec = codec->spec;
  1989. int chans = substream->runtime->channels;
  1990. int i, err;
  1991. err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
  1992. substream);
  1993. if (err < 0)
  1994. return err;
  1995. snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
  1996. AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
  1997. /* FIXME: XXX */
  1998. for (i = 0; i < chans; i++) {
  1999. snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
  2000. AC_VERB_SET_HDMI_CHAN_SLOT,
  2001. (i << 4) | i);
  2002. }
  2003. return 0;
  2004. }
  2005. static int patch_atihdmi(struct hda_codec *codec)
  2006. {
  2007. struct hdmi_spec *spec;
  2008. int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID);
  2009. if (err < 0)
  2010. return err;
  2011. spec = codec->spec;
  2012. spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare;
  2013. return 0;
  2014. }
  2015. /* VIA HDMI Implementation */
  2016. #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
  2017. #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
  2018. static int patch_via_hdmi(struct hda_codec *codec)
  2019. {
  2020. return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
  2021. }
  2022. /*
  2023. * patch entries
  2024. */
  2025. static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
  2026. { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
  2027. { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
  2028. { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
  2029. { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi },
  2030. { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi },
  2031. { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi },
  2032. { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi },
  2033. { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2034. { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2035. { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2036. { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2037. { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
  2038. { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi },
  2039. { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi },
  2040. { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi },
  2041. { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi },
  2042. { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi },
  2043. { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi },
  2044. { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi },
  2045. { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi },
  2046. { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi },
  2047. { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi },
  2048. { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi },
  2049. /* 17 is known to be absent */
  2050. { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi },
  2051. { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi },
  2052. { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi },
  2053. { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi },
  2054. { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi },
  2055. { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi },
  2056. { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi },
  2057. { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi },
  2058. { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi },
  2059. { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi },
  2060. { .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_generic_hdmi },
  2061. { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
  2062. { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
  2063. { .id = 0x11069f80, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
  2064. { .id = 0x11069f81, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
  2065. { .id = 0x11069f84, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
  2066. { .id = 0x11069f85, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
  2067. { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
  2068. { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi },
  2069. { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi },
  2070. { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi },
  2071. { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
  2072. { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
  2073. { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
  2074. { .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi },
  2075. { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi },
  2076. { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi },
  2077. {} /* terminator */
  2078. };
  2079. MODULE_ALIAS("snd-hda-codec-id:1002793c");
  2080. MODULE_ALIAS("snd-hda-codec-id:10027919");
  2081. MODULE_ALIAS("snd-hda-codec-id:1002791a");
  2082. MODULE_ALIAS("snd-hda-codec-id:1002aa01");
  2083. MODULE_ALIAS("snd-hda-codec-id:10951390");
  2084. MODULE_ALIAS("snd-hda-codec-id:10951392");
  2085. MODULE_ALIAS("snd-hda-codec-id:10de0002");
  2086. MODULE_ALIAS("snd-hda-codec-id:10de0003");
  2087. MODULE_ALIAS("snd-hda-codec-id:10de0005");
  2088. MODULE_ALIAS("snd-hda-codec-id:10de0006");
  2089. MODULE_ALIAS("snd-hda-codec-id:10de0007");
  2090. MODULE_ALIAS("snd-hda-codec-id:10de000a");
  2091. MODULE_ALIAS("snd-hda-codec-id:10de000b");
  2092. MODULE_ALIAS("snd-hda-codec-id:10de000c");
  2093. MODULE_ALIAS("snd-hda-codec-id:10de000d");
  2094. MODULE_ALIAS("snd-hda-codec-id:10de0010");
  2095. MODULE_ALIAS("snd-hda-codec-id:10de0011");
  2096. MODULE_ALIAS("snd-hda-codec-id:10de0012");
  2097. MODULE_ALIAS("snd-hda-codec-id:10de0013");
  2098. MODULE_ALIAS("snd-hda-codec-id:10de0014");
  2099. MODULE_ALIAS("snd-hda-codec-id:10de0015");
  2100. MODULE_ALIAS("snd-hda-codec-id:10de0016");
  2101. MODULE_ALIAS("snd-hda-codec-id:10de0018");
  2102. MODULE_ALIAS("snd-hda-codec-id:10de0019");
  2103. MODULE_ALIAS("snd-hda-codec-id:10de001a");
  2104. MODULE_ALIAS("snd-hda-codec-id:10de001b");
  2105. MODULE_ALIAS("snd-hda-codec-id:10de001c");
  2106. MODULE_ALIAS("snd-hda-codec-id:10de0040");
  2107. MODULE_ALIAS("snd-hda-codec-id:10de0041");
  2108. MODULE_ALIAS("snd-hda-codec-id:10de0042");
  2109. MODULE_ALIAS("snd-hda-codec-id:10de0043");
  2110. MODULE_ALIAS("snd-hda-codec-id:10de0044");
  2111. MODULE_ALIAS("snd-hda-codec-id:10de0051");
  2112. MODULE_ALIAS("snd-hda-codec-id:10de0067");
  2113. MODULE_ALIAS("snd-hda-codec-id:10de8001");
  2114. MODULE_ALIAS("snd-hda-codec-id:11069f80");
  2115. MODULE_ALIAS("snd-hda-codec-id:11069f81");
  2116. MODULE_ALIAS("snd-hda-codec-id:11069f84");
  2117. MODULE_ALIAS("snd-hda-codec-id:11069f85");
  2118. MODULE_ALIAS("snd-hda-codec-id:17e80047");
  2119. MODULE_ALIAS("snd-hda-codec-id:80860054");
  2120. MODULE_ALIAS("snd-hda-codec-id:80862801");
  2121. MODULE_ALIAS("snd-hda-codec-id:80862802");
  2122. MODULE_ALIAS("snd-hda-codec-id:80862803");
  2123. MODULE_ALIAS("snd-hda-codec-id:80862804");
  2124. MODULE_ALIAS("snd-hda-codec-id:80862805");
  2125. MODULE_ALIAS("snd-hda-codec-id:80862806");
  2126. MODULE_ALIAS("snd-hda-codec-id:80862807");
  2127. MODULE_ALIAS("snd-hda-codec-id:80862880");
  2128. MODULE_ALIAS("snd-hda-codec-id:808629fb");
  2129. MODULE_LICENSE("GPL");
  2130. MODULE_DESCRIPTION("HDMI HD-audio codec");
  2131. MODULE_ALIAS("snd-hda-codec-intelhdmi");
  2132. MODULE_ALIAS("snd-hda-codec-nvhdmi");
  2133. MODULE_ALIAS("snd-hda-codec-atihdmi");
  2134. static struct hda_codec_preset_list intel_list = {
  2135. .preset = snd_hda_preset_hdmi,
  2136. .owner = THIS_MODULE,
  2137. };
  2138. static int __init patch_hdmi_init(void)
  2139. {
  2140. return snd_hda_add_codec_preset(&intel_list);
  2141. }
  2142. static void __exit patch_hdmi_exit(void)
  2143. {
  2144. snd_hda_delete_codec_preset(&intel_list);
  2145. }
  2146. module_init(patch_hdmi_init)
  2147. module_exit(patch_hdmi_exit)