tegra.c 3.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128
  1. /*
  2. * NVIDIA Tegra SoC device tree board support
  3. *
  4. * Copyright (C) 2011, 2013, NVIDIA Corporation
  5. * Copyright (C) 2010 Secret Lab Technologies, Ltd.
  6. * Copyright (C) 2010 Google, Inc.
  7. *
  8. * This software is licensed under the terms of the GNU General Public
  9. * License version 2, as published by the Free Software Foundation, and
  10. * may be copied, distributed, and modified under those terms.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. */
  18. #include <linux/kernel.h>
  19. #include <linux/init.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/serial_8250.h>
  22. #include <linux/clk.h>
  23. #include <linux/dma-mapping.h>
  24. #include <linux/irqdomain.h>
  25. #include <linux/of.h>
  26. #include <linux/of_address.h>
  27. #include <linux/of_fdt.h>
  28. #include <linux/of_platform.h>
  29. #include <linux/pda_power.h>
  30. #include <linux/io.h>
  31. #include <linux/slab.h>
  32. #include <linux/sys_soc.h>
  33. #include <linux/usb/tegra_usb_phy.h>
  34. #include <linux/clk/tegra.h>
  35. #include <asm/mach-types.h>
  36. #include <asm/mach/arch.h>
  37. #include <asm/mach/time.h>
  38. #include <asm/setup.h>
  39. #include "board.h"
  40. #include "common.h"
  41. #include "fuse.h"
  42. #include "iomap.h"
  43. #include "pmc.h"
  44. static void __init tegra_dt_init(void)
  45. {
  46. struct soc_device_attribute *soc_dev_attr;
  47. struct soc_device *soc_dev;
  48. struct device *parent = NULL;
  49. tegra_pmc_init();
  50. tegra_clocks_apply_init_table();
  51. soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
  52. if (!soc_dev_attr)
  53. goto out;
  54. soc_dev_attr->family = kasprintf(GFP_KERNEL, "Tegra");
  55. soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d", tegra_revision);
  56. soc_dev_attr->soc_id = kasprintf(GFP_KERNEL, "%d", tegra_chip_id);
  57. soc_dev = soc_device_register(soc_dev_attr);
  58. if (IS_ERR(soc_dev)) {
  59. kfree(soc_dev_attr->family);
  60. kfree(soc_dev_attr->revision);
  61. kfree(soc_dev_attr->soc_id);
  62. kfree(soc_dev_attr);
  63. goto out;
  64. }
  65. parent = soc_device_to_device(soc_dev);
  66. /*
  67. * Finished with the static registrations now; fill in the missing
  68. * devices
  69. */
  70. out:
  71. of_platform_populate(NULL, of_default_bus_match_table, NULL, parent);
  72. }
  73. static void __init paz00_init(void)
  74. {
  75. if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))
  76. tegra_paz00_wifikill_init();
  77. }
  78. static struct {
  79. char *machine;
  80. void (*init)(void);
  81. } board_init_funcs[] = {
  82. { "compal,paz00", paz00_init },
  83. };
  84. static void __init tegra_dt_init_late(void)
  85. {
  86. int i;
  87. tegra_init_late();
  88. for (i = 0; i < ARRAY_SIZE(board_init_funcs); i++) {
  89. if (of_machine_is_compatible(board_init_funcs[i].machine)) {
  90. board_init_funcs[i].init();
  91. break;
  92. }
  93. }
  94. }
  95. static const char * const tegra_dt_board_compat[] = {
  96. "nvidia,tegra114",
  97. "nvidia,tegra30",
  98. "nvidia,tegra20",
  99. NULL
  100. };
  101. DT_MACHINE_START(TEGRA_DT, "NVIDIA Tegra SoC (Flattened Device Tree)")
  102. .map_io = tegra_map_common_io,
  103. .smp = smp_ops(tegra_smp_ops),
  104. .init_early = tegra_init_early,
  105. .init_irq = tegra_dt_init_irq,
  106. .init_machine = tegra_dt_init,
  107. .init_late = tegra_dt_init_late,
  108. .restart = tegra_assert_system_reset,
  109. .dt_compat = tegra_dt_board_compat,
  110. MACHINE_END