rtc-cmos.c 25 KB

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  1. /*
  2. * RTC class driver for "CMOS RTC": PCs, ACPI, etc
  3. *
  4. * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
  5. * Copyright (C) 2006 David Brownell (convert to new framework)
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. /*
  13. * The original "cmos clock" chip was an MC146818 chip, now obsolete.
  14. * That defined the register interface now provided by all PCs, some
  15. * non-PC systems, and incorporated into ACPI. Modern PC chipsets
  16. * integrate an MC146818 clone in their southbridge, and boards use
  17. * that instead of discrete clones like the DS12887 or M48T86. There
  18. * are also clones that connect using the LPC bus.
  19. *
  20. * That register API is also used directly by various other drivers
  21. * (notably for integrated NVRAM), infrastructure (x86 has code to
  22. * bypass the RTC framework, directly reading the RTC during boot
  23. * and updating minutes/seconds for systems using NTP synch) and
  24. * utilities (like userspace 'hwclock', if no /dev node exists).
  25. *
  26. * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
  27. * interrupts disabled, holding the global rtc_lock, to exclude those
  28. * other drivers and utilities on correctly configured systems.
  29. */
  30. #include <linux/kernel.h>
  31. #include <linux/module.h>
  32. #include <linux/init.h>
  33. #include <linux/interrupt.h>
  34. #include <linux/spinlock.h>
  35. #include <linux/platform_device.h>
  36. #include <linux/mod_devicetable.h>
  37. #ifdef CONFIG_HPET_EMULATE_RTC
  38. #include <asm/hpet.h>
  39. #endif
  40. /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
  41. #include <asm-generic/rtc.h>
  42. #ifndef CONFIG_HPET_EMULATE_RTC
  43. #define is_hpet_enabled() 0
  44. #define hpet_set_alarm_time(hrs, min, sec) do { } while (0)
  45. #define hpet_set_periodic_freq(arg) 0
  46. #define hpet_mask_rtc_irq_bit(arg) do { } while (0)
  47. #define hpet_set_rtc_irq_bit(arg) do { } while (0)
  48. #define hpet_rtc_timer_init() do { } while (0)
  49. #define hpet_register_irq_handler(h) 0
  50. #define hpet_unregister_irq_handler(h) do { } while (0)
  51. extern irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id);
  52. #endif
  53. struct cmos_rtc {
  54. struct rtc_device *rtc;
  55. struct device *dev;
  56. int irq;
  57. struct resource *iomem;
  58. void (*wake_on)(struct device *);
  59. void (*wake_off)(struct device *);
  60. u8 enabled_wake;
  61. u8 suspend_ctrl;
  62. /* newer hardware extends the original register set */
  63. u8 day_alrm;
  64. u8 mon_alrm;
  65. u8 century;
  66. };
  67. /* both platform and pnp busses use negative numbers for invalid irqs */
  68. #define is_valid_irq(n) ((n) >= 0)
  69. static const char driver_name[] = "rtc_cmos";
  70. /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
  71. * always mask it against the irq enable bits in RTC_CONTROL. Bit values
  72. * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
  73. */
  74. #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
  75. static inline int is_intr(u8 rtc_intr)
  76. {
  77. if (!(rtc_intr & RTC_IRQF))
  78. return 0;
  79. return rtc_intr & RTC_IRQMASK;
  80. }
  81. /*----------------------------------------------------------------*/
  82. static int cmos_read_time(struct device *dev, struct rtc_time *t)
  83. {
  84. /* REVISIT: if the clock has a "century" register, use
  85. * that instead of the heuristic in get_rtc_time().
  86. * That'll make Y3K compatility (year > 2070) easy!
  87. */
  88. get_rtc_time(t);
  89. return 0;
  90. }
  91. static int cmos_set_time(struct device *dev, struct rtc_time *t)
  92. {
  93. /* REVISIT: set the "century" register if available
  94. *
  95. * NOTE: this ignores the issue whereby updating the seconds
  96. * takes effect exactly 500ms after we write the register.
  97. * (Also queueing and other delays before we get this far.)
  98. */
  99. return set_rtc_time(t);
  100. }
  101. static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
  102. {
  103. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  104. unsigned char rtc_control;
  105. if (!is_valid_irq(cmos->irq))
  106. return -EIO;
  107. /* Basic alarms only support hour, minute, and seconds fields.
  108. * Some also support day and month, for alarms up to a year in
  109. * the future.
  110. */
  111. t->time.tm_mday = -1;
  112. t->time.tm_mon = -1;
  113. spin_lock_irq(&rtc_lock);
  114. t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
  115. t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
  116. t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
  117. if (cmos->day_alrm) {
  118. /* ignore upper bits on readback per ACPI spec */
  119. t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
  120. if (!t->time.tm_mday)
  121. t->time.tm_mday = -1;
  122. if (cmos->mon_alrm) {
  123. t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
  124. if (!t->time.tm_mon)
  125. t->time.tm_mon = -1;
  126. }
  127. }
  128. rtc_control = CMOS_READ(RTC_CONTROL);
  129. spin_unlock_irq(&rtc_lock);
  130. /* REVISIT this assumes PC style usage: always BCD */
  131. if (((unsigned)t->time.tm_sec) < 0x60)
  132. t->time.tm_sec = BCD2BIN(t->time.tm_sec);
  133. else
  134. t->time.tm_sec = -1;
  135. if (((unsigned)t->time.tm_min) < 0x60)
  136. t->time.tm_min = BCD2BIN(t->time.tm_min);
  137. else
  138. t->time.tm_min = -1;
  139. if (((unsigned)t->time.tm_hour) < 0x24)
  140. t->time.tm_hour = BCD2BIN(t->time.tm_hour);
  141. else
  142. t->time.tm_hour = -1;
  143. if (cmos->day_alrm) {
  144. if (((unsigned)t->time.tm_mday) <= 0x31)
  145. t->time.tm_mday = BCD2BIN(t->time.tm_mday);
  146. else
  147. t->time.tm_mday = -1;
  148. if (cmos->mon_alrm) {
  149. if (((unsigned)t->time.tm_mon) <= 0x12)
  150. t->time.tm_mon = BCD2BIN(t->time.tm_mon) - 1;
  151. else
  152. t->time.tm_mon = -1;
  153. }
  154. }
  155. t->time.tm_year = -1;
  156. t->enabled = !!(rtc_control & RTC_AIE);
  157. t->pending = 0;
  158. return 0;
  159. }
  160. static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
  161. {
  162. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  163. unsigned char mon, mday, hrs, min, sec;
  164. unsigned char rtc_control, rtc_intr;
  165. if (!is_valid_irq(cmos->irq))
  166. return -EIO;
  167. /* REVISIT this assumes PC style usage: always BCD */
  168. /* Writing 0xff means "don't care" or "match all". */
  169. mon = t->time.tm_mon;
  170. mon = (mon < 12) ? BIN2BCD(mon) : 0xff;
  171. mon++;
  172. mday = t->time.tm_mday;
  173. mday = (mday >= 1 && mday <= 31) ? BIN2BCD(mday) : 0xff;
  174. hrs = t->time.tm_hour;
  175. hrs = (hrs < 24) ? BIN2BCD(hrs) : 0xff;
  176. min = t->time.tm_min;
  177. min = (min < 60) ? BIN2BCD(min) : 0xff;
  178. sec = t->time.tm_sec;
  179. sec = (sec < 60) ? BIN2BCD(sec) : 0xff;
  180. hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec);
  181. spin_lock_irq(&rtc_lock);
  182. /* next rtc irq must not be from previous alarm setting */
  183. rtc_control = CMOS_READ(RTC_CONTROL);
  184. rtc_control &= ~RTC_AIE;
  185. CMOS_WRITE(rtc_control, RTC_CONTROL);
  186. rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
  187. rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
  188. if (is_intr(rtc_intr))
  189. rtc_update_irq(cmos->rtc, 1, rtc_intr);
  190. /* update alarm */
  191. CMOS_WRITE(hrs, RTC_HOURS_ALARM);
  192. CMOS_WRITE(min, RTC_MINUTES_ALARM);
  193. CMOS_WRITE(sec, RTC_SECONDS_ALARM);
  194. /* the system may support an "enhanced" alarm */
  195. if (cmos->day_alrm) {
  196. CMOS_WRITE(mday, cmos->day_alrm);
  197. if (cmos->mon_alrm)
  198. CMOS_WRITE(mon, cmos->mon_alrm);
  199. }
  200. if (t->enabled) {
  201. rtc_control |= RTC_AIE;
  202. CMOS_WRITE(rtc_control, RTC_CONTROL);
  203. rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
  204. rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
  205. if (is_intr(rtc_intr))
  206. rtc_update_irq(cmos->rtc, 1, rtc_intr);
  207. }
  208. spin_unlock_irq(&rtc_lock);
  209. return 0;
  210. }
  211. static int cmos_irq_set_freq(struct device *dev, int freq)
  212. {
  213. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  214. int f;
  215. unsigned long flags;
  216. if (!is_valid_irq(cmos->irq))
  217. return -ENXIO;
  218. /* 0 = no irqs; 1 = 2^15 Hz ... 15 = 2^0 Hz */
  219. f = ffs(freq);
  220. if (f-- > 16)
  221. return -EINVAL;
  222. f = 16 - f;
  223. spin_lock_irqsave(&rtc_lock, flags);
  224. if (!hpet_set_periodic_freq(freq))
  225. CMOS_WRITE(RTC_REF_CLCK_32KHZ | f, RTC_FREQ_SELECT);
  226. spin_unlock_irqrestore(&rtc_lock, flags);
  227. return 0;
  228. }
  229. static int cmos_irq_set_state(struct device *dev, int enabled)
  230. {
  231. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  232. unsigned char rtc_control, rtc_intr;
  233. unsigned long flags;
  234. if (!is_valid_irq(cmos->irq))
  235. return -ENXIO;
  236. spin_lock_irqsave(&rtc_lock, flags);
  237. rtc_control = CMOS_READ(RTC_CONTROL);
  238. if (enabled)
  239. rtc_control |= RTC_PIE;
  240. else
  241. rtc_control &= ~RTC_PIE;
  242. CMOS_WRITE(rtc_control, RTC_CONTROL);
  243. rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
  244. rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
  245. if (is_intr(rtc_intr))
  246. rtc_update_irq(cmos->rtc, 1, rtc_intr);
  247. spin_unlock_irqrestore(&rtc_lock, flags);
  248. return 0;
  249. }
  250. #if defined(CONFIG_RTC_INTF_DEV) || defined(CONFIG_RTC_INTF_DEV_MODULE)
  251. static int
  252. cmos_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  253. {
  254. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  255. unsigned char rtc_control, rtc_intr;
  256. unsigned long flags;
  257. switch (cmd) {
  258. case RTC_AIE_OFF:
  259. case RTC_AIE_ON:
  260. case RTC_UIE_OFF:
  261. case RTC_UIE_ON:
  262. case RTC_PIE_OFF:
  263. case RTC_PIE_ON:
  264. if (!is_valid_irq(cmos->irq))
  265. return -EINVAL;
  266. break;
  267. default:
  268. return -ENOIOCTLCMD;
  269. }
  270. spin_lock_irqsave(&rtc_lock, flags);
  271. rtc_control = CMOS_READ(RTC_CONTROL);
  272. switch (cmd) {
  273. case RTC_AIE_OFF: /* alarm off */
  274. rtc_control &= ~RTC_AIE;
  275. hpet_mask_rtc_irq_bit(RTC_AIE);
  276. break;
  277. case RTC_AIE_ON: /* alarm on */
  278. rtc_control |= RTC_AIE;
  279. hpet_set_rtc_irq_bit(RTC_AIE);
  280. break;
  281. case RTC_UIE_OFF: /* update off */
  282. rtc_control &= ~RTC_UIE;
  283. hpet_mask_rtc_irq_bit(RTC_UIE);
  284. break;
  285. case RTC_UIE_ON: /* update on */
  286. rtc_control |= RTC_UIE;
  287. hpet_set_rtc_irq_bit(RTC_UIE);
  288. break;
  289. case RTC_PIE_OFF: /* periodic off */
  290. rtc_control &= ~RTC_PIE;
  291. hpet_mask_rtc_irq_bit(RTC_PIE);
  292. break;
  293. case RTC_PIE_ON: /* periodic on */
  294. rtc_control |= RTC_PIE;
  295. hpet_set_rtc_irq_bit(RTC_PIE);
  296. break;
  297. }
  298. if (!is_hpet_enabled())
  299. CMOS_WRITE(rtc_control, RTC_CONTROL);
  300. rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
  301. rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
  302. if (is_intr(rtc_intr))
  303. rtc_update_irq(cmos->rtc, 1, rtc_intr);
  304. spin_unlock_irqrestore(&rtc_lock, flags);
  305. return 0;
  306. }
  307. #else
  308. #define cmos_rtc_ioctl NULL
  309. #endif
  310. #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
  311. static int cmos_procfs(struct device *dev, struct seq_file *seq)
  312. {
  313. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  314. unsigned char rtc_control, valid;
  315. spin_lock_irq(&rtc_lock);
  316. rtc_control = CMOS_READ(RTC_CONTROL);
  317. valid = CMOS_READ(RTC_VALID);
  318. spin_unlock_irq(&rtc_lock);
  319. /* NOTE: at least ICH6 reports battery status using a different
  320. * (non-RTC) bit; and SQWE is ignored on many current systems.
  321. */
  322. return seq_printf(seq,
  323. "periodic_IRQ\t: %s\n"
  324. "update_IRQ\t: %s\n"
  325. "HPET_emulated\t: %s\n"
  326. // "square_wave\t: %s\n"
  327. // "BCD\t\t: %s\n"
  328. "DST_enable\t: %s\n"
  329. "periodic_freq\t: %d\n"
  330. "batt_status\t: %s\n",
  331. (rtc_control & RTC_PIE) ? "yes" : "no",
  332. (rtc_control & RTC_UIE) ? "yes" : "no",
  333. is_hpet_enabled() ? "yes" : "no",
  334. // (rtc_control & RTC_SQWE) ? "yes" : "no",
  335. // (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
  336. (rtc_control & RTC_DST_EN) ? "yes" : "no",
  337. cmos->rtc->irq_freq,
  338. (valid & RTC_VRT) ? "okay" : "dead");
  339. }
  340. #else
  341. #define cmos_procfs NULL
  342. #endif
  343. static const struct rtc_class_ops cmos_rtc_ops = {
  344. .ioctl = cmos_rtc_ioctl,
  345. .read_time = cmos_read_time,
  346. .set_time = cmos_set_time,
  347. .read_alarm = cmos_read_alarm,
  348. .set_alarm = cmos_set_alarm,
  349. .proc = cmos_procfs,
  350. .irq_set_freq = cmos_irq_set_freq,
  351. .irq_set_state = cmos_irq_set_state,
  352. };
  353. /*----------------------------------------------------------------*/
  354. /*
  355. * All these chips have at least 64 bytes of address space, shared by
  356. * RTC registers and NVRAM. Most of those bytes of NVRAM are used
  357. * by boot firmware. Modern chips have 128 or 256 bytes.
  358. */
  359. #define NVRAM_OFFSET (RTC_REG_D + 1)
  360. static ssize_t
  361. cmos_nvram_read(struct kobject *kobj, struct bin_attribute *attr,
  362. char *buf, loff_t off, size_t count)
  363. {
  364. int retval;
  365. if (unlikely(off >= attr->size))
  366. return 0;
  367. if ((off + count) > attr->size)
  368. count = attr->size - off;
  369. spin_lock_irq(&rtc_lock);
  370. for (retval = 0, off += NVRAM_OFFSET; count--; retval++, off++)
  371. *buf++ = CMOS_READ(off);
  372. spin_unlock_irq(&rtc_lock);
  373. return retval;
  374. }
  375. static ssize_t
  376. cmos_nvram_write(struct kobject *kobj, struct bin_attribute *attr,
  377. char *buf, loff_t off, size_t count)
  378. {
  379. struct cmos_rtc *cmos;
  380. int retval;
  381. cmos = dev_get_drvdata(container_of(kobj, struct device, kobj));
  382. if (unlikely(off >= attr->size))
  383. return -EFBIG;
  384. if ((off + count) > attr->size)
  385. count = attr->size - off;
  386. /* NOTE: on at least PCs and Ataris, the boot firmware uses a
  387. * checksum on part of the NVRAM data. That's currently ignored
  388. * here. If userspace is smart enough to know what fields of
  389. * NVRAM to update, updating checksums is also part of its job.
  390. */
  391. spin_lock_irq(&rtc_lock);
  392. for (retval = 0, off += NVRAM_OFFSET; count--; retval++, off++) {
  393. /* don't trash RTC registers */
  394. if (off == cmos->day_alrm
  395. || off == cmos->mon_alrm
  396. || off == cmos->century)
  397. buf++;
  398. else
  399. CMOS_WRITE(*buf++, off);
  400. }
  401. spin_unlock_irq(&rtc_lock);
  402. return retval;
  403. }
  404. static struct bin_attribute nvram = {
  405. .attr = {
  406. .name = "nvram",
  407. .mode = S_IRUGO | S_IWUSR,
  408. .owner = THIS_MODULE,
  409. },
  410. .read = cmos_nvram_read,
  411. .write = cmos_nvram_write,
  412. /* size gets set up later */
  413. };
  414. /*----------------------------------------------------------------*/
  415. static struct cmos_rtc cmos_rtc;
  416. static irqreturn_t cmos_interrupt(int irq, void *p)
  417. {
  418. u8 irqstat;
  419. u8 rtc_control;
  420. spin_lock(&rtc_lock);
  421. /*
  422. * In this case it is HPET RTC interrupt handler
  423. * calling us, with the interrupt information
  424. * passed as arg1, instead of irq.
  425. */
  426. if (is_hpet_enabled())
  427. irqstat = (unsigned long)irq & 0xF0;
  428. else {
  429. irqstat = CMOS_READ(RTC_INTR_FLAGS);
  430. rtc_control = CMOS_READ(RTC_CONTROL);
  431. irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
  432. }
  433. /* All Linux RTC alarms should be treated as if they were oneshot.
  434. * Similar code may be needed in system wakeup paths, in case the
  435. * alarm woke the system.
  436. */
  437. if (irqstat & RTC_AIE) {
  438. rtc_control = CMOS_READ(RTC_CONTROL);
  439. rtc_control &= ~RTC_AIE;
  440. CMOS_WRITE(rtc_control, RTC_CONTROL);
  441. CMOS_READ(RTC_INTR_FLAGS);
  442. }
  443. spin_unlock(&rtc_lock);
  444. if (is_intr(irqstat)) {
  445. rtc_update_irq(p, 1, irqstat);
  446. return IRQ_HANDLED;
  447. } else
  448. return IRQ_NONE;
  449. }
  450. #ifdef CONFIG_PNP
  451. #define INITSECTION
  452. #else
  453. #define INITSECTION __init
  454. #endif
  455. static int INITSECTION
  456. cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
  457. {
  458. struct cmos_rtc_board_info *info = dev->platform_data;
  459. int retval = 0;
  460. unsigned char rtc_control;
  461. unsigned address_space;
  462. /* there can be only one ... */
  463. if (cmos_rtc.dev)
  464. return -EBUSY;
  465. if (!ports)
  466. return -ENODEV;
  467. /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
  468. *
  469. * REVISIT non-x86 systems may instead use memory space resources
  470. * (needing ioremap etc), not i/o space resources like this ...
  471. */
  472. ports = request_region(ports->start,
  473. ports->end + 1 - ports->start,
  474. driver_name);
  475. if (!ports) {
  476. dev_dbg(dev, "i/o registers already in use\n");
  477. return -EBUSY;
  478. }
  479. cmos_rtc.irq = rtc_irq;
  480. cmos_rtc.iomem = ports;
  481. /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
  482. * driver did, but don't reject unknown configs. Old hardware
  483. * won't address 128 bytes, and for now we ignore the way newer
  484. * chips can address 256 bytes (using two more i/o ports).
  485. */
  486. #if defined(CONFIG_ATARI)
  487. address_space = 64;
  488. #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__)
  489. address_space = 128;
  490. #else
  491. #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
  492. address_space = 128;
  493. #endif
  494. /* For ACPI systems extension info comes from the FADT. On others,
  495. * board specific setup provides it as appropriate. Systems where
  496. * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
  497. * some almost-clones) can provide hooks to make that behave.
  498. *
  499. * Note that ACPI doesn't preclude putting these registers into
  500. * "extended" areas of the chip, including some that we won't yet
  501. * expect CMOS_READ and friends to handle.
  502. */
  503. if (info) {
  504. if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
  505. cmos_rtc.day_alrm = info->rtc_day_alarm;
  506. if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
  507. cmos_rtc.mon_alrm = info->rtc_mon_alarm;
  508. if (info->rtc_century && info->rtc_century < 128)
  509. cmos_rtc.century = info->rtc_century;
  510. if (info->wake_on && info->wake_off) {
  511. cmos_rtc.wake_on = info->wake_on;
  512. cmos_rtc.wake_off = info->wake_off;
  513. }
  514. }
  515. cmos_rtc.rtc = rtc_device_register(driver_name, dev,
  516. &cmos_rtc_ops, THIS_MODULE);
  517. if (IS_ERR(cmos_rtc.rtc)) {
  518. retval = PTR_ERR(cmos_rtc.rtc);
  519. goto cleanup0;
  520. }
  521. cmos_rtc.dev = dev;
  522. dev_set_drvdata(dev, &cmos_rtc);
  523. rename_region(ports, cmos_rtc.rtc->dev.bus_id);
  524. spin_lock_irq(&rtc_lock);
  525. /* force periodic irq to CMOS reset default of 1024Hz;
  526. *
  527. * REVISIT it's been reported that at least one x86_64 ALI mobo
  528. * doesn't use 32KHz here ... for portability we might need to
  529. * do something about other clock frequencies.
  530. */
  531. cmos_rtc.rtc->irq_freq = 1024;
  532. if (!hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq))
  533. CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
  534. /* disable irqs.
  535. *
  536. * NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
  537. * allegedly some older rtcs need that to handle irqs properly
  538. */
  539. rtc_control = CMOS_READ(RTC_CONTROL);
  540. rtc_control &= ~(RTC_PIE | RTC_AIE | RTC_UIE);
  541. CMOS_WRITE(rtc_control, RTC_CONTROL);
  542. CMOS_READ(RTC_INTR_FLAGS);
  543. spin_unlock_irq(&rtc_lock);
  544. /* FIXME teach the alarm code how to handle binary mode;
  545. * <asm-generic/rtc.h> doesn't know 12-hour mode either.
  546. */
  547. if (!(rtc_control & RTC_24H) || (rtc_control & (RTC_DM_BINARY))) {
  548. dev_dbg(dev, "only 24-hr BCD mode supported\n");
  549. retval = -ENXIO;
  550. goto cleanup1;
  551. }
  552. if (is_valid_irq(rtc_irq)) {
  553. irq_handler_t rtc_cmos_int_handler;
  554. if (is_hpet_enabled()) {
  555. int err;
  556. rtc_cmos_int_handler = hpet_rtc_interrupt;
  557. err = hpet_register_irq_handler(cmos_interrupt);
  558. if (err != 0) {
  559. printk(KERN_WARNING "hpet_register_irq_handler "
  560. " failed in rtc_init().");
  561. goto cleanup1;
  562. }
  563. } else
  564. rtc_cmos_int_handler = cmos_interrupt;
  565. retval = request_irq(rtc_irq, rtc_cmos_int_handler,
  566. IRQF_DISABLED, cmos_rtc.rtc->dev.bus_id,
  567. cmos_rtc.rtc);
  568. if (retval < 0) {
  569. dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
  570. goto cleanup1;
  571. }
  572. }
  573. hpet_rtc_timer_init();
  574. /* export at least the first block of NVRAM */
  575. nvram.size = address_space - NVRAM_OFFSET;
  576. retval = sysfs_create_bin_file(&dev->kobj, &nvram);
  577. if (retval < 0) {
  578. dev_dbg(dev, "can't create nvram file? %d\n", retval);
  579. goto cleanup2;
  580. }
  581. pr_info("%s: alarms up to one %s%s\n",
  582. cmos_rtc.rtc->dev.bus_id,
  583. is_valid_irq(rtc_irq)
  584. ? (cmos_rtc.mon_alrm
  585. ? "year"
  586. : (cmos_rtc.day_alrm
  587. ? "month" : "day"))
  588. : "no",
  589. cmos_rtc.century ? ", y3k" : ""
  590. );
  591. return 0;
  592. cleanup2:
  593. if (is_valid_irq(rtc_irq))
  594. free_irq(rtc_irq, cmos_rtc.rtc);
  595. cleanup1:
  596. cmos_rtc.dev = NULL;
  597. rtc_device_unregister(cmos_rtc.rtc);
  598. cleanup0:
  599. release_region(ports->start, ports->end + 1 - ports->start);
  600. return retval;
  601. }
  602. static void cmos_do_shutdown(void)
  603. {
  604. unsigned char rtc_control;
  605. spin_lock_irq(&rtc_lock);
  606. rtc_control = CMOS_READ(RTC_CONTROL);
  607. rtc_control &= ~(RTC_PIE|RTC_AIE|RTC_UIE);
  608. CMOS_WRITE(rtc_control, RTC_CONTROL);
  609. CMOS_READ(RTC_INTR_FLAGS);
  610. spin_unlock_irq(&rtc_lock);
  611. }
  612. static void __exit cmos_do_remove(struct device *dev)
  613. {
  614. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  615. struct resource *ports;
  616. cmos_do_shutdown();
  617. sysfs_remove_bin_file(&dev->kobj, &nvram);
  618. if (is_valid_irq(cmos->irq)) {
  619. free_irq(cmos->irq, cmos->rtc);
  620. hpet_unregister_irq_handler(cmos_interrupt);
  621. }
  622. rtc_device_unregister(cmos->rtc);
  623. cmos->rtc = NULL;
  624. ports = cmos->iomem;
  625. release_region(ports->start, ports->end + 1 - ports->start);
  626. cmos->iomem = NULL;
  627. cmos->dev = NULL;
  628. dev_set_drvdata(dev, NULL);
  629. }
  630. #ifdef CONFIG_PM
  631. static int cmos_suspend(struct device *dev, pm_message_t mesg)
  632. {
  633. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  634. int do_wake = device_may_wakeup(dev);
  635. unsigned char tmp;
  636. /* only the alarm might be a wakeup event source */
  637. spin_lock_irq(&rtc_lock);
  638. cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
  639. if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
  640. unsigned char irqstat;
  641. if (do_wake)
  642. tmp &= ~(RTC_PIE|RTC_UIE);
  643. else
  644. tmp &= ~(RTC_PIE|RTC_AIE|RTC_UIE);
  645. CMOS_WRITE(tmp, RTC_CONTROL);
  646. irqstat = CMOS_READ(RTC_INTR_FLAGS);
  647. irqstat &= (tmp & RTC_IRQMASK) | RTC_IRQF;
  648. if (is_intr(irqstat))
  649. rtc_update_irq(cmos->rtc, 1, irqstat);
  650. }
  651. spin_unlock_irq(&rtc_lock);
  652. if (tmp & RTC_AIE) {
  653. cmos->enabled_wake = 1;
  654. if (cmos->wake_on)
  655. cmos->wake_on(dev);
  656. else
  657. enable_irq_wake(cmos->irq);
  658. }
  659. pr_debug("%s: suspend%s, ctrl %02x\n",
  660. cmos_rtc.rtc->dev.bus_id,
  661. (tmp & RTC_AIE) ? ", alarm may wake" : "",
  662. tmp);
  663. return 0;
  664. }
  665. static int cmos_resume(struct device *dev)
  666. {
  667. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  668. unsigned char tmp = cmos->suspend_ctrl;
  669. /* re-enable any irqs previously active */
  670. if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
  671. if (cmos->enabled_wake) {
  672. if (cmos->wake_off)
  673. cmos->wake_off(dev);
  674. else
  675. disable_irq_wake(cmos->irq);
  676. cmos->enabled_wake = 0;
  677. }
  678. spin_lock_irq(&rtc_lock);
  679. CMOS_WRITE(tmp, RTC_CONTROL);
  680. tmp = CMOS_READ(RTC_INTR_FLAGS);
  681. tmp &= (cmos->suspend_ctrl & RTC_IRQMASK) | RTC_IRQF;
  682. if (is_intr(tmp))
  683. rtc_update_irq(cmos->rtc, 1, tmp);
  684. spin_unlock_irq(&rtc_lock);
  685. }
  686. pr_debug("%s: resume, ctrl %02x\n",
  687. cmos_rtc.rtc->dev.bus_id,
  688. cmos->suspend_ctrl);
  689. return 0;
  690. }
  691. #else
  692. #define cmos_suspend NULL
  693. #define cmos_resume NULL
  694. #endif
  695. /*----------------------------------------------------------------*/
  696. /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
  697. * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
  698. * probably list them in similar PNPBIOS tables; so PNP is more common.
  699. *
  700. * We don't use legacy "poke at the hardware" probing. Ancient PCs that
  701. * predate even PNPBIOS should set up platform_bus devices.
  702. */
  703. #ifdef CONFIG_PNP
  704. #include <linux/pnp.h>
  705. static int __devinit
  706. cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
  707. {
  708. /* REVISIT paranoia argues for a shutdown notifier, since PNP
  709. * drivers can't provide shutdown() methods to disable IRQs.
  710. * Or better yet, fix PNP to allow those methods...
  711. */
  712. if (pnp_port_start(pnp,0) == 0x70 && !pnp_irq_valid(pnp,0))
  713. /* Some machines contain a PNP entry for the RTC, but
  714. * don't define the IRQ. It should always be safe to
  715. * hardcode it in these cases
  716. */
  717. return cmos_do_probe(&pnp->dev, &pnp->res.port_resource[0], 8);
  718. else
  719. return cmos_do_probe(&pnp->dev,
  720. &pnp->res.port_resource[0],
  721. pnp->res.irq_resource[0].start);
  722. }
  723. static void __exit cmos_pnp_remove(struct pnp_dev *pnp)
  724. {
  725. cmos_do_remove(&pnp->dev);
  726. }
  727. #ifdef CONFIG_PM
  728. static int cmos_pnp_suspend(struct pnp_dev *pnp, pm_message_t mesg)
  729. {
  730. return cmos_suspend(&pnp->dev, mesg);
  731. }
  732. static int cmos_pnp_resume(struct pnp_dev *pnp)
  733. {
  734. return cmos_resume(&pnp->dev);
  735. }
  736. #else
  737. #define cmos_pnp_suspend NULL
  738. #define cmos_pnp_resume NULL
  739. #endif
  740. static const struct pnp_device_id rtc_ids[] = {
  741. { .id = "PNP0b00", },
  742. { .id = "PNP0b01", },
  743. { .id = "PNP0b02", },
  744. { },
  745. };
  746. MODULE_DEVICE_TABLE(pnp, rtc_ids);
  747. static struct pnp_driver cmos_pnp_driver = {
  748. .name = (char *) driver_name,
  749. .id_table = rtc_ids,
  750. .probe = cmos_pnp_probe,
  751. .remove = __exit_p(cmos_pnp_remove),
  752. /* flag ensures resume() gets called, and stops syslog spam */
  753. .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
  754. .suspend = cmos_pnp_suspend,
  755. .resume = cmos_pnp_resume,
  756. };
  757. static int __init cmos_init(void)
  758. {
  759. return pnp_register_driver(&cmos_pnp_driver);
  760. }
  761. module_init(cmos_init);
  762. static void __exit cmos_exit(void)
  763. {
  764. pnp_unregister_driver(&cmos_pnp_driver);
  765. }
  766. module_exit(cmos_exit);
  767. #else /* no PNP */
  768. /*----------------------------------------------------------------*/
  769. /* Platform setup should have set up an RTC device, when PNP is
  770. * unavailable ... this could happen even on (older) PCs.
  771. */
  772. static int __init cmos_platform_probe(struct platform_device *pdev)
  773. {
  774. return cmos_do_probe(&pdev->dev,
  775. platform_get_resource(pdev, IORESOURCE_IO, 0),
  776. platform_get_irq(pdev, 0));
  777. }
  778. static int __exit cmos_platform_remove(struct platform_device *pdev)
  779. {
  780. cmos_do_remove(&pdev->dev);
  781. return 0;
  782. }
  783. static void cmos_platform_shutdown(struct platform_device *pdev)
  784. {
  785. cmos_do_shutdown();
  786. }
  787. static struct platform_driver cmos_platform_driver = {
  788. .remove = __exit_p(cmos_platform_remove),
  789. .shutdown = cmos_platform_shutdown,
  790. .driver = {
  791. .name = (char *) driver_name,
  792. .suspend = cmos_suspend,
  793. .resume = cmos_resume,
  794. }
  795. };
  796. static int __init cmos_init(void)
  797. {
  798. return platform_driver_probe(&cmos_platform_driver,
  799. cmos_platform_probe);
  800. }
  801. module_init(cmos_init);
  802. static void __exit cmos_exit(void)
  803. {
  804. platform_driver_unregister(&cmos_platform_driver);
  805. }
  806. module_exit(cmos_exit);
  807. #endif /* !PNP */
  808. MODULE_AUTHOR("David Brownell");
  809. MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
  810. MODULE_LICENSE("GPL");