ehci-hub.c 29 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077
  1. /*
  2. * Copyright (C) 2001-2004 by David Brownell
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the
  6. * Free Software Foundation; either version 2 of the License, or (at your
  7. * option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  12. * for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software Foundation,
  16. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. */
  18. /* this file is part of ehci-hcd.c */
  19. /*-------------------------------------------------------------------------*/
  20. /*
  21. * EHCI Root Hub ... the nonsharable stuff
  22. *
  23. * Registers don't need cpu_to_le32, that happens transparently
  24. */
  25. /*-------------------------------------------------------------------------*/
  26. #include <linux/usb/otg.h>
  27. #define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
  28. #ifdef CONFIG_PM
  29. static int ehci_hub_control(
  30. struct usb_hcd *hcd,
  31. u16 typeReq,
  32. u16 wValue,
  33. u16 wIndex,
  34. char *buf,
  35. u16 wLength
  36. );
  37. /* After a power loss, ports that were owned by the companion must be
  38. * reset so that the companion can still own them.
  39. */
  40. static void ehci_handover_companion_ports(struct ehci_hcd *ehci)
  41. {
  42. u32 __iomem *reg;
  43. u32 status;
  44. int port;
  45. __le32 buf;
  46. struct usb_hcd *hcd = ehci_to_hcd(ehci);
  47. if (!ehci->owned_ports)
  48. return;
  49. /* Give the connections some time to appear */
  50. msleep(20);
  51. port = HCS_N_PORTS(ehci->hcs_params);
  52. while (port--) {
  53. if (test_bit(port, &ehci->owned_ports)) {
  54. reg = &ehci->regs->port_status[port];
  55. status = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
  56. /* Port already owned by companion? */
  57. if (status & PORT_OWNER)
  58. clear_bit(port, &ehci->owned_ports);
  59. else if (test_bit(port, &ehci->companion_ports))
  60. ehci_writel(ehci, status & ~PORT_PE, reg);
  61. else
  62. ehci_hub_control(hcd, SetPortFeature,
  63. USB_PORT_FEAT_RESET, port + 1,
  64. NULL, 0);
  65. }
  66. }
  67. if (!ehci->owned_ports)
  68. return;
  69. msleep(90); /* Wait for resets to complete */
  70. port = HCS_N_PORTS(ehci->hcs_params);
  71. while (port--) {
  72. if (test_bit(port, &ehci->owned_ports)) {
  73. ehci_hub_control(hcd, GetPortStatus,
  74. 0, port + 1,
  75. (char *) &buf, sizeof(buf));
  76. /* The companion should now own the port,
  77. * but if something went wrong the port must not
  78. * remain enabled.
  79. */
  80. reg = &ehci->regs->port_status[port];
  81. status = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
  82. if (status & PORT_OWNER)
  83. ehci_writel(ehci, status | PORT_CSC, reg);
  84. else {
  85. ehci_dbg(ehci, "failed handover port %d: %x\n",
  86. port + 1, status);
  87. ehci_writel(ehci, status & ~PORT_PE, reg);
  88. }
  89. }
  90. }
  91. ehci->owned_ports = 0;
  92. }
  93. static int ehci_port_change(struct ehci_hcd *ehci)
  94. {
  95. int i = HCS_N_PORTS(ehci->hcs_params);
  96. /* First check if the controller indicates a change event */
  97. if (ehci_readl(ehci, &ehci->regs->status) & STS_PCD)
  98. return 1;
  99. /*
  100. * Not all controllers appear to update this while going from D3 to D0,
  101. * so check the individual port status registers as well
  102. */
  103. while (i--)
  104. if (ehci_readl(ehci, &ehci->regs->port_status[i]) & PORT_CSC)
  105. return 1;
  106. return 0;
  107. }
  108. static void ehci_adjust_port_wakeup_flags(struct ehci_hcd *ehci,
  109. bool suspending, bool do_wakeup)
  110. {
  111. int port;
  112. u32 temp;
  113. unsigned long flags;
  114. /* If remote wakeup is enabled for the root hub but disabled
  115. * for the controller, we must adjust all the port wakeup flags
  116. * when the controller is suspended or resumed. In all other
  117. * cases they don't need to be changed.
  118. */
  119. if (!ehci_to_hcd(ehci)->self.root_hub->do_remote_wakeup || do_wakeup)
  120. return;
  121. spin_lock_irqsave(&ehci->lock, flags);
  122. /* clear phy low-power mode before changing wakeup flags */
  123. if (ehci->has_hostpc) {
  124. port = HCS_N_PORTS(ehci->hcs_params);
  125. while (port--) {
  126. u32 __iomem *hostpc_reg = &ehci->regs->hostpc[port];
  127. temp = ehci_readl(ehci, hostpc_reg);
  128. ehci_writel(ehci, temp & ~HOSTPC_PHCD, hostpc_reg);
  129. }
  130. spin_unlock_irqrestore(&ehci->lock, flags);
  131. msleep(5);
  132. spin_lock_irqsave(&ehci->lock, flags);
  133. }
  134. port = HCS_N_PORTS(ehci->hcs_params);
  135. while (port--) {
  136. u32 __iomem *reg = &ehci->regs->port_status[port];
  137. u32 t1 = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
  138. u32 t2 = t1 & ~PORT_WAKE_BITS;
  139. /* If we are suspending the controller, clear the flags.
  140. * If we are resuming the controller, set the wakeup flags.
  141. */
  142. if (!suspending) {
  143. if (t1 & PORT_CONNECT)
  144. t2 |= PORT_WKOC_E | PORT_WKDISC_E;
  145. else
  146. t2 |= PORT_WKOC_E | PORT_WKCONN_E;
  147. }
  148. ehci_vdbg(ehci, "port %d, %08x -> %08x\n",
  149. port + 1, t1, t2);
  150. ehci_writel(ehci, t2, reg);
  151. }
  152. /* enter phy low-power mode again */
  153. if (ehci->has_hostpc) {
  154. port = HCS_N_PORTS(ehci->hcs_params);
  155. while (port--) {
  156. u32 __iomem *hostpc_reg = &ehci->regs->hostpc[port];
  157. temp = ehci_readl(ehci, hostpc_reg);
  158. ehci_writel(ehci, temp | HOSTPC_PHCD, hostpc_reg);
  159. }
  160. }
  161. /* Does the root hub have a port wakeup pending? */
  162. if (!suspending && ehci_port_change(ehci))
  163. usb_hcd_resume_root_hub(ehci_to_hcd(ehci));
  164. spin_unlock_irqrestore(&ehci->lock, flags);
  165. }
  166. static int ehci_bus_suspend (struct usb_hcd *hcd)
  167. {
  168. struct ehci_hcd *ehci = hcd_to_ehci (hcd);
  169. int port;
  170. int mask;
  171. int changed;
  172. ehci_dbg(ehci, "suspend root hub\n");
  173. if (time_before (jiffies, ehci->next_statechange))
  174. msleep(5);
  175. del_timer_sync(&ehci->watchdog);
  176. del_timer_sync(&ehci->iaa_watchdog);
  177. spin_lock_irq (&ehci->lock);
  178. /* Once the controller is stopped, port resumes that are already
  179. * in progress won't complete. Hence if remote wakeup is enabled
  180. * for the root hub and any ports are in the middle of a resume or
  181. * remote wakeup, we must fail the suspend.
  182. */
  183. if (hcd->self.root_hub->do_remote_wakeup) {
  184. if (ehci->resuming_ports) {
  185. spin_unlock_irq(&ehci->lock);
  186. ehci_dbg(ehci, "suspend failed because a port is resuming\n");
  187. return -EBUSY;
  188. }
  189. }
  190. /* stop schedules, clean any completed work */
  191. if (ehci->rh_state == EHCI_RH_RUNNING)
  192. ehci_quiesce (ehci);
  193. ehci_work(ehci);
  194. /* Unlike other USB host controller types, EHCI doesn't have
  195. * any notion of "global" or bus-wide suspend. The driver has
  196. * to manually suspend all the active unsuspended ports, and
  197. * then manually resume them in the bus_resume() routine.
  198. */
  199. ehci->bus_suspended = 0;
  200. ehci->owned_ports = 0;
  201. changed = 0;
  202. port = HCS_N_PORTS(ehci->hcs_params);
  203. while (port--) {
  204. u32 __iomem *reg = &ehci->regs->port_status [port];
  205. u32 t1 = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
  206. u32 t2 = t1 & ~PORT_WAKE_BITS;
  207. /* keep track of which ports we suspend */
  208. if (t1 & PORT_OWNER)
  209. set_bit(port, &ehci->owned_ports);
  210. else if ((t1 & PORT_PE) && !(t1 & PORT_SUSPEND)) {
  211. t2 |= PORT_SUSPEND;
  212. set_bit(port, &ehci->bus_suspended);
  213. }
  214. /* enable remote wakeup on all ports, if told to do so */
  215. if (hcd->self.root_hub->do_remote_wakeup) {
  216. /* only enable appropriate wake bits, otherwise the
  217. * hardware can not go phy low power mode. If a race
  218. * condition happens here(connection change during bits
  219. * set), the port change detection will finally fix it.
  220. */
  221. if (t1 & PORT_CONNECT)
  222. t2 |= PORT_WKOC_E | PORT_WKDISC_E;
  223. else
  224. t2 |= PORT_WKOC_E | PORT_WKCONN_E;
  225. }
  226. if (t1 != t2) {
  227. ehci_vdbg (ehci, "port %d, %08x -> %08x\n",
  228. port + 1, t1, t2);
  229. ehci_writel(ehci, t2, reg);
  230. changed = 1;
  231. }
  232. }
  233. if (changed && ehci->has_hostpc) {
  234. spin_unlock_irq(&ehci->lock);
  235. msleep(5); /* 5 ms for HCD to enter low-power mode */
  236. spin_lock_irq(&ehci->lock);
  237. port = HCS_N_PORTS(ehci->hcs_params);
  238. while (port--) {
  239. u32 __iomem *hostpc_reg = &ehci->regs->hostpc[port];
  240. u32 t3;
  241. t3 = ehci_readl(ehci, hostpc_reg);
  242. ehci_writel(ehci, t3 | HOSTPC_PHCD, hostpc_reg);
  243. t3 = ehci_readl(ehci, hostpc_reg);
  244. ehci_dbg(ehci, "Port %d phy low-power mode %s\n",
  245. port, (t3 & HOSTPC_PHCD) ?
  246. "succeeded" : "failed");
  247. }
  248. }
  249. /* Apparently some devices need a >= 1-uframe delay here */
  250. if (ehci->bus_suspended)
  251. udelay(150);
  252. /* turn off now-idle HC */
  253. ehci_halt (ehci);
  254. ehci->rh_state = EHCI_RH_SUSPENDED;
  255. if (ehci->reclaim)
  256. end_unlink_async(ehci);
  257. /* allow remote wakeup */
  258. mask = INTR_MASK;
  259. if (!hcd->self.root_hub->do_remote_wakeup)
  260. mask &= ~STS_PCD;
  261. ehci_writel(ehci, mask, &ehci->regs->intr_enable);
  262. ehci_readl(ehci, &ehci->regs->intr_enable);
  263. ehci->next_statechange = jiffies + msecs_to_jiffies(10);
  264. spin_unlock_irq (&ehci->lock);
  265. /* ehci_work() may have re-enabled the watchdog timer, which we do not
  266. * want, and so we must delete any pending watchdog timer events.
  267. */
  268. del_timer_sync(&ehci->watchdog);
  269. return 0;
  270. }
  271. /* caller has locked the root hub, and should reset/reinit on error */
  272. static int ehci_bus_resume (struct usb_hcd *hcd)
  273. {
  274. struct ehci_hcd *ehci = hcd_to_ehci (hcd);
  275. u32 temp;
  276. u32 power_okay;
  277. int i;
  278. unsigned long resume_needed = 0;
  279. if (time_before (jiffies, ehci->next_statechange))
  280. msleep(5);
  281. spin_lock_irq (&ehci->lock);
  282. if (!HCD_HW_ACCESSIBLE(hcd)) {
  283. spin_unlock_irq(&ehci->lock);
  284. return -ESHUTDOWN;
  285. }
  286. if (unlikely(ehci->debug)) {
  287. if (!dbgp_reset_prep())
  288. ehci->debug = NULL;
  289. else
  290. dbgp_external_startup();
  291. }
  292. /* Ideally and we've got a real resume here, and no port's power
  293. * was lost. (For PCI, that means Vaux was maintained.) But we
  294. * could instead be restoring a swsusp snapshot -- so that BIOS was
  295. * the last user of the controller, not reset/pm hardware keeping
  296. * state we gave to it.
  297. */
  298. power_okay = ehci_readl(ehci, &ehci->regs->intr_enable);
  299. ehci_dbg(ehci, "resume root hub%s\n",
  300. power_okay ? "" : " after power loss");
  301. /* at least some APM implementations will try to deliver
  302. * IRQs right away, so delay them until we're ready.
  303. */
  304. ehci_writel(ehci, 0, &ehci->regs->intr_enable);
  305. /* re-init operational registers */
  306. ehci_writel(ehci, 0, &ehci->regs->segment);
  307. ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
  308. ehci_writel(ehci, (u32) ehci->async->qh_dma, &ehci->regs->async_next);
  309. /* restore CMD_RUN, framelist size, and irq threshold */
  310. ehci->command |= CMD_RUN;
  311. ehci_writel(ehci, ehci->command, &ehci->regs->command);
  312. ehci->rh_state = EHCI_RH_RUNNING;
  313. /* Some controller/firmware combinations need a delay during which
  314. * they set up the port statuses. See Bugzilla #8190. */
  315. spin_unlock_irq(&ehci->lock);
  316. msleep(8);
  317. spin_lock_irq(&ehci->lock);
  318. /* clear phy low-power mode before resume */
  319. if (ehci->bus_suspended && ehci->has_hostpc) {
  320. i = HCS_N_PORTS(ehci->hcs_params);
  321. while (i--) {
  322. if (test_bit(i, &ehci->bus_suspended)) {
  323. u32 __iomem *hostpc_reg =
  324. &ehci->regs->hostpc[i];
  325. temp = ehci_readl(ehci, hostpc_reg);
  326. ehci_writel(ehci, temp & ~HOSTPC_PHCD,
  327. hostpc_reg);
  328. }
  329. }
  330. spin_unlock_irq(&ehci->lock);
  331. msleep(5);
  332. spin_lock_irq(&ehci->lock);
  333. }
  334. /* manually resume the ports we suspended during bus_suspend() */
  335. i = HCS_N_PORTS (ehci->hcs_params);
  336. while (i--) {
  337. temp = ehci_readl(ehci, &ehci->regs->port_status [i]);
  338. temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
  339. if (test_bit(i, &ehci->bus_suspended) &&
  340. (temp & PORT_SUSPEND)) {
  341. temp |= PORT_RESUME;
  342. set_bit(i, &resume_needed);
  343. }
  344. ehci_writel(ehci, temp, &ehci->regs->port_status [i]);
  345. }
  346. /* msleep for 20ms only if code is trying to resume port */
  347. if (resume_needed) {
  348. spin_unlock_irq(&ehci->lock);
  349. msleep(20);
  350. spin_lock_irq(&ehci->lock);
  351. }
  352. i = HCS_N_PORTS (ehci->hcs_params);
  353. while (i--) {
  354. temp = ehci_readl(ehci, &ehci->regs->port_status [i]);
  355. if (test_bit(i, &resume_needed)) {
  356. temp &= ~(PORT_RWC_BITS | PORT_RESUME);
  357. ehci_writel(ehci, temp, &ehci->regs->port_status [i]);
  358. ehci_vdbg (ehci, "resumed port %d\n", i + 1);
  359. }
  360. }
  361. ehci->next_statechange = jiffies + msecs_to_jiffies(5);
  362. /* Now we can safely re-enable irqs */
  363. ehci_writel(ehci, INTR_MASK, &ehci->regs->intr_enable);
  364. (void) ehci_readl(ehci, &ehci->regs->intr_enable);
  365. spin_unlock_irq (&ehci->lock);
  366. ehci_handover_companion_ports(ehci);
  367. return 0;
  368. }
  369. #else
  370. #define ehci_bus_suspend NULL
  371. #define ehci_bus_resume NULL
  372. #endif /* CONFIG_PM */
  373. /*-------------------------------------------------------------------------*/
  374. /*
  375. * Sets the owner of a port
  376. */
  377. static void set_owner(struct ehci_hcd *ehci, int portnum, int new_owner)
  378. {
  379. u32 __iomem *status_reg;
  380. u32 port_status;
  381. int try;
  382. status_reg = &ehci->regs->port_status[portnum];
  383. /*
  384. * The controller won't set the OWNER bit if the port is
  385. * enabled, so this loop will sometimes require at least two
  386. * iterations: one to disable the port and one to set OWNER.
  387. */
  388. for (try = 4; try > 0; --try) {
  389. spin_lock_irq(&ehci->lock);
  390. port_status = ehci_readl(ehci, status_reg);
  391. if ((port_status & PORT_OWNER) == new_owner
  392. || (port_status & (PORT_OWNER | PORT_CONNECT))
  393. == 0)
  394. try = 0;
  395. else {
  396. port_status ^= PORT_OWNER;
  397. port_status &= ~(PORT_PE | PORT_RWC_BITS);
  398. ehci_writel(ehci, port_status, status_reg);
  399. }
  400. spin_unlock_irq(&ehci->lock);
  401. if (try > 1)
  402. msleep(5);
  403. }
  404. }
  405. /*-------------------------------------------------------------------------*/
  406. static int check_reset_complete (
  407. struct ehci_hcd *ehci,
  408. int index,
  409. u32 __iomem *status_reg,
  410. int port_status
  411. ) {
  412. if (!(port_status & PORT_CONNECT))
  413. return port_status;
  414. /* if reset finished and it's still not enabled -- handoff */
  415. if (!(port_status & PORT_PE)) {
  416. /* with integrated TT, there's nobody to hand it to! */
  417. if (ehci_is_TDI(ehci)) {
  418. ehci_dbg (ehci,
  419. "Failed to enable port %d on root hub TT\n",
  420. index+1);
  421. return port_status;
  422. }
  423. ehci_dbg (ehci, "port %d full speed --> companion\n",
  424. index + 1);
  425. // what happens if HCS_N_CC(params) == 0 ?
  426. port_status |= PORT_OWNER;
  427. port_status &= ~PORT_RWC_BITS;
  428. ehci_writel(ehci, port_status, status_reg);
  429. /* ensure 440EPX ohci controller state is operational */
  430. if (ehci->has_amcc_usb23)
  431. set_ohci_hcfs(ehci, 1);
  432. } else {
  433. ehci_dbg(ehci, "port %d reset complete, port enabled\n",
  434. index + 1);
  435. /* ensure 440EPx ohci controller state is suspended */
  436. if (ehci->has_amcc_usb23)
  437. set_ohci_hcfs(ehci, 0);
  438. }
  439. return port_status;
  440. }
  441. /*-------------------------------------------------------------------------*/
  442. /* build "status change" packet (one or two bytes) from HC registers */
  443. static int
  444. ehci_hub_status_data (struct usb_hcd *hcd, char *buf)
  445. {
  446. struct ehci_hcd *ehci = hcd_to_ehci (hcd);
  447. u32 temp, status;
  448. u32 mask;
  449. int ports, i, retval = 1;
  450. unsigned long flags;
  451. u32 ppcd = 0;
  452. /* init status to no-changes */
  453. buf [0] = 0;
  454. ports = HCS_N_PORTS (ehci->hcs_params);
  455. if (ports > 7) {
  456. buf [1] = 0;
  457. retval++;
  458. }
  459. /* Inform the core about resumes-in-progress by returning
  460. * a non-zero value even if there are no status changes.
  461. */
  462. status = ehci->resuming_ports;
  463. /* Some boards (mostly VIA?) report bogus overcurrent indications,
  464. * causing massive log spam unless we completely ignore them. It
  465. * may be relevant that VIA VT8235 controllers, where PORT_POWER is
  466. * always set, seem to clear PORT_OCC and PORT_CSC when writing to
  467. * PORT_POWER; that's surprising, but maybe within-spec.
  468. */
  469. if (!ignore_oc)
  470. mask = PORT_CSC | PORT_PEC | PORT_OCC;
  471. else
  472. mask = PORT_CSC | PORT_PEC;
  473. // PORT_RESUME from hardware ~= PORT_STAT_C_SUSPEND
  474. /* no hub change reports (bit 0) for now (power, ...) */
  475. /* port N changes (bit N)? */
  476. spin_lock_irqsave (&ehci->lock, flags);
  477. /* get per-port change detect bits */
  478. if (ehci->has_ppcd)
  479. ppcd = ehci_readl(ehci, &ehci->regs->status) >> 16;
  480. for (i = 0; i < ports; i++) {
  481. /* leverage per-port change bits feature */
  482. if (ehci->has_ppcd && !(ppcd & (1 << i)))
  483. continue;
  484. temp = ehci_readl(ehci, &ehci->regs->port_status [i]);
  485. /*
  486. * Return status information even for ports with OWNER set.
  487. * Otherwise khubd wouldn't see the disconnect event when a
  488. * high-speed device is switched over to the companion
  489. * controller by the user.
  490. */
  491. if ((temp & mask) != 0 || test_bit(i, &ehci->port_c_suspend)
  492. || (ehci->reset_done[i] && time_after_eq(
  493. jiffies, ehci->reset_done[i]))) {
  494. if (i < 7)
  495. buf [0] |= 1 << (i + 1);
  496. else
  497. buf [1] |= 1 << (i - 7);
  498. status = STS_PCD;
  499. }
  500. }
  501. /* FIXME autosuspend idle root hubs */
  502. spin_unlock_irqrestore (&ehci->lock, flags);
  503. return status ? retval : 0;
  504. }
  505. /*-------------------------------------------------------------------------*/
  506. static void
  507. ehci_hub_descriptor (
  508. struct ehci_hcd *ehci,
  509. struct usb_hub_descriptor *desc
  510. ) {
  511. int ports = HCS_N_PORTS (ehci->hcs_params);
  512. u16 temp;
  513. desc->bDescriptorType = 0x29;
  514. desc->bPwrOn2PwrGood = 10; /* ehci 1.0, 2.3.9 says 20ms max */
  515. desc->bHubContrCurrent = 0;
  516. desc->bNbrPorts = ports;
  517. temp = 1 + (ports / 8);
  518. desc->bDescLength = 7 + 2 * temp;
  519. /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */
  520. memset(&desc->u.hs.DeviceRemovable[0], 0, temp);
  521. memset(&desc->u.hs.DeviceRemovable[temp], 0xff, temp);
  522. temp = 0x0008; /* per-port overcurrent reporting */
  523. if (HCS_PPC (ehci->hcs_params))
  524. temp |= 0x0001; /* per-port power control */
  525. else
  526. temp |= 0x0002; /* no power switching */
  527. #if 0
  528. // re-enable when we support USB_PORT_FEAT_INDICATOR below.
  529. if (HCS_INDICATOR (ehci->hcs_params))
  530. temp |= 0x0080; /* per-port indicators (LEDs) */
  531. #endif
  532. desc->wHubCharacteristics = cpu_to_le16(temp);
  533. }
  534. /*-------------------------------------------------------------------------*/
  535. static int ehci_hub_control (
  536. struct usb_hcd *hcd,
  537. u16 typeReq,
  538. u16 wValue,
  539. u16 wIndex,
  540. char *buf,
  541. u16 wLength
  542. ) {
  543. struct ehci_hcd *ehci = hcd_to_ehci (hcd);
  544. int ports = HCS_N_PORTS (ehci->hcs_params);
  545. u32 __iomem *status_reg = &ehci->regs->port_status[
  546. (wIndex & 0xff) - 1];
  547. u32 __iomem *hostpc_reg = &ehci->regs->hostpc[(wIndex & 0xff) - 1];
  548. u32 temp, temp1, status;
  549. unsigned long flags;
  550. int retval = 0;
  551. unsigned selector;
  552. /*
  553. * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR.
  554. * HCS_INDICATOR may say we can change LEDs to off/amber/green.
  555. * (track current state ourselves) ... blink for diagnostics,
  556. * power, "this is the one", etc. EHCI spec supports this.
  557. */
  558. spin_lock_irqsave (&ehci->lock, flags);
  559. switch (typeReq) {
  560. case ClearHubFeature:
  561. switch (wValue) {
  562. case C_HUB_LOCAL_POWER:
  563. case C_HUB_OVER_CURRENT:
  564. /* no hub-wide feature/status flags */
  565. break;
  566. default:
  567. goto error;
  568. }
  569. break;
  570. case ClearPortFeature:
  571. if (!wIndex || wIndex > ports)
  572. goto error;
  573. wIndex--;
  574. temp = ehci_readl(ehci, status_reg);
  575. temp &= ~PORT_RWC_BITS;
  576. /*
  577. * Even if OWNER is set, so the port is owned by the
  578. * companion controller, khubd needs to be able to clear
  579. * the port-change status bits (especially
  580. * USB_PORT_STAT_C_CONNECTION).
  581. */
  582. switch (wValue) {
  583. case USB_PORT_FEAT_ENABLE:
  584. ehci_writel(ehci, temp & ~PORT_PE, status_reg);
  585. break;
  586. case USB_PORT_FEAT_C_ENABLE:
  587. ehci_writel(ehci, temp | PORT_PEC, status_reg);
  588. break;
  589. case USB_PORT_FEAT_SUSPEND:
  590. if (temp & PORT_RESET)
  591. goto error;
  592. if (ehci->no_selective_suspend)
  593. break;
  594. #ifdef CONFIG_USB_OTG
  595. if ((hcd->self.otg_port == (wIndex + 1))
  596. && hcd->self.b_hnp_enable) {
  597. otg_start_hnp(hcd->phy->otg);
  598. break;
  599. }
  600. #endif
  601. if (!(temp & PORT_SUSPEND))
  602. break;
  603. if ((temp & PORT_PE) == 0)
  604. goto error;
  605. /* clear phy low-power mode before resume */
  606. if (ehci->has_hostpc) {
  607. temp1 = ehci_readl(ehci, hostpc_reg);
  608. ehci_writel(ehci, temp1 & ~HOSTPC_PHCD,
  609. hostpc_reg);
  610. spin_unlock_irqrestore(&ehci->lock, flags);
  611. msleep(5);/* wait to leave low-power mode */
  612. spin_lock_irqsave(&ehci->lock, flags);
  613. }
  614. /* resume signaling for 20 msec */
  615. temp &= ~PORT_WAKE_BITS;
  616. ehci_writel(ehci, temp | PORT_RESUME, status_reg);
  617. ehci->reset_done[wIndex] = jiffies
  618. + msecs_to_jiffies(20);
  619. break;
  620. case USB_PORT_FEAT_C_SUSPEND:
  621. clear_bit(wIndex, &ehci->port_c_suspend);
  622. break;
  623. case USB_PORT_FEAT_POWER:
  624. if (HCS_PPC (ehci->hcs_params))
  625. ehci_writel(ehci, temp & ~PORT_POWER,
  626. status_reg);
  627. break;
  628. case USB_PORT_FEAT_C_CONNECTION:
  629. if (ehci->has_lpm) {
  630. /* clear PORTSC bits on disconnect */
  631. temp &= ~PORT_LPM;
  632. temp &= ~PORT_DEV_ADDR;
  633. }
  634. ehci_writel(ehci, temp | PORT_CSC, status_reg);
  635. break;
  636. case USB_PORT_FEAT_C_OVER_CURRENT:
  637. ehci_writel(ehci, temp | PORT_OCC, status_reg);
  638. break;
  639. case USB_PORT_FEAT_C_RESET:
  640. /* GetPortStatus clears reset */
  641. break;
  642. default:
  643. goto error;
  644. }
  645. ehci_readl(ehci, &ehci->regs->command); /* unblock posted write */
  646. break;
  647. case GetHubDescriptor:
  648. ehci_hub_descriptor (ehci, (struct usb_hub_descriptor *)
  649. buf);
  650. break;
  651. case GetHubStatus:
  652. /* no hub-wide feature/status flags */
  653. memset (buf, 0, 4);
  654. //cpu_to_le32s ((u32 *) buf);
  655. break;
  656. case GetPortStatus:
  657. if (!wIndex || wIndex > ports)
  658. goto error;
  659. wIndex--;
  660. status = 0;
  661. temp = ehci_readl(ehci, status_reg);
  662. // wPortChange bits
  663. if (temp & PORT_CSC)
  664. status |= USB_PORT_STAT_C_CONNECTION << 16;
  665. if (temp & PORT_PEC)
  666. status |= USB_PORT_STAT_C_ENABLE << 16;
  667. if ((temp & PORT_OCC) && !ignore_oc){
  668. status |= USB_PORT_STAT_C_OVERCURRENT << 16;
  669. /*
  670. * Hubs should disable port power on over-current.
  671. * However, not all EHCI implementations do this
  672. * automatically, even if they _do_ support per-port
  673. * power switching; they're allowed to just limit the
  674. * current. khubd will turn the power back on.
  675. */
  676. if ((temp & PORT_OC) && HCS_PPC(ehci->hcs_params)) {
  677. ehci_writel(ehci,
  678. temp & ~(PORT_RWC_BITS | PORT_POWER),
  679. status_reg);
  680. temp = ehci_readl(ehci, status_reg);
  681. }
  682. }
  683. /* whoever resumes must GetPortStatus to complete it!! */
  684. if (temp & PORT_RESUME) {
  685. /* Remote Wakeup received? */
  686. if (!ehci->reset_done[wIndex]) {
  687. /* resume signaling for 20 msec */
  688. ehci->reset_done[wIndex] = jiffies
  689. + msecs_to_jiffies(20);
  690. /* check the port again */
  691. mod_timer(&ehci_to_hcd(ehci)->rh_timer,
  692. ehci->reset_done[wIndex]);
  693. }
  694. /* resume completed? */
  695. else if (time_after_eq(jiffies,
  696. ehci->reset_done[wIndex])) {
  697. clear_bit(wIndex, &ehci->suspended_ports);
  698. set_bit(wIndex, &ehci->port_c_suspend);
  699. ehci->reset_done[wIndex] = 0;
  700. /* stop resume signaling */
  701. temp = ehci_readl(ehci, status_reg);
  702. ehci_writel(ehci,
  703. temp & ~(PORT_RWC_BITS | PORT_RESUME),
  704. status_reg);
  705. clear_bit(wIndex, &ehci->resuming_ports);
  706. retval = handshake(ehci, status_reg,
  707. PORT_RESUME, 0, 2000 /* 2msec */);
  708. if (retval != 0) {
  709. ehci_err(ehci,
  710. "port %d resume error %d\n",
  711. wIndex + 1, retval);
  712. goto error;
  713. }
  714. temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10));
  715. }
  716. }
  717. /* whoever resets must GetPortStatus to complete it!! */
  718. if ((temp & PORT_RESET)
  719. && time_after_eq(jiffies,
  720. ehci->reset_done[wIndex])) {
  721. status |= USB_PORT_STAT_C_RESET << 16;
  722. ehci->reset_done [wIndex] = 0;
  723. clear_bit(wIndex, &ehci->resuming_ports);
  724. /* force reset to complete */
  725. ehci_writel(ehci, temp & ~(PORT_RWC_BITS | PORT_RESET),
  726. status_reg);
  727. /* REVISIT: some hardware needs 550+ usec to clear
  728. * this bit; seems too long to spin routinely...
  729. */
  730. retval = handshake(ehci, status_reg,
  731. PORT_RESET, 0, 1000);
  732. if (retval != 0) {
  733. ehci_err (ehci, "port %d reset error %d\n",
  734. wIndex + 1, retval);
  735. goto error;
  736. }
  737. /* see what we found out */
  738. temp = check_reset_complete (ehci, wIndex, status_reg,
  739. ehci_readl(ehci, status_reg));
  740. }
  741. if (!(temp & (PORT_RESUME|PORT_RESET))) {
  742. ehci->reset_done[wIndex] = 0;
  743. clear_bit(wIndex, &ehci->resuming_ports);
  744. }
  745. /* transfer dedicated ports to the companion hc */
  746. if ((temp & PORT_CONNECT) &&
  747. test_bit(wIndex, &ehci->companion_ports)) {
  748. temp &= ~PORT_RWC_BITS;
  749. temp |= PORT_OWNER;
  750. ehci_writel(ehci, temp, status_reg);
  751. ehci_dbg(ehci, "port %d --> companion\n", wIndex + 1);
  752. temp = ehci_readl(ehci, status_reg);
  753. }
  754. /*
  755. * Even if OWNER is set, there's no harm letting khubd
  756. * see the wPortStatus values (they should all be 0 except
  757. * for PORT_POWER anyway).
  758. */
  759. if (temp & PORT_CONNECT) {
  760. status |= USB_PORT_STAT_CONNECTION;
  761. // status may be from integrated TT
  762. if (ehci->has_hostpc) {
  763. temp1 = ehci_readl(ehci, hostpc_reg);
  764. status |= ehci_port_speed(ehci, temp1);
  765. } else
  766. status |= ehci_port_speed(ehci, temp);
  767. }
  768. if (temp & PORT_PE)
  769. status |= USB_PORT_STAT_ENABLE;
  770. /* maybe the port was unsuspended without our knowledge */
  771. if (temp & (PORT_SUSPEND|PORT_RESUME)) {
  772. status |= USB_PORT_STAT_SUSPEND;
  773. } else if (test_bit(wIndex, &ehci->suspended_ports)) {
  774. clear_bit(wIndex, &ehci->suspended_ports);
  775. clear_bit(wIndex, &ehci->resuming_ports);
  776. ehci->reset_done[wIndex] = 0;
  777. if (temp & PORT_PE)
  778. set_bit(wIndex, &ehci->port_c_suspend);
  779. }
  780. if (temp & PORT_OC)
  781. status |= USB_PORT_STAT_OVERCURRENT;
  782. if (temp & PORT_RESET)
  783. status |= USB_PORT_STAT_RESET;
  784. if (temp & PORT_POWER)
  785. status |= USB_PORT_STAT_POWER;
  786. if (test_bit(wIndex, &ehci->port_c_suspend))
  787. status |= USB_PORT_STAT_C_SUSPEND << 16;
  788. #ifndef VERBOSE_DEBUG
  789. if (status & ~0xffff) /* only if wPortChange is interesting */
  790. #endif
  791. dbg_port (ehci, "GetStatus", wIndex + 1, temp);
  792. put_unaligned_le32(status, buf);
  793. break;
  794. case SetHubFeature:
  795. switch (wValue) {
  796. case C_HUB_LOCAL_POWER:
  797. case C_HUB_OVER_CURRENT:
  798. /* no hub-wide feature/status flags */
  799. break;
  800. default:
  801. goto error;
  802. }
  803. break;
  804. case SetPortFeature:
  805. selector = wIndex >> 8;
  806. wIndex &= 0xff;
  807. if (unlikely(ehci->debug)) {
  808. /* If the debug port is active any port
  809. * feature requests should get denied */
  810. if (wIndex == HCS_DEBUG_PORT(ehci->hcs_params) &&
  811. (readl(&ehci->debug->control) & DBGP_ENABLED)) {
  812. retval = -ENODEV;
  813. goto error_exit;
  814. }
  815. }
  816. if (!wIndex || wIndex > ports)
  817. goto error;
  818. wIndex--;
  819. temp = ehci_readl(ehci, status_reg);
  820. if (temp & PORT_OWNER)
  821. break;
  822. temp &= ~PORT_RWC_BITS;
  823. switch (wValue) {
  824. case USB_PORT_FEAT_SUSPEND:
  825. if (ehci->no_selective_suspend)
  826. break;
  827. if ((temp & PORT_PE) == 0
  828. || (temp & PORT_RESET) != 0)
  829. goto error;
  830. /* After above check the port must be connected.
  831. * Set appropriate bit thus could put phy into low power
  832. * mode if we have hostpc feature
  833. */
  834. temp &= ~PORT_WKCONN_E;
  835. temp |= PORT_WKDISC_E | PORT_WKOC_E;
  836. ehci_writel(ehci, temp | PORT_SUSPEND, status_reg);
  837. if (ehci->has_hostpc) {
  838. spin_unlock_irqrestore(&ehci->lock, flags);
  839. msleep(5);/* 5ms for HCD enter low pwr mode */
  840. spin_lock_irqsave(&ehci->lock, flags);
  841. temp1 = ehci_readl(ehci, hostpc_reg);
  842. ehci_writel(ehci, temp1 | HOSTPC_PHCD,
  843. hostpc_reg);
  844. temp1 = ehci_readl(ehci, hostpc_reg);
  845. ehci_dbg(ehci, "Port%d phy low pwr mode %s\n",
  846. wIndex, (temp1 & HOSTPC_PHCD) ?
  847. "succeeded" : "failed");
  848. }
  849. set_bit(wIndex, &ehci->suspended_ports);
  850. break;
  851. case USB_PORT_FEAT_POWER:
  852. if (HCS_PPC (ehci->hcs_params))
  853. ehci_writel(ehci, temp | PORT_POWER,
  854. status_reg);
  855. break;
  856. case USB_PORT_FEAT_RESET:
  857. if (temp & PORT_RESUME)
  858. goto error;
  859. /* line status bits may report this as low speed,
  860. * which can be fine if this root hub has a
  861. * transaction translator built in.
  862. */
  863. if ((temp & (PORT_PE|PORT_CONNECT)) == PORT_CONNECT
  864. && !ehci_is_TDI(ehci)
  865. && PORT_USB11 (temp)) {
  866. ehci_dbg (ehci,
  867. "port %d low speed --> companion\n",
  868. wIndex + 1);
  869. temp |= PORT_OWNER;
  870. } else {
  871. ehci_vdbg (ehci, "port %d reset\n", wIndex + 1);
  872. temp |= PORT_RESET;
  873. temp &= ~PORT_PE;
  874. /*
  875. * caller must wait, then call GetPortStatus
  876. * usb 2.0 spec says 50 ms resets on root
  877. */
  878. ehci->reset_done [wIndex] = jiffies
  879. + msecs_to_jiffies (50);
  880. }
  881. ehci_writel(ehci, temp, status_reg);
  882. break;
  883. /* For downstream facing ports (these): one hub port is put
  884. * into test mode according to USB2 11.24.2.13, then the hub
  885. * must be reset (which for root hub now means rmmod+modprobe,
  886. * or else system reboot). See EHCI 2.3.9 and 4.14 for info
  887. * about the EHCI-specific stuff.
  888. */
  889. case USB_PORT_FEAT_TEST:
  890. if (!selector || selector > 5)
  891. goto error;
  892. ehci_quiesce(ehci);
  893. /* Put all enabled ports into suspend */
  894. while (ports--) {
  895. u32 __iomem *sreg =
  896. &ehci->regs->port_status[ports];
  897. temp = ehci_readl(ehci, sreg) & ~PORT_RWC_BITS;
  898. if (temp & PORT_PE)
  899. ehci_writel(ehci, temp | PORT_SUSPEND,
  900. sreg);
  901. }
  902. ehci_halt(ehci);
  903. temp = ehci_readl(ehci, status_reg);
  904. temp |= selector << 16;
  905. ehci_writel(ehci, temp, status_reg);
  906. break;
  907. default:
  908. goto error;
  909. }
  910. ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
  911. break;
  912. default:
  913. error:
  914. /* "stall" on error */
  915. retval = -EPIPE;
  916. }
  917. error_exit:
  918. spin_unlock_irqrestore (&ehci->lock, flags);
  919. return retval;
  920. }
  921. static void __maybe_unused ehci_relinquish_port(struct usb_hcd *hcd,
  922. int portnum)
  923. {
  924. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  925. if (ehci_is_TDI(ehci))
  926. return;
  927. set_owner(ehci, --portnum, PORT_OWNER);
  928. }
  929. static int __maybe_unused ehci_port_handed_over(struct usb_hcd *hcd,
  930. int portnum)
  931. {
  932. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  933. u32 __iomem *reg;
  934. if (ehci_is_TDI(ehci))
  935. return 0;
  936. reg = &ehci->regs->port_status[portnum - 1];
  937. return ehci_readl(ehci, reg) & PORT_OWNER;
  938. }