events.c 43 KB

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  1. /*
  2. * Xen event channels
  3. *
  4. * Xen models interrupts with abstract event channels. Because each
  5. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  6. * must dynamically map irqs<->event channels. The event channels
  7. * interface with the rest of the kernel by defining a xen interrupt
  8. * chip. When an event is received, it is mapped to an irq and sent
  9. * through the normal interrupt processing path.
  10. *
  11. * There are four kinds of events which can be mapped to an event
  12. * channel:
  13. *
  14. * 1. Inter-domain notifications. This includes all the virtual
  15. * device events, since they're driven by front-ends in another domain
  16. * (typically dom0).
  17. * 2. VIRQs, typically used for timers. These are per-cpu events.
  18. * 3. IPIs.
  19. * 4. PIRQs - Hardware interrupts.
  20. *
  21. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  22. */
  23. #include <linux/linkage.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/module.h>
  27. #include <linux/string.h>
  28. #include <linux/bootmem.h>
  29. #include <linux/slab.h>
  30. #include <linux/irqnr.h>
  31. #include <linux/pci.h>
  32. #ifdef CONFIG_X86
  33. #include <asm/desc.h>
  34. #include <asm/ptrace.h>
  35. #include <asm/irq.h>
  36. #include <asm/idle.h>
  37. #include <asm/io_apic.h>
  38. #include <asm/xen/page.h>
  39. #include <asm/xen/pci.h>
  40. #endif
  41. #include <asm/sync_bitops.h>
  42. #include <asm/xen/hypercall.h>
  43. #include <asm/xen/hypervisor.h>
  44. #include <xen/xen.h>
  45. #include <xen/hvm.h>
  46. #include <xen/xen-ops.h>
  47. #include <xen/events.h>
  48. #include <xen/interface/xen.h>
  49. #include <xen/interface/event_channel.h>
  50. #include <xen/interface/hvm/hvm_op.h>
  51. #include <xen/interface/hvm/params.h>
  52. #include <xen/interface/physdev.h>
  53. #include <xen/interface/sched.h>
  54. #include <asm/hw_irq.h>
  55. /*
  56. * This lock protects updates to the following mapping and reference-count
  57. * arrays. The lock does not need to be acquired to read the mapping tables.
  58. */
  59. static DEFINE_MUTEX(irq_mapping_update_lock);
  60. static LIST_HEAD(xen_irq_list_head);
  61. /* IRQ <-> VIRQ mapping. */
  62. static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
  63. /* IRQ <-> IPI mapping */
  64. static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
  65. /* Interrupt types. */
  66. enum xen_irq_type {
  67. IRQT_UNBOUND = 0,
  68. IRQT_PIRQ,
  69. IRQT_VIRQ,
  70. IRQT_IPI,
  71. IRQT_EVTCHN
  72. };
  73. /*
  74. * Packed IRQ information:
  75. * type - enum xen_irq_type
  76. * event channel - irq->event channel mapping
  77. * cpu - cpu this event channel is bound to
  78. * index - type-specific information:
  79. * PIRQ - vector, with MSB being "needs EIO", or physical IRQ of the HVM
  80. * guest, or GSI (real passthrough IRQ) of the device.
  81. * VIRQ - virq number
  82. * IPI - IPI vector
  83. * EVTCHN -
  84. */
  85. struct irq_info {
  86. struct list_head list;
  87. int refcnt;
  88. enum xen_irq_type type; /* type */
  89. unsigned irq;
  90. unsigned short evtchn; /* event channel */
  91. unsigned short cpu; /* cpu bound */
  92. union {
  93. unsigned short virq;
  94. enum ipi_vector ipi;
  95. struct {
  96. unsigned short pirq;
  97. unsigned short gsi;
  98. unsigned char vector;
  99. unsigned char flags;
  100. uint16_t domid;
  101. } pirq;
  102. } u;
  103. };
  104. #define PIRQ_NEEDS_EOI (1 << 0)
  105. #define PIRQ_SHAREABLE (1 << 1)
  106. static int *evtchn_to_irq;
  107. #ifdef CONFIG_X86
  108. static unsigned long *pirq_eoi_map;
  109. #endif
  110. static bool (*pirq_needs_eoi)(unsigned irq);
  111. /*
  112. * Note sizeof(xen_ulong_t) can be more than sizeof(unsigned long). Be
  113. * careful to only use bitops which allow for this (e.g
  114. * test_bit/find_first_bit and friends but not __ffs) and to pass
  115. * BITS_PER_EVTCHN_WORD as the bitmask length.
  116. */
  117. #define BITS_PER_EVTCHN_WORD (sizeof(xen_ulong_t)*8)
  118. /*
  119. * Make a bitmask (i.e. unsigned long *) of a xen_ulong_t
  120. * array. Primarily to avoid long lines (hence the terse name).
  121. */
  122. #define BM(x) (unsigned long *)(x)
  123. /* Find the first set bit in a evtchn mask */
  124. #define EVTCHN_FIRST_BIT(w) find_first_bit(BM(&(w)), BITS_PER_EVTCHN_WORD)
  125. static DEFINE_PER_CPU(xen_ulong_t [NR_EVENT_CHANNELS/BITS_PER_EVTCHN_WORD],
  126. cpu_evtchn_mask);
  127. /* Xen will never allocate port zero for any purpose. */
  128. #define VALID_EVTCHN(chn) ((chn) != 0)
  129. static struct irq_chip xen_dynamic_chip;
  130. static struct irq_chip xen_percpu_chip;
  131. static struct irq_chip xen_pirq_chip;
  132. static void enable_dynirq(struct irq_data *data);
  133. static void disable_dynirq(struct irq_data *data);
  134. /* Get info for IRQ */
  135. static struct irq_info *info_for_irq(unsigned irq)
  136. {
  137. return irq_get_handler_data(irq);
  138. }
  139. /* Constructors for packed IRQ information. */
  140. static void xen_irq_info_common_init(struct irq_info *info,
  141. unsigned irq,
  142. enum xen_irq_type type,
  143. unsigned short evtchn,
  144. unsigned short cpu)
  145. {
  146. BUG_ON(info->type != IRQT_UNBOUND && info->type != type);
  147. info->type = type;
  148. info->irq = irq;
  149. info->evtchn = evtchn;
  150. info->cpu = cpu;
  151. evtchn_to_irq[evtchn] = irq;
  152. }
  153. static void xen_irq_info_evtchn_init(unsigned irq,
  154. unsigned short evtchn)
  155. {
  156. struct irq_info *info = info_for_irq(irq);
  157. xen_irq_info_common_init(info, irq, IRQT_EVTCHN, evtchn, 0);
  158. }
  159. static void xen_irq_info_ipi_init(unsigned cpu,
  160. unsigned irq,
  161. unsigned short evtchn,
  162. enum ipi_vector ipi)
  163. {
  164. struct irq_info *info = info_for_irq(irq);
  165. xen_irq_info_common_init(info, irq, IRQT_IPI, evtchn, 0);
  166. info->u.ipi = ipi;
  167. per_cpu(ipi_to_irq, cpu)[ipi] = irq;
  168. }
  169. static void xen_irq_info_virq_init(unsigned cpu,
  170. unsigned irq,
  171. unsigned short evtchn,
  172. unsigned short virq)
  173. {
  174. struct irq_info *info = info_for_irq(irq);
  175. xen_irq_info_common_init(info, irq, IRQT_VIRQ, evtchn, 0);
  176. info->u.virq = virq;
  177. per_cpu(virq_to_irq, cpu)[virq] = irq;
  178. }
  179. static void xen_irq_info_pirq_init(unsigned irq,
  180. unsigned short evtchn,
  181. unsigned short pirq,
  182. unsigned short gsi,
  183. unsigned short vector,
  184. uint16_t domid,
  185. unsigned char flags)
  186. {
  187. struct irq_info *info = info_for_irq(irq);
  188. xen_irq_info_common_init(info, irq, IRQT_PIRQ, evtchn, 0);
  189. info->u.pirq.pirq = pirq;
  190. info->u.pirq.gsi = gsi;
  191. info->u.pirq.vector = vector;
  192. info->u.pirq.domid = domid;
  193. info->u.pirq.flags = flags;
  194. }
  195. /*
  196. * Accessors for packed IRQ information.
  197. */
  198. static unsigned int evtchn_from_irq(unsigned irq)
  199. {
  200. if (unlikely(WARN(irq < 0 || irq >= nr_irqs, "Invalid irq %d!\n", irq)))
  201. return 0;
  202. return info_for_irq(irq)->evtchn;
  203. }
  204. unsigned irq_from_evtchn(unsigned int evtchn)
  205. {
  206. return evtchn_to_irq[evtchn];
  207. }
  208. EXPORT_SYMBOL_GPL(irq_from_evtchn);
  209. static enum ipi_vector ipi_from_irq(unsigned irq)
  210. {
  211. struct irq_info *info = info_for_irq(irq);
  212. BUG_ON(info == NULL);
  213. BUG_ON(info->type != IRQT_IPI);
  214. return info->u.ipi;
  215. }
  216. static unsigned virq_from_irq(unsigned irq)
  217. {
  218. struct irq_info *info = info_for_irq(irq);
  219. BUG_ON(info == NULL);
  220. BUG_ON(info->type != IRQT_VIRQ);
  221. return info->u.virq;
  222. }
  223. static unsigned pirq_from_irq(unsigned irq)
  224. {
  225. struct irq_info *info = info_for_irq(irq);
  226. BUG_ON(info == NULL);
  227. BUG_ON(info->type != IRQT_PIRQ);
  228. return info->u.pirq.pirq;
  229. }
  230. static enum xen_irq_type type_from_irq(unsigned irq)
  231. {
  232. return info_for_irq(irq)->type;
  233. }
  234. static unsigned cpu_from_irq(unsigned irq)
  235. {
  236. return info_for_irq(irq)->cpu;
  237. }
  238. static unsigned int cpu_from_evtchn(unsigned int evtchn)
  239. {
  240. int irq = evtchn_to_irq[evtchn];
  241. unsigned ret = 0;
  242. if (irq != -1)
  243. ret = cpu_from_irq(irq);
  244. return ret;
  245. }
  246. #ifdef CONFIG_X86
  247. static bool pirq_check_eoi_map(unsigned irq)
  248. {
  249. return test_bit(pirq_from_irq(irq), pirq_eoi_map);
  250. }
  251. #endif
  252. static bool pirq_needs_eoi_flag(unsigned irq)
  253. {
  254. struct irq_info *info = info_for_irq(irq);
  255. BUG_ON(info->type != IRQT_PIRQ);
  256. return info->u.pirq.flags & PIRQ_NEEDS_EOI;
  257. }
  258. static inline xen_ulong_t active_evtchns(unsigned int cpu,
  259. struct shared_info *sh,
  260. unsigned int idx)
  261. {
  262. return sh->evtchn_pending[idx] &
  263. per_cpu(cpu_evtchn_mask, cpu)[idx] &
  264. ~sh->evtchn_mask[idx];
  265. }
  266. static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
  267. {
  268. int irq = evtchn_to_irq[chn];
  269. BUG_ON(irq == -1);
  270. #ifdef CONFIG_SMP
  271. cpumask_copy(irq_to_desc(irq)->irq_data.affinity, cpumask_of(cpu));
  272. #endif
  273. clear_bit(chn, BM(per_cpu(cpu_evtchn_mask, cpu_from_irq(irq))));
  274. set_bit(chn, BM(per_cpu(cpu_evtchn_mask, cpu)));
  275. info_for_irq(irq)->cpu = cpu;
  276. }
  277. static void init_evtchn_cpu_bindings(void)
  278. {
  279. int i;
  280. #ifdef CONFIG_SMP
  281. struct irq_info *info;
  282. /* By default all event channels notify CPU#0. */
  283. list_for_each_entry(info, &xen_irq_list_head, list) {
  284. struct irq_desc *desc = irq_to_desc(info->irq);
  285. cpumask_copy(desc->irq_data.affinity, cpumask_of(0));
  286. }
  287. #endif
  288. for_each_possible_cpu(i)
  289. memset(per_cpu(cpu_evtchn_mask, i),
  290. (i == 0) ? ~0 : 0, sizeof(*per_cpu(cpu_evtchn_mask, i)));
  291. }
  292. static inline void clear_evtchn(int port)
  293. {
  294. struct shared_info *s = HYPERVISOR_shared_info;
  295. sync_clear_bit(port, BM(&s->evtchn_pending[0]));
  296. }
  297. static inline void set_evtchn(int port)
  298. {
  299. struct shared_info *s = HYPERVISOR_shared_info;
  300. sync_set_bit(port, BM(&s->evtchn_pending[0]));
  301. }
  302. static inline int test_evtchn(int port)
  303. {
  304. struct shared_info *s = HYPERVISOR_shared_info;
  305. return sync_test_bit(port, BM(&s->evtchn_pending[0]));
  306. }
  307. /**
  308. * notify_remote_via_irq - send event to remote end of event channel via irq
  309. * @irq: irq of event channel to send event to
  310. *
  311. * Unlike notify_remote_via_evtchn(), this is safe to use across
  312. * save/restore. Notifications on a broken connection are silently
  313. * dropped.
  314. */
  315. void notify_remote_via_irq(int irq)
  316. {
  317. int evtchn = evtchn_from_irq(irq);
  318. if (VALID_EVTCHN(evtchn))
  319. notify_remote_via_evtchn(evtchn);
  320. }
  321. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  322. static void mask_evtchn(int port)
  323. {
  324. struct shared_info *s = HYPERVISOR_shared_info;
  325. sync_set_bit(port, BM(&s->evtchn_mask[0]));
  326. }
  327. static void unmask_evtchn(int port)
  328. {
  329. struct shared_info *s = HYPERVISOR_shared_info;
  330. unsigned int cpu = get_cpu();
  331. int do_hypercall = 0, evtchn_pending = 0;
  332. BUG_ON(!irqs_disabled());
  333. if (unlikely((cpu != cpu_from_evtchn(port))))
  334. do_hypercall = 1;
  335. else
  336. evtchn_pending = sync_test_bit(port, BM(&s->evtchn_pending[0]));
  337. if (unlikely(evtchn_pending && xen_hvm_domain()))
  338. do_hypercall = 1;
  339. /* Slow path (hypercall) if this is a non-local port or if this is
  340. * an hvm domain and an event is pending (hvm domains don't have
  341. * their own implementation of irq_enable). */
  342. if (do_hypercall) {
  343. struct evtchn_unmask unmask = { .port = port };
  344. (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
  345. } else {
  346. struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
  347. sync_clear_bit(port, BM(&s->evtchn_mask[0]));
  348. /*
  349. * The following is basically the equivalent of
  350. * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
  351. * the interrupt edge' if the channel is masked.
  352. */
  353. if (evtchn_pending &&
  354. !sync_test_and_set_bit(port / BITS_PER_EVTCHN_WORD,
  355. BM(&vcpu_info->evtchn_pending_sel)))
  356. vcpu_info->evtchn_upcall_pending = 1;
  357. }
  358. put_cpu();
  359. }
  360. static void xen_irq_init(unsigned irq)
  361. {
  362. struct irq_info *info;
  363. #ifdef CONFIG_SMP
  364. struct irq_desc *desc = irq_to_desc(irq);
  365. /* By default all event channels notify CPU#0. */
  366. cpumask_copy(desc->irq_data.affinity, cpumask_of(0));
  367. #endif
  368. info = kzalloc(sizeof(*info), GFP_KERNEL);
  369. if (info == NULL)
  370. panic("Unable to allocate metadata for IRQ%d\n", irq);
  371. info->type = IRQT_UNBOUND;
  372. info->refcnt = -1;
  373. irq_set_handler_data(irq, info);
  374. list_add_tail(&info->list, &xen_irq_list_head);
  375. }
  376. static int __must_check xen_allocate_irq_dynamic(void)
  377. {
  378. int first = 0;
  379. int irq;
  380. #ifdef CONFIG_X86_IO_APIC
  381. /*
  382. * For an HVM guest or domain 0 which see "real" (emulated or
  383. * actual respectively) GSIs we allocate dynamic IRQs
  384. * e.g. those corresponding to event channels or MSIs
  385. * etc. from the range above those "real" GSIs to avoid
  386. * collisions.
  387. */
  388. if (xen_initial_domain() || xen_hvm_domain())
  389. first = get_nr_irqs_gsi();
  390. #endif
  391. irq = irq_alloc_desc_from(first, -1);
  392. if (irq >= 0)
  393. xen_irq_init(irq);
  394. return irq;
  395. }
  396. static int __must_check xen_allocate_irq_gsi(unsigned gsi)
  397. {
  398. int irq;
  399. /*
  400. * A PV guest has no concept of a GSI (since it has no ACPI
  401. * nor access to/knowledge of the physical APICs). Therefore
  402. * all IRQs are dynamically allocated from the entire IRQ
  403. * space.
  404. */
  405. if (xen_pv_domain() && !xen_initial_domain())
  406. return xen_allocate_irq_dynamic();
  407. /* Legacy IRQ descriptors are already allocated by the arch. */
  408. if (gsi < NR_IRQS_LEGACY)
  409. irq = gsi;
  410. else
  411. irq = irq_alloc_desc_at(gsi, -1);
  412. xen_irq_init(irq);
  413. return irq;
  414. }
  415. static void xen_free_irq(unsigned irq)
  416. {
  417. struct irq_info *info = irq_get_handler_data(irq);
  418. list_del(&info->list);
  419. irq_set_handler_data(irq, NULL);
  420. WARN_ON(info->refcnt > 0);
  421. kfree(info);
  422. /* Legacy IRQ descriptors are managed by the arch. */
  423. if (irq < NR_IRQS_LEGACY)
  424. return;
  425. irq_free_desc(irq);
  426. }
  427. static void pirq_query_unmask(int irq)
  428. {
  429. struct physdev_irq_status_query irq_status;
  430. struct irq_info *info = info_for_irq(irq);
  431. BUG_ON(info->type != IRQT_PIRQ);
  432. irq_status.irq = pirq_from_irq(irq);
  433. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  434. irq_status.flags = 0;
  435. info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
  436. if (irq_status.flags & XENIRQSTAT_needs_eoi)
  437. info->u.pirq.flags |= PIRQ_NEEDS_EOI;
  438. }
  439. static bool probing_irq(int irq)
  440. {
  441. struct irq_desc *desc = irq_to_desc(irq);
  442. return desc && desc->action == NULL;
  443. }
  444. static void eoi_pirq(struct irq_data *data)
  445. {
  446. int evtchn = evtchn_from_irq(data->irq);
  447. struct physdev_eoi eoi = { .irq = pirq_from_irq(data->irq) };
  448. int rc = 0;
  449. irq_move_irq(data);
  450. if (VALID_EVTCHN(evtchn))
  451. clear_evtchn(evtchn);
  452. if (pirq_needs_eoi(data->irq)) {
  453. rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
  454. WARN_ON(rc);
  455. }
  456. }
  457. static void mask_ack_pirq(struct irq_data *data)
  458. {
  459. disable_dynirq(data);
  460. eoi_pirq(data);
  461. }
  462. static unsigned int __startup_pirq(unsigned int irq)
  463. {
  464. struct evtchn_bind_pirq bind_pirq;
  465. struct irq_info *info = info_for_irq(irq);
  466. int evtchn = evtchn_from_irq(irq);
  467. int rc;
  468. BUG_ON(info->type != IRQT_PIRQ);
  469. if (VALID_EVTCHN(evtchn))
  470. goto out;
  471. bind_pirq.pirq = pirq_from_irq(irq);
  472. /* NB. We are happy to share unless we are probing. */
  473. bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ?
  474. BIND_PIRQ__WILL_SHARE : 0;
  475. rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq);
  476. if (rc != 0) {
  477. if (!probing_irq(irq))
  478. printk(KERN_INFO "Failed to obtain physical IRQ %d\n",
  479. irq);
  480. return 0;
  481. }
  482. evtchn = bind_pirq.port;
  483. pirq_query_unmask(irq);
  484. evtchn_to_irq[evtchn] = irq;
  485. bind_evtchn_to_cpu(evtchn, 0);
  486. info->evtchn = evtchn;
  487. out:
  488. unmask_evtchn(evtchn);
  489. eoi_pirq(irq_get_irq_data(irq));
  490. return 0;
  491. }
  492. static unsigned int startup_pirq(struct irq_data *data)
  493. {
  494. return __startup_pirq(data->irq);
  495. }
  496. static void shutdown_pirq(struct irq_data *data)
  497. {
  498. struct evtchn_close close;
  499. unsigned int irq = data->irq;
  500. struct irq_info *info = info_for_irq(irq);
  501. int evtchn = evtchn_from_irq(irq);
  502. BUG_ON(info->type != IRQT_PIRQ);
  503. if (!VALID_EVTCHN(evtchn))
  504. return;
  505. mask_evtchn(evtchn);
  506. close.port = evtchn;
  507. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  508. BUG();
  509. bind_evtchn_to_cpu(evtchn, 0);
  510. evtchn_to_irq[evtchn] = -1;
  511. info->evtchn = 0;
  512. }
  513. static void enable_pirq(struct irq_data *data)
  514. {
  515. startup_pirq(data);
  516. }
  517. static void disable_pirq(struct irq_data *data)
  518. {
  519. disable_dynirq(data);
  520. }
  521. int xen_irq_from_gsi(unsigned gsi)
  522. {
  523. struct irq_info *info;
  524. list_for_each_entry(info, &xen_irq_list_head, list) {
  525. if (info->type != IRQT_PIRQ)
  526. continue;
  527. if (info->u.pirq.gsi == gsi)
  528. return info->irq;
  529. }
  530. return -1;
  531. }
  532. EXPORT_SYMBOL_GPL(xen_irq_from_gsi);
  533. /*
  534. * Do not make any assumptions regarding the relationship between the
  535. * IRQ number returned here and the Xen pirq argument.
  536. *
  537. * Note: We don't assign an event channel until the irq actually started
  538. * up. Return an existing irq if we've already got one for the gsi.
  539. *
  540. * Shareable implies level triggered, not shareable implies edge
  541. * triggered here.
  542. */
  543. int xen_bind_pirq_gsi_to_irq(unsigned gsi,
  544. unsigned pirq, int shareable, char *name)
  545. {
  546. int irq = -1;
  547. struct physdev_irq irq_op;
  548. mutex_lock(&irq_mapping_update_lock);
  549. irq = xen_irq_from_gsi(gsi);
  550. if (irq != -1) {
  551. printk(KERN_INFO "xen_map_pirq_gsi: returning irq %d for gsi %u\n",
  552. irq, gsi);
  553. goto out;
  554. }
  555. irq = xen_allocate_irq_gsi(gsi);
  556. if (irq < 0)
  557. goto out;
  558. irq_op.irq = irq;
  559. irq_op.vector = 0;
  560. /* Only the privileged domain can do this. For non-priv, the pcifront
  561. * driver provides a PCI bus that does the call to do exactly
  562. * this in the priv domain. */
  563. if (xen_initial_domain() &&
  564. HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
  565. xen_free_irq(irq);
  566. irq = -ENOSPC;
  567. goto out;
  568. }
  569. xen_irq_info_pirq_init(irq, 0, pirq, gsi, irq_op.vector, DOMID_SELF,
  570. shareable ? PIRQ_SHAREABLE : 0);
  571. pirq_query_unmask(irq);
  572. /* We try to use the handler with the appropriate semantic for the
  573. * type of interrupt: if the interrupt is an edge triggered
  574. * interrupt we use handle_edge_irq.
  575. *
  576. * On the other hand if the interrupt is level triggered we use
  577. * handle_fasteoi_irq like the native code does for this kind of
  578. * interrupts.
  579. *
  580. * Depending on the Xen version, pirq_needs_eoi might return true
  581. * not only for level triggered interrupts but for edge triggered
  582. * interrupts too. In any case Xen always honors the eoi mechanism,
  583. * not injecting any more pirqs of the same kind if the first one
  584. * hasn't received an eoi yet. Therefore using the fasteoi handler
  585. * is the right choice either way.
  586. */
  587. if (shareable)
  588. irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
  589. handle_fasteoi_irq, name);
  590. else
  591. irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
  592. handle_edge_irq, name);
  593. out:
  594. mutex_unlock(&irq_mapping_update_lock);
  595. return irq;
  596. }
  597. #ifdef CONFIG_PCI_MSI
  598. int xen_allocate_pirq_msi(struct pci_dev *dev, struct msi_desc *msidesc)
  599. {
  600. int rc;
  601. struct physdev_get_free_pirq op_get_free_pirq;
  602. op_get_free_pirq.type = MAP_PIRQ_TYPE_MSI;
  603. rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_free_pirq, &op_get_free_pirq);
  604. WARN_ONCE(rc == -ENOSYS,
  605. "hypervisor does not support the PHYSDEVOP_get_free_pirq interface\n");
  606. return rc ? -1 : op_get_free_pirq.pirq;
  607. }
  608. int xen_bind_pirq_msi_to_irq(struct pci_dev *dev, struct msi_desc *msidesc,
  609. int pirq, int vector, const char *name,
  610. domid_t domid)
  611. {
  612. int irq, ret;
  613. mutex_lock(&irq_mapping_update_lock);
  614. irq = xen_allocate_irq_dynamic();
  615. if (irq < 0)
  616. goto out;
  617. irq_set_chip_and_handler_name(irq, &xen_pirq_chip, handle_edge_irq,
  618. name);
  619. xen_irq_info_pirq_init(irq, 0, pirq, 0, vector, domid, 0);
  620. ret = irq_set_msi_desc(irq, msidesc);
  621. if (ret < 0)
  622. goto error_irq;
  623. out:
  624. mutex_unlock(&irq_mapping_update_lock);
  625. return irq;
  626. error_irq:
  627. mutex_unlock(&irq_mapping_update_lock);
  628. xen_free_irq(irq);
  629. return ret;
  630. }
  631. #endif
  632. int xen_destroy_irq(int irq)
  633. {
  634. struct irq_desc *desc;
  635. struct physdev_unmap_pirq unmap_irq;
  636. struct irq_info *info = info_for_irq(irq);
  637. int rc = -ENOENT;
  638. mutex_lock(&irq_mapping_update_lock);
  639. desc = irq_to_desc(irq);
  640. if (!desc)
  641. goto out;
  642. if (xen_initial_domain()) {
  643. unmap_irq.pirq = info->u.pirq.pirq;
  644. unmap_irq.domid = info->u.pirq.domid;
  645. rc = HYPERVISOR_physdev_op(PHYSDEVOP_unmap_pirq, &unmap_irq);
  646. /* If another domain quits without making the pci_disable_msix
  647. * call, the Xen hypervisor takes care of freeing the PIRQs
  648. * (free_domain_pirqs).
  649. */
  650. if ((rc == -ESRCH && info->u.pirq.domid != DOMID_SELF))
  651. printk(KERN_INFO "domain %d does not have %d anymore\n",
  652. info->u.pirq.domid, info->u.pirq.pirq);
  653. else if (rc) {
  654. printk(KERN_WARNING "unmap irq failed %d\n", rc);
  655. goto out;
  656. }
  657. }
  658. xen_free_irq(irq);
  659. out:
  660. mutex_unlock(&irq_mapping_update_lock);
  661. return rc;
  662. }
  663. int xen_irq_from_pirq(unsigned pirq)
  664. {
  665. int irq;
  666. struct irq_info *info;
  667. mutex_lock(&irq_mapping_update_lock);
  668. list_for_each_entry(info, &xen_irq_list_head, list) {
  669. if (info->type != IRQT_PIRQ)
  670. continue;
  671. irq = info->irq;
  672. if (info->u.pirq.pirq == pirq)
  673. goto out;
  674. }
  675. irq = -1;
  676. out:
  677. mutex_unlock(&irq_mapping_update_lock);
  678. return irq;
  679. }
  680. int xen_pirq_from_irq(unsigned irq)
  681. {
  682. return pirq_from_irq(irq);
  683. }
  684. EXPORT_SYMBOL_GPL(xen_pirq_from_irq);
  685. int bind_evtchn_to_irq(unsigned int evtchn)
  686. {
  687. int irq;
  688. mutex_lock(&irq_mapping_update_lock);
  689. irq = evtchn_to_irq[evtchn];
  690. if (irq == -1) {
  691. irq = xen_allocate_irq_dynamic();
  692. if (irq == -1)
  693. goto out;
  694. irq_set_chip_and_handler_name(irq, &xen_dynamic_chip,
  695. handle_edge_irq, "event");
  696. xen_irq_info_evtchn_init(irq, evtchn);
  697. } else {
  698. struct irq_info *info = info_for_irq(irq);
  699. WARN_ON(info == NULL || info->type != IRQT_EVTCHN);
  700. }
  701. irq_clear_status_flags(irq, IRQ_NOREQUEST|IRQ_NOAUTOEN);
  702. out:
  703. mutex_unlock(&irq_mapping_update_lock);
  704. return irq;
  705. }
  706. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
  707. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  708. {
  709. struct evtchn_bind_ipi bind_ipi;
  710. int evtchn, irq;
  711. mutex_lock(&irq_mapping_update_lock);
  712. irq = per_cpu(ipi_to_irq, cpu)[ipi];
  713. if (irq == -1) {
  714. irq = xen_allocate_irq_dynamic();
  715. if (irq < 0)
  716. goto out;
  717. irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
  718. handle_percpu_irq, "ipi");
  719. bind_ipi.vcpu = cpu;
  720. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  721. &bind_ipi) != 0)
  722. BUG();
  723. evtchn = bind_ipi.port;
  724. xen_irq_info_ipi_init(cpu, irq, evtchn, ipi);
  725. bind_evtchn_to_cpu(evtchn, cpu);
  726. } else {
  727. struct irq_info *info = info_for_irq(irq);
  728. WARN_ON(info == NULL || info->type != IRQT_IPI);
  729. }
  730. out:
  731. mutex_unlock(&irq_mapping_update_lock);
  732. return irq;
  733. }
  734. static int bind_interdomain_evtchn_to_irq(unsigned int remote_domain,
  735. unsigned int remote_port)
  736. {
  737. struct evtchn_bind_interdomain bind_interdomain;
  738. int err;
  739. bind_interdomain.remote_dom = remote_domain;
  740. bind_interdomain.remote_port = remote_port;
  741. err = HYPERVISOR_event_channel_op(EVTCHNOP_bind_interdomain,
  742. &bind_interdomain);
  743. return err ? : bind_evtchn_to_irq(bind_interdomain.local_port);
  744. }
  745. static int find_virq(unsigned int virq, unsigned int cpu)
  746. {
  747. struct evtchn_status status;
  748. int port, rc = -ENOENT;
  749. memset(&status, 0, sizeof(status));
  750. for (port = 0; port <= NR_EVENT_CHANNELS; port++) {
  751. status.dom = DOMID_SELF;
  752. status.port = port;
  753. rc = HYPERVISOR_event_channel_op(EVTCHNOP_status, &status);
  754. if (rc < 0)
  755. continue;
  756. if (status.status != EVTCHNSTAT_virq)
  757. continue;
  758. if (status.u.virq == virq && status.vcpu == cpu) {
  759. rc = port;
  760. break;
  761. }
  762. }
  763. return rc;
  764. }
  765. int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
  766. {
  767. struct evtchn_bind_virq bind_virq;
  768. int evtchn, irq, ret;
  769. mutex_lock(&irq_mapping_update_lock);
  770. irq = per_cpu(virq_to_irq, cpu)[virq];
  771. if (irq == -1) {
  772. irq = xen_allocate_irq_dynamic();
  773. if (irq == -1)
  774. goto out;
  775. irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
  776. handle_percpu_irq, "virq");
  777. bind_virq.virq = virq;
  778. bind_virq.vcpu = cpu;
  779. ret = HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  780. &bind_virq);
  781. if (ret == 0)
  782. evtchn = bind_virq.port;
  783. else {
  784. if (ret == -EEXIST)
  785. ret = find_virq(virq, cpu);
  786. BUG_ON(ret < 0);
  787. evtchn = ret;
  788. }
  789. xen_irq_info_virq_init(cpu, irq, evtchn, virq);
  790. bind_evtchn_to_cpu(evtchn, cpu);
  791. } else {
  792. struct irq_info *info = info_for_irq(irq);
  793. WARN_ON(info == NULL || info->type != IRQT_VIRQ);
  794. }
  795. out:
  796. mutex_unlock(&irq_mapping_update_lock);
  797. return irq;
  798. }
  799. static void unbind_from_irq(unsigned int irq)
  800. {
  801. struct evtchn_close close;
  802. int evtchn = evtchn_from_irq(irq);
  803. struct irq_info *info = irq_get_handler_data(irq);
  804. mutex_lock(&irq_mapping_update_lock);
  805. if (info->refcnt > 0) {
  806. info->refcnt--;
  807. if (info->refcnt != 0)
  808. goto done;
  809. }
  810. if (VALID_EVTCHN(evtchn)) {
  811. close.port = evtchn;
  812. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  813. BUG();
  814. switch (type_from_irq(irq)) {
  815. case IRQT_VIRQ:
  816. per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
  817. [virq_from_irq(irq)] = -1;
  818. break;
  819. case IRQT_IPI:
  820. per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
  821. [ipi_from_irq(irq)] = -1;
  822. break;
  823. default:
  824. break;
  825. }
  826. /* Closed ports are implicitly re-bound to VCPU0. */
  827. bind_evtchn_to_cpu(evtchn, 0);
  828. evtchn_to_irq[evtchn] = -1;
  829. }
  830. BUG_ON(info_for_irq(irq)->type == IRQT_UNBOUND);
  831. xen_free_irq(irq);
  832. done:
  833. mutex_unlock(&irq_mapping_update_lock);
  834. }
  835. int bind_evtchn_to_irqhandler(unsigned int evtchn,
  836. irq_handler_t handler,
  837. unsigned long irqflags,
  838. const char *devname, void *dev_id)
  839. {
  840. int irq, retval;
  841. irq = bind_evtchn_to_irq(evtchn);
  842. if (irq < 0)
  843. return irq;
  844. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  845. if (retval != 0) {
  846. unbind_from_irq(irq);
  847. return retval;
  848. }
  849. return irq;
  850. }
  851. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  852. int bind_interdomain_evtchn_to_irqhandler(unsigned int remote_domain,
  853. unsigned int remote_port,
  854. irq_handler_t handler,
  855. unsigned long irqflags,
  856. const char *devname,
  857. void *dev_id)
  858. {
  859. int irq, retval;
  860. irq = bind_interdomain_evtchn_to_irq(remote_domain, remote_port);
  861. if (irq < 0)
  862. return irq;
  863. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  864. if (retval != 0) {
  865. unbind_from_irq(irq);
  866. return retval;
  867. }
  868. return irq;
  869. }
  870. EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irqhandler);
  871. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  872. irq_handler_t handler,
  873. unsigned long irqflags, const char *devname, void *dev_id)
  874. {
  875. int irq, retval;
  876. irq = bind_virq_to_irq(virq, cpu);
  877. if (irq < 0)
  878. return irq;
  879. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  880. if (retval != 0) {
  881. unbind_from_irq(irq);
  882. return retval;
  883. }
  884. return irq;
  885. }
  886. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  887. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  888. unsigned int cpu,
  889. irq_handler_t handler,
  890. unsigned long irqflags,
  891. const char *devname,
  892. void *dev_id)
  893. {
  894. int irq, retval;
  895. irq = bind_ipi_to_irq(ipi, cpu);
  896. if (irq < 0)
  897. return irq;
  898. irqflags |= IRQF_NO_SUSPEND | IRQF_FORCE_RESUME | IRQF_EARLY_RESUME;
  899. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  900. if (retval != 0) {
  901. unbind_from_irq(irq);
  902. return retval;
  903. }
  904. return irq;
  905. }
  906. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  907. {
  908. free_irq(irq, dev_id);
  909. unbind_from_irq(irq);
  910. }
  911. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  912. int evtchn_make_refcounted(unsigned int evtchn)
  913. {
  914. int irq = evtchn_to_irq[evtchn];
  915. struct irq_info *info;
  916. if (irq == -1)
  917. return -ENOENT;
  918. info = irq_get_handler_data(irq);
  919. if (!info)
  920. return -ENOENT;
  921. WARN_ON(info->refcnt != -1);
  922. info->refcnt = 1;
  923. return 0;
  924. }
  925. EXPORT_SYMBOL_GPL(evtchn_make_refcounted);
  926. int evtchn_get(unsigned int evtchn)
  927. {
  928. int irq;
  929. struct irq_info *info;
  930. int err = -ENOENT;
  931. if (evtchn >= NR_EVENT_CHANNELS)
  932. return -EINVAL;
  933. mutex_lock(&irq_mapping_update_lock);
  934. irq = evtchn_to_irq[evtchn];
  935. if (irq == -1)
  936. goto done;
  937. info = irq_get_handler_data(irq);
  938. if (!info)
  939. goto done;
  940. err = -EINVAL;
  941. if (info->refcnt <= 0)
  942. goto done;
  943. info->refcnt++;
  944. err = 0;
  945. done:
  946. mutex_unlock(&irq_mapping_update_lock);
  947. return err;
  948. }
  949. EXPORT_SYMBOL_GPL(evtchn_get);
  950. void evtchn_put(unsigned int evtchn)
  951. {
  952. int irq = evtchn_to_irq[evtchn];
  953. if (WARN_ON(irq == -1))
  954. return;
  955. unbind_from_irq(irq);
  956. }
  957. EXPORT_SYMBOL_GPL(evtchn_put);
  958. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  959. {
  960. int irq = per_cpu(ipi_to_irq, cpu)[vector];
  961. BUG_ON(irq < 0);
  962. notify_remote_via_irq(irq);
  963. }
  964. irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
  965. {
  966. struct shared_info *sh = HYPERVISOR_shared_info;
  967. int cpu = smp_processor_id();
  968. xen_ulong_t *cpu_evtchn = per_cpu(cpu_evtchn_mask, cpu);
  969. int i;
  970. unsigned long flags;
  971. static DEFINE_SPINLOCK(debug_lock);
  972. struct vcpu_info *v;
  973. spin_lock_irqsave(&debug_lock, flags);
  974. printk("\nvcpu %d\n ", cpu);
  975. for_each_online_cpu(i) {
  976. int pending;
  977. v = per_cpu(xen_vcpu, i);
  978. pending = (get_irq_regs() && i == cpu)
  979. ? xen_irqs_disabled(get_irq_regs())
  980. : v->evtchn_upcall_mask;
  981. printk("%d: masked=%d pending=%d event_sel %0*"PRI_xen_ulong"\n ", i,
  982. pending, v->evtchn_upcall_pending,
  983. (int)(sizeof(v->evtchn_pending_sel)*2),
  984. v->evtchn_pending_sel);
  985. }
  986. v = per_cpu(xen_vcpu, cpu);
  987. printk("\npending:\n ");
  988. for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
  989. printk("%0*"PRI_xen_ulong"%s",
  990. (int)sizeof(sh->evtchn_pending[0])*2,
  991. sh->evtchn_pending[i],
  992. i % 8 == 0 ? "\n " : " ");
  993. printk("\nglobal mask:\n ");
  994. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  995. printk("%0*"PRI_xen_ulong"%s",
  996. (int)(sizeof(sh->evtchn_mask[0])*2),
  997. sh->evtchn_mask[i],
  998. i % 8 == 0 ? "\n " : " ");
  999. printk("\nglobally unmasked:\n ");
  1000. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  1001. printk("%0*"PRI_xen_ulong"%s",
  1002. (int)(sizeof(sh->evtchn_mask[0])*2),
  1003. sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
  1004. i % 8 == 0 ? "\n " : " ");
  1005. printk("\nlocal cpu%d mask:\n ", cpu);
  1006. for (i = (NR_EVENT_CHANNELS/BITS_PER_EVTCHN_WORD)-1; i >= 0; i--)
  1007. printk("%0*"PRI_xen_ulong"%s", (int)(sizeof(cpu_evtchn[0])*2),
  1008. cpu_evtchn[i],
  1009. i % 8 == 0 ? "\n " : " ");
  1010. printk("\nlocally unmasked:\n ");
  1011. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) {
  1012. xen_ulong_t pending = sh->evtchn_pending[i]
  1013. & ~sh->evtchn_mask[i]
  1014. & cpu_evtchn[i];
  1015. printk("%0*"PRI_xen_ulong"%s",
  1016. (int)(sizeof(sh->evtchn_mask[0])*2),
  1017. pending, i % 8 == 0 ? "\n " : " ");
  1018. }
  1019. printk("\npending list:\n");
  1020. for (i = 0; i < NR_EVENT_CHANNELS; i++) {
  1021. if (sync_test_bit(i, BM(sh->evtchn_pending))) {
  1022. int word_idx = i / BITS_PER_EVTCHN_WORD;
  1023. printk(" %d: event %d -> irq %d%s%s%s\n",
  1024. cpu_from_evtchn(i), i,
  1025. evtchn_to_irq[i],
  1026. sync_test_bit(word_idx, BM(&v->evtchn_pending_sel))
  1027. ? "" : " l2-clear",
  1028. !sync_test_bit(i, BM(sh->evtchn_mask))
  1029. ? "" : " globally-masked",
  1030. sync_test_bit(i, BM(cpu_evtchn))
  1031. ? "" : " locally-masked");
  1032. }
  1033. }
  1034. spin_unlock_irqrestore(&debug_lock, flags);
  1035. return IRQ_HANDLED;
  1036. }
  1037. static DEFINE_PER_CPU(unsigned, xed_nesting_count);
  1038. static DEFINE_PER_CPU(unsigned int, current_word_idx);
  1039. static DEFINE_PER_CPU(unsigned int, current_bit_idx);
  1040. /*
  1041. * Mask out the i least significant bits of w
  1042. */
  1043. #define MASK_LSBS(w, i) (w & ((~((xen_ulong_t)0UL)) << i))
  1044. /*
  1045. * Search the CPUs pending events bitmasks. For each one found, map
  1046. * the event number to an irq, and feed it into do_IRQ() for
  1047. * handling.
  1048. *
  1049. * Xen uses a two-level bitmap to speed searching. The first level is
  1050. * a bitset of words which contain pending event bits. The second
  1051. * level is a bitset of pending events themselves.
  1052. */
  1053. static void __xen_evtchn_do_upcall(void)
  1054. {
  1055. int start_word_idx, start_bit_idx;
  1056. int word_idx, bit_idx;
  1057. int i;
  1058. int cpu = get_cpu();
  1059. struct shared_info *s = HYPERVISOR_shared_info;
  1060. struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
  1061. unsigned count;
  1062. do {
  1063. xen_ulong_t pending_words;
  1064. vcpu_info->evtchn_upcall_pending = 0;
  1065. if (__this_cpu_inc_return(xed_nesting_count) - 1)
  1066. goto out;
  1067. /*
  1068. * Master flag must be cleared /before/ clearing
  1069. * selector flag. xchg_xen_ulong must contain an
  1070. * appropriate barrier.
  1071. */
  1072. pending_words = xchg_xen_ulong(&vcpu_info->evtchn_pending_sel, 0);
  1073. start_word_idx = __this_cpu_read(current_word_idx);
  1074. start_bit_idx = __this_cpu_read(current_bit_idx);
  1075. word_idx = start_word_idx;
  1076. for (i = 0; pending_words != 0; i++) {
  1077. xen_ulong_t pending_bits;
  1078. xen_ulong_t words;
  1079. words = MASK_LSBS(pending_words, word_idx);
  1080. /*
  1081. * If we masked out all events, wrap to beginning.
  1082. */
  1083. if (words == 0) {
  1084. word_idx = 0;
  1085. bit_idx = 0;
  1086. continue;
  1087. }
  1088. word_idx = EVTCHN_FIRST_BIT(words);
  1089. pending_bits = active_evtchns(cpu, s, word_idx);
  1090. bit_idx = 0; /* usually scan entire word from start */
  1091. if (word_idx == start_word_idx) {
  1092. /* We scan the starting word in two parts */
  1093. if (i == 0)
  1094. /* 1st time: start in the middle */
  1095. bit_idx = start_bit_idx;
  1096. else
  1097. /* 2nd time: mask bits done already */
  1098. bit_idx &= (1UL << start_bit_idx) - 1;
  1099. }
  1100. do {
  1101. xen_ulong_t bits;
  1102. int port, irq;
  1103. struct irq_desc *desc;
  1104. bits = MASK_LSBS(pending_bits, bit_idx);
  1105. /* If we masked out all events, move on. */
  1106. if (bits == 0)
  1107. break;
  1108. bit_idx = EVTCHN_FIRST_BIT(bits);
  1109. /* Process port. */
  1110. port = (word_idx * BITS_PER_EVTCHN_WORD) + bit_idx;
  1111. irq = evtchn_to_irq[port];
  1112. if (irq != -1) {
  1113. desc = irq_to_desc(irq);
  1114. if (desc)
  1115. generic_handle_irq_desc(irq, desc);
  1116. }
  1117. bit_idx = (bit_idx + 1) % BITS_PER_EVTCHN_WORD;
  1118. /* Next caller starts at last processed + 1 */
  1119. __this_cpu_write(current_word_idx,
  1120. bit_idx ? word_idx :
  1121. (word_idx+1) % BITS_PER_EVTCHN_WORD);
  1122. __this_cpu_write(current_bit_idx, bit_idx);
  1123. } while (bit_idx != 0);
  1124. /* Scan start_l1i twice; all others once. */
  1125. if ((word_idx != start_word_idx) || (i != 0))
  1126. pending_words &= ~(1UL << word_idx);
  1127. word_idx = (word_idx + 1) % BITS_PER_EVTCHN_WORD;
  1128. }
  1129. BUG_ON(!irqs_disabled());
  1130. count = __this_cpu_read(xed_nesting_count);
  1131. __this_cpu_write(xed_nesting_count, 0);
  1132. } while (count != 1 || vcpu_info->evtchn_upcall_pending);
  1133. out:
  1134. put_cpu();
  1135. }
  1136. void xen_evtchn_do_upcall(struct pt_regs *regs)
  1137. {
  1138. struct pt_regs *old_regs = set_irq_regs(regs);
  1139. irq_enter();
  1140. #ifdef CONFIG_X86
  1141. exit_idle();
  1142. #endif
  1143. __xen_evtchn_do_upcall();
  1144. irq_exit();
  1145. set_irq_regs(old_regs);
  1146. }
  1147. void xen_hvm_evtchn_do_upcall(void)
  1148. {
  1149. __xen_evtchn_do_upcall();
  1150. }
  1151. EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
  1152. /* Rebind a new event channel to an existing irq. */
  1153. void rebind_evtchn_irq(int evtchn, int irq)
  1154. {
  1155. struct irq_info *info = info_for_irq(irq);
  1156. /* Make sure the irq is masked, since the new event channel
  1157. will also be masked. */
  1158. disable_irq(irq);
  1159. mutex_lock(&irq_mapping_update_lock);
  1160. /* After resume the irq<->evtchn mappings are all cleared out */
  1161. BUG_ON(evtchn_to_irq[evtchn] != -1);
  1162. /* Expect irq to have been bound before,
  1163. so there should be a proper type */
  1164. BUG_ON(info->type == IRQT_UNBOUND);
  1165. xen_irq_info_evtchn_init(irq, evtchn);
  1166. mutex_unlock(&irq_mapping_update_lock);
  1167. /* new event channels are always bound to cpu 0 */
  1168. irq_set_affinity(irq, cpumask_of(0));
  1169. /* Unmask the event channel. */
  1170. enable_irq(irq);
  1171. }
  1172. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  1173. static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
  1174. {
  1175. struct evtchn_bind_vcpu bind_vcpu;
  1176. int evtchn = evtchn_from_irq(irq);
  1177. if (!VALID_EVTCHN(evtchn))
  1178. return -1;
  1179. /*
  1180. * Events delivered via platform PCI interrupts are always
  1181. * routed to vcpu 0 and hence cannot be rebound.
  1182. */
  1183. if (xen_hvm_domain() && !xen_have_vector_callback)
  1184. return -1;
  1185. /* Send future instances of this interrupt to other vcpu. */
  1186. bind_vcpu.port = evtchn;
  1187. bind_vcpu.vcpu = tcpu;
  1188. /*
  1189. * If this fails, it usually just indicates that we're dealing with a
  1190. * virq or IPI channel, which don't actually need to be rebound. Ignore
  1191. * it, but don't do the xenlinux-level rebind in that case.
  1192. */
  1193. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
  1194. bind_evtchn_to_cpu(evtchn, tcpu);
  1195. return 0;
  1196. }
  1197. static int set_affinity_irq(struct irq_data *data, const struct cpumask *dest,
  1198. bool force)
  1199. {
  1200. unsigned tcpu = cpumask_first(dest);
  1201. return rebind_irq_to_cpu(data->irq, tcpu);
  1202. }
  1203. int resend_irq_on_evtchn(unsigned int irq)
  1204. {
  1205. int masked, evtchn = evtchn_from_irq(irq);
  1206. struct shared_info *s = HYPERVISOR_shared_info;
  1207. if (!VALID_EVTCHN(evtchn))
  1208. return 1;
  1209. masked = sync_test_and_set_bit(evtchn, BM(s->evtchn_mask));
  1210. sync_set_bit(evtchn, BM(s->evtchn_pending));
  1211. if (!masked)
  1212. unmask_evtchn(evtchn);
  1213. return 1;
  1214. }
  1215. static void enable_dynirq(struct irq_data *data)
  1216. {
  1217. int evtchn = evtchn_from_irq(data->irq);
  1218. if (VALID_EVTCHN(evtchn))
  1219. unmask_evtchn(evtchn);
  1220. }
  1221. static void disable_dynirq(struct irq_data *data)
  1222. {
  1223. int evtchn = evtchn_from_irq(data->irq);
  1224. if (VALID_EVTCHN(evtchn))
  1225. mask_evtchn(evtchn);
  1226. }
  1227. static void ack_dynirq(struct irq_data *data)
  1228. {
  1229. int evtchn = evtchn_from_irq(data->irq);
  1230. irq_move_irq(data);
  1231. if (VALID_EVTCHN(evtchn))
  1232. clear_evtchn(evtchn);
  1233. }
  1234. static void mask_ack_dynirq(struct irq_data *data)
  1235. {
  1236. disable_dynirq(data);
  1237. ack_dynirq(data);
  1238. }
  1239. static int retrigger_dynirq(struct irq_data *data)
  1240. {
  1241. int evtchn = evtchn_from_irq(data->irq);
  1242. struct shared_info *sh = HYPERVISOR_shared_info;
  1243. int ret = 0;
  1244. if (VALID_EVTCHN(evtchn)) {
  1245. int masked;
  1246. masked = sync_test_and_set_bit(evtchn, BM(sh->evtchn_mask));
  1247. sync_set_bit(evtchn, BM(sh->evtchn_pending));
  1248. if (!masked)
  1249. unmask_evtchn(evtchn);
  1250. ret = 1;
  1251. }
  1252. return ret;
  1253. }
  1254. static void restore_pirqs(void)
  1255. {
  1256. int pirq, rc, irq, gsi;
  1257. struct physdev_map_pirq map_irq;
  1258. struct irq_info *info;
  1259. list_for_each_entry(info, &xen_irq_list_head, list) {
  1260. if (info->type != IRQT_PIRQ)
  1261. continue;
  1262. pirq = info->u.pirq.pirq;
  1263. gsi = info->u.pirq.gsi;
  1264. irq = info->irq;
  1265. /* save/restore of PT devices doesn't work, so at this point the
  1266. * only devices present are GSI based emulated devices */
  1267. if (!gsi)
  1268. continue;
  1269. map_irq.domid = DOMID_SELF;
  1270. map_irq.type = MAP_PIRQ_TYPE_GSI;
  1271. map_irq.index = gsi;
  1272. map_irq.pirq = pirq;
  1273. rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
  1274. if (rc) {
  1275. printk(KERN_WARNING "xen map irq failed gsi=%d irq=%d pirq=%d rc=%d\n",
  1276. gsi, irq, pirq, rc);
  1277. xen_free_irq(irq);
  1278. continue;
  1279. }
  1280. printk(KERN_DEBUG "xen: --> irq=%d, pirq=%d\n", irq, map_irq.pirq);
  1281. __startup_pirq(irq);
  1282. }
  1283. }
  1284. static void restore_cpu_virqs(unsigned int cpu)
  1285. {
  1286. struct evtchn_bind_virq bind_virq;
  1287. int virq, irq, evtchn;
  1288. for (virq = 0; virq < NR_VIRQS; virq++) {
  1289. if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
  1290. continue;
  1291. BUG_ON(virq_from_irq(irq) != virq);
  1292. /* Get a new binding from Xen. */
  1293. bind_virq.virq = virq;
  1294. bind_virq.vcpu = cpu;
  1295. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  1296. &bind_virq) != 0)
  1297. BUG();
  1298. evtchn = bind_virq.port;
  1299. /* Record the new mapping. */
  1300. xen_irq_info_virq_init(cpu, irq, evtchn, virq);
  1301. bind_evtchn_to_cpu(evtchn, cpu);
  1302. }
  1303. }
  1304. static void restore_cpu_ipis(unsigned int cpu)
  1305. {
  1306. struct evtchn_bind_ipi bind_ipi;
  1307. int ipi, irq, evtchn;
  1308. for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
  1309. if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
  1310. continue;
  1311. BUG_ON(ipi_from_irq(irq) != ipi);
  1312. /* Get a new binding from Xen. */
  1313. bind_ipi.vcpu = cpu;
  1314. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  1315. &bind_ipi) != 0)
  1316. BUG();
  1317. evtchn = bind_ipi.port;
  1318. /* Record the new mapping. */
  1319. xen_irq_info_ipi_init(cpu, irq, evtchn, ipi);
  1320. bind_evtchn_to_cpu(evtchn, cpu);
  1321. }
  1322. }
  1323. /* Clear an irq's pending state, in preparation for polling on it */
  1324. void xen_clear_irq_pending(int irq)
  1325. {
  1326. int evtchn = evtchn_from_irq(irq);
  1327. if (VALID_EVTCHN(evtchn))
  1328. clear_evtchn(evtchn);
  1329. }
  1330. EXPORT_SYMBOL(xen_clear_irq_pending);
  1331. void xen_set_irq_pending(int irq)
  1332. {
  1333. int evtchn = evtchn_from_irq(irq);
  1334. if (VALID_EVTCHN(evtchn))
  1335. set_evtchn(evtchn);
  1336. }
  1337. bool xen_test_irq_pending(int irq)
  1338. {
  1339. int evtchn = evtchn_from_irq(irq);
  1340. bool ret = false;
  1341. if (VALID_EVTCHN(evtchn))
  1342. ret = test_evtchn(evtchn);
  1343. return ret;
  1344. }
  1345. /* Poll waiting for an irq to become pending with timeout. In the usual case,
  1346. * the irq will be disabled so it won't deliver an interrupt. */
  1347. void xen_poll_irq_timeout(int irq, u64 timeout)
  1348. {
  1349. evtchn_port_t evtchn = evtchn_from_irq(irq);
  1350. if (VALID_EVTCHN(evtchn)) {
  1351. struct sched_poll poll;
  1352. poll.nr_ports = 1;
  1353. poll.timeout = timeout;
  1354. set_xen_guest_handle(poll.ports, &evtchn);
  1355. if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
  1356. BUG();
  1357. }
  1358. }
  1359. EXPORT_SYMBOL(xen_poll_irq_timeout);
  1360. /* Poll waiting for an irq to become pending. In the usual case, the
  1361. * irq will be disabled so it won't deliver an interrupt. */
  1362. void xen_poll_irq(int irq)
  1363. {
  1364. xen_poll_irq_timeout(irq, 0 /* no timeout */);
  1365. }
  1366. /* Check whether the IRQ line is shared with other guests. */
  1367. int xen_test_irq_shared(int irq)
  1368. {
  1369. struct irq_info *info = info_for_irq(irq);
  1370. struct physdev_irq_status_query irq_status = { .irq = info->u.pirq.pirq };
  1371. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  1372. return 0;
  1373. return !(irq_status.flags & XENIRQSTAT_shared);
  1374. }
  1375. EXPORT_SYMBOL_GPL(xen_test_irq_shared);
  1376. void xen_irq_resume(void)
  1377. {
  1378. unsigned int cpu, evtchn;
  1379. struct irq_info *info;
  1380. init_evtchn_cpu_bindings();
  1381. /* New event-channel space is not 'live' yet. */
  1382. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  1383. mask_evtchn(evtchn);
  1384. /* No IRQ <-> event-channel mappings. */
  1385. list_for_each_entry(info, &xen_irq_list_head, list)
  1386. info->evtchn = 0; /* zap event-channel binding */
  1387. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  1388. evtchn_to_irq[evtchn] = -1;
  1389. for_each_possible_cpu(cpu) {
  1390. restore_cpu_virqs(cpu);
  1391. restore_cpu_ipis(cpu);
  1392. }
  1393. restore_pirqs();
  1394. }
  1395. static struct irq_chip xen_dynamic_chip __read_mostly = {
  1396. .name = "xen-dyn",
  1397. .irq_disable = disable_dynirq,
  1398. .irq_mask = disable_dynirq,
  1399. .irq_unmask = enable_dynirq,
  1400. .irq_ack = ack_dynirq,
  1401. .irq_mask_ack = mask_ack_dynirq,
  1402. .irq_set_affinity = set_affinity_irq,
  1403. .irq_retrigger = retrigger_dynirq,
  1404. };
  1405. static struct irq_chip xen_pirq_chip __read_mostly = {
  1406. .name = "xen-pirq",
  1407. .irq_startup = startup_pirq,
  1408. .irq_shutdown = shutdown_pirq,
  1409. .irq_enable = enable_pirq,
  1410. .irq_disable = disable_pirq,
  1411. .irq_mask = disable_dynirq,
  1412. .irq_unmask = enable_dynirq,
  1413. .irq_ack = eoi_pirq,
  1414. .irq_eoi = eoi_pirq,
  1415. .irq_mask_ack = mask_ack_pirq,
  1416. .irq_set_affinity = set_affinity_irq,
  1417. .irq_retrigger = retrigger_dynirq,
  1418. };
  1419. static struct irq_chip xen_percpu_chip __read_mostly = {
  1420. .name = "xen-percpu",
  1421. .irq_disable = disable_dynirq,
  1422. .irq_mask = disable_dynirq,
  1423. .irq_unmask = enable_dynirq,
  1424. .irq_ack = ack_dynirq,
  1425. };
  1426. int xen_set_callback_via(uint64_t via)
  1427. {
  1428. struct xen_hvm_param a;
  1429. a.domid = DOMID_SELF;
  1430. a.index = HVM_PARAM_CALLBACK_IRQ;
  1431. a.value = via;
  1432. return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
  1433. }
  1434. EXPORT_SYMBOL_GPL(xen_set_callback_via);
  1435. #ifdef CONFIG_XEN_PVHVM
  1436. /* Vector callbacks are better than PCI interrupts to receive event
  1437. * channel notifications because we can receive vector callbacks on any
  1438. * vcpu and we don't need PCI support or APIC interactions. */
  1439. void xen_callback_vector(void)
  1440. {
  1441. int rc;
  1442. uint64_t callback_via;
  1443. if (xen_have_vector_callback) {
  1444. callback_via = HVM_CALLBACK_VECTOR(XEN_HVM_EVTCHN_CALLBACK);
  1445. rc = xen_set_callback_via(callback_via);
  1446. if (rc) {
  1447. printk(KERN_ERR "Request for Xen HVM callback vector"
  1448. " failed.\n");
  1449. xen_have_vector_callback = 0;
  1450. return;
  1451. }
  1452. printk(KERN_INFO "Xen HVM callback vector for event delivery is "
  1453. "enabled\n");
  1454. /* in the restore case the vector has already been allocated */
  1455. if (!test_bit(XEN_HVM_EVTCHN_CALLBACK, used_vectors))
  1456. alloc_intr_gate(XEN_HVM_EVTCHN_CALLBACK, xen_hvm_callback_vector);
  1457. }
  1458. }
  1459. #else
  1460. void xen_callback_vector(void) {}
  1461. #endif
  1462. void __init xen_init_IRQ(void)
  1463. {
  1464. int i;
  1465. evtchn_to_irq = kcalloc(NR_EVENT_CHANNELS, sizeof(*evtchn_to_irq),
  1466. GFP_KERNEL);
  1467. BUG_ON(!evtchn_to_irq);
  1468. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1469. evtchn_to_irq[i] = -1;
  1470. init_evtchn_cpu_bindings();
  1471. /* No event channels are 'live' right now. */
  1472. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1473. mask_evtchn(i);
  1474. pirq_needs_eoi = pirq_needs_eoi_flag;
  1475. #ifdef CONFIG_X86
  1476. if (xen_hvm_domain()) {
  1477. xen_callback_vector();
  1478. native_init_IRQ();
  1479. /* pci_xen_hvm_init must be called after native_init_IRQ so that
  1480. * __acpi_register_gsi can point at the right function */
  1481. pci_xen_hvm_init();
  1482. } else {
  1483. int rc;
  1484. struct physdev_pirq_eoi_gmfn eoi_gmfn;
  1485. irq_ctx_init(smp_processor_id());
  1486. if (xen_initial_domain())
  1487. pci_xen_initial_domain();
  1488. pirq_eoi_map = (void *)__get_free_page(GFP_KERNEL|__GFP_ZERO);
  1489. eoi_gmfn.gmfn = virt_to_mfn(pirq_eoi_map);
  1490. rc = HYPERVISOR_physdev_op(PHYSDEVOP_pirq_eoi_gmfn_v2, &eoi_gmfn);
  1491. if (rc != 0) {
  1492. free_page((unsigned long) pirq_eoi_map);
  1493. pirq_eoi_map = NULL;
  1494. } else
  1495. pirq_needs_eoi = pirq_check_eoi_map;
  1496. }
  1497. #endif
  1498. }