atmel_serial.c 38 KB

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  1. /*
  2. * linux/drivers/char/atmel_serial.c
  3. *
  4. * Driver for Atmel AT91 / AT32 Serial ports
  5. * Copyright (C) 2003 Rick Bronson
  6. *
  7. * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
  8. * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
  9. *
  10. * DMA support added by Chip Coldwell.
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. *
  26. */
  27. #include <linux/module.h>
  28. #include <linux/tty.h>
  29. #include <linux/ioport.h>
  30. #include <linux/slab.h>
  31. #include <linux/init.h>
  32. #include <linux/serial.h>
  33. #include <linux/clk.h>
  34. #include <linux/console.h>
  35. #include <linux/sysrq.h>
  36. #include <linux/tty_flip.h>
  37. #include <linux/platform_device.h>
  38. #include <linux/dma-mapping.h>
  39. #include <linux/atmel_pdc.h>
  40. #include <linux/atmel_serial.h>
  41. #include <asm/io.h>
  42. #include <asm/mach/serial_at91.h>
  43. #include <asm/arch/board.h>
  44. #ifdef CONFIG_ARM
  45. #include <asm/arch/cpu.h>
  46. #include <asm/arch/gpio.h>
  47. #endif
  48. #define PDC_BUFFER_SIZE 512
  49. /* Revisit: We should calculate this based on the actual port settings */
  50. #define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */
  51. #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  52. #define SUPPORT_SYSRQ
  53. #endif
  54. #include <linux/serial_core.h>
  55. #ifdef CONFIG_SERIAL_ATMEL_TTYAT
  56. /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
  57. * should coexist with the 8250 driver, such as if we have an external 16C550
  58. * UART. */
  59. #define SERIAL_ATMEL_MAJOR 204
  60. #define MINOR_START 154
  61. #define ATMEL_DEVICENAME "ttyAT"
  62. #else
  63. /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
  64. * name, but it is legally reserved for the 8250 driver. */
  65. #define SERIAL_ATMEL_MAJOR TTY_MAJOR
  66. #define MINOR_START 64
  67. #define ATMEL_DEVICENAME "ttyS"
  68. #endif
  69. #define ATMEL_ISR_PASS_LIMIT 256
  70. /* UART registers. CR is write-only, hence no GET macro */
  71. #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
  72. #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
  73. #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
  74. #define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER)
  75. #define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR)
  76. #define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR)
  77. #define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR)
  78. #define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR)
  79. #define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR)
  80. #define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR)
  81. #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
  82. #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
  83. /* PDC registers */
  84. #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
  85. #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)
  86. #define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR)
  87. #define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR)
  88. #define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR)
  89. #define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR)
  90. #define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR)
  91. #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
  92. #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
  93. static int (*atmel_open_hook)(struct uart_port *);
  94. static void (*atmel_close_hook)(struct uart_port *);
  95. struct atmel_dma_buffer {
  96. unsigned char *buf;
  97. dma_addr_t dma_addr;
  98. unsigned int dma_size;
  99. unsigned int ofs;
  100. };
  101. struct atmel_uart_char {
  102. u16 status;
  103. u16 ch;
  104. };
  105. #define ATMEL_SERIAL_RINGSIZE 1024
  106. /*
  107. * We wrap our port structure around the generic uart_port.
  108. */
  109. struct atmel_uart_port {
  110. struct uart_port uart; /* uart */
  111. struct clk *clk; /* uart clock */
  112. unsigned short suspended; /* is port suspended? */
  113. int break_active; /* break being received */
  114. short use_dma_rx; /* enable PDC receiver */
  115. short pdc_rx_idx; /* current PDC RX buffer */
  116. struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */
  117. short use_dma_tx; /* enable PDC transmitter */
  118. struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
  119. struct tasklet_struct tasklet;
  120. unsigned int irq_status;
  121. unsigned int irq_status_prev;
  122. struct circ_buf rx_ring;
  123. };
  124. static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
  125. #ifdef SUPPORT_SYSRQ
  126. static struct console atmel_console;
  127. #endif
  128. static inline struct atmel_uart_port *
  129. to_atmel_uart_port(struct uart_port *uart)
  130. {
  131. return container_of(uart, struct atmel_uart_port, uart);
  132. }
  133. #ifdef CONFIG_SERIAL_ATMEL_PDC
  134. static bool atmel_use_dma_rx(struct uart_port *port)
  135. {
  136. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  137. return atmel_port->use_dma_rx;
  138. }
  139. static bool atmel_use_dma_tx(struct uart_port *port)
  140. {
  141. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  142. return atmel_port->use_dma_tx;
  143. }
  144. #else
  145. static bool atmel_use_dma_rx(struct uart_port *port)
  146. {
  147. return false;
  148. }
  149. static bool atmel_use_dma_tx(struct uart_port *port)
  150. {
  151. return false;
  152. }
  153. #endif
  154. /*
  155. * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
  156. */
  157. static u_int atmel_tx_empty(struct uart_port *port)
  158. {
  159. return (UART_GET_CSR(port) & ATMEL_US_TXEMPTY) ? TIOCSER_TEMT : 0;
  160. }
  161. /*
  162. * Set state of the modem control output lines
  163. */
  164. static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
  165. {
  166. unsigned int control = 0;
  167. unsigned int mode;
  168. #ifdef CONFIG_ARCH_AT91RM9200
  169. if (cpu_is_at91rm9200()) {
  170. /*
  171. * AT91RM9200 Errata #39: RTS0 is not internally connected
  172. * to PA21. We need to drive the pin manually.
  173. */
  174. if (port->mapbase == AT91RM9200_BASE_US0) {
  175. if (mctrl & TIOCM_RTS)
  176. at91_set_gpio_value(AT91_PIN_PA21, 0);
  177. else
  178. at91_set_gpio_value(AT91_PIN_PA21, 1);
  179. }
  180. }
  181. #endif
  182. if (mctrl & TIOCM_RTS)
  183. control |= ATMEL_US_RTSEN;
  184. else
  185. control |= ATMEL_US_RTSDIS;
  186. if (mctrl & TIOCM_DTR)
  187. control |= ATMEL_US_DTREN;
  188. else
  189. control |= ATMEL_US_DTRDIS;
  190. UART_PUT_CR(port, control);
  191. /* Local loopback mode? */
  192. mode = UART_GET_MR(port) & ~ATMEL_US_CHMODE;
  193. if (mctrl & TIOCM_LOOP)
  194. mode |= ATMEL_US_CHMODE_LOC_LOOP;
  195. else
  196. mode |= ATMEL_US_CHMODE_NORMAL;
  197. UART_PUT_MR(port, mode);
  198. }
  199. /*
  200. * Get state of the modem control input lines
  201. */
  202. static u_int atmel_get_mctrl(struct uart_port *port)
  203. {
  204. unsigned int status, ret = 0;
  205. status = UART_GET_CSR(port);
  206. /*
  207. * The control signals are active low.
  208. */
  209. if (!(status & ATMEL_US_DCD))
  210. ret |= TIOCM_CD;
  211. if (!(status & ATMEL_US_CTS))
  212. ret |= TIOCM_CTS;
  213. if (!(status & ATMEL_US_DSR))
  214. ret |= TIOCM_DSR;
  215. if (!(status & ATMEL_US_RI))
  216. ret |= TIOCM_RI;
  217. return ret;
  218. }
  219. /*
  220. * Stop transmitting.
  221. */
  222. static void atmel_stop_tx(struct uart_port *port)
  223. {
  224. if (atmel_use_dma_tx(port)) {
  225. /* disable PDC transmit */
  226. UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
  227. UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
  228. } else
  229. UART_PUT_IDR(port, ATMEL_US_TXRDY);
  230. }
  231. /*
  232. * Start transmitting.
  233. */
  234. static void atmel_start_tx(struct uart_port *port)
  235. {
  236. if (atmel_use_dma_tx(port)) {
  237. if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
  238. /* The transmitter is already running. Yes, we
  239. really need this.*/
  240. return;
  241. UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
  242. /* re-enable PDC transmit */
  243. UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
  244. } else
  245. UART_PUT_IER(port, ATMEL_US_TXRDY);
  246. }
  247. /*
  248. * Stop receiving - port is in process of being closed.
  249. */
  250. static void atmel_stop_rx(struct uart_port *port)
  251. {
  252. if (atmel_use_dma_rx(port)) {
  253. /* disable PDC receive */
  254. UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);
  255. UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
  256. } else
  257. UART_PUT_IDR(port, ATMEL_US_RXRDY);
  258. }
  259. /*
  260. * Enable modem status interrupts
  261. */
  262. static void atmel_enable_ms(struct uart_port *port)
  263. {
  264. UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC
  265. | ATMEL_US_DCDIC | ATMEL_US_CTSIC);
  266. }
  267. /*
  268. * Control the transmission of a break signal
  269. */
  270. static void atmel_break_ctl(struct uart_port *port, int break_state)
  271. {
  272. if (break_state != 0)
  273. UART_PUT_CR(port, ATMEL_US_STTBRK); /* start break */
  274. else
  275. UART_PUT_CR(port, ATMEL_US_STPBRK); /* stop break */
  276. }
  277. /*
  278. * Stores the incoming character in the ring buffer
  279. */
  280. static void
  281. atmel_buffer_rx_char(struct uart_port *port, unsigned int status,
  282. unsigned int ch)
  283. {
  284. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  285. struct circ_buf *ring = &atmel_port->rx_ring;
  286. struct atmel_uart_char *c;
  287. if (!CIRC_SPACE(ring->head, ring->tail, ATMEL_SERIAL_RINGSIZE))
  288. /* Buffer overflow, ignore char */
  289. return;
  290. c = &((struct atmel_uart_char *)ring->buf)[ring->head];
  291. c->status = status;
  292. c->ch = ch;
  293. /* Make sure the character is stored before we update head. */
  294. smp_wmb();
  295. ring->head = (ring->head + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
  296. }
  297. /*
  298. * Deal with parity, framing and overrun errors.
  299. */
  300. static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status)
  301. {
  302. /* clear error */
  303. UART_PUT_CR(port, ATMEL_US_RSTSTA);
  304. if (status & ATMEL_US_RXBRK) {
  305. /* ignore side-effect */
  306. status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
  307. port->icount.brk++;
  308. }
  309. if (status & ATMEL_US_PARE)
  310. port->icount.parity++;
  311. if (status & ATMEL_US_FRAME)
  312. port->icount.frame++;
  313. if (status & ATMEL_US_OVRE)
  314. port->icount.overrun++;
  315. }
  316. /*
  317. * Characters received (called from interrupt handler)
  318. */
  319. static void atmel_rx_chars(struct uart_port *port)
  320. {
  321. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  322. unsigned int status, ch;
  323. status = UART_GET_CSR(port);
  324. while (status & ATMEL_US_RXRDY) {
  325. ch = UART_GET_CHAR(port);
  326. /*
  327. * note that the error handling code is
  328. * out of the main execution path
  329. */
  330. if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
  331. | ATMEL_US_OVRE | ATMEL_US_RXBRK)
  332. || atmel_port->break_active)) {
  333. /* clear error */
  334. UART_PUT_CR(port, ATMEL_US_RSTSTA);
  335. if (status & ATMEL_US_RXBRK
  336. && !atmel_port->break_active) {
  337. atmel_port->break_active = 1;
  338. UART_PUT_IER(port, ATMEL_US_RXBRK);
  339. } else {
  340. /*
  341. * This is either the end-of-break
  342. * condition or we've received at
  343. * least one character without RXBRK
  344. * being set. In both cases, the next
  345. * RXBRK will indicate start-of-break.
  346. */
  347. UART_PUT_IDR(port, ATMEL_US_RXBRK);
  348. status &= ~ATMEL_US_RXBRK;
  349. atmel_port->break_active = 0;
  350. }
  351. }
  352. atmel_buffer_rx_char(port, status, ch);
  353. status = UART_GET_CSR(port);
  354. }
  355. tasklet_schedule(&atmel_port->tasklet);
  356. }
  357. /*
  358. * Transmit characters (called from tasklet with TXRDY interrupt
  359. * disabled)
  360. */
  361. static void atmel_tx_chars(struct uart_port *port)
  362. {
  363. struct circ_buf *xmit = &port->info->xmit;
  364. if (port->x_char && UART_GET_CSR(port) & ATMEL_US_TXRDY) {
  365. UART_PUT_CHAR(port, port->x_char);
  366. port->icount.tx++;
  367. port->x_char = 0;
  368. }
  369. if (uart_circ_empty(xmit) || uart_tx_stopped(port))
  370. return;
  371. while (UART_GET_CSR(port) & ATMEL_US_TXRDY) {
  372. UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
  373. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  374. port->icount.tx++;
  375. if (uart_circ_empty(xmit))
  376. break;
  377. }
  378. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  379. uart_write_wakeup(port);
  380. if (!uart_circ_empty(xmit))
  381. UART_PUT_IER(port, ATMEL_US_TXRDY);
  382. }
  383. /*
  384. * receive interrupt handler.
  385. */
  386. static void
  387. atmel_handle_receive(struct uart_port *port, unsigned int pending)
  388. {
  389. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  390. if (atmel_use_dma_rx(port)) {
  391. /*
  392. * PDC receive. Just schedule the tasklet and let it
  393. * figure out the details.
  394. *
  395. * TODO: We're not handling error flags correctly at
  396. * the moment.
  397. */
  398. if (pending & (ATMEL_US_ENDRX | ATMEL_US_TIMEOUT)) {
  399. UART_PUT_IDR(port, (ATMEL_US_ENDRX
  400. | ATMEL_US_TIMEOUT));
  401. tasklet_schedule(&atmel_port->tasklet);
  402. }
  403. if (pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE |
  404. ATMEL_US_FRAME | ATMEL_US_PARE))
  405. atmel_pdc_rxerr(port, pending);
  406. }
  407. /* Interrupt receive */
  408. if (pending & ATMEL_US_RXRDY)
  409. atmel_rx_chars(port);
  410. else if (pending & ATMEL_US_RXBRK) {
  411. /*
  412. * End of break detected. If it came along with a
  413. * character, atmel_rx_chars will handle it.
  414. */
  415. UART_PUT_CR(port, ATMEL_US_RSTSTA);
  416. UART_PUT_IDR(port, ATMEL_US_RXBRK);
  417. atmel_port->break_active = 0;
  418. }
  419. }
  420. /*
  421. * transmit interrupt handler. (Transmit is IRQF_NODELAY safe)
  422. */
  423. static void
  424. atmel_handle_transmit(struct uart_port *port, unsigned int pending)
  425. {
  426. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  427. if (atmel_use_dma_tx(port)) {
  428. /* PDC transmit */
  429. if (pending & (ATMEL_US_ENDTX | ATMEL_US_TXBUFE)) {
  430. UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
  431. tasklet_schedule(&atmel_port->tasklet);
  432. }
  433. } else {
  434. /* Interrupt transmit */
  435. if (pending & ATMEL_US_TXRDY) {
  436. UART_PUT_IDR(port, ATMEL_US_TXRDY);
  437. tasklet_schedule(&atmel_port->tasklet);
  438. }
  439. }
  440. }
  441. /*
  442. * status flags interrupt handler.
  443. */
  444. static void
  445. atmel_handle_status(struct uart_port *port, unsigned int pending,
  446. unsigned int status)
  447. {
  448. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  449. if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC
  450. | ATMEL_US_CTSIC)) {
  451. atmel_port->irq_status = status;
  452. tasklet_schedule(&atmel_port->tasklet);
  453. }
  454. }
  455. /*
  456. * Interrupt handler
  457. */
  458. static irqreturn_t atmel_interrupt(int irq, void *dev_id)
  459. {
  460. struct uart_port *port = dev_id;
  461. unsigned int status, pending, pass_counter = 0;
  462. do {
  463. status = UART_GET_CSR(port);
  464. pending = status & UART_GET_IMR(port);
  465. if (!pending)
  466. break;
  467. atmel_handle_receive(port, pending);
  468. atmel_handle_status(port, pending, status);
  469. atmel_handle_transmit(port, pending);
  470. } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT);
  471. return IRQ_HANDLED;
  472. }
  473. /*
  474. * Called from tasklet with ENDTX and TXBUFE interrupts disabled.
  475. */
  476. static void atmel_tx_dma(struct uart_port *port)
  477. {
  478. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  479. struct circ_buf *xmit = &port->info->xmit;
  480. struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
  481. int count;
  482. xmit->tail += pdc->ofs;
  483. xmit->tail &= UART_XMIT_SIZE - 1;
  484. port->icount.tx += pdc->ofs;
  485. pdc->ofs = 0;
  486. if (!uart_circ_empty(xmit)) {
  487. /* more to transmit - setup next transfer */
  488. /* disable PDC transmit */
  489. UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
  490. dma_sync_single_for_device(port->dev,
  491. pdc->dma_addr,
  492. pdc->dma_size,
  493. DMA_TO_DEVICE);
  494. count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
  495. pdc->ofs = count;
  496. UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
  497. UART_PUT_TCR(port, count);
  498. /* re-enable PDC transmit and interrupts */
  499. UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
  500. UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
  501. } else {
  502. /* nothing left to transmit - disable the transmitter */
  503. /* disable PDC transmit */
  504. UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
  505. }
  506. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  507. uart_write_wakeup(port);
  508. }
  509. static void atmel_rx_from_ring(struct uart_port *port)
  510. {
  511. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  512. struct circ_buf *ring = &atmel_port->rx_ring;
  513. unsigned int flg;
  514. unsigned int status;
  515. while (ring->head != ring->tail) {
  516. struct atmel_uart_char c;
  517. /* Make sure c is loaded after head. */
  518. smp_rmb();
  519. c = ((struct atmel_uart_char *)ring->buf)[ring->tail];
  520. ring->tail = (ring->tail + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
  521. port->icount.rx++;
  522. status = c.status;
  523. flg = TTY_NORMAL;
  524. /*
  525. * note that the error handling code is
  526. * out of the main execution path
  527. */
  528. if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
  529. | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
  530. if (status & ATMEL_US_RXBRK) {
  531. /* ignore side-effect */
  532. status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
  533. port->icount.brk++;
  534. if (uart_handle_break(port))
  535. continue;
  536. }
  537. if (status & ATMEL_US_PARE)
  538. port->icount.parity++;
  539. if (status & ATMEL_US_FRAME)
  540. port->icount.frame++;
  541. if (status & ATMEL_US_OVRE)
  542. port->icount.overrun++;
  543. status &= port->read_status_mask;
  544. if (status & ATMEL_US_RXBRK)
  545. flg = TTY_BREAK;
  546. else if (status & ATMEL_US_PARE)
  547. flg = TTY_PARITY;
  548. else if (status & ATMEL_US_FRAME)
  549. flg = TTY_FRAME;
  550. }
  551. if (uart_handle_sysrq_char(port, c.ch))
  552. continue;
  553. uart_insert_char(port, status, ATMEL_US_OVRE, c.ch, flg);
  554. }
  555. /*
  556. * Drop the lock here since it might end up calling
  557. * uart_start(), which takes the lock.
  558. */
  559. spin_unlock(&port->lock);
  560. tty_flip_buffer_push(port->info->tty);
  561. spin_lock(&port->lock);
  562. }
  563. static void atmel_rx_from_dma(struct uart_port *port)
  564. {
  565. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  566. struct tty_struct *tty = port->info->tty;
  567. struct atmel_dma_buffer *pdc;
  568. int rx_idx = atmel_port->pdc_rx_idx;
  569. unsigned int head;
  570. unsigned int tail;
  571. unsigned int count;
  572. do {
  573. /* Reset the UART timeout early so that we don't miss one */
  574. UART_PUT_CR(port, ATMEL_US_STTTO);
  575. pdc = &atmel_port->pdc_rx[rx_idx];
  576. head = UART_GET_RPR(port) - pdc->dma_addr;
  577. tail = pdc->ofs;
  578. /* If the PDC has switched buffers, RPR won't contain
  579. * any address within the current buffer. Since head
  580. * is unsigned, we just need a one-way comparison to
  581. * find out.
  582. *
  583. * In this case, we just need to consume the entire
  584. * buffer and resubmit it for DMA. This will clear the
  585. * ENDRX bit as well, so that we can safely re-enable
  586. * all interrupts below.
  587. */
  588. head = min(head, pdc->dma_size);
  589. if (likely(head != tail)) {
  590. dma_sync_single_for_cpu(port->dev, pdc->dma_addr,
  591. pdc->dma_size, DMA_FROM_DEVICE);
  592. /*
  593. * head will only wrap around when we recycle
  594. * the DMA buffer, and when that happens, we
  595. * explicitly set tail to 0. So head will
  596. * always be greater than tail.
  597. */
  598. count = head - tail;
  599. tty_insert_flip_string(tty, pdc->buf + pdc->ofs, count);
  600. dma_sync_single_for_device(port->dev, pdc->dma_addr,
  601. pdc->dma_size, DMA_FROM_DEVICE);
  602. port->icount.rx += count;
  603. pdc->ofs = head;
  604. }
  605. /*
  606. * If the current buffer is full, we need to check if
  607. * the next one contains any additional data.
  608. */
  609. if (head >= pdc->dma_size) {
  610. pdc->ofs = 0;
  611. UART_PUT_RNPR(port, pdc->dma_addr);
  612. UART_PUT_RNCR(port, pdc->dma_size);
  613. rx_idx = !rx_idx;
  614. atmel_port->pdc_rx_idx = rx_idx;
  615. }
  616. } while (head >= pdc->dma_size);
  617. /*
  618. * Drop the lock here since it might end up calling
  619. * uart_start(), which takes the lock.
  620. */
  621. spin_unlock(&port->lock);
  622. tty_flip_buffer_push(tty);
  623. spin_lock(&port->lock);
  624. UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
  625. }
  626. /*
  627. * tasklet handling tty stuff outside the interrupt handler.
  628. */
  629. static void atmel_tasklet_func(unsigned long data)
  630. {
  631. struct uart_port *port = (struct uart_port *)data;
  632. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  633. unsigned int status;
  634. unsigned int status_change;
  635. /* The interrupt handler does not take the lock */
  636. spin_lock(&port->lock);
  637. if (atmel_use_dma_tx(port))
  638. atmel_tx_dma(port);
  639. else
  640. atmel_tx_chars(port);
  641. status = atmel_port->irq_status;
  642. status_change = status ^ atmel_port->irq_status_prev;
  643. if (status_change & (ATMEL_US_RI | ATMEL_US_DSR
  644. | ATMEL_US_DCD | ATMEL_US_CTS)) {
  645. /* TODO: All reads to CSR will clear these interrupts! */
  646. if (status_change & ATMEL_US_RI)
  647. port->icount.rng++;
  648. if (status_change & ATMEL_US_DSR)
  649. port->icount.dsr++;
  650. if (status_change & ATMEL_US_DCD)
  651. uart_handle_dcd_change(port, !(status & ATMEL_US_DCD));
  652. if (status_change & ATMEL_US_CTS)
  653. uart_handle_cts_change(port, !(status & ATMEL_US_CTS));
  654. wake_up_interruptible(&port->info->delta_msr_wait);
  655. atmel_port->irq_status_prev = status;
  656. }
  657. if (atmel_use_dma_rx(port))
  658. atmel_rx_from_dma(port);
  659. else
  660. atmel_rx_from_ring(port);
  661. spin_unlock(&port->lock);
  662. }
  663. /*
  664. * Perform initialization and enable port for reception
  665. */
  666. static int atmel_startup(struct uart_port *port)
  667. {
  668. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  669. int retval;
  670. /*
  671. * Ensure that no interrupts are enabled otherwise when
  672. * request_irq() is called we could get stuck trying to
  673. * handle an unexpected interrupt
  674. */
  675. UART_PUT_IDR(port, -1);
  676. /*
  677. * Allocate the IRQ
  678. */
  679. retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED,
  680. "atmel_serial", port);
  681. if (retval) {
  682. printk("atmel_serial: atmel_startup - Can't get irq\n");
  683. return retval;
  684. }
  685. /*
  686. * Initialize DMA (if necessary)
  687. */
  688. if (atmel_use_dma_rx(port)) {
  689. int i;
  690. for (i = 0; i < 2; i++) {
  691. struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
  692. pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL);
  693. if (pdc->buf == NULL) {
  694. if (i != 0) {
  695. dma_unmap_single(port->dev,
  696. atmel_port->pdc_rx[0].dma_addr,
  697. PDC_BUFFER_SIZE,
  698. DMA_FROM_DEVICE);
  699. kfree(atmel_port->pdc_rx[0].buf);
  700. }
  701. free_irq(port->irq, port);
  702. return -ENOMEM;
  703. }
  704. pdc->dma_addr = dma_map_single(port->dev,
  705. pdc->buf,
  706. PDC_BUFFER_SIZE,
  707. DMA_FROM_DEVICE);
  708. pdc->dma_size = PDC_BUFFER_SIZE;
  709. pdc->ofs = 0;
  710. }
  711. atmel_port->pdc_rx_idx = 0;
  712. UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr);
  713. UART_PUT_RCR(port, PDC_BUFFER_SIZE);
  714. UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr);
  715. UART_PUT_RNCR(port, PDC_BUFFER_SIZE);
  716. }
  717. if (atmel_use_dma_tx(port)) {
  718. struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
  719. struct circ_buf *xmit = &port->info->xmit;
  720. pdc->buf = xmit->buf;
  721. pdc->dma_addr = dma_map_single(port->dev,
  722. pdc->buf,
  723. UART_XMIT_SIZE,
  724. DMA_TO_DEVICE);
  725. pdc->dma_size = UART_XMIT_SIZE;
  726. pdc->ofs = 0;
  727. }
  728. /*
  729. * If there is a specific "open" function (to register
  730. * control line interrupts)
  731. */
  732. if (atmel_open_hook) {
  733. retval = atmel_open_hook(port);
  734. if (retval) {
  735. free_irq(port->irq, port);
  736. return retval;
  737. }
  738. }
  739. /*
  740. * Finally, enable the serial port
  741. */
  742. UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
  743. /* enable xmit & rcvr */
  744. UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
  745. if (atmel_use_dma_rx(port)) {
  746. /* set UART timeout */
  747. UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
  748. UART_PUT_CR(port, ATMEL_US_STTTO);
  749. UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
  750. /* enable PDC controller */
  751. UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
  752. } else {
  753. /* enable receive only */
  754. UART_PUT_IER(port, ATMEL_US_RXRDY);
  755. }
  756. return 0;
  757. }
  758. /*
  759. * Disable the port
  760. */
  761. static void atmel_shutdown(struct uart_port *port)
  762. {
  763. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  764. /*
  765. * Ensure everything is stopped.
  766. */
  767. atmel_stop_rx(port);
  768. atmel_stop_tx(port);
  769. /*
  770. * Shut-down the DMA.
  771. */
  772. if (atmel_use_dma_rx(port)) {
  773. int i;
  774. for (i = 0; i < 2; i++) {
  775. struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
  776. dma_unmap_single(port->dev,
  777. pdc->dma_addr,
  778. pdc->dma_size,
  779. DMA_FROM_DEVICE);
  780. kfree(pdc->buf);
  781. }
  782. }
  783. if (atmel_use_dma_tx(port)) {
  784. struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
  785. dma_unmap_single(port->dev,
  786. pdc->dma_addr,
  787. pdc->dma_size,
  788. DMA_TO_DEVICE);
  789. }
  790. /*
  791. * Disable all interrupts, port and break condition.
  792. */
  793. UART_PUT_CR(port, ATMEL_US_RSTSTA);
  794. UART_PUT_IDR(port, -1);
  795. /*
  796. * Free the interrupt
  797. */
  798. free_irq(port->irq, port);
  799. /*
  800. * If there is a specific "close" function (to unregister
  801. * control line interrupts)
  802. */
  803. if (atmel_close_hook)
  804. atmel_close_hook(port);
  805. }
  806. /*
  807. * Power / Clock management.
  808. */
  809. static void atmel_serial_pm(struct uart_port *port, unsigned int state,
  810. unsigned int oldstate)
  811. {
  812. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  813. switch (state) {
  814. case 0:
  815. /*
  816. * Enable the peripheral clock for this serial port.
  817. * This is called on uart_open() or a resume event.
  818. */
  819. clk_enable(atmel_port->clk);
  820. break;
  821. case 3:
  822. /*
  823. * Disable the peripheral clock for this serial port.
  824. * This is called on uart_close() or a suspend event.
  825. */
  826. clk_disable(atmel_port->clk);
  827. break;
  828. default:
  829. printk(KERN_ERR "atmel_serial: unknown pm %d\n", state);
  830. }
  831. }
  832. /*
  833. * Change the port parameters
  834. */
  835. static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
  836. struct ktermios *old)
  837. {
  838. unsigned long flags;
  839. unsigned int mode, imr, quot, baud;
  840. /* Get current mode register */
  841. mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL
  842. | ATMEL_US_NBSTOP | ATMEL_US_PAR);
  843. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
  844. quot = uart_get_divisor(port, baud);
  845. if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
  846. quot /= 8;
  847. mode |= ATMEL_US_USCLKS_MCK_DIV8;
  848. }
  849. /* byte size */
  850. switch (termios->c_cflag & CSIZE) {
  851. case CS5:
  852. mode |= ATMEL_US_CHRL_5;
  853. break;
  854. case CS6:
  855. mode |= ATMEL_US_CHRL_6;
  856. break;
  857. case CS7:
  858. mode |= ATMEL_US_CHRL_7;
  859. break;
  860. default:
  861. mode |= ATMEL_US_CHRL_8;
  862. break;
  863. }
  864. /* stop bits */
  865. if (termios->c_cflag & CSTOPB)
  866. mode |= ATMEL_US_NBSTOP_2;
  867. /* parity */
  868. if (termios->c_cflag & PARENB) {
  869. /* Mark or Space parity */
  870. if (termios->c_cflag & CMSPAR) {
  871. if (termios->c_cflag & PARODD)
  872. mode |= ATMEL_US_PAR_MARK;
  873. else
  874. mode |= ATMEL_US_PAR_SPACE;
  875. } else if (termios->c_cflag & PARODD)
  876. mode |= ATMEL_US_PAR_ODD;
  877. else
  878. mode |= ATMEL_US_PAR_EVEN;
  879. } else
  880. mode |= ATMEL_US_PAR_NONE;
  881. spin_lock_irqsave(&port->lock, flags);
  882. port->read_status_mask = ATMEL_US_OVRE;
  883. if (termios->c_iflag & INPCK)
  884. port->read_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
  885. if (termios->c_iflag & (BRKINT | PARMRK))
  886. port->read_status_mask |= ATMEL_US_RXBRK;
  887. if (atmel_use_dma_rx(port))
  888. /* need to enable error interrupts */
  889. UART_PUT_IER(port, port->read_status_mask);
  890. /*
  891. * Characters to ignore
  892. */
  893. port->ignore_status_mask = 0;
  894. if (termios->c_iflag & IGNPAR)
  895. port->ignore_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
  896. if (termios->c_iflag & IGNBRK) {
  897. port->ignore_status_mask |= ATMEL_US_RXBRK;
  898. /*
  899. * If we're ignoring parity and break indicators,
  900. * ignore overruns too (for real raw support).
  901. */
  902. if (termios->c_iflag & IGNPAR)
  903. port->ignore_status_mask |= ATMEL_US_OVRE;
  904. }
  905. /* TODO: Ignore all characters if CREAD is set.*/
  906. /* update the per-port timeout */
  907. uart_update_timeout(port, termios->c_cflag, baud);
  908. /* save/disable interrupts and drain transmitter */
  909. imr = UART_GET_IMR(port);
  910. UART_PUT_IDR(port, -1);
  911. while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY))
  912. cpu_relax();
  913. /* disable receiver and transmitter */
  914. UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
  915. /* set the parity, stop bits and data size */
  916. UART_PUT_MR(port, mode);
  917. /* set the baud rate */
  918. UART_PUT_BRGR(port, quot);
  919. UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
  920. UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
  921. /* restore interrupts */
  922. UART_PUT_IER(port, imr);
  923. /* CTS flow-control and modem-status interrupts */
  924. if (UART_ENABLE_MS(port, termios->c_cflag))
  925. port->ops->enable_ms(port);
  926. spin_unlock_irqrestore(&port->lock, flags);
  927. }
  928. /*
  929. * Return string describing the specified port
  930. */
  931. static const char *atmel_type(struct uart_port *port)
  932. {
  933. return (port->type == PORT_ATMEL) ? "ATMEL_SERIAL" : NULL;
  934. }
  935. /*
  936. * Release the memory region(s) being used by 'port'.
  937. */
  938. static void atmel_release_port(struct uart_port *port)
  939. {
  940. struct platform_device *pdev = to_platform_device(port->dev);
  941. int size = pdev->resource[0].end - pdev->resource[0].start + 1;
  942. release_mem_region(port->mapbase, size);
  943. if (port->flags & UPF_IOREMAP) {
  944. iounmap(port->membase);
  945. port->membase = NULL;
  946. }
  947. }
  948. /*
  949. * Request the memory region(s) being used by 'port'.
  950. */
  951. static int atmel_request_port(struct uart_port *port)
  952. {
  953. struct platform_device *pdev = to_platform_device(port->dev);
  954. int size = pdev->resource[0].end - pdev->resource[0].start + 1;
  955. if (!request_mem_region(port->mapbase, size, "atmel_serial"))
  956. return -EBUSY;
  957. if (port->flags & UPF_IOREMAP) {
  958. port->membase = ioremap(port->mapbase, size);
  959. if (port->membase == NULL) {
  960. release_mem_region(port->mapbase, size);
  961. return -ENOMEM;
  962. }
  963. }
  964. return 0;
  965. }
  966. /*
  967. * Configure/autoconfigure the port.
  968. */
  969. static void atmel_config_port(struct uart_port *port, int flags)
  970. {
  971. if (flags & UART_CONFIG_TYPE) {
  972. port->type = PORT_ATMEL;
  973. atmel_request_port(port);
  974. }
  975. }
  976. /*
  977. * Verify the new serial_struct (for TIOCSSERIAL).
  978. */
  979. static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser)
  980. {
  981. int ret = 0;
  982. if (ser->type != PORT_UNKNOWN && ser->type != PORT_ATMEL)
  983. ret = -EINVAL;
  984. if (port->irq != ser->irq)
  985. ret = -EINVAL;
  986. if (ser->io_type != SERIAL_IO_MEM)
  987. ret = -EINVAL;
  988. if (port->uartclk / 16 != ser->baud_base)
  989. ret = -EINVAL;
  990. if ((void *)port->mapbase != ser->iomem_base)
  991. ret = -EINVAL;
  992. if (port->iobase != ser->port)
  993. ret = -EINVAL;
  994. if (ser->hub6 != 0)
  995. ret = -EINVAL;
  996. return ret;
  997. }
  998. static struct uart_ops atmel_pops = {
  999. .tx_empty = atmel_tx_empty,
  1000. .set_mctrl = atmel_set_mctrl,
  1001. .get_mctrl = atmel_get_mctrl,
  1002. .stop_tx = atmel_stop_tx,
  1003. .start_tx = atmel_start_tx,
  1004. .stop_rx = atmel_stop_rx,
  1005. .enable_ms = atmel_enable_ms,
  1006. .break_ctl = atmel_break_ctl,
  1007. .startup = atmel_startup,
  1008. .shutdown = atmel_shutdown,
  1009. .set_termios = atmel_set_termios,
  1010. .type = atmel_type,
  1011. .release_port = atmel_release_port,
  1012. .request_port = atmel_request_port,
  1013. .config_port = atmel_config_port,
  1014. .verify_port = atmel_verify_port,
  1015. .pm = atmel_serial_pm,
  1016. };
  1017. /*
  1018. * Configure the port from the platform device resource info.
  1019. */
  1020. static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port,
  1021. struct platform_device *pdev)
  1022. {
  1023. struct uart_port *port = &atmel_port->uart;
  1024. struct atmel_uart_data *data = pdev->dev.platform_data;
  1025. port->iotype = UPIO_MEM;
  1026. port->flags = UPF_BOOT_AUTOCONF;
  1027. port->ops = &atmel_pops;
  1028. port->fifosize = 1;
  1029. port->line = pdev->id;
  1030. port->dev = &pdev->dev;
  1031. port->mapbase = pdev->resource[0].start;
  1032. port->irq = pdev->resource[1].start;
  1033. tasklet_init(&atmel_port->tasklet, atmel_tasklet_func,
  1034. (unsigned long)port);
  1035. memset(&atmel_port->rx_ring, 0, sizeof(atmel_port->rx_ring));
  1036. if (data->regs)
  1037. /* Already mapped by setup code */
  1038. port->membase = data->regs;
  1039. else {
  1040. port->flags |= UPF_IOREMAP;
  1041. port->membase = NULL;
  1042. }
  1043. /* for console, the clock could already be configured */
  1044. if (!atmel_port->clk) {
  1045. atmel_port->clk = clk_get(&pdev->dev, "usart");
  1046. clk_enable(atmel_port->clk);
  1047. port->uartclk = clk_get_rate(atmel_port->clk);
  1048. }
  1049. atmel_port->use_dma_rx = data->use_dma_rx;
  1050. atmel_port->use_dma_tx = data->use_dma_tx;
  1051. if (atmel_use_dma_tx(port))
  1052. port->fifosize = PDC_BUFFER_SIZE;
  1053. }
  1054. /*
  1055. * Register board-specific modem-control line handlers.
  1056. */
  1057. void __init atmel_register_uart_fns(struct atmel_port_fns *fns)
  1058. {
  1059. if (fns->enable_ms)
  1060. atmel_pops.enable_ms = fns->enable_ms;
  1061. if (fns->get_mctrl)
  1062. atmel_pops.get_mctrl = fns->get_mctrl;
  1063. if (fns->set_mctrl)
  1064. atmel_pops.set_mctrl = fns->set_mctrl;
  1065. atmel_open_hook = fns->open;
  1066. atmel_close_hook = fns->close;
  1067. atmel_pops.pm = fns->pm;
  1068. atmel_pops.set_wake = fns->set_wake;
  1069. }
  1070. #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
  1071. static void atmel_console_putchar(struct uart_port *port, int ch)
  1072. {
  1073. while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
  1074. cpu_relax();
  1075. UART_PUT_CHAR(port, ch);
  1076. }
  1077. /*
  1078. * Interrupts are disabled on entering
  1079. */
  1080. static void atmel_console_write(struct console *co, const char *s, u_int count)
  1081. {
  1082. struct uart_port *port = &atmel_ports[co->index].uart;
  1083. unsigned int status, imr;
  1084. /*
  1085. * First, save IMR and then disable interrupts
  1086. */
  1087. imr = UART_GET_IMR(port);
  1088. UART_PUT_IDR(port, ATMEL_US_RXRDY | ATMEL_US_TXRDY);
  1089. uart_console_write(port, s, count, atmel_console_putchar);
  1090. /*
  1091. * Finally, wait for transmitter to become empty
  1092. * and restore IMR
  1093. */
  1094. do {
  1095. status = UART_GET_CSR(port);
  1096. } while (!(status & ATMEL_US_TXRDY));
  1097. /* set interrupts back the way they were */
  1098. UART_PUT_IER(port, imr);
  1099. }
  1100. /*
  1101. * If the port was already initialised (eg, by a boot loader),
  1102. * try to determine the current setup.
  1103. */
  1104. static void __init atmel_console_get_options(struct uart_port *port, int *baud,
  1105. int *parity, int *bits)
  1106. {
  1107. unsigned int mr, quot;
  1108. /*
  1109. * If the baud rate generator isn't running, the port wasn't
  1110. * initialized by the boot loader.
  1111. */
  1112. quot = UART_GET_BRGR(port);
  1113. if (!quot)
  1114. return;
  1115. mr = UART_GET_MR(port) & ATMEL_US_CHRL;
  1116. if (mr == ATMEL_US_CHRL_8)
  1117. *bits = 8;
  1118. else
  1119. *bits = 7;
  1120. mr = UART_GET_MR(port) & ATMEL_US_PAR;
  1121. if (mr == ATMEL_US_PAR_EVEN)
  1122. *parity = 'e';
  1123. else if (mr == ATMEL_US_PAR_ODD)
  1124. *parity = 'o';
  1125. /*
  1126. * The serial core only rounds down when matching this to a
  1127. * supported baud rate. Make sure we don't end up slightly
  1128. * lower than one of those, as it would make us fall through
  1129. * to a much lower baud rate than we really want.
  1130. */
  1131. *baud = port->uartclk / (16 * (quot - 1));
  1132. }
  1133. static int __init atmel_console_setup(struct console *co, char *options)
  1134. {
  1135. struct uart_port *port = &atmel_ports[co->index].uart;
  1136. int baud = 115200;
  1137. int bits = 8;
  1138. int parity = 'n';
  1139. int flow = 'n';
  1140. if (port->membase == NULL) {
  1141. /* Port not initialized yet - delay setup */
  1142. return -ENODEV;
  1143. }
  1144. UART_PUT_IDR(port, -1);
  1145. UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
  1146. UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
  1147. if (options)
  1148. uart_parse_options(options, &baud, &parity, &bits, &flow);
  1149. else
  1150. atmel_console_get_options(port, &baud, &parity, &bits);
  1151. return uart_set_options(port, co, baud, parity, bits, flow);
  1152. }
  1153. static struct uart_driver atmel_uart;
  1154. static struct console atmel_console = {
  1155. .name = ATMEL_DEVICENAME,
  1156. .write = atmel_console_write,
  1157. .device = uart_console_device,
  1158. .setup = atmel_console_setup,
  1159. .flags = CON_PRINTBUFFER,
  1160. .index = -1,
  1161. .data = &atmel_uart,
  1162. };
  1163. #define ATMEL_CONSOLE_DEVICE &atmel_console
  1164. /*
  1165. * Early console initialization (before VM subsystem initialized).
  1166. */
  1167. static int __init atmel_console_init(void)
  1168. {
  1169. if (atmel_default_console_device) {
  1170. add_preferred_console(ATMEL_DEVICENAME,
  1171. atmel_default_console_device->id, NULL);
  1172. atmel_init_port(&atmel_ports[atmel_default_console_device->id],
  1173. atmel_default_console_device);
  1174. register_console(&atmel_console);
  1175. }
  1176. return 0;
  1177. }
  1178. console_initcall(atmel_console_init);
  1179. /*
  1180. * Late console initialization.
  1181. */
  1182. static int __init atmel_late_console_init(void)
  1183. {
  1184. if (atmel_default_console_device
  1185. && !(atmel_console.flags & CON_ENABLED))
  1186. register_console(&atmel_console);
  1187. return 0;
  1188. }
  1189. core_initcall(atmel_late_console_init);
  1190. static inline bool atmel_is_console_port(struct uart_port *port)
  1191. {
  1192. return port->cons && port->cons->index == port->line;
  1193. }
  1194. #else
  1195. #define ATMEL_CONSOLE_DEVICE NULL
  1196. static inline bool atmel_is_console_port(struct uart_port *port)
  1197. {
  1198. return false;
  1199. }
  1200. #endif
  1201. static struct uart_driver atmel_uart = {
  1202. .owner = THIS_MODULE,
  1203. .driver_name = "atmel_serial",
  1204. .dev_name = ATMEL_DEVICENAME,
  1205. .major = SERIAL_ATMEL_MAJOR,
  1206. .minor = MINOR_START,
  1207. .nr = ATMEL_MAX_UART,
  1208. .cons = ATMEL_CONSOLE_DEVICE,
  1209. };
  1210. #ifdef CONFIG_PM
  1211. static int atmel_serial_suspend(struct platform_device *pdev,
  1212. pm_message_t state)
  1213. {
  1214. struct uart_port *port = platform_get_drvdata(pdev);
  1215. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  1216. if (device_may_wakeup(&pdev->dev)
  1217. && !at91_suspend_entering_slow_clock())
  1218. enable_irq_wake(port->irq);
  1219. else {
  1220. uart_suspend_port(&atmel_uart, port);
  1221. atmel_port->suspended = 1;
  1222. }
  1223. return 0;
  1224. }
  1225. static int atmel_serial_resume(struct platform_device *pdev)
  1226. {
  1227. struct uart_port *port = platform_get_drvdata(pdev);
  1228. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  1229. if (atmel_port->suspended) {
  1230. uart_resume_port(&atmel_uart, port);
  1231. atmel_port->suspended = 0;
  1232. } else
  1233. disable_irq_wake(port->irq);
  1234. return 0;
  1235. }
  1236. #else
  1237. #define atmel_serial_suspend NULL
  1238. #define atmel_serial_resume NULL
  1239. #endif
  1240. static int __devinit atmel_serial_probe(struct platform_device *pdev)
  1241. {
  1242. struct atmel_uart_port *port;
  1243. void *data;
  1244. int ret;
  1245. BUILD_BUG_ON(!is_power_of_2(ATMEL_SERIAL_RINGSIZE));
  1246. port = &atmel_ports[pdev->id];
  1247. atmel_init_port(port, pdev);
  1248. if (!atmel_use_dma_rx(&port->uart)) {
  1249. ret = -ENOMEM;
  1250. data = kmalloc(sizeof(struct atmel_uart_char)
  1251. * ATMEL_SERIAL_RINGSIZE, GFP_KERNEL);
  1252. if (!data)
  1253. goto err_alloc_ring;
  1254. port->rx_ring.buf = data;
  1255. }
  1256. ret = uart_add_one_port(&atmel_uart, &port->uart);
  1257. if (ret)
  1258. goto err_add_port;
  1259. device_init_wakeup(&pdev->dev, 1);
  1260. platform_set_drvdata(pdev, port);
  1261. return 0;
  1262. err_add_port:
  1263. kfree(port->rx_ring.buf);
  1264. port->rx_ring.buf = NULL;
  1265. err_alloc_ring:
  1266. if (!atmel_is_console_port(&port->uart)) {
  1267. clk_disable(port->clk);
  1268. clk_put(port->clk);
  1269. port->clk = NULL;
  1270. }
  1271. return ret;
  1272. }
  1273. static int __devexit atmel_serial_remove(struct platform_device *pdev)
  1274. {
  1275. struct uart_port *port = platform_get_drvdata(pdev);
  1276. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  1277. int ret = 0;
  1278. device_init_wakeup(&pdev->dev, 0);
  1279. platform_set_drvdata(pdev, NULL);
  1280. ret = uart_remove_one_port(&atmel_uart, port);
  1281. tasklet_kill(&atmel_port->tasklet);
  1282. kfree(atmel_port->rx_ring.buf);
  1283. /* "port" is allocated statically, so we shouldn't free it */
  1284. clk_disable(atmel_port->clk);
  1285. clk_put(atmel_port->clk);
  1286. return ret;
  1287. }
  1288. static struct platform_driver atmel_serial_driver = {
  1289. .probe = atmel_serial_probe,
  1290. .remove = __devexit_p(atmel_serial_remove),
  1291. .suspend = atmel_serial_suspend,
  1292. .resume = atmel_serial_resume,
  1293. .driver = {
  1294. .name = "atmel_usart",
  1295. .owner = THIS_MODULE,
  1296. },
  1297. };
  1298. static int __init atmel_serial_init(void)
  1299. {
  1300. int ret;
  1301. ret = uart_register_driver(&atmel_uart);
  1302. if (ret)
  1303. return ret;
  1304. ret = platform_driver_register(&atmel_serial_driver);
  1305. if (ret)
  1306. uart_unregister_driver(&atmel_uart);
  1307. return ret;
  1308. }
  1309. static void __exit atmel_serial_exit(void)
  1310. {
  1311. platform_driver_unregister(&atmel_serial_driver);
  1312. uart_unregister_driver(&atmel_uart);
  1313. }
  1314. module_init(atmel_serial_init);
  1315. module_exit(atmel_serial_exit);
  1316. MODULE_AUTHOR("Rick Bronson");
  1317. MODULE_DESCRIPTION("Atmel AT91 / AT32 serial port driver");
  1318. MODULE_LICENSE("GPL");