therm_throt.c 13 KB

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  1. /*
  2. * Thermal throttle event support code (such as syslog messaging and rate
  3. * limiting) that was factored out from x86_64 (mce_intel.c) and i386 (p4.c).
  4. *
  5. * This allows consistent reporting of CPU thermal throttle events.
  6. *
  7. * Maintains a counter in /sys that keeps track of the number of thermal
  8. * events, such that the user knows how bad the thermal problem might be
  9. * (since the logging to syslog and mcelog is rate limited).
  10. *
  11. * Author: Dmitriy Zavin (dmitriyz@google.com)
  12. *
  13. * Credits: Adapted from Zwane Mwaikambo's original code in mce_intel.c.
  14. * Inspired by Ross Biro's and Al Borchers' counter code.
  15. */
  16. #include <linux/interrupt.h>
  17. #include <linux/notifier.h>
  18. #include <linux/jiffies.h>
  19. #include <linux/kernel.h>
  20. #include <linux/percpu.h>
  21. #include <linux/export.h>
  22. #include <linux/types.h>
  23. #include <linux/init.h>
  24. #include <linux/smp.h>
  25. #include <linux/cpu.h>
  26. #include <asm/processor.h>
  27. #include <asm/apic.h>
  28. #include <asm/idle.h>
  29. #include <asm/mce.h>
  30. #include <asm/msr.h>
  31. /* How long to wait between reporting thermal events */
  32. #define CHECK_INTERVAL (300 * HZ)
  33. #define THERMAL_THROTTLING_EVENT 0
  34. #define POWER_LIMIT_EVENT 1
  35. /*
  36. * Current thermal event state:
  37. */
  38. struct _thermal_state {
  39. bool new_event;
  40. int event;
  41. u64 next_check;
  42. unsigned long count;
  43. unsigned long last_count;
  44. };
  45. struct thermal_state {
  46. struct _thermal_state core_throttle;
  47. struct _thermal_state core_power_limit;
  48. struct _thermal_state package_throttle;
  49. struct _thermal_state package_power_limit;
  50. struct _thermal_state core_thresh0;
  51. struct _thermal_state core_thresh1;
  52. };
  53. /* Callback to handle core threshold interrupts */
  54. int (*platform_thermal_notify)(__u64 msr_val);
  55. EXPORT_SYMBOL(platform_thermal_notify);
  56. static DEFINE_PER_CPU(struct thermal_state, thermal_state);
  57. static atomic_t therm_throt_en = ATOMIC_INIT(0);
  58. static u32 lvtthmr_init __read_mostly;
  59. #ifdef CONFIG_SYSFS
  60. #define define_therm_throt_device_one_ro(_name) \
  61. static DEVICE_ATTR(_name, 0444, \
  62. therm_throt_device_show_##_name, \
  63. NULL) \
  64. #define define_therm_throt_device_show_func(event, name) \
  65. \
  66. static ssize_t therm_throt_device_show_##event##_##name( \
  67. struct device *dev, \
  68. struct device_attribute *attr, \
  69. char *buf) \
  70. { \
  71. unsigned int cpu = dev->id; \
  72. ssize_t ret; \
  73. \
  74. preempt_disable(); /* CPU hotplug */ \
  75. if (cpu_online(cpu)) { \
  76. ret = sprintf(buf, "%lu\n", \
  77. per_cpu(thermal_state, cpu).event.name); \
  78. } else \
  79. ret = 0; \
  80. preempt_enable(); \
  81. \
  82. return ret; \
  83. }
  84. define_therm_throt_device_show_func(core_throttle, count);
  85. define_therm_throt_device_one_ro(core_throttle_count);
  86. define_therm_throt_device_show_func(core_power_limit, count);
  87. define_therm_throt_device_one_ro(core_power_limit_count);
  88. define_therm_throt_device_show_func(package_throttle, count);
  89. define_therm_throt_device_one_ro(package_throttle_count);
  90. define_therm_throt_device_show_func(package_power_limit, count);
  91. define_therm_throt_device_one_ro(package_power_limit_count);
  92. static struct attribute *thermal_throttle_attrs[] = {
  93. &dev_attr_core_throttle_count.attr,
  94. NULL
  95. };
  96. static struct attribute_group thermal_attr_group = {
  97. .attrs = thermal_throttle_attrs,
  98. .name = "thermal_throttle"
  99. };
  100. #endif /* CONFIG_SYSFS */
  101. #define CORE_LEVEL 0
  102. #define PACKAGE_LEVEL 1
  103. /***
  104. * therm_throt_process - Process thermal throttling event from interrupt
  105. * @curr: Whether the condition is current or not (boolean), since the
  106. * thermal interrupt normally gets called both when the thermal
  107. * event begins and once the event has ended.
  108. *
  109. * This function is called by the thermal interrupt after the
  110. * IRQ has been acknowledged.
  111. *
  112. * It will take care of rate limiting and printing messages to the syslog.
  113. *
  114. * Returns: 0 : Event should NOT be further logged, i.e. still in
  115. * "timeout" from previous log message.
  116. * 1 : Event should be logged further, and a message has been
  117. * printed to the syslog.
  118. */
  119. static int therm_throt_process(bool new_event, int event, int level)
  120. {
  121. struct _thermal_state *state;
  122. unsigned int this_cpu = smp_processor_id();
  123. bool old_event;
  124. u64 now;
  125. struct thermal_state *pstate = &per_cpu(thermal_state, this_cpu);
  126. now = get_jiffies_64();
  127. if (level == CORE_LEVEL) {
  128. if (event == THERMAL_THROTTLING_EVENT)
  129. state = &pstate->core_throttle;
  130. else if (event == POWER_LIMIT_EVENT)
  131. state = &pstate->core_power_limit;
  132. else
  133. return 0;
  134. } else if (level == PACKAGE_LEVEL) {
  135. if (event == THERMAL_THROTTLING_EVENT)
  136. state = &pstate->package_throttle;
  137. else if (event == POWER_LIMIT_EVENT)
  138. state = &pstate->package_power_limit;
  139. else
  140. return 0;
  141. } else
  142. return 0;
  143. old_event = state->new_event;
  144. state->new_event = new_event;
  145. if (new_event)
  146. state->count++;
  147. if (time_before64(now, state->next_check) &&
  148. state->count != state->last_count)
  149. return 0;
  150. state->next_check = now + CHECK_INTERVAL;
  151. state->last_count = state->count;
  152. /* if we just entered the thermal event */
  153. if (new_event) {
  154. if (event == THERMAL_THROTTLING_EVENT)
  155. printk(KERN_CRIT "CPU%d: %s temperature above threshold, cpu clock throttled (total events = %lu)\n",
  156. this_cpu,
  157. level == CORE_LEVEL ? "Core" : "Package",
  158. state->count);
  159. return 1;
  160. }
  161. if (old_event) {
  162. if (event == THERMAL_THROTTLING_EVENT)
  163. printk(KERN_INFO "CPU%d: %s temperature/speed normal\n",
  164. this_cpu,
  165. level == CORE_LEVEL ? "Core" : "Package");
  166. return 1;
  167. }
  168. return 0;
  169. }
  170. static int thresh_event_valid(int event)
  171. {
  172. struct _thermal_state *state;
  173. unsigned int this_cpu = smp_processor_id();
  174. struct thermal_state *pstate = &per_cpu(thermal_state, this_cpu);
  175. u64 now = get_jiffies_64();
  176. state = (event == 0) ? &pstate->core_thresh0 : &pstate->core_thresh1;
  177. if (time_before64(now, state->next_check))
  178. return 0;
  179. state->next_check = now + CHECK_INTERVAL;
  180. return 1;
  181. }
  182. #ifdef CONFIG_SYSFS
  183. /* Add/Remove thermal_throttle interface for CPU device: */
  184. static __cpuinit int thermal_throttle_add_dev(struct device *dev,
  185. unsigned int cpu)
  186. {
  187. int err;
  188. struct cpuinfo_x86 *c = &cpu_data(cpu);
  189. err = sysfs_create_group(&dev->kobj, &thermal_attr_group);
  190. if (err)
  191. return err;
  192. if (cpu_has(c, X86_FEATURE_PLN))
  193. err = sysfs_add_file_to_group(&dev->kobj,
  194. &dev_attr_core_power_limit_count.attr,
  195. thermal_attr_group.name);
  196. if (cpu_has(c, X86_FEATURE_PTS)) {
  197. err = sysfs_add_file_to_group(&dev->kobj,
  198. &dev_attr_package_throttle_count.attr,
  199. thermal_attr_group.name);
  200. if (cpu_has(c, X86_FEATURE_PLN))
  201. err = sysfs_add_file_to_group(&dev->kobj,
  202. &dev_attr_package_power_limit_count.attr,
  203. thermal_attr_group.name);
  204. }
  205. return err;
  206. }
  207. static __cpuinit void thermal_throttle_remove_dev(struct device *dev)
  208. {
  209. sysfs_remove_group(&dev->kobj, &thermal_attr_group);
  210. }
  211. /* Mutex protecting device creation against CPU hotplug: */
  212. static DEFINE_MUTEX(therm_cpu_lock);
  213. /* Get notified when a cpu comes on/off. Be hotplug friendly. */
  214. static __cpuinit int
  215. thermal_throttle_cpu_callback(struct notifier_block *nfb,
  216. unsigned long action,
  217. void *hcpu)
  218. {
  219. unsigned int cpu = (unsigned long)hcpu;
  220. struct device *dev;
  221. int err = 0;
  222. dev = get_cpu_device(cpu);
  223. switch (action) {
  224. case CPU_UP_PREPARE:
  225. case CPU_UP_PREPARE_FROZEN:
  226. mutex_lock(&therm_cpu_lock);
  227. err = thermal_throttle_add_dev(dev, cpu);
  228. mutex_unlock(&therm_cpu_lock);
  229. WARN_ON(err);
  230. break;
  231. case CPU_UP_CANCELED:
  232. case CPU_UP_CANCELED_FROZEN:
  233. case CPU_DEAD:
  234. case CPU_DEAD_FROZEN:
  235. mutex_lock(&therm_cpu_lock);
  236. thermal_throttle_remove_dev(dev);
  237. mutex_unlock(&therm_cpu_lock);
  238. break;
  239. }
  240. return notifier_from_errno(err);
  241. }
  242. static struct notifier_block thermal_throttle_cpu_notifier __cpuinitdata =
  243. {
  244. .notifier_call = thermal_throttle_cpu_callback,
  245. };
  246. static __init int thermal_throttle_init_device(void)
  247. {
  248. unsigned int cpu = 0;
  249. int err;
  250. if (!atomic_read(&therm_throt_en))
  251. return 0;
  252. register_hotcpu_notifier(&thermal_throttle_cpu_notifier);
  253. #ifdef CONFIG_HOTPLUG_CPU
  254. mutex_lock(&therm_cpu_lock);
  255. #endif
  256. /* connect live CPUs to sysfs */
  257. for_each_online_cpu(cpu) {
  258. err = thermal_throttle_add_dev(get_cpu_device(cpu), cpu);
  259. WARN_ON(err);
  260. }
  261. #ifdef CONFIG_HOTPLUG_CPU
  262. mutex_unlock(&therm_cpu_lock);
  263. #endif
  264. return 0;
  265. }
  266. device_initcall(thermal_throttle_init_device);
  267. #endif /* CONFIG_SYSFS */
  268. static void notify_thresholds(__u64 msr_val)
  269. {
  270. /* check whether the interrupt handler is defined;
  271. * otherwise simply return
  272. */
  273. if (!platform_thermal_notify)
  274. return;
  275. /* lower threshold reached */
  276. if ((msr_val & THERM_LOG_THRESHOLD0) && thresh_event_valid(0))
  277. platform_thermal_notify(msr_val);
  278. /* higher threshold reached */
  279. if ((msr_val & THERM_LOG_THRESHOLD1) && thresh_event_valid(1))
  280. platform_thermal_notify(msr_val);
  281. }
  282. /* Thermal transition interrupt handler */
  283. static void intel_thermal_interrupt(void)
  284. {
  285. __u64 msr_val;
  286. rdmsrl(MSR_IA32_THERM_STATUS, msr_val);
  287. /* Check for violation of core thermal thresholds*/
  288. notify_thresholds(msr_val);
  289. if (therm_throt_process(msr_val & THERM_STATUS_PROCHOT,
  290. THERMAL_THROTTLING_EVENT,
  291. CORE_LEVEL) != 0)
  292. mce_log_therm_throt_event(msr_val);
  293. if (this_cpu_has(X86_FEATURE_PLN))
  294. therm_throt_process(msr_val & THERM_STATUS_POWER_LIMIT,
  295. POWER_LIMIT_EVENT,
  296. CORE_LEVEL);
  297. if (this_cpu_has(X86_FEATURE_PTS)) {
  298. rdmsrl(MSR_IA32_PACKAGE_THERM_STATUS, msr_val);
  299. therm_throt_process(msr_val & PACKAGE_THERM_STATUS_PROCHOT,
  300. THERMAL_THROTTLING_EVENT,
  301. PACKAGE_LEVEL);
  302. if (this_cpu_has(X86_FEATURE_PLN))
  303. therm_throt_process(msr_val &
  304. PACKAGE_THERM_STATUS_POWER_LIMIT,
  305. POWER_LIMIT_EVENT,
  306. PACKAGE_LEVEL);
  307. }
  308. }
  309. static void unexpected_thermal_interrupt(void)
  310. {
  311. printk(KERN_ERR "CPU%d: Unexpected LVT thermal interrupt!\n",
  312. smp_processor_id());
  313. }
  314. static void (*smp_thermal_vector)(void) = unexpected_thermal_interrupt;
  315. asmlinkage void smp_thermal_interrupt(struct pt_regs *regs)
  316. {
  317. irq_enter();
  318. exit_idle();
  319. inc_irq_stat(irq_thermal_count);
  320. smp_thermal_vector();
  321. irq_exit();
  322. /* Ack only at the end to avoid potential reentry */
  323. ack_APIC_irq();
  324. }
  325. /* Thermal monitoring depends on APIC, ACPI and clock modulation */
  326. static int intel_thermal_supported(struct cpuinfo_x86 *c)
  327. {
  328. if (!cpu_has_apic)
  329. return 0;
  330. if (!cpu_has(c, X86_FEATURE_ACPI) || !cpu_has(c, X86_FEATURE_ACC))
  331. return 0;
  332. return 1;
  333. }
  334. void __init mcheck_intel_therm_init(void)
  335. {
  336. /*
  337. * This function is only called on boot CPU. Save the init thermal
  338. * LVT value on BSP and use that value to restore APs' thermal LVT
  339. * entry BIOS programmed later
  340. */
  341. if (intel_thermal_supported(&boot_cpu_data))
  342. lvtthmr_init = apic_read(APIC_LVTTHMR);
  343. }
  344. void intel_init_thermal(struct cpuinfo_x86 *c)
  345. {
  346. unsigned int cpu = smp_processor_id();
  347. int tm2 = 0;
  348. u32 l, h;
  349. if (!intel_thermal_supported(c))
  350. return;
  351. /*
  352. * First check if its enabled already, in which case there might
  353. * be some SMM goo which handles it, so we can't even put a handler
  354. * since it might be delivered via SMI already:
  355. */
  356. rdmsr(MSR_IA32_MISC_ENABLE, l, h);
  357. h = lvtthmr_init;
  358. /*
  359. * The initial value of thermal LVT entries on all APs always reads
  360. * 0x10000 because APs are woken up by BSP issuing INIT-SIPI-SIPI
  361. * sequence to them and LVT registers are reset to 0s except for
  362. * the mask bits which are set to 1s when APs receive INIT IPI.
  363. * If BIOS takes over the thermal interrupt and sets its interrupt
  364. * delivery mode to SMI (not fixed), it restores the value that the
  365. * BIOS has programmed on AP based on BSP's info we saved since BIOS
  366. * is always setting the same value for all threads/cores.
  367. */
  368. if ((h & APIC_DM_FIXED_MASK) != APIC_DM_FIXED)
  369. apic_write(APIC_LVTTHMR, lvtthmr_init);
  370. if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) {
  371. printk(KERN_DEBUG
  372. "CPU%d: Thermal monitoring handled by SMI\n", cpu);
  373. return;
  374. }
  375. /* Check whether a vector already exists */
  376. if (h & APIC_VECTOR_MASK) {
  377. printk(KERN_DEBUG
  378. "CPU%d: Thermal LVT vector (%#x) already installed\n",
  379. cpu, (h & APIC_VECTOR_MASK));
  380. return;
  381. }
  382. /* early Pentium M models use different method for enabling TM2 */
  383. if (cpu_has(c, X86_FEATURE_TM2)) {
  384. if (c->x86 == 6 && (c->x86_model == 9 || c->x86_model == 13)) {
  385. rdmsr(MSR_THERM2_CTL, l, h);
  386. if (l & MSR_THERM2_CTL_TM_SELECT)
  387. tm2 = 1;
  388. } else if (l & MSR_IA32_MISC_ENABLE_TM2)
  389. tm2 = 1;
  390. }
  391. /* We'll mask the thermal vector in the lapic till we're ready: */
  392. h = THERMAL_APIC_VECTOR | APIC_DM_FIXED | APIC_LVT_MASKED;
  393. apic_write(APIC_LVTTHMR, h);
  394. rdmsr(MSR_IA32_THERM_INTERRUPT, l, h);
  395. if (cpu_has(c, X86_FEATURE_PLN))
  396. wrmsr(MSR_IA32_THERM_INTERRUPT,
  397. l | (THERM_INT_LOW_ENABLE
  398. | THERM_INT_HIGH_ENABLE | THERM_INT_PLN_ENABLE), h);
  399. else
  400. wrmsr(MSR_IA32_THERM_INTERRUPT,
  401. l | (THERM_INT_LOW_ENABLE | THERM_INT_HIGH_ENABLE), h);
  402. if (cpu_has(c, X86_FEATURE_PTS)) {
  403. rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
  404. if (cpu_has(c, X86_FEATURE_PLN))
  405. wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
  406. l | (PACKAGE_THERM_INT_LOW_ENABLE
  407. | PACKAGE_THERM_INT_HIGH_ENABLE
  408. | PACKAGE_THERM_INT_PLN_ENABLE), h);
  409. else
  410. wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
  411. l | (PACKAGE_THERM_INT_LOW_ENABLE
  412. | PACKAGE_THERM_INT_HIGH_ENABLE), h);
  413. }
  414. smp_thermal_vector = intel_thermal_interrupt;
  415. rdmsr(MSR_IA32_MISC_ENABLE, l, h);
  416. wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h);
  417. /* Unmask the thermal vector: */
  418. l = apic_read(APIC_LVTTHMR);
  419. apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);
  420. printk_once(KERN_INFO "CPU0: Thermal monitoring enabled (%s)\n",
  421. tm2 ? "TM2" : "TM1");
  422. /* enable thermal throttle processing */
  423. atomic_set(&therm_throt_en, 1);
  424. }