at91sam9g45.dtsi 4.6 KB

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  1. /*
  2. * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
  3. * applies to AT91SAM9G45, AT91SAM9M10,
  4. * AT91SAM9G46, AT91SAM9M11 SoC
  5. *
  6. * Copyright (C) 2011 Atmel,
  7. * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
  8. *
  9. * Licensed under GPLv2 or later.
  10. */
  11. /include/ "skeleton.dtsi"
  12. / {
  13. model = "Atmel AT91SAM9G45 family SoC";
  14. compatible = "atmel,at91sam9g45";
  15. interrupt-parent = <&aic>;
  16. aliases {
  17. serial0 = &dbgu;
  18. serial1 = &usart0;
  19. serial2 = &usart1;
  20. serial3 = &usart2;
  21. serial4 = &usart3;
  22. gpio0 = &pioA;
  23. gpio1 = &pioB;
  24. gpio2 = &pioC;
  25. gpio3 = &pioD;
  26. gpio4 = &pioE;
  27. tcb0 = &tcb0;
  28. tcb1 = &tcb1;
  29. };
  30. cpus {
  31. cpu@0 {
  32. compatible = "arm,arm926ejs";
  33. };
  34. };
  35. memory@70000000 {
  36. reg = <0x70000000 0x10000000>;
  37. };
  38. ahb {
  39. compatible = "simple-bus";
  40. #address-cells = <1>;
  41. #size-cells = <1>;
  42. ranges;
  43. apb {
  44. compatible = "simple-bus";
  45. #address-cells = <1>;
  46. #size-cells = <1>;
  47. ranges;
  48. aic: interrupt-controller@fffff000 {
  49. #interrupt-cells = <2>;
  50. compatible = "atmel,at91rm9200-aic";
  51. interrupt-controller;
  52. interrupt-parent;
  53. reg = <0xfffff000 0x200>;
  54. };
  55. pmc: pmc@fffffc00 {
  56. compatible = "atmel,at91rm9200-pmc";
  57. reg = <0xfffffc00 0x100>;
  58. };
  59. rstc@fffffd00 {
  60. compatible = "atmel,at91sam9g45-rstc";
  61. reg = <0xfffffd00 0x10>;
  62. };
  63. pit: timer@fffffd30 {
  64. compatible = "atmel,at91sam9260-pit";
  65. reg = <0xfffffd30 0xf>;
  66. interrupts = <1 4>;
  67. };
  68. tcb0: timer@fff7c000 {
  69. compatible = "atmel,at91rm9200-tcb";
  70. reg = <0xfff7c000 0x100>;
  71. interrupts = <18 4>;
  72. };
  73. tcb1: timer@fffd4000 {
  74. compatible = "atmel,at91rm9200-tcb";
  75. reg = <0xfffd4000 0x100>;
  76. interrupts = <18 4>;
  77. };
  78. dma: dma-controller@ffffec00 {
  79. compatible = "atmel,at91sam9g45-dma";
  80. reg = <0xffffec00 0x200>;
  81. interrupts = <21 4>;
  82. };
  83. pioA: gpio@fffff200 {
  84. compatible = "atmel,at91rm9200-gpio";
  85. reg = <0xfffff200 0x100>;
  86. interrupts = <2 4>;
  87. #gpio-cells = <2>;
  88. gpio-controller;
  89. interrupt-controller;
  90. };
  91. pioB: gpio@fffff400 {
  92. compatible = "atmel,at91rm9200-gpio";
  93. reg = <0xfffff400 0x100>;
  94. interrupts = <3 4>;
  95. #gpio-cells = <2>;
  96. gpio-controller;
  97. interrupt-controller;
  98. };
  99. pioC: gpio@fffff600 {
  100. compatible = "atmel,at91rm9200-gpio";
  101. reg = <0xfffff600 0x100>;
  102. interrupts = <4 4>;
  103. #gpio-cells = <2>;
  104. gpio-controller;
  105. interrupt-controller;
  106. };
  107. pioD: gpio@fffff800 {
  108. compatible = "atmel,at91rm9200-gpio";
  109. reg = <0xfffff800 0x100>;
  110. interrupts = <5 4>;
  111. #gpio-cells = <2>;
  112. gpio-controller;
  113. interrupt-controller;
  114. };
  115. pioE: gpio@fffffa00 {
  116. compatible = "atmel,at91rm9200-gpio";
  117. reg = <0xfffffa00 0x100>;
  118. interrupts = <5 4>;
  119. #gpio-cells = <2>;
  120. gpio-controller;
  121. interrupt-controller;
  122. };
  123. dbgu: serial@ffffee00 {
  124. compatible = "atmel,at91sam9260-usart";
  125. reg = <0xffffee00 0x200>;
  126. interrupts = <1 4>;
  127. status = "disabled";
  128. };
  129. usart0: serial@fff8c000 {
  130. compatible = "atmel,at91sam9260-usart";
  131. reg = <0xfff8c000 0x200>;
  132. interrupts = <7 4>;
  133. atmel,use-dma-rx;
  134. atmel,use-dma-tx;
  135. status = "disabled";
  136. };
  137. usart1: serial@fff90000 {
  138. compatible = "atmel,at91sam9260-usart";
  139. reg = <0xfff90000 0x200>;
  140. interrupts = <8 4>;
  141. atmel,use-dma-rx;
  142. atmel,use-dma-tx;
  143. status = "disabled";
  144. };
  145. usart2: serial@fff94000 {
  146. compatible = "atmel,at91sam9260-usart";
  147. reg = <0xfff94000 0x200>;
  148. interrupts = <9 4>;
  149. atmel,use-dma-rx;
  150. atmel,use-dma-tx;
  151. status = "disabled";
  152. };
  153. usart3: serial@fff98000 {
  154. compatible = "atmel,at91sam9260-usart";
  155. reg = <0xfff98000 0x200>;
  156. interrupts = <10 4>;
  157. atmel,use-dma-rx;
  158. atmel,use-dma-tx;
  159. status = "disabled";
  160. };
  161. macb0: ethernet@fffbc000 {
  162. compatible = "cdns,at32ap7000-macb", "cdns,macb";
  163. reg = <0xfffbc000 0x100>;
  164. interrupts = <25 4>;
  165. status = "disabled";
  166. };
  167. };
  168. nand0: nand@40000000 {
  169. compatible = "atmel,at91rm9200-nand";
  170. #address-cells = <1>;
  171. #size-cells = <1>;
  172. reg = <0x40000000 0x10000000
  173. 0xffffe200 0x200
  174. >;
  175. atmel,nand-addr-offset = <21>;
  176. atmel,nand-cmd-offset = <22>;
  177. gpios = <&pioC 8 0
  178. &pioC 14 0
  179. 0
  180. >;
  181. status = "disabled";
  182. };
  183. };
  184. i2c@0 {
  185. compatible = "i2c-gpio";
  186. gpios = <&pioA 20 0 /* sda */
  187. &pioA 21 0 /* scl */
  188. >;
  189. i2c-gpio,sda-open-drain;
  190. i2c-gpio,scl-open-drain;
  191. i2c-gpio,delay-us = <5>; /* ~100 kHz */
  192. #address-cells = <1>;
  193. #size-cells = <0>;
  194. status = "disabled";
  195. };
  196. };