main.c 55 KB

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  1. /*
  2. * Copyright (c) 2008-2009 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/nl80211.h>
  17. #include "ath9k.h"
  18. #include "btcoex.h"
  19. static void ath_update_txpow(struct ath_softc *sc)
  20. {
  21. struct ath_hw *ah = sc->sc_ah;
  22. if (sc->curtxpow != sc->config.txpowlimit) {
  23. ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
  24. /* read back in case value is clamped */
  25. sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  26. }
  27. }
  28. static u8 parse_mpdudensity(u8 mpdudensity)
  29. {
  30. /*
  31. * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  32. * 0 for no restriction
  33. * 1 for 1/4 us
  34. * 2 for 1/2 us
  35. * 3 for 1 us
  36. * 4 for 2 us
  37. * 5 for 4 us
  38. * 6 for 8 us
  39. * 7 for 16 us
  40. */
  41. switch (mpdudensity) {
  42. case 0:
  43. return 0;
  44. case 1:
  45. case 2:
  46. case 3:
  47. /* Our lower layer calculations limit our precision to
  48. 1 microsecond */
  49. return 1;
  50. case 4:
  51. return 2;
  52. case 5:
  53. return 4;
  54. case 6:
  55. return 8;
  56. case 7:
  57. return 16;
  58. default:
  59. return 0;
  60. }
  61. }
  62. static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  63. struct ieee80211_hw *hw)
  64. {
  65. struct ieee80211_channel *curchan = hw->conf.channel;
  66. struct ath9k_channel *channel;
  67. u8 chan_idx;
  68. chan_idx = curchan->hw_value;
  69. channel = &sc->sc_ah->channels[chan_idx];
  70. ath9k_update_ichannel(sc, hw, channel);
  71. return channel;
  72. }
  73. bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  74. {
  75. unsigned long flags;
  76. bool ret;
  77. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  78. ret = ath9k_hw_setpower(sc->sc_ah, mode);
  79. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  80. return ret;
  81. }
  82. void ath9k_ps_wakeup(struct ath_softc *sc)
  83. {
  84. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  85. unsigned long flags;
  86. enum ath9k_power_mode power_mode;
  87. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  88. if (++sc->ps_usecount != 1)
  89. goto unlock;
  90. power_mode = sc->sc_ah->power_mode;
  91. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  92. /*
  93. * While the hardware is asleep, the cycle counters contain no
  94. * useful data. Better clear them now so that they don't mess up
  95. * survey data results.
  96. */
  97. if (power_mode != ATH9K_PM_AWAKE) {
  98. spin_lock(&common->cc_lock);
  99. ath_hw_cycle_counters_update(common);
  100. memset(&common->cc_survey, 0, sizeof(common->cc_survey));
  101. spin_unlock(&common->cc_lock);
  102. }
  103. unlock:
  104. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  105. }
  106. void ath9k_ps_restore(struct ath_softc *sc)
  107. {
  108. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  109. unsigned long flags;
  110. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  111. if (--sc->ps_usecount != 0)
  112. goto unlock;
  113. spin_lock(&common->cc_lock);
  114. ath_hw_cycle_counters_update(common);
  115. spin_unlock(&common->cc_lock);
  116. if (sc->ps_idle)
  117. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
  118. else if (sc->ps_enabled &&
  119. !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
  120. PS_WAIT_FOR_CAB |
  121. PS_WAIT_FOR_PSPOLL_DATA |
  122. PS_WAIT_FOR_TX_ACK)))
  123. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
  124. unlock:
  125. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  126. }
  127. static void ath_start_ani(struct ath_common *common)
  128. {
  129. struct ath_hw *ah = common->ah;
  130. unsigned long timestamp = jiffies_to_msecs(jiffies);
  131. struct ath_softc *sc = (struct ath_softc *) common->priv;
  132. if (!(sc->sc_flags & SC_OP_ANI_RUN))
  133. return;
  134. if (sc->sc_flags & SC_OP_OFFCHANNEL)
  135. return;
  136. common->ani.longcal_timer = timestamp;
  137. common->ani.shortcal_timer = timestamp;
  138. common->ani.checkani_timer = timestamp;
  139. mod_timer(&common->ani.timer,
  140. jiffies +
  141. msecs_to_jiffies((u32)ah->config.ani_poll_interval));
  142. }
  143. static void ath_update_survey_nf(struct ath_softc *sc, int channel)
  144. {
  145. struct ath_hw *ah = sc->sc_ah;
  146. struct ath9k_channel *chan = &ah->channels[channel];
  147. struct survey_info *survey = &sc->survey[channel];
  148. if (chan->noisefloor) {
  149. survey->filled |= SURVEY_INFO_NOISE_DBM;
  150. survey->noise = chan->noisefloor;
  151. }
  152. }
  153. static void ath_update_survey_stats(struct ath_softc *sc)
  154. {
  155. struct ath_hw *ah = sc->sc_ah;
  156. struct ath_common *common = ath9k_hw_common(ah);
  157. int pos = ah->curchan - &ah->channels[0];
  158. struct survey_info *survey = &sc->survey[pos];
  159. struct ath_cycle_counters *cc = &common->cc_survey;
  160. unsigned int div = common->clockrate * 1000;
  161. if (!ah->curchan)
  162. return;
  163. if (ah->power_mode == ATH9K_PM_AWAKE)
  164. ath_hw_cycle_counters_update(common);
  165. if (cc->cycles > 0) {
  166. survey->filled |= SURVEY_INFO_CHANNEL_TIME |
  167. SURVEY_INFO_CHANNEL_TIME_BUSY |
  168. SURVEY_INFO_CHANNEL_TIME_RX |
  169. SURVEY_INFO_CHANNEL_TIME_TX;
  170. survey->channel_time += cc->cycles / div;
  171. survey->channel_time_busy += cc->rx_busy / div;
  172. survey->channel_time_rx += cc->rx_frame / div;
  173. survey->channel_time_tx += cc->tx_frame / div;
  174. }
  175. memset(cc, 0, sizeof(*cc));
  176. ath_update_survey_nf(sc, pos);
  177. }
  178. /*
  179. * Set/change channels. If the channel is really being changed, it's done
  180. * by reseting the chip. To accomplish this we must first cleanup any pending
  181. * DMA, then restart stuff.
  182. */
  183. int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  184. struct ath9k_channel *hchan)
  185. {
  186. struct ath_wiphy *aphy = hw->priv;
  187. struct ath_hw *ah = sc->sc_ah;
  188. struct ath_common *common = ath9k_hw_common(ah);
  189. struct ieee80211_conf *conf = &common->hw->conf;
  190. bool fastcc = true, stopped;
  191. struct ieee80211_channel *channel = hw->conf.channel;
  192. struct ath9k_hw_cal_data *caldata = NULL;
  193. int r;
  194. if (sc->sc_flags & SC_OP_INVALID)
  195. return -EIO;
  196. del_timer_sync(&common->ani.timer);
  197. cancel_work_sync(&sc->paprd_work);
  198. cancel_work_sync(&sc->hw_check_work);
  199. cancel_delayed_work_sync(&sc->tx_complete_work);
  200. ath9k_ps_wakeup(sc);
  201. spin_lock_bh(&sc->sc_pcu_lock);
  202. /*
  203. * This is only performed if the channel settings have
  204. * actually changed.
  205. *
  206. * To switch channels clear any pending DMA operations;
  207. * wait long enough for the RX fifo to drain, reset the
  208. * hardware at the new frequency, and then re-enable
  209. * the relevant bits of the h/w.
  210. */
  211. ath9k_hw_disable_interrupts(ah);
  212. stopped = ath_drain_all_txq(sc, false);
  213. if (!ath_stoprecv(sc))
  214. stopped = false;
  215. /* XXX: do not flush receive queue here. We don't want
  216. * to flush data frames already in queue because of
  217. * changing channel. */
  218. if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
  219. fastcc = false;
  220. if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
  221. caldata = &aphy->caldata;
  222. ath_dbg(common, ATH_DBG_CONFIG,
  223. "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
  224. sc->sc_ah->curchan->channel,
  225. channel->center_freq, conf_is_ht40(conf),
  226. fastcc);
  227. r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
  228. if (r) {
  229. ath_err(common,
  230. "Unable to reset channel (%u MHz), reset status %d\n",
  231. channel->center_freq, r);
  232. goto ps_restore;
  233. }
  234. if (ath_startrecv(sc) != 0) {
  235. ath_err(common, "Unable to restart recv logic\n");
  236. r = -EIO;
  237. goto ps_restore;
  238. }
  239. ath_update_txpow(sc);
  240. ath9k_hw_set_interrupts(ah, ah->imask);
  241. if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
  242. if (sc->sc_flags & SC_OP_BEACONS)
  243. ath_beacon_config(sc, NULL);
  244. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  245. ath_start_ani(common);
  246. }
  247. ps_restore:
  248. spin_unlock_bh(&sc->sc_pcu_lock);
  249. ath9k_ps_restore(sc);
  250. return r;
  251. }
  252. static void ath_paprd_activate(struct ath_softc *sc)
  253. {
  254. struct ath_hw *ah = sc->sc_ah;
  255. struct ath9k_hw_cal_data *caldata = ah->caldata;
  256. struct ath_common *common = ath9k_hw_common(ah);
  257. int chain;
  258. if (!caldata || !caldata->paprd_done)
  259. return;
  260. ath9k_ps_wakeup(sc);
  261. ar9003_paprd_enable(ah, false);
  262. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  263. if (!(common->tx_chainmask & BIT(chain)))
  264. continue;
  265. ar9003_paprd_populate_single_table(ah, caldata, chain);
  266. }
  267. ar9003_paprd_enable(ah, true);
  268. ath9k_ps_restore(sc);
  269. }
  270. static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
  271. {
  272. struct ieee80211_hw *hw = sc->hw;
  273. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  274. struct ath_hw *ah = sc->sc_ah;
  275. struct ath_common *common = ath9k_hw_common(ah);
  276. struct ath_tx_control txctl;
  277. int time_left;
  278. memset(&txctl, 0, sizeof(txctl));
  279. txctl.txq = sc->tx.txq_map[WME_AC_BE];
  280. memset(tx_info, 0, sizeof(*tx_info));
  281. tx_info->band = hw->conf.channel->band;
  282. tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
  283. tx_info->control.rates[0].idx = 0;
  284. tx_info->control.rates[0].count = 1;
  285. tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
  286. tx_info->control.rates[1].idx = -1;
  287. init_completion(&sc->paprd_complete);
  288. sc->paprd_pending = true;
  289. txctl.paprd = BIT(chain);
  290. if (ath_tx_start(hw, skb, &txctl) != 0) {
  291. ath_dbg(common, ATH_DBG_XMIT, "PAPRD TX failed\n");
  292. dev_kfree_skb_any(skb);
  293. return false;
  294. }
  295. time_left = wait_for_completion_timeout(&sc->paprd_complete,
  296. msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
  297. sc->paprd_pending = false;
  298. if (!time_left)
  299. ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
  300. "Timeout waiting for paprd training on TX chain %d\n",
  301. chain);
  302. return !!time_left;
  303. }
  304. void ath_paprd_calibrate(struct work_struct *work)
  305. {
  306. struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
  307. struct ieee80211_hw *hw = sc->hw;
  308. struct ath_hw *ah = sc->sc_ah;
  309. struct ieee80211_hdr *hdr;
  310. struct sk_buff *skb = NULL;
  311. struct ath9k_hw_cal_data *caldata = ah->caldata;
  312. struct ath_common *common = ath9k_hw_common(ah);
  313. int ftype;
  314. int chain_ok = 0;
  315. int chain;
  316. int len = 1800;
  317. if (!caldata)
  318. return;
  319. if (ar9003_paprd_init_table(ah) < 0)
  320. return;
  321. skb = alloc_skb(len, GFP_KERNEL);
  322. if (!skb)
  323. return;
  324. skb_put(skb, len);
  325. memset(skb->data, 0, len);
  326. hdr = (struct ieee80211_hdr *)skb->data;
  327. ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
  328. hdr->frame_control = cpu_to_le16(ftype);
  329. hdr->duration_id = cpu_to_le16(10);
  330. memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
  331. memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
  332. memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
  333. ath9k_ps_wakeup(sc);
  334. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  335. if (!(common->tx_chainmask & BIT(chain)))
  336. continue;
  337. chain_ok = 0;
  338. ath_dbg(common, ATH_DBG_CALIBRATE,
  339. "Sending PAPRD frame for thermal measurement "
  340. "on chain %d\n", chain);
  341. if (!ath_paprd_send_frame(sc, skb, chain))
  342. goto fail_paprd;
  343. ar9003_paprd_setup_gain_table(ah, chain);
  344. ath_dbg(common, ATH_DBG_CALIBRATE,
  345. "Sending PAPRD training frame on chain %d\n", chain);
  346. if (!ath_paprd_send_frame(sc, skb, chain))
  347. goto fail_paprd;
  348. if (!ar9003_paprd_is_done(ah))
  349. break;
  350. if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
  351. break;
  352. chain_ok = 1;
  353. }
  354. kfree_skb(skb);
  355. if (chain_ok) {
  356. caldata->paprd_done = true;
  357. ath_paprd_activate(sc);
  358. }
  359. fail_paprd:
  360. ath9k_ps_restore(sc);
  361. }
  362. /*
  363. * This routine performs the periodic noise floor calibration function
  364. * that is used to adjust and optimize the chip performance. This
  365. * takes environmental changes (location, temperature) into account.
  366. * When the task is complete, it reschedules itself depending on the
  367. * appropriate interval that was calculated.
  368. */
  369. void ath_ani_calibrate(unsigned long data)
  370. {
  371. struct ath_softc *sc = (struct ath_softc *)data;
  372. struct ath_hw *ah = sc->sc_ah;
  373. struct ath_common *common = ath9k_hw_common(ah);
  374. bool longcal = false;
  375. bool shortcal = false;
  376. bool aniflag = false;
  377. unsigned int timestamp = jiffies_to_msecs(jiffies);
  378. u32 cal_interval, short_cal_interval, long_cal_interval;
  379. unsigned long flags;
  380. if (ah->caldata && ah->caldata->nfcal_interference)
  381. long_cal_interval = ATH_LONG_CALINTERVAL_INT;
  382. else
  383. long_cal_interval = ATH_LONG_CALINTERVAL;
  384. short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
  385. ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
  386. /* Only calibrate if awake */
  387. if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
  388. goto set_timer;
  389. ath9k_ps_wakeup(sc);
  390. /* Long calibration runs independently of short calibration. */
  391. if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
  392. longcal = true;
  393. ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
  394. common->ani.longcal_timer = timestamp;
  395. }
  396. /* Short calibration applies only while caldone is false */
  397. if (!common->ani.caldone) {
  398. if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
  399. shortcal = true;
  400. ath_dbg(common, ATH_DBG_ANI,
  401. "shortcal @%lu\n", jiffies);
  402. common->ani.shortcal_timer = timestamp;
  403. common->ani.resetcal_timer = timestamp;
  404. }
  405. } else {
  406. if ((timestamp - common->ani.resetcal_timer) >=
  407. ATH_RESTART_CALINTERVAL) {
  408. common->ani.caldone = ath9k_hw_reset_calvalid(ah);
  409. if (common->ani.caldone)
  410. common->ani.resetcal_timer = timestamp;
  411. }
  412. }
  413. /* Verify whether we must check ANI */
  414. if ((timestamp - common->ani.checkani_timer) >=
  415. ah->config.ani_poll_interval) {
  416. aniflag = true;
  417. common->ani.checkani_timer = timestamp;
  418. }
  419. /* Skip all processing if there's nothing to do. */
  420. if (longcal || shortcal || aniflag) {
  421. /* Call ANI routine if necessary */
  422. if (aniflag) {
  423. spin_lock_irqsave(&common->cc_lock, flags);
  424. ath9k_hw_ani_monitor(ah, ah->curchan);
  425. ath_update_survey_stats(sc);
  426. spin_unlock_irqrestore(&common->cc_lock, flags);
  427. }
  428. /* Perform calibration if necessary */
  429. if (longcal || shortcal) {
  430. common->ani.caldone =
  431. ath9k_hw_calibrate(ah,
  432. ah->curchan,
  433. common->rx_chainmask,
  434. longcal);
  435. }
  436. }
  437. ath9k_ps_restore(sc);
  438. set_timer:
  439. /*
  440. * Set timer interval based on previous results.
  441. * The interval must be the shortest necessary to satisfy ANI,
  442. * short calibration and long calibration.
  443. */
  444. cal_interval = ATH_LONG_CALINTERVAL;
  445. if (sc->sc_ah->config.enable_ani)
  446. cal_interval = min(cal_interval,
  447. (u32)ah->config.ani_poll_interval);
  448. if (!common->ani.caldone)
  449. cal_interval = min(cal_interval, (u32)short_cal_interval);
  450. mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
  451. if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
  452. if (!ah->caldata->paprd_done)
  453. ieee80211_queue_work(sc->hw, &sc->paprd_work);
  454. else if (!ah->paprd_table_write_done)
  455. ath_paprd_activate(sc);
  456. }
  457. }
  458. static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
  459. {
  460. struct ath_node *an;
  461. struct ath_hw *ah = sc->sc_ah;
  462. an = (struct ath_node *)sta->drv_priv;
  463. if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
  464. sc->sc_flags |= SC_OP_ENABLE_APM;
  465. if (sc->sc_flags & SC_OP_TXAGGR) {
  466. ath_tx_node_init(sc, an);
  467. an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
  468. sta->ht_cap.ampdu_factor);
  469. an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
  470. }
  471. }
  472. static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
  473. {
  474. struct ath_node *an = (struct ath_node *)sta->drv_priv;
  475. if (sc->sc_flags & SC_OP_TXAGGR)
  476. ath_tx_node_cleanup(sc, an);
  477. }
  478. void ath_hw_check(struct work_struct *work)
  479. {
  480. struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
  481. int i;
  482. ath9k_ps_wakeup(sc);
  483. for (i = 0; i < 3; i++) {
  484. if (ath9k_hw_check_alive(sc->sc_ah))
  485. goto out;
  486. msleep(1);
  487. }
  488. ath_reset(sc, true);
  489. out:
  490. ath9k_ps_restore(sc);
  491. }
  492. void ath9k_tasklet(unsigned long data)
  493. {
  494. struct ath_softc *sc = (struct ath_softc *)data;
  495. struct ath_hw *ah = sc->sc_ah;
  496. struct ath_common *common = ath9k_hw_common(ah);
  497. u32 status = sc->intrstatus;
  498. u32 rxmask;
  499. if (status & ATH9K_INT_FATAL) {
  500. ath_reset(sc, true);
  501. return;
  502. }
  503. ath9k_ps_wakeup(sc);
  504. spin_lock(&sc->sc_pcu_lock);
  505. if (!ath9k_hw_check_alive(ah))
  506. ieee80211_queue_work(sc->hw, &sc->hw_check_work);
  507. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  508. rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
  509. ATH9K_INT_RXORN);
  510. else
  511. rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  512. if (status & rxmask) {
  513. /* Check for high priority Rx first */
  514. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  515. (status & ATH9K_INT_RXHP))
  516. ath_rx_tasklet(sc, 0, true);
  517. ath_rx_tasklet(sc, 0, false);
  518. }
  519. if (status & ATH9K_INT_TX) {
  520. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  521. ath_tx_edma_tasklet(sc);
  522. else
  523. ath_tx_tasklet(sc);
  524. }
  525. if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
  526. /*
  527. * TSF sync does not look correct; remain awake to sync with
  528. * the next Beacon.
  529. */
  530. ath_dbg(common, ATH_DBG_PS,
  531. "TSFOOR - Sync with next Beacon\n");
  532. sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
  533. }
  534. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  535. if (status & ATH9K_INT_GENTIMER)
  536. ath_gen_timer_isr(sc->sc_ah);
  537. /* re-enable hardware interrupt */
  538. ath9k_hw_enable_interrupts(ah);
  539. spin_unlock(&sc->sc_pcu_lock);
  540. ath9k_ps_restore(sc);
  541. }
  542. irqreturn_t ath_isr(int irq, void *dev)
  543. {
  544. #define SCHED_INTR ( \
  545. ATH9K_INT_FATAL | \
  546. ATH9K_INT_RXORN | \
  547. ATH9K_INT_RXEOL | \
  548. ATH9K_INT_RX | \
  549. ATH9K_INT_RXLP | \
  550. ATH9K_INT_RXHP | \
  551. ATH9K_INT_TX | \
  552. ATH9K_INT_BMISS | \
  553. ATH9K_INT_CST | \
  554. ATH9K_INT_TSFOOR | \
  555. ATH9K_INT_GENTIMER)
  556. struct ath_softc *sc = dev;
  557. struct ath_hw *ah = sc->sc_ah;
  558. struct ath_common *common = ath9k_hw_common(ah);
  559. enum ath9k_int status;
  560. bool sched = false;
  561. /*
  562. * The hardware is not ready/present, don't
  563. * touch anything. Note this can happen early
  564. * on if the IRQ is shared.
  565. */
  566. if (sc->sc_flags & SC_OP_INVALID)
  567. return IRQ_NONE;
  568. /* shared irq, not for us */
  569. if (!ath9k_hw_intrpend(ah))
  570. return IRQ_NONE;
  571. /*
  572. * Figure out the reason(s) for the interrupt. Note
  573. * that the hal returns a pseudo-ISR that may include
  574. * bits we haven't explicitly enabled so we mask the
  575. * value to insure we only process bits we requested.
  576. */
  577. ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
  578. status &= ah->imask; /* discard unasked-for bits */
  579. /*
  580. * If there are no status bits set, then this interrupt was not
  581. * for me (should have been caught above).
  582. */
  583. if (!status)
  584. return IRQ_NONE;
  585. /* Cache the status */
  586. sc->intrstatus = status;
  587. if (status & SCHED_INTR)
  588. sched = true;
  589. /*
  590. * If a FATAL or RXORN interrupt is received, we have to reset the
  591. * chip immediately.
  592. */
  593. if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
  594. !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
  595. goto chip_reset;
  596. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  597. (status & ATH9K_INT_BB_WATCHDOG)) {
  598. spin_lock(&common->cc_lock);
  599. ath_hw_cycle_counters_update(common);
  600. ar9003_hw_bb_watchdog_dbg_info(ah);
  601. spin_unlock(&common->cc_lock);
  602. goto chip_reset;
  603. }
  604. if (status & ATH9K_INT_SWBA)
  605. tasklet_schedule(&sc->bcon_tasklet);
  606. if (status & ATH9K_INT_TXURN)
  607. ath9k_hw_updatetxtriglevel(ah, true);
  608. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
  609. if (status & ATH9K_INT_RXEOL) {
  610. ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  611. ath9k_hw_set_interrupts(ah, ah->imask);
  612. }
  613. }
  614. if (status & ATH9K_INT_MIB) {
  615. /*
  616. * Disable interrupts until we service the MIB
  617. * interrupt; otherwise it will continue to
  618. * fire.
  619. */
  620. ath9k_hw_disable_interrupts(ah);
  621. /*
  622. * Let the hal handle the event. We assume
  623. * it will clear whatever condition caused
  624. * the interrupt.
  625. */
  626. spin_lock(&common->cc_lock);
  627. ath9k_hw_proc_mib_event(ah);
  628. spin_unlock(&common->cc_lock);
  629. ath9k_hw_enable_interrupts(ah);
  630. }
  631. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  632. if (status & ATH9K_INT_TIM_TIMER) {
  633. if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
  634. goto chip_reset;
  635. /* Clear RxAbort bit so that we can
  636. * receive frames */
  637. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  638. ath9k_hw_setrxabort(sc->sc_ah, 0);
  639. sc->ps_flags |= PS_WAIT_FOR_BEACON;
  640. }
  641. chip_reset:
  642. ath_debug_stat_interrupt(sc, status);
  643. if (sched) {
  644. /* turn off every interrupt */
  645. ath9k_hw_disable_interrupts(ah);
  646. tasklet_schedule(&sc->intr_tq);
  647. }
  648. return IRQ_HANDLED;
  649. #undef SCHED_INTR
  650. }
  651. static u32 ath_get_extchanmode(struct ath_softc *sc,
  652. struct ieee80211_channel *chan,
  653. enum nl80211_channel_type channel_type)
  654. {
  655. u32 chanmode = 0;
  656. switch (chan->band) {
  657. case IEEE80211_BAND_2GHZ:
  658. switch(channel_type) {
  659. case NL80211_CHAN_NO_HT:
  660. case NL80211_CHAN_HT20:
  661. chanmode = CHANNEL_G_HT20;
  662. break;
  663. case NL80211_CHAN_HT40PLUS:
  664. chanmode = CHANNEL_G_HT40PLUS;
  665. break;
  666. case NL80211_CHAN_HT40MINUS:
  667. chanmode = CHANNEL_G_HT40MINUS;
  668. break;
  669. }
  670. break;
  671. case IEEE80211_BAND_5GHZ:
  672. switch(channel_type) {
  673. case NL80211_CHAN_NO_HT:
  674. case NL80211_CHAN_HT20:
  675. chanmode = CHANNEL_A_HT20;
  676. break;
  677. case NL80211_CHAN_HT40PLUS:
  678. chanmode = CHANNEL_A_HT40PLUS;
  679. break;
  680. case NL80211_CHAN_HT40MINUS:
  681. chanmode = CHANNEL_A_HT40MINUS;
  682. break;
  683. }
  684. break;
  685. default:
  686. break;
  687. }
  688. return chanmode;
  689. }
  690. static void ath9k_bss_assoc_info(struct ath_softc *sc,
  691. struct ieee80211_hw *hw,
  692. struct ieee80211_vif *vif,
  693. struct ieee80211_bss_conf *bss_conf)
  694. {
  695. struct ath_wiphy *aphy = hw->priv;
  696. struct ath_hw *ah = sc->sc_ah;
  697. struct ath_common *common = ath9k_hw_common(ah);
  698. if (bss_conf->assoc) {
  699. ath_dbg(common, ATH_DBG_CONFIG,
  700. "Bss Info ASSOC %d, bssid: %pM\n",
  701. bss_conf->aid, common->curbssid);
  702. /* New association, store aid */
  703. common->curaid = bss_conf->aid;
  704. ath9k_hw_write_associd(ah);
  705. /*
  706. * Request a re-configuration of Beacon related timers
  707. * on the receipt of the first Beacon frame (i.e.,
  708. * after time sync with the AP).
  709. */
  710. sc->ps_flags |= PS_BEACON_SYNC;
  711. /* Configure the beacon */
  712. ath_beacon_config(sc, vif);
  713. /* Reset rssi stats */
  714. aphy->last_rssi = ATH_RSSI_DUMMY_MARKER;
  715. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  716. sc->sc_flags |= SC_OP_ANI_RUN;
  717. ath_start_ani(common);
  718. } else {
  719. ath_dbg(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
  720. common->curaid = 0;
  721. /* Stop ANI */
  722. sc->sc_flags &= ~SC_OP_ANI_RUN;
  723. del_timer_sync(&common->ani.timer);
  724. }
  725. }
  726. void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
  727. {
  728. struct ath_hw *ah = sc->sc_ah;
  729. struct ath_common *common = ath9k_hw_common(ah);
  730. struct ieee80211_channel *channel = hw->conf.channel;
  731. int r;
  732. ath9k_ps_wakeup(sc);
  733. spin_lock_bh(&sc->sc_pcu_lock);
  734. ath9k_hw_configpcipowersave(ah, 0, 0);
  735. if (!ah->curchan)
  736. ah->curchan = ath_get_curchannel(sc, sc->hw);
  737. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  738. if (r) {
  739. ath_err(common,
  740. "Unable to reset channel (%u MHz), reset status %d\n",
  741. channel->center_freq, r);
  742. }
  743. ath_update_txpow(sc);
  744. if (ath_startrecv(sc) != 0) {
  745. ath_err(common, "Unable to restart recv logic\n");
  746. goto out;
  747. }
  748. if (sc->sc_flags & SC_OP_BEACONS)
  749. ath_beacon_config(sc, NULL); /* restart beacons */
  750. /* Re-Enable interrupts */
  751. ath9k_hw_set_interrupts(ah, ah->imask);
  752. /* Enable LED */
  753. ath9k_hw_cfg_output(ah, ah->led_pin,
  754. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  755. ath9k_hw_set_gpio(ah, ah->led_pin, 0);
  756. ieee80211_wake_queues(hw);
  757. out:
  758. spin_unlock_bh(&sc->sc_pcu_lock);
  759. ath9k_ps_restore(sc);
  760. }
  761. void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
  762. {
  763. struct ath_hw *ah = sc->sc_ah;
  764. struct ieee80211_channel *channel = hw->conf.channel;
  765. int r;
  766. ath9k_ps_wakeup(sc);
  767. spin_lock_bh(&sc->sc_pcu_lock);
  768. ieee80211_stop_queues(hw);
  769. /*
  770. * Keep the LED on when the radio is disabled
  771. * during idle unassociated state.
  772. */
  773. if (!sc->ps_idle) {
  774. ath9k_hw_set_gpio(ah, ah->led_pin, 1);
  775. ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
  776. }
  777. /* Disable interrupts */
  778. ath9k_hw_disable_interrupts(ah);
  779. ath_drain_all_txq(sc, false); /* clear pending tx frames */
  780. ath_stoprecv(sc); /* turn off frame recv */
  781. ath_flushrecv(sc); /* flush recv queue */
  782. if (!ah->curchan)
  783. ah->curchan = ath_get_curchannel(sc, hw);
  784. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  785. if (r) {
  786. ath_err(ath9k_hw_common(sc->sc_ah),
  787. "Unable to reset channel (%u MHz), reset status %d\n",
  788. channel->center_freq, r);
  789. }
  790. ath9k_hw_phy_disable(ah);
  791. ath9k_hw_configpcipowersave(ah, 1, 1);
  792. spin_unlock_bh(&sc->sc_pcu_lock);
  793. ath9k_ps_restore(sc);
  794. }
  795. int ath_reset(struct ath_softc *sc, bool retry_tx)
  796. {
  797. struct ath_hw *ah = sc->sc_ah;
  798. struct ath_common *common = ath9k_hw_common(ah);
  799. struct ieee80211_hw *hw = sc->hw;
  800. int r;
  801. /* Stop ANI */
  802. del_timer_sync(&common->ani.timer);
  803. ath9k_ps_wakeup(sc);
  804. spin_lock_bh(&sc->sc_pcu_lock);
  805. ieee80211_stop_queues(hw);
  806. ath9k_hw_disable_interrupts(ah);
  807. ath_drain_all_txq(sc, retry_tx);
  808. ath_stoprecv(sc);
  809. ath_flushrecv(sc);
  810. r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
  811. if (r)
  812. ath_err(common,
  813. "Unable to reset hardware; reset status %d\n", r);
  814. if (ath_startrecv(sc) != 0)
  815. ath_err(common, "Unable to start recv logic\n");
  816. /*
  817. * We may be doing a reset in response to a request
  818. * that changes the channel so update any state that
  819. * might change as a result.
  820. */
  821. ath_update_txpow(sc);
  822. if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
  823. ath_beacon_config(sc, NULL); /* restart beacons */
  824. ath9k_hw_set_interrupts(ah, ah->imask);
  825. if (retry_tx) {
  826. int i;
  827. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  828. if (ATH_TXQ_SETUP(sc, i)) {
  829. spin_lock_bh(&sc->tx.txq[i].axq_lock);
  830. ath_txq_schedule(sc, &sc->tx.txq[i]);
  831. spin_unlock_bh(&sc->tx.txq[i].axq_lock);
  832. }
  833. }
  834. }
  835. ieee80211_wake_queues(hw);
  836. spin_unlock_bh(&sc->sc_pcu_lock);
  837. /* Start ANI */
  838. ath_start_ani(common);
  839. ath9k_ps_restore(sc);
  840. return r;
  841. }
  842. /* XXX: Remove me once we don't depend on ath9k_channel for all
  843. * this redundant data */
  844. void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
  845. struct ath9k_channel *ichan)
  846. {
  847. struct ieee80211_channel *chan = hw->conf.channel;
  848. struct ieee80211_conf *conf = &hw->conf;
  849. ichan->channel = chan->center_freq;
  850. ichan->chan = chan;
  851. if (chan->band == IEEE80211_BAND_2GHZ) {
  852. ichan->chanmode = CHANNEL_G;
  853. ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
  854. } else {
  855. ichan->chanmode = CHANNEL_A;
  856. ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
  857. }
  858. if (conf_is_ht(conf))
  859. ichan->chanmode = ath_get_extchanmode(sc, chan,
  860. conf->channel_type);
  861. }
  862. /**********************/
  863. /* mac80211 callbacks */
  864. /**********************/
  865. static int ath9k_start(struct ieee80211_hw *hw)
  866. {
  867. struct ath_wiphy *aphy = hw->priv;
  868. struct ath_softc *sc = aphy->sc;
  869. struct ath_hw *ah = sc->sc_ah;
  870. struct ath_common *common = ath9k_hw_common(ah);
  871. struct ieee80211_channel *curchan = hw->conf.channel;
  872. struct ath9k_channel *init_channel;
  873. int r;
  874. ath_dbg(common, ATH_DBG_CONFIG,
  875. "Starting driver with initial channel: %d MHz\n",
  876. curchan->center_freq);
  877. mutex_lock(&sc->mutex);
  878. if (ath9k_wiphy_started(sc)) {
  879. if (sc->chan_idx == curchan->hw_value) {
  880. /*
  881. * Already on the operational channel, the new wiphy
  882. * can be marked active.
  883. */
  884. aphy->state = ATH_WIPHY_ACTIVE;
  885. ieee80211_wake_queues(hw);
  886. } else {
  887. /*
  888. * Another wiphy is on another channel, start the new
  889. * wiphy in paused state.
  890. */
  891. aphy->state = ATH_WIPHY_PAUSED;
  892. ieee80211_stop_queues(hw);
  893. }
  894. mutex_unlock(&sc->mutex);
  895. return 0;
  896. }
  897. aphy->state = ATH_WIPHY_ACTIVE;
  898. /* setup initial channel */
  899. sc->chan_idx = curchan->hw_value;
  900. init_channel = ath_get_curchannel(sc, hw);
  901. /* Reset SERDES registers */
  902. ath9k_hw_configpcipowersave(ah, 0, 0);
  903. /*
  904. * The basic interface to setting the hardware in a good
  905. * state is ``reset''. On return the hardware is known to
  906. * be powered up and with interrupts disabled. This must
  907. * be followed by initialization of the appropriate bits
  908. * and then setup of the interrupt mask.
  909. */
  910. spin_lock_bh(&sc->sc_pcu_lock);
  911. r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
  912. if (r) {
  913. ath_err(common,
  914. "Unable to reset hardware; reset status %d (freq %u MHz)\n",
  915. r, curchan->center_freq);
  916. spin_unlock_bh(&sc->sc_pcu_lock);
  917. goto mutex_unlock;
  918. }
  919. /*
  920. * This is needed only to setup initial state
  921. * but it's best done after a reset.
  922. */
  923. ath_update_txpow(sc);
  924. /*
  925. * Setup the hardware after reset:
  926. * The receive engine is set going.
  927. * Frame transmit is handled entirely
  928. * in the frame output path; there's nothing to do
  929. * here except setup the interrupt mask.
  930. */
  931. if (ath_startrecv(sc) != 0) {
  932. ath_err(common, "Unable to start recv logic\n");
  933. r = -EIO;
  934. spin_unlock_bh(&sc->sc_pcu_lock);
  935. goto mutex_unlock;
  936. }
  937. spin_unlock_bh(&sc->sc_pcu_lock);
  938. /* Setup our intr mask. */
  939. ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
  940. ATH9K_INT_RXORN | ATH9K_INT_FATAL |
  941. ATH9K_INT_GLOBAL;
  942. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  943. ah->imask |= ATH9K_INT_RXHP |
  944. ATH9K_INT_RXLP |
  945. ATH9K_INT_BB_WATCHDOG;
  946. else
  947. ah->imask |= ATH9K_INT_RX;
  948. ah->imask |= ATH9K_INT_GTT;
  949. if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  950. ah->imask |= ATH9K_INT_CST;
  951. sc->sc_flags &= ~SC_OP_INVALID;
  952. sc->sc_ah->is_monitoring = false;
  953. /* Disable BMISS interrupt when we're not associated */
  954. ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
  955. ath9k_hw_set_interrupts(ah, ah->imask);
  956. ieee80211_wake_queues(hw);
  957. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  958. if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
  959. !ah->btcoex_hw.enabled) {
  960. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  961. AR_STOMP_LOW_WLAN_WGHT);
  962. ath9k_hw_btcoex_enable(ah);
  963. if (common->bus_ops->bt_coex_prep)
  964. common->bus_ops->bt_coex_prep(common);
  965. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  966. ath9k_btcoex_timer_resume(sc);
  967. }
  968. /* User has the option to provide pm-qos value as a module
  969. * parameter rather than using the default value of
  970. * 'ATH9K_PM_QOS_DEFAULT_VALUE'.
  971. */
  972. pm_qos_update_request(&sc->pm_qos_req, ath9k_pm_qos_value);
  973. if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
  974. common->bus_ops->extn_synch_en(common);
  975. mutex_unlock:
  976. mutex_unlock(&sc->mutex);
  977. return r;
  978. }
  979. static int ath9k_tx(struct ieee80211_hw *hw,
  980. struct sk_buff *skb)
  981. {
  982. struct ath_wiphy *aphy = hw->priv;
  983. struct ath_softc *sc = aphy->sc;
  984. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  985. struct ath_tx_control txctl;
  986. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  987. if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
  988. ath_dbg(common, ATH_DBG_XMIT,
  989. "ath9k: %s: TX in unexpected wiphy state %d\n",
  990. wiphy_name(hw->wiphy), aphy->state);
  991. goto exit;
  992. }
  993. if (sc->ps_enabled) {
  994. /*
  995. * mac80211 does not set PM field for normal data frames, so we
  996. * need to update that based on the current PS mode.
  997. */
  998. if (ieee80211_is_data(hdr->frame_control) &&
  999. !ieee80211_is_nullfunc(hdr->frame_control) &&
  1000. !ieee80211_has_pm(hdr->frame_control)) {
  1001. ath_dbg(common, ATH_DBG_PS,
  1002. "Add PM=1 for a TX frame while in PS mode\n");
  1003. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
  1004. }
  1005. }
  1006. if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
  1007. /*
  1008. * We are using PS-Poll and mac80211 can request TX while in
  1009. * power save mode. Need to wake up hardware for the TX to be
  1010. * completed and if needed, also for RX of buffered frames.
  1011. */
  1012. ath9k_ps_wakeup(sc);
  1013. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  1014. ath9k_hw_setrxabort(sc->sc_ah, 0);
  1015. if (ieee80211_is_pspoll(hdr->frame_control)) {
  1016. ath_dbg(common, ATH_DBG_PS,
  1017. "Sending PS-Poll to pick a buffered frame\n");
  1018. sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
  1019. } else {
  1020. ath_dbg(common, ATH_DBG_PS,
  1021. "Wake up to complete TX\n");
  1022. sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
  1023. }
  1024. /*
  1025. * The actual restore operation will happen only after
  1026. * the sc_flags bit is cleared. We are just dropping
  1027. * the ps_usecount here.
  1028. */
  1029. ath9k_ps_restore(sc);
  1030. }
  1031. memset(&txctl, 0, sizeof(struct ath_tx_control));
  1032. txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
  1033. ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
  1034. if (ath_tx_start(hw, skb, &txctl) != 0) {
  1035. ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
  1036. goto exit;
  1037. }
  1038. return 0;
  1039. exit:
  1040. dev_kfree_skb_any(skb);
  1041. return 0;
  1042. }
  1043. static void ath9k_stop(struct ieee80211_hw *hw)
  1044. {
  1045. struct ath_wiphy *aphy = hw->priv;
  1046. struct ath_softc *sc = aphy->sc;
  1047. struct ath_hw *ah = sc->sc_ah;
  1048. struct ath_common *common = ath9k_hw_common(ah);
  1049. int i;
  1050. mutex_lock(&sc->mutex);
  1051. aphy->state = ATH_WIPHY_INACTIVE;
  1052. if (led_blink)
  1053. cancel_delayed_work_sync(&sc->ath_led_blink_work);
  1054. cancel_delayed_work_sync(&sc->tx_complete_work);
  1055. cancel_work_sync(&sc->paprd_work);
  1056. cancel_work_sync(&sc->hw_check_work);
  1057. for (i = 0; i < sc->num_sec_wiphy; i++) {
  1058. if (sc->sec_wiphy[i])
  1059. break;
  1060. }
  1061. if (i == sc->num_sec_wiphy) {
  1062. cancel_delayed_work_sync(&sc->wiphy_work);
  1063. cancel_work_sync(&sc->chan_work);
  1064. }
  1065. if (sc->sc_flags & SC_OP_INVALID) {
  1066. ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
  1067. mutex_unlock(&sc->mutex);
  1068. return;
  1069. }
  1070. if (ath9k_wiphy_started(sc)) {
  1071. mutex_unlock(&sc->mutex);
  1072. return; /* another wiphy still in use */
  1073. }
  1074. /* Ensure HW is awake when we try to shut it down. */
  1075. ath9k_ps_wakeup(sc);
  1076. if (ah->btcoex_hw.enabled) {
  1077. ath9k_hw_btcoex_disable(ah);
  1078. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  1079. ath9k_btcoex_timer_pause(sc);
  1080. }
  1081. spin_lock_bh(&sc->sc_pcu_lock);
  1082. /* prevent tasklets to enable interrupts once we disable them */
  1083. ah->imask &= ~ATH9K_INT_GLOBAL;
  1084. /* make sure h/w will not generate any interrupt
  1085. * before setting the invalid flag. */
  1086. ath9k_hw_disable_interrupts(ah);
  1087. if (!(sc->sc_flags & SC_OP_INVALID)) {
  1088. ath_drain_all_txq(sc, false);
  1089. ath_stoprecv(sc);
  1090. ath9k_hw_phy_disable(ah);
  1091. } else
  1092. sc->rx.rxlink = NULL;
  1093. /* disable HAL and put h/w to sleep */
  1094. ath9k_hw_disable(ah);
  1095. ath9k_hw_configpcipowersave(ah, 1, 1);
  1096. spin_unlock_bh(&sc->sc_pcu_lock);
  1097. /* we can now sync irq and kill any running tasklets, since we already
  1098. * disabled interrupts and not holding a spin lock */
  1099. synchronize_irq(sc->irq);
  1100. tasklet_kill(&sc->intr_tq);
  1101. tasklet_kill(&sc->bcon_tasklet);
  1102. ath9k_ps_restore(sc);
  1103. sc->ps_idle = true;
  1104. ath9k_set_wiphy_idle(aphy, true);
  1105. ath_radio_disable(sc, hw);
  1106. sc->sc_flags |= SC_OP_INVALID;
  1107. pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
  1108. mutex_unlock(&sc->mutex);
  1109. ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
  1110. }
  1111. static int ath9k_add_interface(struct ieee80211_hw *hw,
  1112. struct ieee80211_vif *vif)
  1113. {
  1114. struct ath_wiphy *aphy = hw->priv;
  1115. struct ath_softc *sc = aphy->sc;
  1116. struct ath_hw *ah = sc->sc_ah;
  1117. struct ath_common *common = ath9k_hw_common(ah);
  1118. struct ath_vif *avp = (void *)vif->drv_priv;
  1119. enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
  1120. int ret = 0;
  1121. mutex_lock(&sc->mutex);
  1122. switch (vif->type) {
  1123. case NL80211_IFTYPE_STATION:
  1124. ic_opmode = NL80211_IFTYPE_STATION;
  1125. break;
  1126. case NL80211_IFTYPE_WDS:
  1127. ic_opmode = NL80211_IFTYPE_WDS;
  1128. break;
  1129. case NL80211_IFTYPE_ADHOC:
  1130. case NL80211_IFTYPE_AP:
  1131. case NL80211_IFTYPE_MESH_POINT:
  1132. if (sc->nbcnvifs >= ATH_BCBUF) {
  1133. ret = -ENOBUFS;
  1134. goto out;
  1135. }
  1136. ic_opmode = vif->type;
  1137. break;
  1138. default:
  1139. ath_err(common, "Interface type %d not yet supported\n",
  1140. vif->type);
  1141. ret = -EOPNOTSUPP;
  1142. goto out;
  1143. }
  1144. ath_dbg(common, ATH_DBG_CONFIG,
  1145. "Attach a VIF of type: %d\n", ic_opmode);
  1146. /* Set the VIF opmode */
  1147. avp->av_opmode = ic_opmode;
  1148. avp->av_bslot = -1;
  1149. sc->nvifs++;
  1150. ath9k_set_bssid_mask(hw, vif);
  1151. if (sc->nvifs > 1)
  1152. goto out; /* skip global settings for secondary vif */
  1153. if (ic_opmode == NL80211_IFTYPE_AP) {
  1154. ath9k_hw_set_tsfadjust(ah, 1);
  1155. sc->sc_flags |= SC_OP_TSF_RESET;
  1156. }
  1157. /* Set the device opmode */
  1158. ah->opmode = ic_opmode;
  1159. /*
  1160. * Enable MIB interrupts when there are hardware phy counters.
  1161. * Note we only do this (at the moment) for station mode.
  1162. */
  1163. if ((vif->type == NL80211_IFTYPE_STATION) ||
  1164. (vif->type == NL80211_IFTYPE_ADHOC) ||
  1165. (vif->type == NL80211_IFTYPE_MESH_POINT)) {
  1166. if (ah->config.enable_ani)
  1167. ah->imask |= ATH9K_INT_MIB;
  1168. ah->imask |= ATH9K_INT_TSFOOR;
  1169. }
  1170. ath9k_hw_set_interrupts(ah, ah->imask);
  1171. if (vif->type == NL80211_IFTYPE_AP ||
  1172. vif->type == NL80211_IFTYPE_ADHOC) {
  1173. sc->sc_flags |= SC_OP_ANI_RUN;
  1174. ath_start_ani(common);
  1175. }
  1176. out:
  1177. mutex_unlock(&sc->mutex);
  1178. return ret;
  1179. }
  1180. static void ath9k_reclaim_beacon(struct ath_softc *sc,
  1181. struct ieee80211_vif *vif)
  1182. {
  1183. struct ath_vif *avp = (void *)vif->drv_priv;
  1184. /* Disable SWBA interrupt */
  1185. sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
  1186. ath9k_ps_wakeup(sc);
  1187. ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
  1188. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1189. tasklet_kill(&sc->bcon_tasklet);
  1190. ath9k_ps_restore(sc);
  1191. ath_beacon_return(sc, avp);
  1192. sc->sc_flags &= ~SC_OP_BEACONS;
  1193. if (sc->nbcnvifs > 0) {
  1194. /* Re-enable beaconing */
  1195. sc->sc_ah->imask |= ATH9K_INT_SWBA;
  1196. ath9k_ps_wakeup(sc);
  1197. ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
  1198. ath9k_ps_restore(sc);
  1199. }
  1200. }
  1201. static int ath9k_change_interface(struct ieee80211_hw *hw,
  1202. struct ieee80211_vif *vif,
  1203. enum nl80211_iftype new_type,
  1204. bool p2p)
  1205. {
  1206. struct ath_wiphy *aphy = hw->priv;
  1207. struct ath_softc *sc = aphy->sc;
  1208. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1209. int ret = 0;
  1210. ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
  1211. mutex_lock(&sc->mutex);
  1212. switch (new_type) {
  1213. case NL80211_IFTYPE_AP:
  1214. case NL80211_IFTYPE_ADHOC:
  1215. if (sc->nbcnvifs >= ATH_BCBUF) {
  1216. ath_err(common, "No beacon slot available\n");
  1217. ret = -ENOBUFS;
  1218. goto out;
  1219. }
  1220. break;
  1221. case NL80211_IFTYPE_STATION:
  1222. /* Stop ANI */
  1223. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1224. del_timer_sync(&common->ani.timer);
  1225. if ((vif->type == NL80211_IFTYPE_AP) ||
  1226. (vif->type == NL80211_IFTYPE_ADHOC))
  1227. ath9k_reclaim_beacon(sc, vif);
  1228. break;
  1229. default:
  1230. ath_err(common, "Interface type %d not yet supported\n",
  1231. vif->type);
  1232. ret = -ENOTSUPP;
  1233. goto out;
  1234. }
  1235. vif->type = new_type;
  1236. vif->p2p = p2p;
  1237. out:
  1238. mutex_unlock(&sc->mutex);
  1239. return ret;
  1240. }
  1241. static void ath9k_remove_interface(struct ieee80211_hw *hw,
  1242. struct ieee80211_vif *vif)
  1243. {
  1244. struct ath_wiphy *aphy = hw->priv;
  1245. struct ath_softc *sc = aphy->sc;
  1246. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1247. ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
  1248. mutex_lock(&sc->mutex);
  1249. /* Stop ANI */
  1250. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1251. del_timer_sync(&common->ani.timer);
  1252. /* Reclaim beacon resources */
  1253. if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
  1254. (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
  1255. (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT))
  1256. ath9k_reclaim_beacon(sc, vif);
  1257. sc->nvifs--;
  1258. mutex_unlock(&sc->mutex);
  1259. }
  1260. static void ath9k_enable_ps(struct ath_softc *sc)
  1261. {
  1262. struct ath_hw *ah = sc->sc_ah;
  1263. sc->ps_enabled = true;
  1264. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1265. if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
  1266. ah->imask |= ATH9K_INT_TIM_TIMER;
  1267. ath9k_hw_set_interrupts(ah, ah->imask);
  1268. }
  1269. ath9k_hw_setrxabort(ah, 1);
  1270. }
  1271. }
  1272. static void ath9k_disable_ps(struct ath_softc *sc)
  1273. {
  1274. struct ath_hw *ah = sc->sc_ah;
  1275. sc->ps_enabled = false;
  1276. ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
  1277. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1278. ath9k_hw_setrxabort(ah, 0);
  1279. sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
  1280. PS_WAIT_FOR_CAB |
  1281. PS_WAIT_FOR_PSPOLL_DATA |
  1282. PS_WAIT_FOR_TX_ACK);
  1283. if (ah->imask & ATH9K_INT_TIM_TIMER) {
  1284. ah->imask &= ~ATH9K_INT_TIM_TIMER;
  1285. ath9k_hw_set_interrupts(ah, ah->imask);
  1286. }
  1287. }
  1288. }
  1289. static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
  1290. {
  1291. struct ath_wiphy *aphy = hw->priv;
  1292. struct ath_softc *sc = aphy->sc;
  1293. struct ath_hw *ah = sc->sc_ah;
  1294. struct ath_common *common = ath9k_hw_common(ah);
  1295. struct ieee80211_conf *conf = &hw->conf;
  1296. bool disable_radio;
  1297. mutex_lock(&sc->mutex);
  1298. /*
  1299. * Leave this as the first check because we need to turn on the
  1300. * radio if it was disabled before prior to processing the rest
  1301. * of the changes. Likewise we must only disable the radio towards
  1302. * the end.
  1303. */
  1304. if (changed & IEEE80211_CONF_CHANGE_IDLE) {
  1305. bool enable_radio;
  1306. bool all_wiphys_idle;
  1307. bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
  1308. spin_lock_bh(&sc->wiphy_lock);
  1309. all_wiphys_idle = ath9k_all_wiphys_idle(sc);
  1310. ath9k_set_wiphy_idle(aphy, idle);
  1311. enable_radio = (!idle && all_wiphys_idle);
  1312. /*
  1313. * After we unlock here its possible another wiphy
  1314. * can be re-renabled so to account for that we will
  1315. * only disable the radio toward the end of this routine
  1316. * if by then all wiphys are still idle.
  1317. */
  1318. spin_unlock_bh(&sc->wiphy_lock);
  1319. if (enable_radio) {
  1320. sc->ps_idle = false;
  1321. ath_radio_enable(sc, hw);
  1322. ath_dbg(common, ATH_DBG_CONFIG,
  1323. "not-idle: enabling radio\n");
  1324. }
  1325. }
  1326. /*
  1327. * We just prepare to enable PS. We have to wait until our AP has
  1328. * ACK'd our null data frame to disable RX otherwise we'll ignore
  1329. * those ACKs and end up retransmitting the same null data frames.
  1330. * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
  1331. */
  1332. if (changed & IEEE80211_CONF_CHANGE_PS) {
  1333. unsigned long flags;
  1334. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  1335. if (conf->flags & IEEE80211_CONF_PS)
  1336. ath9k_enable_ps(sc);
  1337. else
  1338. ath9k_disable_ps(sc);
  1339. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  1340. }
  1341. if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
  1342. if (conf->flags & IEEE80211_CONF_MONITOR) {
  1343. ath_dbg(common, ATH_DBG_CONFIG,
  1344. "Monitor mode is enabled\n");
  1345. sc->sc_ah->is_monitoring = true;
  1346. } else {
  1347. ath_dbg(common, ATH_DBG_CONFIG,
  1348. "Monitor mode is disabled\n");
  1349. sc->sc_ah->is_monitoring = false;
  1350. }
  1351. }
  1352. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  1353. struct ieee80211_channel *curchan = hw->conf.channel;
  1354. int pos = curchan->hw_value;
  1355. int old_pos = -1;
  1356. unsigned long flags;
  1357. if (ah->curchan)
  1358. old_pos = ah->curchan - &ah->channels[0];
  1359. aphy->chan_idx = pos;
  1360. aphy->chan_is_ht = conf_is_ht(conf);
  1361. if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
  1362. sc->sc_flags |= SC_OP_OFFCHANNEL;
  1363. else
  1364. sc->sc_flags &= ~SC_OP_OFFCHANNEL;
  1365. if (aphy->state == ATH_WIPHY_SCAN ||
  1366. aphy->state == ATH_WIPHY_ACTIVE)
  1367. ath9k_wiphy_pause_all_forced(sc, aphy);
  1368. else {
  1369. /*
  1370. * Do not change operational channel based on a paused
  1371. * wiphy changes.
  1372. */
  1373. goto skip_chan_change;
  1374. }
  1375. ath_dbg(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
  1376. curchan->center_freq);
  1377. /* XXX: remove me eventualy */
  1378. ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
  1379. /* update survey stats for the old channel before switching */
  1380. spin_lock_irqsave(&common->cc_lock, flags);
  1381. ath_update_survey_stats(sc);
  1382. spin_unlock_irqrestore(&common->cc_lock, flags);
  1383. /*
  1384. * If the operating channel changes, change the survey in-use flags
  1385. * along with it.
  1386. * Reset the survey data for the new channel, unless we're switching
  1387. * back to the operating channel from an off-channel operation.
  1388. */
  1389. if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
  1390. sc->cur_survey != &sc->survey[pos]) {
  1391. if (sc->cur_survey)
  1392. sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
  1393. sc->cur_survey = &sc->survey[pos];
  1394. memset(sc->cur_survey, 0, sizeof(struct survey_info));
  1395. sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
  1396. } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
  1397. memset(&sc->survey[pos], 0, sizeof(struct survey_info));
  1398. }
  1399. if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
  1400. ath_err(common, "Unable to set channel\n");
  1401. mutex_unlock(&sc->mutex);
  1402. return -EINVAL;
  1403. }
  1404. /*
  1405. * The most recent snapshot of channel->noisefloor for the old
  1406. * channel is only available after the hardware reset. Copy it to
  1407. * the survey stats now.
  1408. */
  1409. if (old_pos >= 0)
  1410. ath_update_survey_nf(sc, old_pos);
  1411. }
  1412. skip_chan_change:
  1413. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1414. sc->config.txpowlimit = 2 * conf->power_level;
  1415. ath9k_ps_wakeup(sc);
  1416. ath_update_txpow(sc);
  1417. ath9k_ps_restore(sc);
  1418. }
  1419. spin_lock_bh(&sc->wiphy_lock);
  1420. disable_radio = ath9k_all_wiphys_idle(sc);
  1421. spin_unlock_bh(&sc->wiphy_lock);
  1422. if (disable_radio) {
  1423. ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
  1424. sc->ps_idle = true;
  1425. ath_radio_disable(sc, hw);
  1426. }
  1427. mutex_unlock(&sc->mutex);
  1428. return 0;
  1429. }
  1430. #define SUPPORTED_FILTERS \
  1431. (FIF_PROMISC_IN_BSS | \
  1432. FIF_ALLMULTI | \
  1433. FIF_CONTROL | \
  1434. FIF_PSPOLL | \
  1435. FIF_OTHER_BSS | \
  1436. FIF_BCN_PRBRESP_PROMISC | \
  1437. FIF_PROBE_REQ | \
  1438. FIF_FCSFAIL)
  1439. /* FIXME: sc->sc_full_reset ? */
  1440. static void ath9k_configure_filter(struct ieee80211_hw *hw,
  1441. unsigned int changed_flags,
  1442. unsigned int *total_flags,
  1443. u64 multicast)
  1444. {
  1445. struct ath_wiphy *aphy = hw->priv;
  1446. struct ath_softc *sc = aphy->sc;
  1447. u32 rfilt;
  1448. changed_flags &= SUPPORTED_FILTERS;
  1449. *total_flags &= SUPPORTED_FILTERS;
  1450. sc->rx.rxfilter = *total_flags;
  1451. ath9k_ps_wakeup(sc);
  1452. rfilt = ath_calcrxfilter(sc);
  1453. ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
  1454. ath9k_ps_restore(sc);
  1455. ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
  1456. "Set HW RX filter: 0x%x\n", rfilt);
  1457. }
  1458. static int ath9k_sta_add(struct ieee80211_hw *hw,
  1459. struct ieee80211_vif *vif,
  1460. struct ieee80211_sta *sta)
  1461. {
  1462. struct ath_wiphy *aphy = hw->priv;
  1463. struct ath_softc *sc = aphy->sc;
  1464. ath_node_attach(sc, sta);
  1465. return 0;
  1466. }
  1467. static int ath9k_sta_remove(struct ieee80211_hw *hw,
  1468. struct ieee80211_vif *vif,
  1469. struct ieee80211_sta *sta)
  1470. {
  1471. struct ath_wiphy *aphy = hw->priv;
  1472. struct ath_softc *sc = aphy->sc;
  1473. ath_node_detach(sc, sta);
  1474. return 0;
  1475. }
  1476. static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1477. const struct ieee80211_tx_queue_params *params)
  1478. {
  1479. struct ath_wiphy *aphy = hw->priv;
  1480. struct ath_softc *sc = aphy->sc;
  1481. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1482. struct ath_txq *txq;
  1483. struct ath9k_tx_queue_info qi;
  1484. int ret = 0;
  1485. if (queue >= WME_NUM_AC)
  1486. return 0;
  1487. txq = sc->tx.txq_map[queue];
  1488. mutex_lock(&sc->mutex);
  1489. memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
  1490. qi.tqi_aifs = params->aifs;
  1491. qi.tqi_cwmin = params->cw_min;
  1492. qi.tqi_cwmax = params->cw_max;
  1493. qi.tqi_burstTime = params->txop;
  1494. ath_dbg(common, ATH_DBG_CONFIG,
  1495. "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
  1496. queue, txq->axq_qnum, params->aifs, params->cw_min,
  1497. params->cw_max, params->txop);
  1498. ret = ath_txq_update(sc, txq->axq_qnum, &qi);
  1499. if (ret)
  1500. ath_err(common, "TXQ Update failed\n");
  1501. if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
  1502. if (queue == WME_AC_BE && !ret)
  1503. ath_beaconq_config(sc);
  1504. mutex_unlock(&sc->mutex);
  1505. return ret;
  1506. }
  1507. static int ath9k_set_key(struct ieee80211_hw *hw,
  1508. enum set_key_cmd cmd,
  1509. struct ieee80211_vif *vif,
  1510. struct ieee80211_sta *sta,
  1511. struct ieee80211_key_conf *key)
  1512. {
  1513. struct ath_wiphy *aphy = hw->priv;
  1514. struct ath_softc *sc = aphy->sc;
  1515. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1516. int ret = 0;
  1517. if (ath9k_modparam_nohwcrypt)
  1518. return -ENOSPC;
  1519. mutex_lock(&sc->mutex);
  1520. ath9k_ps_wakeup(sc);
  1521. ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
  1522. switch (cmd) {
  1523. case SET_KEY:
  1524. ret = ath_key_config(common, vif, sta, key);
  1525. if (ret >= 0) {
  1526. key->hw_key_idx = ret;
  1527. /* push IV and Michael MIC generation to stack */
  1528. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1529. if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
  1530. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  1531. if (sc->sc_ah->sw_mgmt_crypto &&
  1532. key->cipher == WLAN_CIPHER_SUITE_CCMP)
  1533. key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
  1534. ret = 0;
  1535. }
  1536. break;
  1537. case DISABLE_KEY:
  1538. ath_key_delete(common, key);
  1539. break;
  1540. default:
  1541. ret = -EINVAL;
  1542. }
  1543. ath9k_ps_restore(sc);
  1544. mutex_unlock(&sc->mutex);
  1545. return ret;
  1546. }
  1547. static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
  1548. struct ieee80211_vif *vif,
  1549. struct ieee80211_bss_conf *bss_conf,
  1550. u32 changed)
  1551. {
  1552. struct ath_wiphy *aphy = hw->priv;
  1553. struct ath_softc *sc = aphy->sc;
  1554. struct ath_hw *ah = sc->sc_ah;
  1555. struct ath_common *common = ath9k_hw_common(ah);
  1556. struct ath_vif *avp = (void *)vif->drv_priv;
  1557. int slottime;
  1558. int error;
  1559. mutex_lock(&sc->mutex);
  1560. if (changed & BSS_CHANGED_BSSID) {
  1561. /* Set BSSID */
  1562. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1563. memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
  1564. common->curaid = 0;
  1565. ath9k_hw_write_associd(ah);
  1566. /* Set aggregation protection mode parameters */
  1567. sc->config.ath_aggr_prot = 0;
  1568. ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
  1569. common->curbssid, common->curaid);
  1570. /* need to reconfigure the beacon */
  1571. sc->sc_flags &= ~SC_OP_BEACONS ;
  1572. }
  1573. /* Enable transmission of beacons (AP, IBSS, MESH) */
  1574. if ((changed & BSS_CHANGED_BEACON) ||
  1575. ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
  1576. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1577. error = ath_beacon_alloc(aphy, vif);
  1578. if (!error)
  1579. ath_beacon_config(sc, vif);
  1580. }
  1581. if (changed & BSS_CHANGED_ERP_SLOT) {
  1582. if (bss_conf->use_short_slot)
  1583. slottime = 9;
  1584. else
  1585. slottime = 20;
  1586. if (vif->type == NL80211_IFTYPE_AP) {
  1587. /*
  1588. * Defer update, so that connected stations can adjust
  1589. * their settings at the same time.
  1590. * See beacon.c for more details
  1591. */
  1592. sc->beacon.slottime = slottime;
  1593. sc->beacon.updateslot = UPDATE;
  1594. } else {
  1595. ah->slottime = slottime;
  1596. ath9k_hw_init_global_settings(ah);
  1597. }
  1598. }
  1599. /* Disable transmission of beacons */
  1600. if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
  1601. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1602. if (changed & BSS_CHANGED_BEACON_INT) {
  1603. sc->beacon_interval = bss_conf->beacon_int;
  1604. /*
  1605. * In case of AP mode, the HW TSF has to be reset
  1606. * when the beacon interval changes.
  1607. */
  1608. if (vif->type == NL80211_IFTYPE_AP) {
  1609. sc->sc_flags |= SC_OP_TSF_RESET;
  1610. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1611. error = ath_beacon_alloc(aphy, vif);
  1612. if (!error)
  1613. ath_beacon_config(sc, vif);
  1614. } else {
  1615. ath_beacon_config(sc, vif);
  1616. }
  1617. }
  1618. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  1619. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
  1620. bss_conf->use_short_preamble);
  1621. if (bss_conf->use_short_preamble)
  1622. sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
  1623. else
  1624. sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
  1625. }
  1626. if (changed & BSS_CHANGED_ERP_CTS_PROT) {
  1627. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
  1628. bss_conf->use_cts_prot);
  1629. if (bss_conf->use_cts_prot &&
  1630. hw->conf.channel->band != IEEE80211_BAND_5GHZ)
  1631. sc->sc_flags |= SC_OP_PROTECT_ENABLE;
  1632. else
  1633. sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
  1634. }
  1635. if (changed & BSS_CHANGED_ASSOC) {
  1636. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
  1637. bss_conf->assoc);
  1638. ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
  1639. }
  1640. mutex_unlock(&sc->mutex);
  1641. }
  1642. static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
  1643. {
  1644. u64 tsf;
  1645. struct ath_wiphy *aphy = hw->priv;
  1646. struct ath_softc *sc = aphy->sc;
  1647. mutex_lock(&sc->mutex);
  1648. ath9k_ps_wakeup(sc);
  1649. tsf = ath9k_hw_gettsf64(sc->sc_ah);
  1650. ath9k_ps_restore(sc);
  1651. mutex_unlock(&sc->mutex);
  1652. return tsf;
  1653. }
  1654. static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
  1655. {
  1656. struct ath_wiphy *aphy = hw->priv;
  1657. struct ath_softc *sc = aphy->sc;
  1658. mutex_lock(&sc->mutex);
  1659. ath9k_ps_wakeup(sc);
  1660. ath9k_hw_settsf64(sc->sc_ah, tsf);
  1661. ath9k_ps_restore(sc);
  1662. mutex_unlock(&sc->mutex);
  1663. }
  1664. static void ath9k_reset_tsf(struct ieee80211_hw *hw)
  1665. {
  1666. struct ath_wiphy *aphy = hw->priv;
  1667. struct ath_softc *sc = aphy->sc;
  1668. mutex_lock(&sc->mutex);
  1669. ath9k_ps_wakeup(sc);
  1670. ath9k_hw_reset_tsf(sc->sc_ah);
  1671. ath9k_ps_restore(sc);
  1672. mutex_unlock(&sc->mutex);
  1673. }
  1674. static int ath9k_ampdu_action(struct ieee80211_hw *hw,
  1675. struct ieee80211_vif *vif,
  1676. enum ieee80211_ampdu_mlme_action action,
  1677. struct ieee80211_sta *sta,
  1678. u16 tid, u16 *ssn)
  1679. {
  1680. struct ath_wiphy *aphy = hw->priv;
  1681. struct ath_softc *sc = aphy->sc;
  1682. int ret = 0;
  1683. local_bh_disable();
  1684. switch (action) {
  1685. case IEEE80211_AMPDU_RX_START:
  1686. if (!(sc->sc_flags & SC_OP_RXAGGR))
  1687. ret = -ENOTSUPP;
  1688. break;
  1689. case IEEE80211_AMPDU_RX_STOP:
  1690. break;
  1691. case IEEE80211_AMPDU_TX_START:
  1692. if (!(sc->sc_flags & SC_OP_TXAGGR))
  1693. return -EOPNOTSUPP;
  1694. ath9k_ps_wakeup(sc);
  1695. ret = ath_tx_aggr_start(sc, sta, tid, ssn);
  1696. if (!ret)
  1697. ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1698. ath9k_ps_restore(sc);
  1699. break;
  1700. case IEEE80211_AMPDU_TX_STOP:
  1701. ath9k_ps_wakeup(sc);
  1702. ath_tx_aggr_stop(sc, sta, tid);
  1703. ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1704. ath9k_ps_restore(sc);
  1705. break;
  1706. case IEEE80211_AMPDU_TX_OPERATIONAL:
  1707. ath9k_ps_wakeup(sc);
  1708. ath_tx_aggr_resume(sc, sta, tid);
  1709. ath9k_ps_restore(sc);
  1710. break;
  1711. default:
  1712. ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
  1713. }
  1714. local_bh_enable();
  1715. return ret;
  1716. }
  1717. static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
  1718. struct survey_info *survey)
  1719. {
  1720. struct ath_wiphy *aphy = hw->priv;
  1721. struct ath_softc *sc = aphy->sc;
  1722. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1723. struct ieee80211_supported_band *sband;
  1724. struct ieee80211_channel *chan;
  1725. unsigned long flags;
  1726. int pos;
  1727. spin_lock_irqsave(&common->cc_lock, flags);
  1728. if (idx == 0)
  1729. ath_update_survey_stats(sc);
  1730. sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
  1731. if (sband && idx >= sband->n_channels) {
  1732. idx -= sband->n_channels;
  1733. sband = NULL;
  1734. }
  1735. if (!sband)
  1736. sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
  1737. if (!sband || idx >= sband->n_channels) {
  1738. spin_unlock_irqrestore(&common->cc_lock, flags);
  1739. return -ENOENT;
  1740. }
  1741. chan = &sband->channels[idx];
  1742. pos = chan->hw_value;
  1743. memcpy(survey, &sc->survey[pos], sizeof(*survey));
  1744. survey->channel = chan;
  1745. spin_unlock_irqrestore(&common->cc_lock, flags);
  1746. return 0;
  1747. }
  1748. static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
  1749. {
  1750. struct ath_wiphy *aphy = hw->priv;
  1751. struct ath_softc *sc = aphy->sc;
  1752. mutex_lock(&sc->mutex);
  1753. if (ath9k_wiphy_scanning(sc)) {
  1754. /*
  1755. * There is a race here in mac80211 but fixing it requires
  1756. * we revisit how we handle the scan complete callback.
  1757. * After mac80211 fixes we will not have configured hardware
  1758. * to the home channel nor would we have configured the RX
  1759. * filter yet.
  1760. */
  1761. mutex_unlock(&sc->mutex);
  1762. return;
  1763. }
  1764. aphy->state = ATH_WIPHY_SCAN;
  1765. ath9k_wiphy_pause_all_forced(sc, aphy);
  1766. mutex_unlock(&sc->mutex);
  1767. }
  1768. /*
  1769. * XXX: this requires a revisit after the driver
  1770. * scan_complete gets moved to another place/removed in mac80211.
  1771. */
  1772. static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
  1773. {
  1774. struct ath_wiphy *aphy = hw->priv;
  1775. struct ath_softc *sc = aphy->sc;
  1776. mutex_lock(&sc->mutex);
  1777. aphy->state = ATH_WIPHY_ACTIVE;
  1778. mutex_unlock(&sc->mutex);
  1779. }
  1780. static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
  1781. {
  1782. struct ath_wiphy *aphy = hw->priv;
  1783. struct ath_softc *sc = aphy->sc;
  1784. struct ath_hw *ah = sc->sc_ah;
  1785. mutex_lock(&sc->mutex);
  1786. ah->coverage_class = coverage_class;
  1787. ath9k_hw_init_global_settings(ah);
  1788. mutex_unlock(&sc->mutex);
  1789. }
  1790. struct ieee80211_ops ath9k_ops = {
  1791. .tx = ath9k_tx,
  1792. .start = ath9k_start,
  1793. .stop = ath9k_stop,
  1794. .add_interface = ath9k_add_interface,
  1795. .change_interface = ath9k_change_interface,
  1796. .remove_interface = ath9k_remove_interface,
  1797. .config = ath9k_config,
  1798. .configure_filter = ath9k_configure_filter,
  1799. .sta_add = ath9k_sta_add,
  1800. .sta_remove = ath9k_sta_remove,
  1801. .conf_tx = ath9k_conf_tx,
  1802. .bss_info_changed = ath9k_bss_info_changed,
  1803. .set_key = ath9k_set_key,
  1804. .get_tsf = ath9k_get_tsf,
  1805. .set_tsf = ath9k_set_tsf,
  1806. .reset_tsf = ath9k_reset_tsf,
  1807. .ampdu_action = ath9k_ampdu_action,
  1808. .get_survey = ath9k_get_survey,
  1809. .sw_scan_start = ath9k_sw_scan_start,
  1810. .sw_scan_complete = ath9k_sw_scan_complete,
  1811. .rfkill_poll = ath9k_rfkill_poll_state,
  1812. .set_coverage_class = ath9k_set_coverage_class,
  1813. };