intel_lvds.c 32 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. */
  29. #include <acpi/button.h>
  30. #include <linux/dmi.h>
  31. #include <linux/i2c.h>
  32. #include <linux/slab.h>
  33. #include <drm/drmP.h>
  34. #include <drm/drm_crtc.h>
  35. #include <drm/drm_edid.h>
  36. #include "intel_drv.h"
  37. #include <drm/i915_drm.h>
  38. #include "i915_drv.h"
  39. #include <linux/acpi.h>
  40. /* Private structure for the integrated LVDS support */
  41. struct intel_lvds_connector {
  42. struct intel_connector base;
  43. struct notifier_block lid_notifier;
  44. };
  45. struct intel_lvds_encoder {
  46. struct intel_encoder base;
  47. bool is_dual_link;
  48. u32 reg;
  49. struct intel_lvds_connector *attached_connector;
  50. };
  51. static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  52. {
  53. return container_of(encoder, struct intel_lvds_encoder, base.base);
  54. }
  55. static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  56. {
  57. return container_of(connector, struct intel_lvds_connector, base.base);
  58. }
  59. static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  60. enum pipe *pipe)
  61. {
  62. struct drm_device *dev = encoder->base.dev;
  63. struct drm_i915_private *dev_priv = dev->dev_private;
  64. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  65. u32 tmp;
  66. tmp = I915_READ(lvds_encoder->reg);
  67. if (!(tmp & LVDS_PORT_EN))
  68. return false;
  69. if (HAS_PCH_CPT(dev))
  70. *pipe = PORT_TO_PIPE_CPT(tmp);
  71. else
  72. *pipe = PORT_TO_PIPE(tmp);
  73. return true;
  74. }
  75. static void intel_lvds_get_config(struct intel_encoder *encoder,
  76. struct intel_crtc_config *pipe_config)
  77. {
  78. struct drm_device *dev = encoder->base.dev;
  79. struct drm_i915_private *dev_priv = dev->dev_private;
  80. u32 lvds_reg, tmp, flags = 0;
  81. if (HAS_PCH_SPLIT(dev))
  82. lvds_reg = PCH_LVDS;
  83. else
  84. lvds_reg = LVDS;
  85. tmp = I915_READ(lvds_reg);
  86. if (tmp & LVDS_HSYNC_POLARITY)
  87. flags |= DRM_MODE_FLAG_NHSYNC;
  88. else
  89. flags |= DRM_MODE_FLAG_PHSYNC;
  90. if (tmp & LVDS_VSYNC_POLARITY)
  91. flags |= DRM_MODE_FLAG_NVSYNC;
  92. else
  93. flags |= DRM_MODE_FLAG_PVSYNC;
  94. pipe_config->adjusted_mode.flags |= flags;
  95. }
  96. /* The LVDS pin pair needs to be on before the DPLLs are enabled.
  97. * This is an exception to the general rule that mode_set doesn't turn
  98. * things on.
  99. */
  100. static void intel_pre_enable_lvds(struct intel_encoder *encoder)
  101. {
  102. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  103. struct drm_device *dev = encoder->base.dev;
  104. struct drm_i915_private *dev_priv = dev->dev_private;
  105. struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
  106. struct drm_display_mode *fixed_mode =
  107. lvds_encoder->attached_connector->base.panel.fixed_mode;
  108. int pipe = crtc->pipe;
  109. u32 temp;
  110. if (HAS_PCH_SPLIT(dev)) {
  111. assert_fdi_rx_pll_disabled(dev_priv, pipe);
  112. assert_shared_dpll_disabled(dev_priv,
  113. intel_crtc_to_shared_dpll(crtc));
  114. } else {
  115. assert_pll_disabled(dev_priv, pipe);
  116. }
  117. temp = I915_READ(lvds_encoder->reg);
  118. temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
  119. if (HAS_PCH_CPT(dev)) {
  120. temp &= ~PORT_TRANS_SEL_MASK;
  121. temp |= PORT_TRANS_SEL_CPT(pipe);
  122. } else {
  123. if (pipe == 1) {
  124. temp |= LVDS_PIPEB_SELECT;
  125. } else {
  126. temp &= ~LVDS_PIPEB_SELECT;
  127. }
  128. }
  129. /* set the corresponsding LVDS_BORDER bit */
  130. temp &= ~LVDS_BORDER_ENABLE;
  131. temp |= crtc->config.gmch_pfit.lvds_border_bits;
  132. /* Set the B0-B3 data pairs corresponding to whether we're going to
  133. * set the DPLLs for dual-channel mode or not.
  134. */
  135. if (lvds_encoder->is_dual_link)
  136. temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
  137. else
  138. temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
  139. /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
  140. * appropriately here, but we need to look more thoroughly into how
  141. * panels behave in the two modes.
  142. */
  143. /* Set the dithering flag on LVDS as needed, note that there is no
  144. * special lvds dither control bit on pch-split platforms, dithering is
  145. * only controlled through the PIPECONF reg. */
  146. if (INTEL_INFO(dev)->gen == 4) {
  147. /* Bspec wording suggests that LVDS port dithering only exists
  148. * for 18bpp panels. */
  149. if (crtc->config.dither && crtc->config.pipe_bpp == 18)
  150. temp |= LVDS_ENABLE_DITHER;
  151. else
  152. temp &= ~LVDS_ENABLE_DITHER;
  153. }
  154. temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
  155. if (fixed_mode->flags & DRM_MODE_FLAG_NHSYNC)
  156. temp |= LVDS_HSYNC_POLARITY;
  157. if (fixed_mode->flags & DRM_MODE_FLAG_NVSYNC)
  158. temp |= LVDS_VSYNC_POLARITY;
  159. I915_WRITE(lvds_encoder->reg, temp);
  160. }
  161. /**
  162. * Sets the power state for the panel.
  163. */
  164. static void intel_enable_lvds(struct intel_encoder *encoder)
  165. {
  166. struct drm_device *dev = encoder->base.dev;
  167. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  168. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  169. struct drm_i915_private *dev_priv = dev->dev_private;
  170. u32 ctl_reg, stat_reg;
  171. if (HAS_PCH_SPLIT(dev)) {
  172. ctl_reg = PCH_PP_CONTROL;
  173. stat_reg = PCH_PP_STATUS;
  174. } else {
  175. ctl_reg = PP_CONTROL;
  176. stat_reg = PP_STATUS;
  177. }
  178. I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
  179. I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
  180. POSTING_READ(lvds_encoder->reg);
  181. if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
  182. DRM_ERROR("timed out waiting for panel to power on\n");
  183. intel_panel_enable_backlight(dev, intel_crtc->pipe);
  184. }
  185. static void intel_disable_lvds(struct intel_encoder *encoder)
  186. {
  187. struct drm_device *dev = encoder->base.dev;
  188. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  189. struct drm_i915_private *dev_priv = dev->dev_private;
  190. u32 ctl_reg, stat_reg;
  191. if (HAS_PCH_SPLIT(dev)) {
  192. ctl_reg = PCH_PP_CONTROL;
  193. stat_reg = PCH_PP_STATUS;
  194. } else {
  195. ctl_reg = PP_CONTROL;
  196. stat_reg = PP_STATUS;
  197. }
  198. intel_panel_disable_backlight(dev);
  199. I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
  200. if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
  201. DRM_ERROR("timed out waiting for panel to power off\n");
  202. I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
  203. POSTING_READ(lvds_encoder->reg);
  204. }
  205. static int intel_lvds_mode_valid(struct drm_connector *connector,
  206. struct drm_display_mode *mode)
  207. {
  208. struct intel_connector *intel_connector = to_intel_connector(connector);
  209. struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
  210. if (mode->hdisplay > fixed_mode->hdisplay)
  211. return MODE_PANEL;
  212. if (mode->vdisplay > fixed_mode->vdisplay)
  213. return MODE_PANEL;
  214. return MODE_OK;
  215. }
  216. static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
  217. struct intel_crtc_config *pipe_config)
  218. {
  219. struct drm_device *dev = intel_encoder->base.dev;
  220. struct drm_i915_private *dev_priv = dev->dev_private;
  221. struct intel_lvds_encoder *lvds_encoder =
  222. to_lvds_encoder(&intel_encoder->base);
  223. struct intel_connector *intel_connector =
  224. &lvds_encoder->attached_connector->base;
  225. struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
  226. struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
  227. unsigned int lvds_bpp;
  228. /* Should never happen!! */
  229. if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
  230. DRM_ERROR("Can't support LVDS on pipe A\n");
  231. return false;
  232. }
  233. if ((I915_READ(lvds_encoder->reg) & LVDS_A3_POWER_MASK) ==
  234. LVDS_A3_POWER_UP)
  235. lvds_bpp = 8*3;
  236. else
  237. lvds_bpp = 6*3;
  238. if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
  239. DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
  240. pipe_config->pipe_bpp, lvds_bpp);
  241. pipe_config->pipe_bpp = lvds_bpp;
  242. }
  243. /*
  244. * We have timings from the BIOS for the panel, put them in
  245. * to the adjusted mode. The CRTC will be set up for this mode,
  246. * with the panel scaling set up to source from the H/VDisplay
  247. * of the original mode.
  248. */
  249. intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
  250. adjusted_mode);
  251. if (HAS_PCH_SPLIT(dev)) {
  252. pipe_config->has_pch_encoder = true;
  253. intel_pch_panel_fitting(intel_crtc, pipe_config,
  254. intel_connector->panel.fitting_mode);
  255. return true;
  256. } else {
  257. intel_gmch_panel_fitting(intel_crtc, pipe_config,
  258. intel_connector->panel.fitting_mode);
  259. }
  260. drm_mode_set_crtcinfo(adjusted_mode, 0);
  261. pipe_config->timings_set = true;
  262. /*
  263. * XXX: It would be nice to support lower refresh rates on the
  264. * panels to reduce power consumption, and perhaps match the
  265. * user's requested refresh rate.
  266. */
  267. return true;
  268. }
  269. static void intel_lvds_mode_set(struct drm_encoder *encoder,
  270. struct drm_display_mode *mode,
  271. struct drm_display_mode *adjusted_mode)
  272. {
  273. /*
  274. * The LVDS pin pair will already have been turned on in the
  275. * intel_crtc_mode_set since it has a large impact on the DPLL
  276. * settings.
  277. */
  278. }
  279. /**
  280. * Detect the LVDS connection.
  281. *
  282. * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
  283. * connected and closed means disconnected. We also send hotplug events as
  284. * needed, using lid status notification from the input layer.
  285. */
  286. static enum drm_connector_status
  287. intel_lvds_detect(struct drm_connector *connector, bool force)
  288. {
  289. struct drm_device *dev = connector->dev;
  290. enum drm_connector_status status;
  291. status = intel_panel_detect(dev);
  292. if (status != connector_status_unknown)
  293. return status;
  294. return connector_status_connected;
  295. }
  296. /**
  297. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  298. */
  299. static int intel_lvds_get_modes(struct drm_connector *connector)
  300. {
  301. struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
  302. struct drm_device *dev = connector->dev;
  303. struct drm_display_mode *mode;
  304. /* use cached edid if we have one */
  305. if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  306. return drm_add_edid_modes(connector, lvds_connector->base.edid);
  307. mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
  308. if (mode == NULL)
  309. return 0;
  310. drm_mode_probed_add(connector, mode);
  311. return 1;
  312. }
  313. static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
  314. {
  315. DRM_INFO("Skipping forced modeset for %s\n", id->ident);
  316. return 1;
  317. }
  318. /* The GPU hangs up on these systems if modeset is performed on LID open */
  319. static const struct dmi_system_id intel_no_modeset_on_lid[] = {
  320. {
  321. .callback = intel_no_modeset_on_lid_dmi_callback,
  322. .ident = "Toshiba Tecra A11",
  323. .matches = {
  324. DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  325. DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
  326. },
  327. },
  328. { } /* terminating entry */
  329. };
  330. /*
  331. * Lid events. Note the use of 'modeset':
  332. * - we set it to MODESET_ON_LID_OPEN on lid close,
  333. * and set it to MODESET_DONE on open
  334. * - we use it as a "only once" bit (ie we ignore
  335. * duplicate events where it was already properly set)
  336. * - the suspend/resume paths will set it to
  337. * MODESET_SUSPENDED and ignore the lid open event,
  338. * because they restore the mode ("lid open").
  339. */
  340. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  341. void *unused)
  342. {
  343. struct intel_lvds_connector *lvds_connector =
  344. container_of(nb, struct intel_lvds_connector, lid_notifier);
  345. struct drm_connector *connector = &lvds_connector->base.base;
  346. struct drm_device *dev = connector->dev;
  347. struct drm_i915_private *dev_priv = dev->dev_private;
  348. if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
  349. return NOTIFY_OK;
  350. mutex_lock(&dev_priv->modeset_restore_lock);
  351. if (dev_priv->modeset_restore == MODESET_SUSPENDED)
  352. goto exit;
  353. /*
  354. * check and update the status of LVDS connector after receiving
  355. * the LID nofication event.
  356. */
  357. connector->status = connector->funcs->detect(connector, false);
  358. /* Don't force modeset on machines where it causes a GPU lockup */
  359. if (dmi_check_system(intel_no_modeset_on_lid))
  360. goto exit;
  361. if (!acpi_lid_open()) {
  362. /* do modeset on next lid open event */
  363. dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
  364. goto exit;
  365. }
  366. if (dev_priv->modeset_restore == MODESET_DONE)
  367. goto exit;
  368. drm_modeset_lock_all(dev);
  369. intel_modeset_setup_hw_state(dev, true);
  370. drm_modeset_unlock_all(dev);
  371. dev_priv->modeset_restore = MODESET_DONE;
  372. exit:
  373. mutex_unlock(&dev_priv->modeset_restore_lock);
  374. return NOTIFY_OK;
  375. }
  376. /**
  377. * intel_lvds_destroy - unregister and free LVDS structures
  378. * @connector: connector to free
  379. *
  380. * Unregister the DDC bus for this connector then free the driver private
  381. * structure.
  382. */
  383. static void intel_lvds_destroy(struct drm_connector *connector)
  384. {
  385. struct intel_lvds_connector *lvds_connector =
  386. to_lvds_connector(connector);
  387. if (lvds_connector->lid_notifier.notifier_call)
  388. acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
  389. if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  390. kfree(lvds_connector->base.edid);
  391. intel_panel_fini(&lvds_connector->base.panel);
  392. drm_sysfs_connector_remove(connector);
  393. drm_connector_cleanup(connector);
  394. kfree(connector);
  395. }
  396. static int intel_lvds_set_property(struct drm_connector *connector,
  397. struct drm_property *property,
  398. uint64_t value)
  399. {
  400. struct intel_connector *intel_connector = to_intel_connector(connector);
  401. struct drm_device *dev = connector->dev;
  402. if (property == dev->mode_config.scaling_mode_property) {
  403. struct drm_crtc *crtc;
  404. if (value == DRM_MODE_SCALE_NONE) {
  405. DRM_DEBUG_KMS("no scaling not supported\n");
  406. return -EINVAL;
  407. }
  408. if (intel_connector->panel.fitting_mode == value) {
  409. /* the LVDS scaling property is not changed */
  410. return 0;
  411. }
  412. intel_connector->panel.fitting_mode = value;
  413. crtc = intel_attached_encoder(connector)->base.crtc;
  414. if (crtc && crtc->enabled) {
  415. /*
  416. * If the CRTC is enabled, the display will be changed
  417. * according to the new panel fitting mode.
  418. */
  419. intel_crtc_restore_mode(crtc);
  420. }
  421. }
  422. return 0;
  423. }
  424. static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
  425. .mode_set = intel_lvds_mode_set,
  426. };
  427. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  428. .get_modes = intel_lvds_get_modes,
  429. .mode_valid = intel_lvds_mode_valid,
  430. .best_encoder = intel_best_encoder,
  431. };
  432. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  433. .dpms = intel_connector_dpms,
  434. .detect = intel_lvds_detect,
  435. .fill_modes = drm_helper_probe_single_connector_modes,
  436. .set_property = intel_lvds_set_property,
  437. .destroy = intel_lvds_destroy,
  438. };
  439. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  440. .destroy = intel_encoder_destroy,
  441. };
  442. static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  443. {
  444. DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
  445. return 1;
  446. }
  447. /* These systems claim to have LVDS, but really don't */
  448. static const struct dmi_system_id intel_no_lvds[] = {
  449. {
  450. .callback = intel_no_lvds_dmi_callback,
  451. .ident = "Apple Mac Mini (Core series)",
  452. .matches = {
  453. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  454. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  455. },
  456. },
  457. {
  458. .callback = intel_no_lvds_dmi_callback,
  459. .ident = "Apple Mac Mini (Core 2 series)",
  460. .matches = {
  461. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  462. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  463. },
  464. },
  465. {
  466. .callback = intel_no_lvds_dmi_callback,
  467. .ident = "MSI IM-945GSE-A",
  468. .matches = {
  469. DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  470. DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  471. },
  472. },
  473. {
  474. .callback = intel_no_lvds_dmi_callback,
  475. .ident = "Dell Studio Hybrid",
  476. .matches = {
  477. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  478. DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  479. },
  480. },
  481. {
  482. .callback = intel_no_lvds_dmi_callback,
  483. .ident = "Dell OptiPlex FX170",
  484. .matches = {
  485. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  486. DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
  487. },
  488. },
  489. {
  490. .callback = intel_no_lvds_dmi_callback,
  491. .ident = "AOpen Mini PC",
  492. .matches = {
  493. DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  494. DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  495. },
  496. },
  497. {
  498. .callback = intel_no_lvds_dmi_callback,
  499. .ident = "AOpen Mini PC MP915",
  500. .matches = {
  501. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  502. DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  503. },
  504. },
  505. {
  506. .callback = intel_no_lvds_dmi_callback,
  507. .ident = "AOpen i915GMm-HFS",
  508. .matches = {
  509. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  510. DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
  511. },
  512. },
  513. {
  514. .callback = intel_no_lvds_dmi_callback,
  515. .ident = "AOpen i45GMx-I",
  516. .matches = {
  517. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  518. DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
  519. },
  520. },
  521. {
  522. .callback = intel_no_lvds_dmi_callback,
  523. .ident = "Aopen i945GTt-VFA",
  524. .matches = {
  525. DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  526. },
  527. },
  528. {
  529. .callback = intel_no_lvds_dmi_callback,
  530. .ident = "Clientron U800",
  531. .matches = {
  532. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  533. DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
  534. },
  535. },
  536. {
  537. .callback = intel_no_lvds_dmi_callback,
  538. .ident = "Clientron E830",
  539. .matches = {
  540. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  541. DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
  542. },
  543. },
  544. {
  545. .callback = intel_no_lvds_dmi_callback,
  546. .ident = "Asus EeeBox PC EB1007",
  547. .matches = {
  548. DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
  549. DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
  550. },
  551. },
  552. {
  553. .callback = intel_no_lvds_dmi_callback,
  554. .ident = "Asus AT5NM10T-I",
  555. .matches = {
  556. DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  557. DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
  558. },
  559. },
  560. {
  561. .callback = intel_no_lvds_dmi_callback,
  562. .ident = "Hewlett-Packard HP t5740",
  563. .matches = {
  564. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  565. DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
  566. },
  567. },
  568. {
  569. .callback = intel_no_lvds_dmi_callback,
  570. .ident = "Hewlett-Packard t5745",
  571. .matches = {
  572. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  573. DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
  574. },
  575. },
  576. {
  577. .callback = intel_no_lvds_dmi_callback,
  578. .ident = "Hewlett-Packard st5747",
  579. .matches = {
  580. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  581. DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
  582. },
  583. },
  584. {
  585. .callback = intel_no_lvds_dmi_callback,
  586. .ident = "MSI Wind Box DC500",
  587. .matches = {
  588. DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
  589. DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
  590. },
  591. },
  592. {
  593. .callback = intel_no_lvds_dmi_callback,
  594. .ident = "Gigabyte GA-D525TUD",
  595. .matches = {
  596. DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
  597. DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
  598. },
  599. },
  600. {
  601. .callback = intel_no_lvds_dmi_callback,
  602. .ident = "Supermicro X7SPA-H",
  603. .matches = {
  604. DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
  605. DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
  606. },
  607. },
  608. {
  609. .callback = intel_no_lvds_dmi_callback,
  610. .ident = "Fujitsu Esprimo Q900",
  611. .matches = {
  612. DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
  613. DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
  614. },
  615. },
  616. {
  617. .callback = intel_no_lvds_dmi_callback,
  618. .ident = "Intel D510MO",
  619. .matches = {
  620. DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
  621. DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
  622. },
  623. },
  624. {
  625. .callback = intel_no_lvds_dmi_callback,
  626. .ident = "Intel D525MW",
  627. .matches = {
  628. DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
  629. DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
  630. },
  631. },
  632. { } /* terminating entry */
  633. };
  634. /**
  635. * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
  636. * @dev: drm device
  637. * @connector: LVDS connector
  638. *
  639. * Find the reduced downclock for LVDS in EDID.
  640. */
  641. static void intel_find_lvds_downclock(struct drm_device *dev,
  642. struct drm_display_mode *fixed_mode,
  643. struct drm_connector *connector)
  644. {
  645. struct drm_i915_private *dev_priv = dev->dev_private;
  646. struct drm_display_mode *scan;
  647. int temp_downclock;
  648. temp_downclock = fixed_mode->clock;
  649. list_for_each_entry(scan, &connector->probed_modes, head) {
  650. /*
  651. * If one mode has the same resolution with the fixed_panel
  652. * mode while they have the different refresh rate, it means
  653. * that the reduced downclock is found for the LVDS. In such
  654. * case we can set the different FPx0/1 to dynamically select
  655. * between low and high frequency.
  656. */
  657. if (scan->hdisplay == fixed_mode->hdisplay &&
  658. scan->hsync_start == fixed_mode->hsync_start &&
  659. scan->hsync_end == fixed_mode->hsync_end &&
  660. scan->htotal == fixed_mode->htotal &&
  661. scan->vdisplay == fixed_mode->vdisplay &&
  662. scan->vsync_start == fixed_mode->vsync_start &&
  663. scan->vsync_end == fixed_mode->vsync_end &&
  664. scan->vtotal == fixed_mode->vtotal) {
  665. if (scan->clock < temp_downclock) {
  666. /*
  667. * The downclock is already found. But we
  668. * expect to find the lower downclock.
  669. */
  670. temp_downclock = scan->clock;
  671. }
  672. }
  673. }
  674. if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
  675. /* We found the downclock for LVDS. */
  676. dev_priv->lvds_downclock_avail = 1;
  677. dev_priv->lvds_downclock = temp_downclock;
  678. DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
  679. "Normal clock %dKhz, downclock %dKhz\n",
  680. fixed_mode->clock, temp_downclock);
  681. }
  682. }
  683. /*
  684. * Enumerate the child dev array parsed from VBT to check whether
  685. * the LVDS is present.
  686. * If it is present, return 1.
  687. * If it is not present, return false.
  688. * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  689. */
  690. static bool lvds_is_present_in_vbt(struct drm_device *dev,
  691. u8 *i2c_pin)
  692. {
  693. struct drm_i915_private *dev_priv = dev->dev_private;
  694. int i;
  695. if (!dev_priv->vbt.child_dev_num)
  696. return true;
  697. for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
  698. struct child_device_config *child = dev_priv->vbt.child_dev + i;
  699. /* If the device type is not LFP, continue.
  700. * We have to check both the new identifiers as well as the
  701. * old for compatibility with some BIOSes.
  702. */
  703. if (child->device_type != DEVICE_TYPE_INT_LFP &&
  704. child->device_type != DEVICE_TYPE_LFP)
  705. continue;
  706. if (intel_gmbus_is_port_valid(child->i2c_pin))
  707. *i2c_pin = child->i2c_pin;
  708. /* However, we cannot trust the BIOS writers to populate
  709. * the VBT correctly. Since LVDS requires additional
  710. * information from AIM blocks, a non-zero addin offset is
  711. * a good indicator that the LVDS is actually present.
  712. */
  713. if (child->addin_offset)
  714. return true;
  715. /* But even then some BIOS writers perform some black magic
  716. * and instantiate the device without reference to any
  717. * additional data. Trust that if the VBT was written into
  718. * the OpRegion then they have validated the LVDS's existence.
  719. */
  720. if (dev_priv->opregion.vbt)
  721. return true;
  722. }
  723. return false;
  724. }
  725. static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
  726. {
  727. DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
  728. return 1;
  729. }
  730. static const struct dmi_system_id intel_dual_link_lvds[] = {
  731. {
  732. .callback = intel_dual_link_lvds_callback,
  733. .ident = "Apple MacBook Pro (Core i5/i7 Series)",
  734. .matches = {
  735. DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
  736. DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
  737. },
  738. },
  739. { } /* terminating entry */
  740. };
  741. bool intel_is_dual_link_lvds(struct drm_device *dev)
  742. {
  743. struct intel_encoder *encoder;
  744. struct intel_lvds_encoder *lvds_encoder;
  745. list_for_each_entry(encoder, &dev->mode_config.encoder_list,
  746. base.head) {
  747. if (encoder->type == INTEL_OUTPUT_LVDS) {
  748. lvds_encoder = to_lvds_encoder(&encoder->base);
  749. return lvds_encoder->is_dual_link;
  750. }
  751. }
  752. return false;
  753. }
  754. static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
  755. {
  756. struct drm_device *dev = lvds_encoder->base.base.dev;
  757. unsigned int val;
  758. struct drm_i915_private *dev_priv = dev->dev_private;
  759. /* use the module option value if specified */
  760. if (i915_lvds_channel_mode > 0)
  761. return i915_lvds_channel_mode == 2;
  762. if (dmi_check_system(intel_dual_link_lvds))
  763. return true;
  764. /* BIOS should set the proper LVDS register value at boot, but
  765. * in reality, it doesn't set the value when the lid is closed;
  766. * we need to check "the value to be set" in VBT when LVDS
  767. * register is uninitialized.
  768. */
  769. val = I915_READ(lvds_encoder->reg);
  770. if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
  771. val = dev_priv->vbt.bios_lvds_val;
  772. return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
  773. }
  774. static bool intel_lvds_supported(struct drm_device *dev)
  775. {
  776. /* With the introduction of the PCH we gained a dedicated
  777. * LVDS presence pin, use it. */
  778. if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
  779. return true;
  780. /* Otherwise LVDS was only attached to mobile products,
  781. * except for the inglorious 830gm */
  782. if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
  783. return true;
  784. return false;
  785. }
  786. /**
  787. * intel_lvds_init - setup LVDS connectors on this device
  788. * @dev: drm device
  789. *
  790. * Create the connector, register the LVDS DDC bus, and try to figure out what
  791. * modes we can display on the LVDS panel (if present).
  792. */
  793. void intel_lvds_init(struct drm_device *dev)
  794. {
  795. struct drm_i915_private *dev_priv = dev->dev_private;
  796. struct intel_lvds_encoder *lvds_encoder;
  797. struct intel_encoder *intel_encoder;
  798. struct intel_lvds_connector *lvds_connector;
  799. struct intel_connector *intel_connector;
  800. struct drm_connector *connector;
  801. struct drm_encoder *encoder;
  802. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  803. struct drm_display_mode *fixed_mode = NULL;
  804. struct edid *edid;
  805. struct drm_crtc *crtc;
  806. u32 lvds;
  807. int pipe;
  808. u8 pin;
  809. if (!intel_lvds_supported(dev))
  810. return;
  811. /* Skip init on machines we know falsely report LVDS */
  812. if (dmi_check_system(intel_no_lvds))
  813. return;
  814. pin = GMBUS_PORT_PANEL;
  815. if (!lvds_is_present_in_vbt(dev, &pin)) {
  816. DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  817. return;
  818. }
  819. if (HAS_PCH_SPLIT(dev)) {
  820. if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  821. return;
  822. if (dev_priv->vbt.edp_support) {
  823. DRM_DEBUG_KMS("disable LVDS for eDP support\n");
  824. return;
  825. }
  826. }
  827. lvds_encoder = kzalloc(sizeof(struct intel_lvds_encoder), GFP_KERNEL);
  828. if (!lvds_encoder)
  829. return;
  830. lvds_connector = kzalloc(sizeof(struct intel_lvds_connector), GFP_KERNEL);
  831. if (!lvds_connector) {
  832. kfree(lvds_encoder);
  833. return;
  834. }
  835. lvds_encoder->attached_connector = lvds_connector;
  836. intel_encoder = &lvds_encoder->base;
  837. encoder = &intel_encoder->base;
  838. intel_connector = &lvds_connector->base;
  839. connector = &intel_connector->base;
  840. drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
  841. DRM_MODE_CONNECTOR_LVDS);
  842. drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
  843. DRM_MODE_ENCODER_LVDS);
  844. intel_encoder->enable = intel_enable_lvds;
  845. intel_encoder->pre_enable = intel_pre_enable_lvds;
  846. intel_encoder->compute_config = intel_lvds_compute_config;
  847. intel_encoder->disable = intel_disable_lvds;
  848. intel_encoder->get_hw_state = intel_lvds_get_hw_state;
  849. intel_encoder->get_config = intel_lvds_get_config;
  850. intel_connector->get_hw_state = intel_connector_get_hw_state;
  851. intel_connector_attach_encoder(intel_connector, intel_encoder);
  852. intel_encoder->type = INTEL_OUTPUT_LVDS;
  853. intel_encoder->cloneable = false;
  854. if (HAS_PCH_SPLIT(dev))
  855. intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  856. else if (IS_GEN4(dev))
  857. intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  858. else
  859. intel_encoder->crtc_mask = (1 << 1);
  860. drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
  861. drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  862. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  863. connector->interlace_allowed = false;
  864. connector->doublescan_allowed = false;
  865. if (HAS_PCH_SPLIT(dev)) {
  866. lvds_encoder->reg = PCH_LVDS;
  867. } else {
  868. lvds_encoder->reg = LVDS;
  869. }
  870. /* create the scaling mode property */
  871. drm_mode_create_scaling_mode_property(dev);
  872. drm_object_attach_property(&connector->base,
  873. dev->mode_config.scaling_mode_property,
  874. DRM_MODE_SCALE_ASPECT);
  875. intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
  876. /*
  877. * LVDS discovery:
  878. * 1) check for EDID on DDC
  879. * 2) check for VBT data
  880. * 3) check to see if LVDS is already on
  881. * if none of the above, no panel
  882. * 4) make sure lid is open
  883. * if closed, act like it's not there for now
  884. */
  885. /*
  886. * Attempt to get the fixed panel mode from DDC. Assume that the
  887. * preferred mode is the right one.
  888. */
  889. edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
  890. if (edid) {
  891. if (drm_add_edid_modes(connector, edid)) {
  892. drm_mode_connector_update_edid_property(connector,
  893. edid);
  894. } else {
  895. kfree(edid);
  896. edid = ERR_PTR(-EINVAL);
  897. }
  898. } else {
  899. edid = ERR_PTR(-ENOENT);
  900. }
  901. lvds_connector->base.edid = edid;
  902. if (IS_ERR_OR_NULL(edid)) {
  903. /* Didn't get an EDID, so
  904. * Set wide sync ranges so we get all modes
  905. * handed to valid_mode for checking
  906. */
  907. connector->display_info.min_vfreq = 0;
  908. connector->display_info.max_vfreq = 200;
  909. connector->display_info.min_hfreq = 0;
  910. connector->display_info.max_hfreq = 200;
  911. }
  912. list_for_each_entry(scan, &connector->probed_modes, head) {
  913. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  914. DRM_DEBUG_KMS("using preferred mode from EDID: ");
  915. drm_mode_debug_printmodeline(scan);
  916. fixed_mode = drm_mode_duplicate(dev, scan);
  917. if (fixed_mode) {
  918. intel_find_lvds_downclock(dev, fixed_mode,
  919. connector);
  920. goto out;
  921. }
  922. }
  923. }
  924. /* Failed to get EDID, what about VBT? */
  925. if (dev_priv->vbt.lfp_lvds_vbt_mode) {
  926. DRM_DEBUG_KMS("using mode from VBT: ");
  927. drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
  928. fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
  929. if (fixed_mode) {
  930. fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  931. goto out;
  932. }
  933. }
  934. /*
  935. * If we didn't get EDID, try checking if the panel is already turned
  936. * on. If so, assume that whatever is currently programmed is the
  937. * correct mode.
  938. */
  939. /* Ironlake: FIXME if still fail, not try pipe mode now */
  940. if (HAS_PCH_SPLIT(dev))
  941. goto failed;
  942. lvds = I915_READ(LVDS);
  943. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  944. crtc = intel_get_crtc_for_pipe(dev, pipe);
  945. if (crtc && (lvds & LVDS_PORT_EN)) {
  946. fixed_mode = intel_crtc_mode_get(dev, crtc);
  947. if (fixed_mode) {
  948. DRM_DEBUG_KMS("using current (BIOS) mode: ");
  949. drm_mode_debug_printmodeline(fixed_mode);
  950. fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  951. goto out;
  952. }
  953. }
  954. /* If we still don't have a mode after all that, give up. */
  955. if (!fixed_mode)
  956. goto failed;
  957. out:
  958. lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
  959. DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
  960. lvds_encoder->is_dual_link ? "dual" : "single");
  961. /*
  962. * Unlock registers and just
  963. * leave them unlocked
  964. */
  965. if (HAS_PCH_SPLIT(dev)) {
  966. I915_WRITE(PCH_PP_CONTROL,
  967. I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
  968. } else {
  969. I915_WRITE(PP_CONTROL,
  970. I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
  971. }
  972. lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
  973. if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
  974. DRM_DEBUG_KMS("lid notifier registration failed\n");
  975. lvds_connector->lid_notifier.notifier_call = NULL;
  976. }
  977. drm_sysfs_connector_add(connector);
  978. intel_panel_init(&intel_connector->panel, fixed_mode);
  979. intel_panel_setup_backlight(connector);
  980. return;
  981. failed:
  982. DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  983. drm_connector_cleanup(connector);
  984. drm_encoder_cleanup(encoder);
  985. if (fixed_mode)
  986. drm_mode_destroy(dev, fixed_mode);
  987. kfree(lvds_encoder);
  988. kfree(lvds_connector);
  989. return;
  990. }