mmu.c 36 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * This module enables machines with Intel VT-x extensions to run virtual
  5. * machines without emulation or binary translation.
  6. *
  7. * MMU support
  8. *
  9. * Copyright (C) 2006 Qumranet, Inc.
  10. *
  11. * Authors:
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Avi Kivity <avi@qumranet.com>
  14. *
  15. * This work is licensed under the terms of the GNU GPL, version 2. See
  16. * the COPYING file in the top-level directory.
  17. *
  18. */
  19. #include "vmx.h"
  20. #include "kvm.h"
  21. #include <linux/types.h>
  22. #include <linux/string.h>
  23. #include <linux/mm.h>
  24. #include <linux/highmem.h>
  25. #include <linux/module.h>
  26. #include <asm/page.h>
  27. #include <asm/cmpxchg.h>
  28. #undef MMU_DEBUG
  29. #undef AUDIT
  30. #ifdef AUDIT
  31. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
  32. #else
  33. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
  34. #endif
  35. #ifdef MMU_DEBUG
  36. #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  37. #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  38. #else
  39. #define pgprintk(x...) do { } while (0)
  40. #define rmap_printk(x...) do { } while (0)
  41. #endif
  42. #if defined(MMU_DEBUG) || defined(AUDIT)
  43. static int dbg = 1;
  44. #endif
  45. #ifndef MMU_DEBUG
  46. #define ASSERT(x) do { } while (0)
  47. #else
  48. #define ASSERT(x) \
  49. if (!(x)) { \
  50. printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
  51. __FILE__, __LINE__, #x); \
  52. }
  53. #endif
  54. #define PT64_PT_BITS 9
  55. #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
  56. #define PT32_PT_BITS 10
  57. #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
  58. #define PT_WRITABLE_SHIFT 1
  59. #define PT_PRESENT_MASK (1ULL << 0)
  60. #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
  61. #define PT_USER_MASK (1ULL << 2)
  62. #define PT_PWT_MASK (1ULL << 3)
  63. #define PT_PCD_MASK (1ULL << 4)
  64. #define PT_ACCESSED_MASK (1ULL << 5)
  65. #define PT_DIRTY_MASK (1ULL << 6)
  66. #define PT_PAGE_SIZE_MASK (1ULL << 7)
  67. #define PT_PAT_MASK (1ULL << 7)
  68. #define PT_GLOBAL_MASK (1ULL << 8)
  69. #define PT64_NX_MASK (1ULL << 63)
  70. #define PT_PAT_SHIFT 7
  71. #define PT_DIR_PAT_SHIFT 12
  72. #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
  73. #define PT32_DIR_PSE36_SIZE 4
  74. #define PT32_DIR_PSE36_SHIFT 13
  75. #define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
  76. #define PT_FIRST_AVAIL_BITS_SHIFT 9
  77. #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  78. #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
  79. #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  80. #define PT64_LEVEL_BITS 9
  81. #define PT64_LEVEL_SHIFT(level) \
  82. ( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS )
  83. #define PT64_LEVEL_MASK(level) \
  84. (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
  85. #define PT64_INDEX(address, level)\
  86. (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
  87. #define PT32_LEVEL_BITS 10
  88. #define PT32_LEVEL_SHIFT(level) \
  89. ( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS )
  90. #define PT32_LEVEL_MASK(level) \
  91. (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
  92. #define PT32_INDEX(address, level)\
  93. (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
  94. #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
  95. #define PT64_DIR_BASE_ADDR_MASK \
  96. (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
  97. #define PT32_BASE_ADDR_MASK PAGE_MASK
  98. #define PT32_DIR_BASE_ADDR_MASK \
  99. (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
  100. #define PFERR_PRESENT_MASK (1U << 0)
  101. #define PFERR_WRITE_MASK (1U << 1)
  102. #define PFERR_USER_MASK (1U << 2)
  103. #define PFERR_FETCH_MASK (1U << 4)
  104. #define PT64_ROOT_LEVEL 4
  105. #define PT32_ROOT_LEVEL 2
  106. #define PT32E_ROOT_LEVEL 3
  107. #define PT_DIRECTORY_LEVEL 2
  108. #define PT_PAGE_TABLE_LEVEL 1
  109. #define RMAP_EXT 4
  110. struct kvm_rmap_desc {
  111. u64 *shadow_ptes[RMAP_EXT];
  112. struct kvm_rmap_desc *more;
  113. };
  114. static struct kmem_cache *pte_chain_cache;
  115. static struct kmem_cache *rmap_desc_cache;
  116. static struct kmem_cache *mmu_page_header_cache;
  117. static u64 __read_mostly shadow_trap_nonpresent_pte;
  118. static u64 __read_mostly shadow_notrap_nonpresent_pte;
  119. void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
  120. {
  121. shadow_trap_nonpresent_pte = trap_pte;
  122. shadow_notrap_nonpresent_pte = notrap_pte;
  123. }
  124. EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
  125. static int is_write_protection(struct kvm_vcpu *vcpu)
  126. {
  127. return vcpu->cr0 & X86_CR0_WP;
  128. }
  129. static int is_cpuid_PSE36(void)
  130. {
  131. return 1;
  132. }
  133. static int is_nx(struct kvm_vcpu *vcpu)
  134. {
  135. return vcpu->shadow_efer & EFER_NX;
  136. }
  137. static int is_present_pte(unsigned long pte)
  138. {
  139. return pte & PT_PRESENT_MASK;
  140. }
  141. static int is_shadow_present_pte(u64 pte)
  142. {
  143. pte &= ~PT_SHADOW_IO_MARK;
  144. return pte != shadow_trap_nonpresent_pte
  145. && pte != shadow_notrap_nonpresent_pte;
  146. }
  147. static int is_writeble_pte(unsigned long pte)
  148. {
  149. return pte & PT_WRITABLE_MASK;
  150. }
  151. static int is_io_pte(unsigned long pte)
  152. {
  153. return pte & PT_SHADOW_IO_MARK;
  154. }
  155. static int is_rmap_pte(u64 pte)
  156. {
  157. return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK))
  158. == (PT_WRITABLE_MASK | PT_PRESENT_MASK);
  159. }
  160. static void set_shadow_pte(u64 *sptep, u64 spte)
  161. {
  162. #ifdef CONFIG_X86_64
  163. set_64bit((unsigned long *)sptep, spte);
  164. #else
  165. set_64bit((unsigned long long *)sptep, spte);
  166. #endif
  167. }
  168. static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
  169. struct kmem_cache *base_cache, int min)
  170. {
  171. void *obj;
  172. if (cache->nobjs >= min)
  173. return 0;
  174. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  175. obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
  176. if (!obj)
  177. return -ENOMEM;
  178. cache->objects[cache->nobjs++] = obj;
  179. }
  180. return 0;
  181. }
  182. static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
  183. {
  184. while (mc->nobjs)
  185. kfree(mc->objects[--mc->nobjs]);
  186. }
  187. static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
  188. int min)
  189. {
  190. struct page *page;
  191. if (cache->nobjs >= min)
  192. return 0;
  193. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  194. page = alloc_page(GFP_KERNEL);
  195. if (!page)
  196. return -ENOMEM;
  197. set_page_private(page, 0);
  198. cache->objects[cache->nobjs++] = page_address(page);
  199. }
  200. return 0;
  201. }
  202. static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
  203. {
  204. while (mc->nobjs)
  205. free_page((unsigned long)mc->objects[--mc->nobjs]);
  206. }
  207. static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
  208. {
  209. int r;
  210. kvm_mmu_free_some_pages(vcpu);
  211. r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache,
  212. pte_chain_cache, 4);
  213. if (r)
  214. goto out;
  215. r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache,
  216. rmap_desc_cache, 1);
  217. if (r)
  218. goto out;
  219. r = mmu_topup_memory_cache_page(&vcpu->mmu_page_cache, 4);
  220. if (r)
  221. goto out;
  222. r = mmu_topup_memory_cache(&vcpu->mmu_page_header_cache,
  223. mmu_page_header_cache, 4);
  224. out:
  225. return r;
  226. }
  227. static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
  228. {
  229. mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache);
  230. mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache);
  231. mmu_free_memory_cache_page(&vcpu->mmu_page_cache);
  232. mmu_free_memory_cache(&vcpu->mmu_page_header_cache);
  233. }
  234. static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
  235. size_t size)
  236. {
  237. void *p;
  238. BUG_ON(!mc->nobjs);
  239. p = mc->objects[--mc->nobjs];
  240. memset(p, 0, size);
  241. return p;
  242. }
  243. static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
  244. {
  245. return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache,
  246. sizeof(struct kvm_pte_chain));
  247. }
  248. static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
  249. {
  250. kfree(pc);
  251. }
  252. static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
  253. {
  254. return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache,
  255. sizeof(struct kvm_rmap_desc));
  256. }
  257. static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
  258. {
  259. kfree(rd);
  260. }
  261. /*
  262. * Reverse mapping data structures:
  263. *
  264. * If page->private bit zero is zero, then page->private points to the
  265. * shadow page table entry that points to page_address(page).
  266. *
  267. * If page->private bit zero is one, (then page->private & ~1) points
  268. * to a struct kvm_rmap_desc containing more mappings.
  269. */
  270. static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte)
  271. {
  272. struct page *page;
  273. struct kvm_rmap_desc *desc;
  274. int i;
  275. if (!is_rmap_pte(*spte))
  276. return;
  277. page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
  278. if (!page_private(page)) {
  279. rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
  280. set_page_private(page,(unsigned long)spte);
  281. } else if (!(page_private(page) & 1)) {
  282. rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
  283. desc = mmu_alloc_rmap_desc(vcpu);
  284. desc->shadow_ptes[0] = (u64 *)page_private(page);
  285. desc->shadow_ptes[1] = spte;
  286. set_page_private(page,(unsigned long)desc | 1);
  287. } else {
  288. rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
  289. desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
  290. while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
  291. desc = desc->more;
  292. if (desc->shadow_ptes[RMAP_EXT-1]) {
  293. desc->more = mmu_alloc_rmap_desc(vcpu);
  294. desc = desc->more;
  295. }
  296. for (i = 0; desc->shadow_ptes[i]; ++i)
  297. ;
  298. desc->shadow_ptes[i] = spte;
  299. }
  300. }
  301. static void rmap_desc_remove_entry(struct page *page,
  302. struct kvm_rmap_desc *desc,
  303. int i,
  304. struct kvm_rmap_desc *prev_desc)
  305. {
  306. int j;
  307. for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
  308. ;
  309. desc->shadow_ptes[i] = desc->shadow_ptes[j];
  310. desc->shadow_ptes[j] = NULL;
  311. if (j != 0)
  312. return;
  313. if (!prev_desc && !desc->more)
  314. set_page_private(page,(unsigned long)desc->shadow_ptes[0]);
  315. else
  316. if (prev_desc)
  317. prev_desc->more = desc->more;
  318. else
  319. set_page_private(page,(unsigned long)desc->more | 1);
  320. mmu_free_rmap_desc(desc);
  321. }
  322. static void rmap_remove(u64 *spte)
  323. {
  324. struct page *page;
  325. struct kvm_rmap_desc *desc;
  326. struct kvm_rmap_desc *prev_desc;
  327. int i;
  328. if (!is_rmap_pte(*spte))
  329. return;
  330. page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
  331. if (!page_private(page)) {
  332. printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
  333. BUG();
  334. } else if (!(page_private(page) & 1)) {
  335. rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
  336. if ((u64 *)page_private(page) != spte) {
  337. printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
  338. spte, *spte);
  339. BUG();
  340. }
  341. set_page_private(page,0);
  342. } else {
  343. rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
  344. desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
  345. prev_desc = NULL;
  346. while (desc) {
  347. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
  348. if (desc->shadow_ptes[i] == spte) {
  349. rmap_desc_remove_entry(page,
  350. desc, i,
  351. prev_desc);
  352. return;
  353. }
  354. prev_desc = desc;
  355. desc = desc->more;
  356. }
  357. BUG();
  358. }
  359. }
  360. static void rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn)
  361. {
  362. struct kvm *kvm = vcpu->kvm;
  363. struct page *page;
  364. struct kvm_rmap_desc *desc;
  365. u64 *spte;
  366. page = gfn_to_page(kvm, gfn);
  367. BUG_ON(!page);
  368. while (page_private(page)) {
  369. if (!(page_private(page) & 1))
  370. spte = (u64 *)page_private(page);
  371. else {
  372. desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
  373. spte = desc->shadow_ptes[0];
  374. }
  375. BUG_ON(!spte);
  376. BUG_ON((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT
  377. != page_to_pfn(page));
  378. BUG_ON(!(*spte & PT_PRESENT_MASK));
  379. BUG_ON(!(*spte & PT_WRITABLE_MASK));
  380. rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
  381. rmap_remove(spte);
  382. set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
  383. kvm_flush_remote_tlbs(vcpu->kvm);
  384. }
  385. }
  386. #ifdef MMU_DEBUG
  387. static int is_empty_shadow_page(u64 *spt)
  388. {
  389. u64 *pos;
  390. u64 *end;
  391. for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
  392. if ((*pos & ~PT_SHADOW_IO_MARK) != shadow_trap_nonpresent_pte) {
  393. printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
  394. pos, *pos);
  395. return 0;
  396. }
  397. return 1;
  398. }
  399. #endif
  400. static void kvm_mmu_free_page(struct kvm *kvm,
  401. struct kvm_mmu_page *page_head)
  402. {
  403. ASSERT(is_empty_shadow_page(page_head->spt));
  404. list_del(&page_head->link);
  405. __free_page(virt_to_page(page_head->spt));
  406. kfree(page_head);
  407. ++kvm->n_free_mmu_pages;
  408. }
  409. static unsigned kvm_page_table_hashfn(gfn_t gfn)
  410. {
  411. return gfn;
  412. }
  413. static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
  414. u64 *parent_pte)
  415. {
  416. struct kvm_mmu_page *page;
  417. if (!vcpu->kvm->n_free_mmu_pages)
  418. return NULL;
  419. page = mmu_memory_cache_alloc(&vcpu->mmu_page_header_cache,
  420. sizeof *page);
  421. page->spt = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE);
  422. set_page_private(virt_to_page(page->spt), (unsigned long)page);
  423. list_add(&page->link, &vcpu->kvm->active_mmu_pages);
  424. ASSERT(is_empty_shadow_page(page->spt));
  425. page->slot_bitmap = 0;
  426. page->multimapped = 0;
  427. page->parent_pte = parent_pte;
  428. --vcpu->kvm->n_free_mmu_pages;
  429. return page;
  430. }
  431. static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
  432. struct kvm_mmu_page *page, u64 *parent_pte)
  433. {
  434. struct kvm_pte_chain *pte_chain;
  435. struct hlist_node *node;
  436. int i;
  437. if (!parent_pte)
  438. return;
  439. if (!page->multimapped) {
  440. u64 *old = page->parent_pte;
  441. if (!old) {
  442. page->parent_pte = parent_pte;
  443. return;
  444. }
  445. page->multimapped = 1;
  446. pte_chain = mmu_alloc_pte_chain(vcpu);
  447. INIT_HLIST_HEAD(&page->parent_ptes);
  448. hlist_add_head(&pte_chain->link, &page->parent_ptes);
  449. pte_chain->parent_ptes[0] = old;
  450. }
  451. hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
  452. if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
  453. continue;
  454. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
  455. if (!pte_chain->parent_ptes[i]) {
  456. pte_chain->parent_ptes[i] = parent_pte;
  457. return;
  458. }
  459. }
  460. pte_chain = mmu_alloc_pte_chain(vcpu);
  461. BUG_ON(!pte_chain);
  462. hlist_add_head(&pte_chain->link, &page->parent_ptes);
  463. pte_chain->parent_ptes[0] = parent_pte;
  464. }
  465. static void mmu_page_remove_parent_pte(struct kvm_mmu_page *page,
  466. u64 *parent_pte)
  467. {
  468. struct kvm_pte_chain *pte_chain;
  469. struct hlist_node *node;
  470. int i;
  471. if (!page->multimapped) {
  472. BUG_ON(page->parent_pte != parent_pte);
  473. page->parent_pte = NULL;
  474. return;
  475. }
  476. hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
  477. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  478. if (!pte_chain->parent_ptes[i])
  479. break;
  480. if (pte_chain->parent_ptes[i] != parent_pte)
  481. continue;
  482. while (i + 1 < NR_PTE_CHAIN_ENTRIES
  483. && pte_chain->parent_ptes[i + 1]) {
  484. pte_chain->parent_ptes[i]
  485. = pte_chain->parent_ptes[i + 1];
  486. ++i;
  487. }
  488. pte_chain->parent_ptes[i] = NULL;
  489. if (i == 0) {
  490. hlist_del(&pte_chain->link);
  491. mmu_free_pte_chain(pte_chain);
  492. if (hlist_empty(&page->parent_ptes)) {
  493. page->multimapped = 0;
  494. page->parent_pte = NULL;
  495. }
  496. }
  497. return;
  498. }
  499. BUG();
  500. }
  501. static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu,
  502. gfn_t gfn)
  503. {
  504. unsigned index;
  505. struct hlist_head *bucket;
  506. struct kvm_mmu_page *page;
  507. struct hlist_node *node;
  508. pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
  509. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  510. bucket = &vcpu->kvm->mmu_page_hash[index];
  511. hlist_for_each_entry(page, node, bucket, hash_link)
  512. if (page->gfn == gfn && !page->role.metaphysical) {
  513. pgprintk("%s: found role %x\n",
  514. __FUNCTION__, page->role.word);
  515. return page;
  516. }
  517. return NULL;
  518. }
  519. static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
  520. gfn_t gfn,
  521. gva_t gaddr,
  522. unsigned level,
  523. int metaphysical,
  524. unsigned hugepage_access,
  525. u64 *parent_pte)
  526. {
  527. union kvm_mmu_page_role role;
  528. unsigned index;
  529. unsigned quadrant;
  530. struct hlist_head *bucket;
  531. struct kvm_mmu_page *page;
  532. struct hlist_node *node;
  533. role.word = 0;
  534. role.glevels = vcpu->mmu.root_level;
  535. role.level = level;
  536. role.metaphysical = metaphysical;
  537. role.hugepage_access = hugepage_access;
  538. if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
  539. quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
  540. quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
  541. role.quadrant = quadrant;
  542. }
  543. pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
  544. gfn, role.word);
  545. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  546. bucket = &vcpu->kvm->mmu_page_hash[index];
  547. hlist_for_each_entry(page, node, bucket, hash_link)
  548. if (page->gfn == gfn && page->role.word == role.word) {
  549. mmu_page_add_parent_pte(vcpu, page, parent_pte);
  550. pgprintk("%s: found\n", __FUNCTION__);
  551. return page;
  552. }
  553. page = kvm_mmu_alloc_page(vcpu, parent_pte);
  554. if (!page)
  555. return page;
  556. pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
  557. page->gfn = gfn;
  558. page->role = role;
  559. hlist_add_head(&page->hash_link, bucket);
  560. vcpu->mmu.prefetch_page(vcpu, page);
  561. if (!metaphysical)
  562. rmap_write_protect(vcpu, gfn);
  563. return page;
  564. }
  565. static void kvm_mmu_page_unlink_children(struct kvm *kvm,
  566. struct kvm_mmu_page *page)
  567. {
  568. unsigned i;
  569. u64 *pt;
  570. u64 ent;
  571. pt = page->spt;
  572. if (page->role.level == PT_PAGE_TABLE_LEVEL) {
  573. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  574. if (is_shadow_present_pte(pt[i]))
  575. rmap_remove(&pt[i]);
  576. pt[i] = shadow_trap_nonpresent_pte;
  577. }
  578. kvm_flush_remote_tlbs(kvm);
  579. return;
  580. }
  581. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  582. ent = pt[i];
  583. pt[i] = shadow_trap_nonpresent_pte;
  584. if (!is_shadow_present_pte(ent))
  585. continue;
  586. ent &= PT64_BASE_ADDR_MASK;
  587. mmu_page_remove_parent_pte(page_header(ent), &pt[i]);
  588. }
  589. kvm_flush_remote_tlbs(kvm);
  590. }
  591. static void kvm_mmu_put_page(struct kvm_mmu_page *page,
  592. u64 *parent_pte)
  593. {
  594. mmu_page_remove_parent_pte(page, parent_pte);
  595. }
  596. static void kvm_mmu_zap_page(struct kvm *kvm,
  597. struct kvm_mmu_page *page)
  598. {
  599. u64 *parent_pte;
  600. while (page->multimapped || page->parent_pte) {
  601. if (!page->multimapped)
  602. parent_pte = page->parent_pte;
  603. else {
  604. struct kvm_pte_chain *chain;
  605. chain = container_of(page->parent_ptes.first,
  606. struct kvm_pte_chain, link);
  607. parent_pte = chain->parent_ptes[0];
  608. }
  609. BUG_ON(!parent_pte);
  610. kvm_mmu_put_page(page, parent_pte);
  611. set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
  612. }
  613. kvm_mmu_page_unlink_children(kvm, page);
  614. if (!page->root_count) {
  615. hlist_del(&page->hash_link);
  616. kvm_mmu_free_page(kvm, page);
  617. } else
  618. list_move(&page->link, &kvm->active_mmu_pages);
  619. }
  620. static int kvm_mmu_unprotect_page(struct kvm_vcpu *vcpu, gfn_t gfn)
  621. {
  622. unsigned index;
  623. struct hlist_head *bucket;
  624. struct kvm_mmu_page *page;
  625. struct hlist_node *node, *n;
  626. int r;
  627. pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
  628. r = 0;
  629. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  630. bucket = &vcpu->kvm->mmu_page_hash[index];
  631. hlist_for_each_entry_safe(page, node, n, bucket, hash_link)
  632. if (page->gfn == gfn && !page->role.metaphysical) {
  633. pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
  634. page->role.word);
  635. kvm_mmu_zap_page(vcpu->kvm, page);
  636. r = 1;
  637. }
  638. return r;
  639. }
  640. static void mmu_unshadow(struct kvm_vcpu *vcpu, gfn_t gfn)
  641. {
  642. struct kvm_mmu_page *page;
  643. while ((page = kvm_mmu_lookup_page(vcpu, gfn)) != NULL) {
  644. pgprintk("%s: zap %lx %x\n",
  645. __FUNCTION__, gfn, page->role.word);
  646. kvm_mmu_zap_page(vcpu->kvm, page);
  647. }
  648. }
  649. static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
  650. {
  651. int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
  652. struct kvm_mmu_page *page_head = page_header(__pa(pte));
  653. __set_bit(slot, &page_head->slot_bitmap);
  654. }
  655. hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
  656. {
  657. hpa_t hpa = gpa_to_hpa(vcpu, gpa);
  658. return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa;
  659. }
  660. hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
  661. {
  662. struct page *page;
  663. ASSERT((gpa & HPA_ERR_MASK) == 0);
  664. page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  665. if (!page)
  666. return gpa | HPA_ERR_MASK;
  667. return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT)
  668. | (gpa & (PAGE_SIZE-1));
  669. }
  670. hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
  671. {
  672. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
  673. if (gpa == UNMAPPED_GVA)
  674. return UNMAPPED_GVA;
  675. return gpa_to_hpa(vcpu, gpa);
  676. }
  677. struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
  678. {
  679. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
  680. if (gpa == UNMAPPED_GVA)
  681. return NULL;
  682. return pfn_to_page(gpa_to_hpa(vcpu, gpa) >> PAGE_SHIFT);
  683. }
  684. static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
  685. {
  686. }
  687. static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
  688. {
  689. int level = PT32E_ROOT_LEVEL;
  690. hpa_t table_addr = vcpu->mmu.root_hpa;
  691. for (; ; level--) {
  692. u32 index = PT64_INDEX(v, level);
  693. u64 *table;
  694. u64 pte;
  695. ASSERT(VALID_PAGE(table_addr));
  696. table = __va(table_addr);
  697. if (level == 1) {
  698. pte = table[index];
  699. if (is_shadow_present_pte(pte) && is_writeble_pte(pte))
  700. return 0;
  701. mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
  702. page_header_update_slot(vcpu->kvm, table, v);
  703. table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
  704. PT_USER_MASK;
  705. rmap_add(vcpu, &table[index]);
  706. return 0;
  707. }
  708. if (table[index] == shadow_trap_nonpresent_pte) {
  709. struct kvm_mmu_page *new_table;
  710. gfn_t pseudo_gfn;
  711. pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
  712. >> PAGE_SHIFT;
  713. new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
  714. v, level - 1,
  715. 1, 0, &table[index]);
  716. if (!new_table) {
  717. pgprintk("nonpaging_map: ENOMEM\n");
  718. return -ENOMEM;
  719. }
  720. table[index] = __pa(new_table->spt) | PT_PRESENT_MASK
  721. | PT_WRITABLE_MASK | PT_USER_MASK;
  722. }
  723. table_addr = table[index] & PT64_BASE_ADDR_MASK;
  724. }
  725. }
  726. static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
  727. struct kvm_mmu_page *sp)
  728. {
  729. int i;
  730. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  731. sp->spt[i] = shadow_trap_nonpresent_pte;
  732. }
  733. static void mmu_free_roots(struct kvm_vcpu *vcpu)
  734. {
  735. int i;
  736. struct kvm_mmu_page *page;
  737. if (!VALID_PAGE(vcpu->mmu.root_hpa))
  738. return;
  739. #ifdef CONFIG_X86_64
  740. if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  741. hpa_t root = vcpu->mmu.root_hpa;
  742. page = page_header(root);
  743. --page->root_count;
  744. vcpu->mmu.root_hpa = INVALID_PAGE;
  745. return;
  746. }
  747. #endif
  748. for (i = 0; i < 4; ++i) {
  749. hpa_t root = vcpu->mmu.pae_root[i];
  750. if (root) {
  751. root &= PT64_BASE_ADDR_MASK;
  752. page = page_header(root);
  753. --page->root_count;
  754. }
  755. vcpu->mmu.pae_root[i] = INVALID_PAGE;
  756. }
  757. vcpu->mmu.root_hpa = INVALID_PAGE;
  758. }
  759. static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
  760. {
  761. int i;
  762. gfn_t root_gfn;
  763. struct kvm_mmu_page *page;
  764. root_gfn = vcpu->cr3 >> PAGE_SHIFT;
  765. #ifdef CONFIG_X86_64
  766. if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  767. hpa_t root = vcpu->mmu.root_hpa;
  768. ASSERT(!VALID_PAGE(root));
  769. page = kvm_mmu_get_page(vcpu, root_gfn, 0,
  770. PT64_ROOT_LEVEL, 0, 0, NULL);
  771. root = __pa(page->spt);
  772. ++page->root_count;
  773. vcpu->mmu.root_hpa = root;
  774. return;
  775. }
  776. #endif
  777. for (i = 0; i < 4; ++i) {
  778. hpa_t root = vcpu->mmu.pae_root[i];
  779. ASSERT(!VALID_PAGE(root));
  780. if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) {
  781. if (!is_present_pte(vcpu->pdptrs[i])) {
  782. vcpu->mmu.pae_root[i] = 0;
  783. continue;
  784. }
  785. root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
  786. } else if (vcpu->mmu.root_level == 0)
  787. root_gfn = 0;
  788. page = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
  789. PT32_ROOT_LEVEL, !is_paging(vcpu),
  790. 0, NULL);
  791. root = __pa(page->spt);
  792. ++page->root_count;
  793. vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
  794. }
  795. vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
  796. }
  797. static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
  798. {
  799. return vaddr;
  800. }
  801. static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
  802. u32 error_code)
  803. {
  804. gpa_t addr = gva;
  805. hpa_t paddr;
  806. int r;
  807. r = mmu_topup_memory_caches(vcpu);
  808. if (r)
  809. return r;
  810. ASSERT(vcpu);
  811. ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
  812. paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK);
  813. if (is_error_hpa(paddr))
  814. return 1;
  815. return nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
  816. }
  817. static void nonpaging_free(struct kvm_vcpu *vcpu)
  818. {
  819. mmu_free_roots(vcpu);
  820. }
  821. static int nonpaging_init_context(struct kvm_vcpu *vcpu)
  822. {
  823. struct kvm_mmu *context = &vcpu->mmu;
  824. context->new_cr3 = nonpaging_new_cr3;
  825. context->page_fault = nonpaging_page_fault;
  826. context->gva_to_gpa = nonpaging_gva_to_gpa;
  827. context->free = nonpaging_free;
  828. context->prefetch_page = nonpaging_prefetch_page;
  829. context->root_level = 0;
  830. context->shadow_root_level = PT32E_ROOT_LEVEL;
  831. context->root_hpa = INVALID_PAGE;
  832. return 0;
  833. }
  834. static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  835. {
  836. ++vcpu->stat.tlb_flush;
  837. kvm_x86_ops->tlb_flush(vcpu);
  838. }
  839. static void paging_new_cr3(struct kvm_vcpu *vcpu)
  840. {
  841. pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
  842. mmu_free_roots(vcpu);
  843. }
  844. static void inject_page_fault(struct kvm_vcpu *vcpu,
  845. u64 addr,
  846. u32 err_code)
  847. {
  848. kvm_x86_ops->inject_page_fault(vcpu, addr, err_code);
  849. }
  850. static void paging_free(struct kvm_vcpu *vcpu)
  851. {
  852. nonpaging_free(vcpu);
  853. }
  854. #define PTTYPE 64
  855. #include "paging_tmpl.h"
  856. #undef PTTYPE
  857. #define PTTYPE 32
  858. #include "paging_tmpl.h"
  859. #undef PTTYPE
  860. static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
  861. {
  862. struct kvm_mmu *context = &vcpu->mmu;
  863. ASSERT(is_pae(vcpu));
  864. context->new_cr3 = paging_new_cr3;
  865. context->page_fault = paging64_page_fault;
  866. context->gva_to_gpa = paging64_gva_to_gpa;
  867. context->prefetch_page = paging64_prefetch_page;
  868. context->free = paging_free;
  869. context->root_level = level;
  870. context->shadow_root_level = level;
  871. context->root_hpa = INVALID_PAGE;
  872. return 0;
  873. }
  874. static int paging64_init_context(struct kvm_vcpu *vcpu)
  875. {
  876. return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
  877. }
  878. static int paging32_init_context(struct kvm_vcpu *vcpu)
  879. {
  880. struct kvm_mmu *context = &vcpu->mmu;
  881. context->new_cr3 = paging_new_cr3;
  882. context->page_fault = paging32_page_fault;
  883. context->gva_to_gpa = paging32_gva_to_gpa;
  884. context->free = paging_free;
  885. context->prefetch_page = paging32_prefetch_page;
  886. context->root_level = PT32_ROOT_LEVEL;
  887. context->shadow_root_level = PT32E_ROOT_LEVEL;
  888. context->root_hpa = INVALID_PAGE;
  889. return 0;
  890. }
  891. static int paging32E_init_context(struct kvm_vcpu *vcpu)
  892. {
  893. return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
  894. }
  895. static int init_kvm_mmu(struct kvm_vcpu *vcpu)
  896. {
  897. ASSERT(vcpu);
  898. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  899. if (!is_paging(vcpu))
  900. return nonpaging_init_context(vcpu);
  901. else if (is_long_mode(vcpu))
  902. return paging64_init_context(vcpu);
  903. else if (is_pae(vcpu))
  904. return paging32E_init_context(vcpu);
  905. else
  906. return paging32_init_context(vcpu);
  907. }
  908. static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
  909. {
  910. ASSERT(vcpu);
  911. if (VALID_PAGE(vcpu->mmu.root_hpa)) {
  912. vcpu->mmu.free(vcpu);
  913. vcpu->mmu.root_hpa = INVALID_PAGE;
  914. }
  915. }
  916. int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
  917. {
  918. destroy_kvm_mmu(vcpu);
  919. return init_kvm_mmu(vcpu);
  920. }
  921. EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
  922. int kvm_mmu_load(struct kvm_vcpu *vcpu)
  923. {
  924. int r;
  925. mutex_lock(&vcpu->kvm->lock);
  926. r = mmu_topup_memory_caches(vcpu);
  927. if (r)
  928. goto out;
  929. mmu_alloc_roots(vcpu);
  930. kvm_x86_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
  931. kvm_mmu_flush_tlb(vcpu);
  932. out:
  933. mutex_unlock(&vcpu->kvm->lock);
  934. return r;
  935. }
  936. EXPORT_SYMBOL_GPL(kvm_mmu_load);
  937. void kvm_mmu_unload(struct kvm_vcpu *vcpu)
  938. {
  939. mmu_free_roots(vcpu);
  940. }
  941. static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
  942. struct kvm_mmu_page *page,
  943. u64 *spte)
  944. {
  945. u64 pte;
  946. struct kvm_mmu_page *child;
  947. pte = *spte;
  948. if (is_shadow_present_pte(pte)) {
  949. if (page->role.level == PT_PAGE_TABLE_LEVEL)
  950. rmap_remove(spte);
  951. else {
  952. child = page_header(pte & PT64_BASE_ADDR_MASK);
  953. mmu_page_remove_parent_pte(child, spte);
  954. }
  955. }
  956. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  957. kvm_flush_remote_tlbs(vcpu->kvm);
  958. }
  959. static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
  960. struct kvm_mmu_page *page,
  961. u64 *spte,
  962. const void *new, int bytes,
  963. int offset_in_pte)
  964. {
  965. if (page->role.level != PT_PAGE_TABLE_LEVEL)
  966. return;
  967. if (page->role.glevels == PT32_ROOT_LEVEL)
  968. paging32_update_pte(vcpu, page, spte, new, bytes,
  969. offset_in_pte);
  970. else
  971. paging64_update_pte(vcpu, page, spte, new, bytes,
  972. offset_in_pte);
  973. }
  974. void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  975. const u8 *new, int bytes)
  976. {
  977. gfn_t gfn = gpa >> PAGE_SHIFT;
  978. struct kvm_mmu_page *page;
  979. struct hlist_node *node, *n;
  980. struct hlist_head *bucket;
  981. unsigned index;
  982. u64 *spte;
  983. unsigned offset = offset_in_page(gpa);
  984. unsigned pte_size;
  985. unsigned page_offset;
  986. unsigned misaligned;
  987. unsigned quadrant;
  988. int level;
  989. int flooded = 0;
  990. int npte;
  991. pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
  992. kvm_mmu_audit(vcpu, "pre pte write");
  993. if (gfn == vcpu->last_pt_write_gfn) {
  994. ++vcpu->last_pt_write_count;
  995. if (vcpu->last_pt_write_count >= 3)
  996. flooded = 1;
  997. } else {
  998. vcpu->last_pt_write_gfn = gfn;
  999. vcpu->last_pt_write_count = 1;
  1000. }
  1001. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  1002. bucket = &vcpu->kvm->mmu_page_hash[index];
  1003. hlist_for_each_entry_safe(page, node, n, bucket, hash_link) {
  1004. if (page->gfn != gfn || page->role.metaphysical)
  1005. continue;
  1006. pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
  1007. misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
  1008. misaligned |= bytes < 4;
  1009. if (misaligned || flooded) {
  1010. /*
  1011. * Misaligned accesses are too much trouble to fix
  1012. * up; also, they usually indicate a page is not used
  1013. * as a page table.
  1014. *
  1015. * If we're seeing too many writes to a page,
  1016. * it may no longer be a page table, or we may be
  1017. * forking, in which case it is better to unmap the
  1018. * page.
  1019. */
  1020. pgprintk("misaligned: gpa %llx bytes %d role %x\n",
  1021. gpa, bytes, page->role.word);
  1022. kvm_mmu_zap_page(vcpu->kvm, page);
  1023. continue;
  1024. }
  1025. page_offset = offset;
  1026. level = page->role.level;
  1027. npte = 1;
  1028. if (page->role.glevels == PT32_ROOT_LEVEL) {
  1029. page_offset <<= 1; /* 32->64 */
  1030. /*
  1031. * A 32-bit pde maps 4MB while the shadow pdes map
  1032. * only 2MB. So we need to double the offset again
  1033. * and zap two pdes instead of one.
  1034. */
  1035. if (level == PT32_ROOT_LEVEL) {
  1036. page_offset &= ~7; /* kill rounding error */
  1037. page_offset <<= 1;
  1038. npte = 2;
  1039. }
  1040. quadrant = page_offset >> PAGE_SHIFT;
  1041. page_offset &= ~PAGE_MASK;
  1042. if (quadrant != page->role.quadrant)
  1043. continue;
  1044. }
  1045. spte = &page->spt[page_offset / sizeof(*spte)];
  1046. while (npte--) {
  1047. mmu_pte_write_zap_pte(vcpu, page, spte);
  1048. mmu_pte_write_new_pte(vcpu, page, spte, new, bytes,
  1049. page_offset & (pte_size - 1));
  1050. ++spte;
  1051. }
  1052. }
  1053. kvm_mmu_audit(vcpu, "post pte write");
  1054. }
  1055. int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
  1056. {
  1057. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
  1058. return kvm_mmu_unprotect_page(vcpu, gpa >> PAGE_SHIFT);
  1059. }
  1060. void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
  1061. {
  1062. while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
  1063. struct kvm_mmu_page *page;
  1064. page = container_of(vcpu->kvm->active_mmu_pages.prev,
  1065. struct kvm_mmu_page, link);
  1066. kvm_mmu_zap_page(vcpu->kvm, page);
  1067. }
  1068. }
  1069. static void free_mmu_pages(struct kvm_vcpu *vcpu)
  1070. {
  1071. struct kvm_mmu_page *page;
  1072. while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
  1073. page = container_of(vcpu->kvm->active_mmu_pages.next,
  1074. struct kvm_mmu_page, link);
  1075. kvm_mmu_zap_page(vcpu->kvm, page);
  1076. }
  1077. free_page((unsigned long)vcpu->mmu.pae_root);
  1078. }
  1079. static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
  1080. {
  1081. struct page *page;
  1082. int i;
  1083. ASSERT(vcpu);
  1084. vcpu->kvm->n_free_mmu_pages = KVM_NUM_MMU_PAGES;
  1085. /*
  1086. * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
  1087. * Therefore we need to allocate shadow page tables in the first
  1088. * 4GB of memory, which happens to fit the DMA32 zone.
  1089. */
  1090. page = alloc_page(GFP_KERNEL | __GFP_DMA32);
  1091. if (!page)
  1092. goto error_1;
  1093. vcpu->mmu.pae_root = page_address(page);
  1094. for (i = 0; i < 4; ++i)
  1095. vcpu->mmu.pae_root[i] = INVALID_PAGE;
  1096. return 0;
  1097. error_1:
  1098. free_mmu_pages(vcpu);
  1099. return -ENOMEM;
  1100. }
  1101. int kvm_mmu_create(struct kvm_vcpu *vcpu)
  1102. {
  1103. ASSERT(vcpu);
  1104. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  1105. return alloc_mmu_pages(vcpu);
  1106. }
  1107. int kvm_mmu_setup(struct kvm_vcpu *vcpu)
  1108. {
  1109. ASSERT(vcpu);
  1110. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  1111. return init_kvm_mmu(vcpu);
  1112. }
  1113. void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
  1114. {
  1115. ASSERT(vcpu);
  1116. destroy_kvm_mmu(vcpu);
  1117. free_mmu_pages(vcpu);
  1118. mmu_free_memory_caches(vcpu);
  1119. }
  1120. void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
  1121. {
  1122. struct kvm_mmu_page *page;
  1123. list_for_each_entry(page, &kvm->active_mmu_pages, link) {
  1124. int i;
  1125. u64 *pt;
  1126. if (!test_bit(slot, &page->slot_bitmap))
  1127. continue;
  1128. pt = page->spt;
  1129. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  1130. /* avoid RMW */
  1131. if (pt[i] & PT_WRITABLE_MASK) {
  1132. rmap_remove(&pt[i]);
  1133. pt[i] &= ~PT_WRITABLE_MASK;
  1134. }
  1135. }
  1136. }
  1137. void kvm_mmu_zap_all(struct kvm *kvm)
  1138. {
  1139. struct kvm_mmu_page *page, *node;
  1140. list_for_each_entry_safe(page, node, &kvm->active_mmu_pages, link)
  1141. kvm_mmu_zap_page(kvm, page);
  1142. kvm_flush_remote_tlbs(kvm);
  1143. }
  1144. void kvm_mmu_module_exit(void)
  1145. {
  1146. if (pte_chain_cache)
  1147. kmem_cache_destroy(pte_chain_cache);
  1148. if (rmap_desc_cache)
  1149. kmem_cache_destroy(rmap_desc_cache);
  1150. if (mmu_page_header_cache)
  1151. kmem_cache_destroy(mmu_page_header_cache);
  1152. }
  1153. int kvm_mmu_module_init(void)
  1154. {
  1155. pte_chain_cache = kmem_cache_create("kvm_pte_chain",
  1156. sizeof(struct kvm_pte_chain),
  1157. 0, 0, NULL);
  1158. if (!pte_chain_cache)
  1159. goto nomem;
  1160. rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
  1161. sizeof(struct kvm_rmap_desc),
  1162. 0, 0, NULL);
  1163. if (!rmap_desc_cache)
  1164. goto nomem;
  1165. mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
  1166. sizeof(struct kvm_mmu_page),
  1167. 0, 0, NULL);
  1168. if (!mmu_page_header_cache)
  1169. goto nomem;
  1170. return 0;
  1171. nomem:
  1172. kvm_mmu_module_exit();
  1173. return -ENOMEM;
  1174. }
  1175. #ifdef AUDIT
  1176. static const char *audit_msg;
  1177. static gva_t canonicalize(gva_t gva)
  1178. {
  1179. #ifdef CONFIG_X86_64
  1180. gva = (long long)(gva << 16) >> 16;
  1181. #endif
  1182. return gva;
  1183. }
  1184. static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
  1185. gva_t va, int level)
  1186. {
  1187. u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
  1188. int i;
  1189. gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
  1190. for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
  1191. u64 ent = pt[i];
  1192. if (ent == shadow_trap_nonpresent_pte)
  1193. continue;
  1194. va = canonicalize(va);
  1195. if (level > 1) {
  1196. if (ent == shadow_notrap_nonpresent_pte)
  1197. printk(KERN_ERR "audit: (%s) nontrapping pte"
  1198. " in nonleaf level: levels %d gva %lx"
  1199. " level %d pte %llx\n", audit_msg,
  1200. vcpu->mmu.root_level, va, level, ent);
  1201. audit_mappings_page(vcpu, ent, va, level - 1);
  1202. } else {
  1203. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va);
  1204. hpa_t hpa = gpa_to_hpa(vcpu, gpa);
  1205. if (is_shadow_present_pte(ent)
  1206. && (ent & PT64_BASE_ADDR_MASK) != hpa)
  1207. printk(KERN_ERR "xx audit error: (%s) levels %d"
  1208. " gva %lx gpa %llx hpa %llx ent %llx %d\n",
  1209. audit_msg, vcpu->mmu.root_level,
  1210. va, gpa, hpa, ent, is_shadow_present_pte(ent));
  1211. else if (ent == shadow_notrap_nonpresent_pte
  1212. && !is_error_hpa(hpa))
  1213. printk(KERN_ERR "audit: (%s) notrap shadow,"
  1214. " valid guest gva %lx\n", audit_msg, va);
  1215. }
  1216. }
  1217. }
  1218. static void audit_mappings(struct kvm_vcpu *vcpu)
  1219. {
  1220. unsigned i;
  1221. if (vcpu->mmu.root_level == 4)
  1222. audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4);
  1223. else
  1224. for (i = 0; i < 4; ++i)
  1225. if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK)
  1226. audit_mappings_page(vcpu,
  1227. vcpu->mmu.pae_root[i],
  1228. i << 30,
  1229. 2);
  1230. }
  1231. static int count_rmaps(struct kvm_vcpu *vcpu)
  1232. {
  1233. int nmaps = 0;
  1234. int i, j, k;
  1235. for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
  1236. struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
  1237. struct kvm_rmap_desc *d;
  1238. for (j = 0; j < m->npages; ++j) {
  1239. struct page *page = m->phys_mem[j];
  1240. if (!page->private)
  1241. continue;
  1242. if (!(page->private & 1)) {
  1243. ++nmaps;
  1244. continue;
  1245. }
  1246. d = (struct kvm_rmap_desc *)(page->private & ~1ul);
  1247. while (d) {
  1248. for (k = 0; k < RMAP_EXT; ++k)
  1249. if (d->shadow_ptes[k])
  1250. ++nmaps;
  1251. else
  1252. break;
  1253. d = d->more;
  1254. }
  1255. }
  1256. }
  1257. return nmaps;
  1258. }
  1259. static int count_writable_mappings(struct kvm_vcpu *vcpu)
  1260. {
  1261. int nmaps = 0;
  1262. struct kvm_mmu_page *page;
  1263. int i;
  1264. list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
  1265. u64 *pt = page->spt;
  1266. if (page->role.level != PT_PAGE_TABLE_LEVEL)
  1267. continue;
  1268. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1269. u64 ent = pt[i];
  1270. if (!(ent & PT_PRESENT_MASK))
  1271. continue;
  1272. if (!(ent & PT_WRITABLE_MASK))
  1273. continue;
  1274. ++nmaps;
  1275. }
  1276. }
  1277. return nmaps;
  1278. }
  1279. static void audit_rmap(struct kvm_vcpu *vcpu)
  1280. {
  1281. int n_rmap = count_rmaps(vcpu);
  1282. int n_actual = count_writable_mappings(vcpu);
  1283. if (n_rmap != n_actual)
  1284. printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
  1285. __FUNCTION__, audit_msg, n_rmap, n_actual);
  1286. }
  1287. static void audit_write_protection(struct kvm_vcpu *vcpu)
  1288. {
  1289. struct kvm_mmu_page *page;
  1290. list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
  1291. hfn_t hfn;
  1292. struct page *pg;
  1293. if (page->role.metaphysical)
  1294. continue;
  1295. hfn = gpa_to_hpa(vcpu, (gpa_t)page->gfn << PAGE_SHIFT)
  1296. >> PAGE_SHIFT;
  1297. pg = pfn_to_page(hfn);
  1298. if (pg->private)
  1299. printk(KERN_ERR "%s: (%s) shadow page has writable"
  1300. " mappings: gfn %lx role %x\n",
  1301. __FUNCTION__, audit_msg, page->gfn,
  1302. page->role.word);
  1303. }
  1304. }
  1305. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
  1306. {
  1307. int olddbg = dbg;
  1308. dbg = 0;
  1309. audit_msg = msg;
  1310. audit_rmap(vcpu);
  1311. audit_write_protection(vcpu);
  1312. audit_mappings(vcpu);
  1313. dbg = olddbg;
  1314. }
  1315. #endif