board-mx51_efikamx.c 8.4 KB

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  1. /*
  2. * Copyright (C) 2010 Linaro Limited
  3. *
  4. * based on code from the following
  5. * Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
  6. * Copyright 2009-2010 Pegatron Corporation. All Rights Reserved.
  7. * Copyright 2009-2010 Genesi USA, Inc. All Rights Reserved.
  8. *
  9. * The code contained herein is licensed under the GNU General Public
  10. * License. You may obtain a copy of the GNU General Public License
  11. * Version 2 or later at the following locations:
  12. *
  13. * http://www.opensource.org/licenses/gpl-license.html
  14. * http://www.gnu.org/copyleft/gpl.html
  15. */
  16. #include <linux/init.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/i2c.h>
  19. #include <linux/gpio.h>
  20. #include <linux/leds.h>
  21. #include <linux/input.h>
  22. #include <linux/delay.h>
  23. #include <linux/io.h>
  24. #include <linux/fsl_devices.h>
  25. #include <linux/spi/flash.h>
  26. #include <linux/spi/spi.h>
  27. #include <mach/common.h>
  28. #include <mach/hardware.h>
  29. #include <mach/iomux-mx51.h>
  30. #include <mach/i2c.h>
  31. #include <mach/mxc_ehci.h>
  32. #include <asm/irq.h>
  33. #include <asm/setup.h>
  34. #include <asm/mach-types.h>
  35. #include <asm/mach/arch.h>
  36. #include <asm/mach/time.h>
  37. #include "devices-imx51.h"
  38. #include "devices.h"
  39. #define MX51_USB_PLL_DIV_24_MHZ 0x01
  40. #define EFIKAMX_PCBID0 (2*32 + 16)
  41. #define EFIKAMX_PCBID1 (2*32 + 17)
  42. #define EFIKAMX_PCBID2 (2*32 + 11)
  43. #define EFIKAMX_BLUE_LED (2*32 + 13)
  44. #define EFIKAMX_GREEN_LED (2*32 + 14)
  45. #define EFIKAMX_RED_LED (2*32 + 15)
  46. #define EFIKAMX_POWER_KEY (1*32 + 31)
  47. #define EFIKAMX_SPI_CS0 (3*32 + 24)
  48. #define EFIKAMX_SPI_CS1 (3*32 + 25)
  49. /* the pci ids pin have pull up. they're driven low according to board id */
  50. #define MX51_PAD_PCBID0 IOMUX_PAD(0x518, 0x130, 3, 0x0, 0, PAD_CTL_PUS_100K_UP)
  51. #define MX51_PAD_PCBID1 IOMUX_PAD(0x51C, 0x134, 3, 0x0, 0, PAD_CTL_PUS_100K_UP)
  52. #define MX51_PAD_PCBID2 IOMUX_PAD(0x504, 0x128, 3, 0x0, 0, PAD_CTL_PUS_100K_UP)
  53. #define MX51_PAD_PWRKEY IOMUX_PAD(0x48c, 0x0f8, 1, 0x0, 0, PAD_CTL_PUS_100K_UP | PAD_CTL_PKE)
  54. static iomux_v3_cfg_t mx51efikamx_pads[] = {
  55. /* UART1 */
  56. MX51_PAD_UART1_RXD__UART1_RXD,
  57. MX51_PAD_UART1_TXD__UART1_TXD,
  58. MX51_PAD_UART1_RTS__UART1_RTS,
  59. MX51_PAD_UART1_CTS__UART1_CTS,
  60. /* board id */
  61. MX51_PAD_PCBID0,
  62. MX51_PAD_PCBID1,
  63. MX51_PAD_PCBID2,
  64. /* SD 1 */
  65. MX51_PAD_SD1_CMD__SD1_CMD,
  66. MX51_PAD_SD1_CLK__SD1_CLK,
  67. MX51_PAD_SD1_DATA0__SD1_DATA0,
  68. MX51_PAD_SD1_DATA1__SD1_DATA1,
  69. MX51_PAD_SD1_DATA2__SD1_DATA2,
  70. MX51_PAD_SD1_DATA3__SD1_DATA3,
  71. /* SD 2 */
  72. MX51_PAD_SD2_CMD__SD2_CMD,
  73. MX51_PAD_SD2_CLK__SD2_CLK,
  74. MX51_PAD_SD2_DATA0__SD2_DATA0,
  75. MX51_PAD_SD2_DATA1__SD2_DATA1,
  76. MX51_PAD_SD2_DATA2__SD2_DATA2,
  77. MX51_PAD_SD2_DATA3__SD2_DATA3,
  78. /* SD/MMC WP/CD */
  79. MX51_PAD_GPIO_1_0__ESDHC1_CD,
  80. MX51_PAD_GPIO_1_1__ESDHC1_WP,
  81. MX51_PAD_GPIO_1_7__ESDHC2_WP,
  82. MX51_PAD_GPIO_1_8__ESDHC2_CD,
  83. /* leds */
  84. MX51_PAD_CSI1_D9__GPIO_3_13,
  85. MX51_PAD_CSI1_VSYNC__GPIO_3_14,
  86. MX51_PAD_CSI1_HSYNC__GPIO_3_15,
  87. /* power key */
  88. MX51_PAD_PWRKEY,
  89. /* spi */
  90. MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI,
  91. MX51_PAD_CSPI1_MISO__ECSPI1_MISO,
  92. MX51_PAD_CSPI1_SS0__GPIO_4_24,
  93. MX51_PAD_CSPI1_SS1__GPIO_4_25,
  94. MX51_PAD_CSPI1_RDY__ECSPI1_RDY,
  95. MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK,
  96. };
  97. /* Serial ports */
  98. #if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE)
  99. static const struct imxuart_platform_data uart_pdata = {
  100. .flags = IMXUART_HAVE_RTSCTS,
  101. };
  102. static inline void mxc_init_imx_uart(void)
  103. {
  104. imx51_add_imx_uart(0, &uart_pdata);
  105. imx51_add_imx_uart(1, &uart_pdata);
  106. imx51_add_imx_uart(2, &uart_pdata);
  107. }
  108. #else /* !SERIAL_IMX */
  109. static inline void mxc_init_imx_uart(void)
  110. {
  111. }
  112. #endif /* SERIAL_IMX */
  113. /* This function is board specific as the bit mask for the plldiv will also
  114. * be different for other Freescale SoCs, thus a common bitmask is not
  115. * possible and cannot get place in /plat-mxc/ehci.c.
  116. */
  117. static int initialize_otg_port(struct platform_device *pdev)
  118. {
  119. u32 v;
  120. void __iomem *usb_base;
  121. void __iomem *usbother_base;
  122. usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
  123. usbother_base = (void __iomem *)(usb_base + MX5_USBOTHER_REGS_OFFSET);
  124. /* Set the PHY clock to 19.2MHz */
  125. v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
  126. v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK;
  127. v |= MX51_USB_PLL_DIV_24_MHZ;
  128. __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
  129. iounmap(usb_base);
  130. return 0;
  131. }
  132. static struct mxc_usbh_platform_data dr_utmi_config = {
  133. .init = initialize_otg_port,
  134. .portsc = MXC_EHCI_UTMI_16BIT,
  135. .flags = MXC_EHCI_INTERNAL_PHY,
  136. };
  137. /* PCBID2 PCBID1 PCBID0 STATE
  138. 1 1 1 ER1:rev1.1
  139. 1 1 0 ER2:rev1.2
  140. 1 0 1 ER3:rev1.3
  141. 1 0 0 ER4:rev1.4
  142. */
  143. static void __init mx51_efikamx_board_id(void)
  144. {
  145. int id;
  146. /* things are taking time to settle */
  147. msleep(150);
  148. gpio_request(EFIKAMX_PCBID0, "pcbid0");
  149. gpio_direction_input(EFIKAMX_PCBID0);
  150. gpio_request(EFIKAMX_PCBID1, "pcbid1");
  151. gpio_direction_input(EFIKAMX_PCBID1);
  152. gpio_request(EFIKAMX_PCBID2, "pcbid2");
  153. gpio_direction_input(EFIKAMX_PCBID2);
  154. id = gpio_get_value(EFIKAMX_PCBID0);
  155. id |= gpio_get_value(EFIKAMX_PCBID1) << 1;
  156. id |= gpio_get_value(EFIKAMX_PCBID2) << 2;
  157. switch (id) {
  158. case 7:
  159. system_rev = 0x11;
  160. break;
  161. case 6:
  162. system_rev = 0x12;
  163. break;
  164. case 5:
  165. system_rev = 0x13;
  166. break;
  167. case 4:
  168. system_rev = 0x14;
  169. break;
  170. default:
  171. system_rev = 0x10;
  172. break;
  173. }
  174. if ((system_rev == 0x10)
  175. || (system_rev == 0x12)
  176. || (system_rev == 0x14)) {
  177. printk(KERN_WARNING
  178. "EfikaMX: Unsupported board revision 1.%u!\n",
  179. system_rev & 0xf);
  180. }
  181. }
  182. static struct gpio_led mx51_efikamx_leds[] = {
  183. {
  184. .name = "efikamx:green",
  185. .default_trigger = "default-on",
  186. .gpio = EFIKAMX_GREEN_LED,
  187. },
  188. {
  189. .name = "efikamx:red",
  190. .default_trigger = "ide-disk",
  191. .gpio = EFIKAMX_RED_LED,
  192. },
  193. {
  194. .name = "efikamx:blue",
  195. .default_trigger = "mmc0",
  196. .gpio = EFIKAMX_BLUE_LED,
  197. },
  198. };
  199. static struct gpio_led_platform_data mx51_efikamx_leds_data = {
  200. .leds = mx51_efikamx_leds,
  201. .num_leds = ARRAY_SIZE(mx51_efikamx_leds),
  202. };
  203. static struct platform_device mx51_efikamx_leds_device = {
  204. .name = "leds-gpio",
  205. .id = -1,
  206. .dev = {
  207. .platform_data = &mx51_efikamx_leds_data,
  208. },
  209. };
  210. static struct gpio_keys_button mx51_efikamx_powerkey[] = {
  211. {
  212. .code = KEY_POWER,
  213. .gpio = EFIKAMX_POWER_KEY,
  214. .type = EV_PWR,
  215. .desc = "Power Button (CM)",
  216. .wakeup = 1,
  217. .debounce_interval = 10, /* ms */
  218. },
  219. };
  220. static const struct gpio_keys_platform_data mx51_efikamx_powerkey_data __initconst = {
  221. .buttons = mx51_efikamx_powerkey,
  222. .nbuttons = ARRAY_SIZE(mx51_efikamx_powerkey),
  223. };
  224. static struct mtd_partition mx51_efikamx_spi_nor_partitions[] = {
  225. {
  226. .name = "u-boot",
  227. .offset = 0,
  228. .size = SZ_256K,
  229. },
  230. {
  231. .name = "config",
  232. .offset = MTDPART_OFS_APPEND,
  233. .size = SZ_64K,
  234. },
  235. };
  236. static struct flash_platform_data mx51_efikamx_spi_flash_data = {
  237. .name = "spi_flash",
  238. .parts = mx51_efikamx_spi_nor_partitions,
  239. .nr_parts = ARRAY_SIZE(mx51_efikamx_spi_nor_partitions),
  240. .type = "sst25vf032b",
  241. };
  242. static struct spi_board_info mx51_efikamx_spi_board_info[] __initdata = {
  243. {
  244. .modalias = "m25p80",
  245. .max_speed_hz = 25000000,
  246. .bus_num = 0,
  247. .chip_select = 1,
  248. .platform_data = &mx51_efikamx_spi_flash_data,
  249. .irq = -1,
  250. },
  251. };
  252. static int mx51_efikamx_spi_cs[] = {
  253. EFIKAMX_SPI_CS0,
  254. EFIKAMX_SPI_CS1,
  255. };
  256. static const struct spi_imx_master mx51_efikamx_spi_pdata __initconst = {
  257. .chipselect = mx51_efikamx_spi_cs,
  258. .num_chipselect = ARRAY_SIZE(mx51_efikamx_spi_cs),
  259. };
  260. static void __init mxc_board_init(void)
  261. {
  262. mxc_iomux_v3_setup_multiple_pads(mx51efikamx_pads,
  263. ARRAY_SIZE(mx51efikamx_pads));
  264. mx51_efikamx_board_id();
  265. mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config);
  266. mxc_init_imx_uart();
  267. imx51_add_esdhc(0, NULL);
  268. /* on < 1.2 boards both SD controllers are used */
  269. if (system_rev < 0x12) {
  270. imx51_add_esdhc(1, NULL);
  271. mx51_efikamx_leds[2].default_trigger = "mmc1";
  272. }
  273. platform_device_register(&mx51_efikamx_leds_device);
  274. imx51_add_gpio_keys(&mx51_efikamx_powerkey_data);
  275. spi_register_board_info(mx51_efikamx_spi_board_info,
  276. ARRAY_SIZE(mx51_efikamx_spi_board_info));
  277. imx51_add_ecspi(0, &mx51_efikamx_spi_pdata);
  278. }
  279. static void __init mx51_efikamx_timer_init(void)
  280. {
  281. mx51_clocks_init(32768, 24000000, 22579200, 24576000);
  282. }
  283. static struct sys_timer mxc_timer = {
  284. .init = mx51_efikamx_timer_init,
  285. };
  286. MACHINE_START(MX51_EFIKAMX, "Genesi EfikaMX nettop")
  287. /* Maintainer: Amit Kucheria <amit.kucheria@linaro.org> */
  288. .boot_params = MX51_PHYS_OFFSET + 0x100,
  289. .map_io = mx51_map_io,
  290. .init_irq = mx51_init_irq,
  291. .init_machine = mxc_board_init,
  292. .timer = &mxc_timer,
  293. MACHINE_END