smp_32.h 4.0 KB

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  1. /* smp.h: Sparc specific SMP stuff.
  2. *
  3. * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
  4. */
  5. #ifndef _SPARC_SMP_H
  6. #define _SPARC_SMP_H
  7. #include <linux/threads.h>
  8. #include <asm/head.h>
  9. #include <asm/btfixup.h>
  10. #ifndef __ASSEMBLY__
  11. #include <linux/cpumask.h>
  12. #endif /* __ASSEMBLY__ */
  13. #ifdef CONFIG_SMP
  14. #ifndef __ASSEMBLY__
  15. #include <asm/ptrace.h>
  16. #include <asm/asi.h>
  17. #include <linux/atomic.h>
  18. /*
  19. * Private routines/data
  20. */
  21. extern unsigned char boot_cpu_id;
  22. extern volatile unsigned long cpu_callin_map[NR_CPUS];
  23. extern cpumask_t smp_commenced_mask;
  24. extern struct linux_prom_registers smp_penguin_ctable;
  25. typedef void (*smpfunc_t)(unsigned long, unsigned long, unsigned long,
  26. unsigned long, unsigned long);
  27. void cpu_panic(void);
  28. extern void smp4m_irq_rotate(int cpu);
  29. /*
  30. * General functions that each host system must provide.
  31. */
  32. void sun4m_init_smp(void);
  33. void sun4d_init_smp(void);
  34. void smp_callin(void);
  35. void smp_boot_cpus(void);
  36. void smp_store_cpu_info(int);
  37. void smp_resched_interrupt(void);
  38. void smp_call_function_single_interrupt(void);
  39. void smp_call_function_interrupt(void);
  40. struct seq_file;
  41. void smp_bogo(struct seq_file *);
  42. void smp_info(struct seq_file *);
  43. BTFIXUPDEF_CALL(void, smp_cross_call, smpfunc_t, cpumask_t, unsigned long, unsigned long, unsigned long, unsigned long)
  44. BTFIXUPDEF_CALL(void, smp_ipi_resched, int);
  45. BTFIXUPDEF_CALL(void, smp_ipi_single, int);
  46. BTFIXUPDEF_CALL(void, smp_ipi_mask_one, int);
  47. #define smp_cross_call(func,mask,arg1,arg2,arg3,arg4) BTFIXUP_CALL(smp_cross_call)(func,mask,arg1,arg2,arg3,arg4)
  48. static inline void xc0(smpfunc_t func) { smp_cross_call(func, *cpu_online_mask, 0, 0, 0, 0); }
  49. static inline void xc1(smpfunc_t func, unsigned long arg1)
  50. { smp_cross_call(func, *cpu_online_mask, arg1, 0, 0, 0); }
  51. static inline void xc2(smpfunc_t func, unsigned long arg1, unsigned long arg2)
  52. { smp_cross_call(func, *cpu_online_mask, arg1, arg2, 0, 0); }
  53. static inline void xc3(smpfunc_t func, unsigned long arg1, unsigned long arg2,
  54. unsigned long arg3)
  55. { smp_cross_call(func, *cpu_online_mask, arg1, arg2, arg3, 0); }
  56. static inline void xc4(smpfunc_t func, unsigned long arg1, unsigned long arg2,
  57. unsigned long arg3, unsigned long arg4)
  58. { smp_cross_call(func, *cpu_online_mask, arg1, arg2, arg3, arg4); }
  59. extern void arch_send_call_function_single_ipi(int cpu);
  60. extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
  61. static inline int cpu_logical_map(int cpu)
  62. {
  63. return cpu;
  64. }
  65. static inline int hard_smp4m_processor_id(void)
  66. {
  67. int cpuid;
  68. __asm__ __volatile__("rd %%tbr, %0\n\t"
  69. "srl %0, 12, %0\n\t"
  70. "and %0, 3, %0\n\t" :
  71. "=&r" (cpuid));
  72. return cpuid;
  73. }
  74. static inline int hard_smp4d_processor_id(void)
  75. {
  76. int cpuid;
  77. __asm__ __volatile__("lda [%%g0] %1, %0\n\t" :
  78. "=&r" (cpuid) : "i" (ASI_M_VIKING_TMP1));
  79. return cpuid;
  80. }
  81. extern inline int hard_smpleon_processor_id(void)
  82. {
  83. int cpuid;
  84. __asm__ __volatile__("rd %%asr17,%0\n\t"
  85. "srl %0,28,%0" :
  86. "=&r" (cpuid) : );
  87. return cpuid;
  88. }
  89. extern int hard_smp_processor_id(void);
  90. #define raw_smp_processor_id() (current_thread_info()->cpu)
  91. #define prof_multiplier(__cpu) cpu_data(__cpu).multiplier
  92. #define prof_counter(__cpu) cpu_data(__cpu).counter
  93. void smp_setup_cpu_possible_map(void);
  94. #endif /* !(__ASSEMBLY__) */
  95. /* Sparc specific messages. */
  96. #define MSG_CROSS_CALL 0x0005 /* run func on cpus */
  97. /* Empirical PROM processor mailbox constants. If the per-cpu mailbox
  98. * contains something other than one of these then the ipi is from
  99. * Linux's active_kernel_processor. This facility exists so that
  100. * the boot monitor can capture all the other cpus when one catches
  101. * a watchdog reset or the user enters the monitor using L1-A keys.
  102. */
  103. #define MBOX_STOPCPU 0xFB
  104. #define MBOX_IDLECPU 0xFC
  105. #define MBOX_IDLECPU2 0xFD
  106. #define MBOX_STOPCPU2 0xFE
  107. #else /* SMP */
  108. #define hard_smp_processor_id() 0
  109. #define smp_setup_cpu_possible_map() do { } while (0)
  110. #endif /* !(SMP) */
  111. #endif /* !(_SPARC_SMP_H) */