cciss.c 119 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array controllers.
  3. * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  12. * General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  17. * 02111-1307, USA.
  18. *
  19. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  20. *
  21. */
  22. #include <linux/module.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/types.h>
  25. #include <linux/pci.h>
  26. #include <linux/kernel.h>
  27. #include <linux/slab.h>
  28. #include <linux/smp_lock.h>
  29. #include <linux/delay.h>
  30. #include <linux/major.h>
  31. #include <linux/fs.h>
  32. #include <linux/bio.h>
  33. #include <linux/blkpg.h>
  34. #include <linux/timer.h>
  35. #include <linux/proc_fs.h>
  36. #include <linux/seq_file.h>
  37. #include <linux/init.h>
  38. #include <linux/jiffies.h>
  39. #include <linux/hdreg.h>
  40. #include <linux/spinlock.h>
  41. #include <linux/compat.h>
  42. #include <asm/uaccess.h>
  43. #include <asm/io.h>
  44. #include <linux/dma-mapping.h>
  45. #include <linux/blkdev.h>
  46. #include <linux/genhd.h>
  47. #include <linux/completion.h>
  48. #include <scsi/scsi.h>
  49. #include <scsi/sg.h>
  50. #include <scsi/scsi_ioctl.h>
  51. #include <linux/cdrom.h>
  52. #include <linux/scatterlist.h>
  53. #include <linux/kthread.h>
  54. #define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
  55. #define DRIVER_NAME "HP CISS Driver (v 3.6.20)"
  56. #define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 20)
  57. /* Embedded module documentation macros - see modules.h */
  58. MODULE_AUTHOR("Hewlett-Packard Company");
  59. MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
  60. MODULE_SUPPORTED_DEVICE("HP SA5i SA5i+ SA532 SA5300 SA5312 SA641 SA642 SA6400"
  61. " SA6i P600 P800 P400 P400i E200 E200i E500 P700m"
  62. " Smart Array G2 Series SAS/SATA Controllers");
  63. MODULE_VERSION("3.6.20");
  64. MODULE_LICENSE("GPL");
  65. #include "cciss_cmd.h"
  66. #include "cciss.h"
  67. #include <linux/cciss_ioctl.h>
  68. /* define the PCI info for the cards we can control */
  69. static const struct pci_device_id cciss_pci_device_id[] = {
  70. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070},
  71. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
  72. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
  73. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
  74. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
  75. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
  76. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
  77. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
  78. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
  79. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225},
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
  82. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213},
  86. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214},
  87. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215},
  88. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237},
  89. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
  90. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
  91. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
  92. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
  93. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
  94. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
  95. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
  96. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
  97. {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  98. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  99. {0,}
  100. };
  101. MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
  102. /* board_id = Subsystem Device ID & Vendor ID
  103. * product = Marketing Name for the board
  104. * access = Address of the struct of function pointers
  105. */
  106. static struct board_type products[] = {
  107. {0x40700E11, "Smart Array 5300", &SA5_access},
  108. {0x40800E11, "Smart Array 5i", &SA5B_access},
  109. {0x40820E11, "Smart Array 532", &SA5B_access},
  110. {0x40830E11, "Smart Array 5312", &SA5B_access},
  111. {0x409A0E11, "Smart Array 641", &SA5_access},
  112. {0x409B0E11, "Smart Array 642", &SA5_access},
  113. {0x409C0E11, "Smart Array 6400", &SA5_access},
  114. {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
  115. {0x40910E11, "Smart Array 6i", &SA5_access},
  116. {0x3225103C, "Smart Array P600", &SA5_access},
  117. {0x3223103C, "Smart Array P800", &SA5_access},
  118. {0x3234103C, "Smart Array P400", &SA5_access},
  119. {0x3235103C, "Smart Array P400i", &SA5_access},
  120. {0x3211103C, "Smart Array E200i", &SA5_access},
  121. {0x3212103C, "Smart Array E200", &SA5_access},
  122. {0x3213103C, "Smart Array E200i", &SA5_access},
  123. {0x3214103C, "Smart Array E200i", &SA5_access},
  124. {0x3215103C, "Smart Array E200i", &SA5_access},
  125. {0x3237103C, "Smart Array E500", &SA5_access},
  126. {0x323D103C, "Smart Array P700m", &SA5_access},
  127. {0x3241103C, "Smart Array P212", &SA5_access},
  128. {0x3243103C, "Smart Array P410", &SA5_access},
  129. {0x3245103C, "Smart Array P410i", &SA5_access},
  130. {0x3247103C, "Smart Array P411", &SA5_access},
  131. {0x3249103C, "Smart Array P812", &SA5_access},
  132. {0x324A103C, "Smart Array P712m", &SA5_access},
  133. {0x324B103C, "Smart Array P711m", &SA5_access},
  134. {0xFFFF103C, "Unknown Smart Array", &SA5_access},
  135. };
  136. /* How long to wait (in milliseconds) for board to go into simple mode */
  137. #define MAX_CONFIG_WAIT 30000
  138. #define MAX_IOCTL_CONFIG_WAIT 1000
  139. /*define how many times we will try a command because of bus resets */
  140. #define MAX_CMD_RETRIES 3
  141. #define MAX_CTLR 32
  142. /* Originally cciss driver only supports 8 major numbers */
  143. #define MAX_CTLR_ORIG 8
  144. static ctlr_info_t *hba[MAX_CTLR];
  145. static void do_cciss_request(struct request_queue *q);
  146. static irqreturn_t do_cciss_intr(int irq, void *dev_id);
  147. static int cciss_open(struct block_device *bdev, fmode_t mode);
  148. static int cciss_release(struct gendisk *disk, fmode_t mode);
  149. static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
  150. unsigned int cmd, unsigned long arg);
  151. static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
  152. static int cciss_revalidate(struct gendisk *disk);
  153. static int rebuild_lun_table(ctlr_info_t *h, int first_time);
  154. static int deregister_disk(ctlr_info_t *h, int drv_index,
  155. int clear_all);
  156. static void cciss_read_capacity(int ctlr, int logvol, int withirq,
  157. sector_t *total_size, unsigned int *block_size);
  158. static void cciss_read_capacity_16(int ctlr, int logvol, int withirq,
  159. sector_t *total_size, unsigned int *block_size);
  160. static void cciss_geometry_inquiry(int ctlr, int logvol,
  161. int withirq, sector_t total_size,
  162. unsigned int block_size, InquiryData_struct *inq_buff,
  163. drive_info_struct *drv);
  164. static void __devinit cciss_interrupt_mode(ctlr_info_t *, struct pci_dev *,
  165. __u32);
  166. static void start_io(ctlr_info_t *h);
  167. static int sendcmd(__u8 cmd, int ctlr, void *buff, size_t size,
  168. __u8 page_code, unsigned char *scsi3addr, int cmd_type);
  169. static int sendcmd_withirq(__u8 cmd, int ctlr, void *buff, size_t size,
  170. __u8 page_code, unsigned char scsi3addr[],
  171. int cmd_type);
  172. static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
  173. int attempt_retry);
  174. static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
  175. static void fail_all_cmds(unsigned long ctlr);
  176. static int scan_thread(void *data);
  177. static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
  178. #ifdef CONFIG_PROC_FS
  179. static void cciss_procinit(int i);
  180. #else
  181. static void cciss_procinit(int i)
  182. {
  183. }
  184. #endif /* CONFIG_PROC_FS */
  185. #ifdef CONFIG_COMPAT
  186. static int cciss_compat_ioctl(struct block_device *, fmode_t,
  187. unsigned, unsigned long);
  188. #endif
  189. static const struct block_device_operations cciss_fops = {
  190. .owner = THIS_MODULE,
  191. .open = cciss_open,
  192. .release = cciss_release,
  193. .locked_ioctl = cciss_ioctl,
  194. .getgeo = cciss_getgeo,
  195. #ifdef CONFIG_COMPAT
  196. .compat_ioctl = cciss_compat_ioctl,
  197. #endif
  198. .revalidate_disk = cciss_revalidate,
  199. };
  200. /*
  201. * Enqueuing and dequeuing functions for cmdlists.
  202. */
  203. static inline void addQ(struct hlist_head *list, CommandList_struct *c)
  204. {
  205. hlist_add_head(&c->list, list);
  206. }
  207. static inline void removeQ(CommandList_struct *c)
  208. {
  209. /*
  210. * After kexec/dump some commands might still
  211. * be in flight, which the firmware will try
  212. * to complete. Resetting the firmware doesn't work
  213. * with old fw revisions, so we have to mark
  214. * them off as 'stale' to prevent the driver from
  215. * falling over.
  216. */
  217. if (WARN_ON(hlist_unhashed(&c->list))) {
  218. c->cmd_type = CMD_MSG_STALE;
  219. return;
  220. }
  221. hlist_del_init(&c->list);
  222. }
  223. #include "cciss_scsi.c" /* For SCSI tape support */
  224. #define RAID_UNKNOWN 6
  225. #ifdef CONFIG_PROC_FS
  226. /*
  227. * Report information about this controller.
  228. */
  229. #define ENG_GIG 1000000000
  230. #define ENG_GIG_FACTOR (ENG_GIG/512)
  231. #define ENGAGE_SCSI "engage scsi"
  232. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  233. "UNKNOWN"
  234. };
  235. static struct proc_dir_entry *proc_cciss;
  236. static void cciss_seq_show_header(struct seq_file *seq)
  237. {
  238. ctlr_info_t *h = seq->private;
  239. seq_printf(seq, "%s: HP %s Controller\n"
  240. "Board ID: 0x%08lx\n"
  241. "Firmware Version: %c%c%c%c\n"
  242. "IRQ: %d\n"
  243. "Logical drives: %d\n"
  244. "Current Q depth: %d\n"
  245. "Current # commands on controller: %d\n"
  246. "Max Q depth since init: %d\n"
  247. "Max # commands on controller since init: %d\n"
  248. "Max SG entries since init: %d\n",
  249. h->devname,
  250. h->product_name,
  251. (unsigned long)h->board_id,
  252. h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
  253. h->firm_ver[3], (unsigned int)h->intr[SIMPLE_MODE_INT],
  254. h->num_luns,
  255. h->Qdepth, h->commands_outstanding,
  256. h->maxQsinceinit, h->max_outstanding, h->maxSG);
  257. #ifdef CONFIG_CISS_SCSI_TAPE
  258. cciss_seq_tape_report(seq, h->ctlr);
  259. #endif /* CONFIG_CISS_SCSI_TAPE */
  260. }
  261. static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
  262. {
  263. ctlr_info_t *h = seq->private;
  264. unsigned ctlr = h->ctlr;
  265. unsigned long flags;
  266. /* prevent displaying bogus info during configuration
  267. * or deconfiguration of a logical volume
  268. */
  269. spin_lock_irqsave(CCISS_LOCK(ctlr), flags);
  270. if (h->busy_configuring) {
  271. spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
  272. return ERR_PTR(-EBUSY);
  273. }
  274. h->busy_configuring = 1;
  275. spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
  276. if (*pos == 0)
  277. cciss_seq_show_header(seq);
  278. return pos;
  279. }
  280. static int cciss_seq_show(struct seq_file *seq, void *v)
  281. {
  282. sector_t vol_sz, vol_sz_frac;
  283. ctlr_info_t *h = seq->private;
  284. unsigned ctlr = h->ctlr;
  285. loff_t *pos = v;
  286. drive_info_struct *drv = &h->drv[*pos];
  287. if (*pos > h->highest_lun)
  288. return 0;
  289. if (drv->heads == 0)
  290. return 0;
  291. vol_sz = drv->nr_blocks;
  292. vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
  293. vol_sz_frac *= 100;
  294. sector_div(vol_sz_frac, ENG_GIG_FACTOR);
  295. if (drv->raid_level > 5)
  296. drv->raid_level = RAID_UNKNOWN;
  297. seq_printf(seq, "cciss/c%dd%d:"
  298. "\t%4u.%02uGB\tRAID %s\n",
  299. ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
  300. raid_label[drv->raid_level]);
  301. return 0;
  302. }
  303. static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
  304. {
  305. ctlr_info_t *h = seq->private;
  306. if (*pos > h->highest_lun)
  307. return NULL;
  308. *pos += 1;
  309. return pos;
  310. }
  311. static void cciss_seq_stop(struct seq_file *seq, void *v)
  312. {
  313. ctlr_info_t *h = seq->private;
  314. /* Only reset h->busy_configuring if we succeeded in setting
  315. * it during cciss_seq_start. */
  316. if (v == ERR_PTR(-EBUSY))
  317. return;
  318. h->busy_configuring = 0;
  319. }
  320. static const struct seq_operations cciss_seq_ops = {
  321. .start = cciss_seq_start,
  322. .show = cciss_seq_show,
  323. .next = cciss_seq_next,
  324. .stop = cciss_seq_stop,
  325. };
  326. static int cciss_seq_open(struct inode *inode, struct file *file)
  327. {
  328. int ret = seq_open(file, &cciss_seq_ops);
  329. struct seq_file *seq = file->private_data;
  330. if (!ret)
  331. seq->private = PDE(inode)->data;
  332. return ret;
  333. }
  334. static ssize_t
  335. cciss_proc_write(struct file *file, const char __user *buf,
  336. size_t length, loff_t *ppos)
  337. {
  338. int err;
  339. char *buffer;
  340. #ifndef CONFIG_CISS_SCSI_TAPE
  341. return -EINVAL;
  342. #endif
  343. if (!buf || length > PAGE_SIZE - 1)
  344. return -EINVAL;
  345. buffer = (char *)__get_free_page(GFP_KERNEL);
  346. if (!buffer)
  347. return -ENOMEM;
  348. err = -EFAULT;
  349. if (copy_from_user(buffer, buf, length))
  350. goto out;
  351. buffer[length] = '\0';
  352. #ifdef CONFIG_CISS_SCSI_TAPE
  353. if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
  354. struct seq_file *seq = file->private_data;
  355. ctlr_info_t *h = seq->private;
  356. int rc;
  357. rc = cciss_engage_scsi(h->ctlr);
  358. if (rc != 0)
  359. err = -rc;
  360. else
  361. err = length;
  362. } else
  363. #endif /* CONFIG_CISS_SCSI_TAPE */
  364. err = -EINVAL;
  365. /* might be nice to have "disengage" too, but it's not
  366. safely possible. (only 1 module use count, lock issues.) */
  367. out:
  368. free_page((unsigned long)buffer);
  369. return err;
  370. }
  371. static struct file_operations cciss_proc_fops = {
  372. .owner = THIS_MODULE,
  373. .open = cciss_seq_open,
  374. .read = seq_read,
  375. .llseek = seq_lseek,
  376. .release = seq_release,
  377. .write = cciss_proc_write,
  378. };
  379. static void __devinit cciss_procinit(int i)
  380. {
  381. struct proc_dir_entry *pde;
  382. if (proc_cciss == NULL)
  383. proc_cciss = proc_mkdir("driver/cciss", NULL);
  384. if (!proc_cciss)
  385. return;
  386. pde = proc_create_data(hba[i]->devname, S_IWUSR | S_IRUSR | S_IRGRP |
  387. S_IROTH, proc_cciss,
  388. &cciss_proc_fops, hba[i]);
  389. }
  390. #endif /* CONFIG_PROC_FS */
  391. #define MAX_PRODUCT_NAME_LEN 19
  392. #define to_hba(n) container_of(n, struct ctlr_info, dev)
  393. #define to_drv(n) container_of(n, drive_info_struct, dev)
  394. static struct device_type cciss_host_type = {
  395. .name = "cciss_host",
  396. };
  397. static ssize_t dev_show_unique_id(struct device *dev,
  398. struct device_attribute *attr,
  399. char *buf)
  400. {
  401. drive_info_struct *drv = to_drv(dev);
  402. struct ctlr_info *h = to_hba(drv->dev.parent);
  403. __u8 sn[16];
  404. unsigned long flags;
  405. int ret = 0;
  406. spin_lock_irqsave(CCISS_LOCK(h->ctlr), flags);
  407. if (h->busy_configuring)
  408. ret = -EBUSY;
  409. else
  410. memcpy(sn, drv->serial_no, sizeof(sn));
  411. spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
  412. if (ret)
  413. return ret;
  414. else
  415. return snprintf(buf, 16 * 2 + 2,
  416. "%02X%02X%02X%02X%02X%02X%02X%02X"
  417. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  418. sn[0], sn[1], sn[2], sn[3],
  419. sn[4], sn[5], sn[6], sn[7],
  420. sn[8], sn[9], sn[10], sn[11],
  421. sn[12], sn[13], sn[14], sn[15]);
  422. }
  423. DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
  424. static ssize_t dev_show_vendor(struct device *dev,
  425. struct device_attribute *attr,
  426. char *buf)
  427. {
  428. drive_info_struct *drv = to_drv(dev);
  429. struct ctlr_info *h = to_hba(drv->dev.parent);
  430. char vendor[VENDOR_LEN + 1];
  431. unsigned long flags;
  432. int ret = 0;
  433. spin_lock_irqsave(CCISS_LOCK(h->ctlr), flags);
  434. if (h->busy_configuring)
  435. ret = -EBUSY;
  436. else
  437. memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
  438. spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
  439. if (ret)
  440. return ret;
  441. else
  442. return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
  443. }
  444. DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
  445. static ssize_t dev_show_model(struct device *dev,
  446. struct device_attribute *attr,
  447. char *buf)
  448. {
  449. drive_info_struct *drv = to_drv(dev);
  450. struct ctlr_info *h = to_hba(drv->dev.parent);
  451. char model[MODEL_LEN + 1];
  452. unsigned long flags;
  453. int ret = 0;
  454. spin_lock_irqsave(CCISS_LOCK(h->ctlr), flags);
  455. if (h->busy_configuring)
  456. ret = -EBUSY;
  457. else
  458. memcpy(model, drv->model, MODEL_LEN + 1);
  459. spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
  460. if (ret)
  461. return ret;
  462. else
  463. return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
  464. }
  465. DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
  466. static ssize_t dev_show_rev(struct device *dev,
  467. struct device_attribute *attr,
  468. char *buf)
  469. {
  470. drive_info_struct *drv = to_drv(dev);
  471. struct ctlr_info *h = to_hba(drv->dev.parent);
  472. char rev[REV_LEN + 1];
  473. unsigned long flags;
  474. int ret = 0;
  475. spin_lock_irqsave(CCISS_LOCK(h->ctlr), flags);
  476. if (h->busy_configuring)
  477. ret = -EBUSY;
  478. else
  479. memcpy(rev, drv->rev, REV_LEN + 1);
  480. spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
  481. if (ret)
  482. return ret;
  483. else
  484. return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
  485. }
  486. DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
  487. static struct attribute *cciss_dev_attrs[] = {
  488. &dev_attr_unique_id.attr,
  489. &dev_attr_model.attr,
  490. &dev_attr_vendor.attr,
  491. &dev_attr_rev.attr,
  492. NULL
  493. };
  494. static struct attribute_group cciss_dev_attr_group = {
  495. .attrs = cciss_dev_attrs,
  496. };
  497. static const struct attribute_group *cciss_dev_attr_groups[] = {
  498. &cciss_dev_attr_group,
  499. NULL
  500. };
  501. static struct device_type cciss_dev_type = {
  502. .name = "cciss_device",
  503. .groups = cciss_dev_attr_groups,
  504. };
  505. static struct bus_type cciss_bus_type = {
  506. .name = "cciss",
  507. };
  508. /*
  509. * Initialize sysfs entry for each controller. This sets up and registers
  510. * the 'cciss#' directory for each individual controller under
  511. * /sys/bus/pci/devices/<dev>/.
  512. */
  513. static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
  514. {
  515. device_initialize(&h->dev);
  516. h->dev.type = &cciss_host_type;
  517. h->dev.bus = &cciss_bus_type;
  518. dev_set_name(&h->dev, "%s", h->devname);
  519. h->dev.parent = &h->pdev->dev;
  520. return device_add(&h->dev);
  521. }
  522. /*
  523. * Remove sysfs entries for an hba.
  524. */
  525. static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
  526. {
  527. device_del(&h->dev);
  528. }
  529. /*
  530. * Initialize sysfs for each logical drive. This sets up and registers
  531. * the 'c#d#' directory for each individual logical drive under
  532. * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
  533. * /sys/block/cciss!c#d# to this entry.
  534. */
  535. static int cciss_create_ld_sysfs_entry(struct ctlr_info *h,
  536. drive_info_struct *drv,
  537. int drv_index)
  538. {
  539. device_initialize(&drv->dev);
  540. drv->dev.type = &cciss_dev_type;
  541. drv->dev.bus = &cciss_bus_type;
  542. dev_set_name(&drv->dev, "c%dd%d", h->ctlr, drv_index);
  543. drv->dev.parent = &h->dev;
  544. return device_add(&drv->dev);
  545. }
  546. /*
  547. * Remove sysfs entries for a logical drive.
  548. */
  549. static void cciss_destroy_ld_sysfs_entry(drive_info_struct *drv)
  550. {
  551. device_del(&drv->dev);
  552. }
  553. /*
  554. * For operations that cannot sleep, a command block is allocated at init,
  555. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  556. * which ones are free or in use. For operations that can wait for kmalloc
  557. * to possible sleep, this routine can be called with get_from_pool set to 0.
  558. * cmd_free() MUST be called with a got_from_pool set to 0 if cmd_alloc was.
  559. */
  560. static CommandList_struct *cmd_alloc(ctlr_info_t *h, int get_from_pool)
  561. {
  562. CommandList_struct *c;
  563. int i;
  564. u64bit temp64;
  565. dma_addr_t cmd_dma_handle, err_dma_handle;
  566. if (!get_from_pool) {
  567. c = (CommandList_struct *) pci_alloc_consistent(h->pdev,
  568. sizeof(CommandList_struct), &cmd_dma_handle);
  569. if (c == NULL)
  570. return NULL;
  571. memset(c, 0, sizeof(CommandList_struct));
  572. c->cmdindex = -1;
  573. c->err_info = (ErrorInfo_struct *)
  574. pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
  575. &err_dma_handle);
  576. if (c->err_info == NULL) {
  577. pci_free_consistent(h->pdev,
  578. sizeof(CommandList_struct), c, cmd_dma_handle);
  579. return NULL;
  580. }
  581. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  582. } else { /* get it out of the controllers pool */
  583. do {
  584. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  585. if (i == h->nr_cmds)
  586. return NULL;
  587. } while (test_and_set_bit
  588. (i & (BITS_PER_LONG - 1),
  589. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  590. #ifdef CCISS_DEBUG
  591. printk(KERN_DEBUG "cciss: using command buffer %d\n", i);
  592. #endif
  593. c = h->cmd_pool + i;
  594. memset(c, 0, sizeof(CommandList_struct));
  595. cmd_dma_handle = h->cmd_pool_dhandle
  596. + i * sizeof(CommandList_struct);
  597. c->err_info = h->errinfo_pool + i;
  598. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  599. err_dma_handle = h->errinfo_pool_dhandle
  600. + i * sizeof(ErrorInfo_struct);
  601. h->nr_allocs++;
  602. c->cmdindex = i;
  603. }
  604. INIT_HLIST_NODE(&c->list);
  605. c->busaddr = (__u32) cmd_dma_handle;
  606. temp64.val = (__u64) err_dma_handle;
  607. c->ErrDesc.Addr.lower = temp64.val32.lower;
  608. c->ErrDesc.Addr.upper = temp64.val32.upper;
  609. c->ErrDesc.Len = sizeof(ErrorInfo_struct);
  610. c->ctlr = h->ctlr;
  611. return c;
  612. }
  613. /*
  614. * Frees a command block that was previously allocated with cmd_alloc().
  615. */
  616. static void cmd_free(ctlr_info_t *h, CommandList_struct *c, int got_from_pool)
  617. {
  618. int i;
  619. u64bit temp64;
  620. if (!got_from_pool) {
  621. temp64.val32.lower = c->ErrDesc.Addr.lower;
  622. temp64.val32.upper = c->ErrDesc.Addr.upper;
  623. pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
  624. c->err_info, (dma_addr_t) temp64.val);
  625. pci_free_consistent(h->pdev, sizeof(CommandList_struct),
  626. c, (dma_addr_t) c->busaddr);
  627. } else {
  628. i = c - h->cmd_pool;
  629. clear_bit(i & (BITS_PER_LONG - 1),
  630. h->cmd_pool_bits + (i / BITS_PER_LONG));
  631. h->nr_frees++;
  632. }
  633. }
  634. static inline ctlr_info_t *get_host(struct gendisk *disk)
  635. {
  636. return disk->queue->queuedata;
  637. }
  638. static inline drive_info_struct *get_drv(struct gendisk *disk)
  639. {
  640. return disk->private_data;
  641. }
  642. /*
  643. * Open. Make sure the device is really there.
  644. */
  645. static int cciss_open(struct block_device *bdev, fmode_t mode)
  646. {
  647. ctlr_info_t *host = get_host(bdev->bd_disk);
  648. drive_info_struct *drv = get_drv(bdev->bd_disk);
  649. #ifdef CCISS_DEBUG
  650. printk(KERN_DEBUG "cciss_open %s\n", bdev->bd_disk->disk_name);
  651. #endif /* CCISS_DEBUG */
  652. if (host->busy_initializing || drv->busy_configuring)
  653. return -EBUSY;
  654. /*
  655. * Root is allowed to open raw volume zero even if it's not configured
  656. * so array config can still work. Root is also allowed to open any
  657. * volume that has a LUN ID, so it can issue IOCTL to reread the
  658. * disk information. I don't think I really like this
  659. * but I'm already using way to many device nodes to claim another one
  660. * for "raw controller".
  661. */
  662. if (drv->heads == 0) {
  663. if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
  664. /* if not node 0 make sure it is a partition = 0 */
  665. if (MINOR(bdev->bd_dev) & 0x0f) {
  666. return -ENXIO;
  667. /* if it is, make sure we have a LUN ID */
  668. } else if (drv->LunID == 0) {
  669. return -ENXIO;
  670. }
  671. }
  672. if (!capable(CAP_SYS_ADMIN))
  673. return -EPERM;
  674. }
  675. drv->usage_count++;
  676. host->usage_count++;
  677. return 0;
  678. }
  679. /*
  680. * Close. Sync first.
  681. */
  682. static int cciss_release(struct gendisk *disk, fmode_t mode)
  683. {
  684. ctlr_info_t *host = get_host(disk);
  685. drive_info_struct *drv = get_drv(disk);
  686. #ifdef CCISS_DEBUG
  687. printk(KERN_DEBUG "cciss_release %s\n", disk->disk_name);
  688. #endif /* CCISS_DEBUG */
  689. drv->usage_count--;
  690. host->usage_count--;
  691. return 0;
  692. }
  693. #ifdef CONFIG_COMPAT
  694. static int do_ioctl(struct block_device *bdev, fmode_t mode,
  695. unsigned cmd, unsigned long arg)
  696. {
  697. int ret;
  698. lock_kernel();
  699. ret = cciss_ioctl(bdev, mode, cmd, arg);
  700. unlock_kernel();
  701. return ret;
  702. }
  703. static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
  704. unsigned cmd, unsigned long arg);
  705. static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
  706. unsigned cmd, unsigned long arg);
  707. static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
  708. unsigned cmd, unsigned long arg)
  709. {
  710. switch (cmd) {
  711. case CCISS_GETPCIINFO:
  712. case CCISS_GETINTINFO:
  713. case CCISS_SETINTINFO:
  714. case CCISS_GETNODENAME:
  715. case CCISS_SETNODENAME:
  716. case CCISS_GETHEARTBEAT:
  717. case CCISS_GETBUSTYPES:
  718. case CCISS_GETFIRMVER:
  719. case CCISS_GETDRIVVER:
  720. case CCISS_REVALIDVOLS:
  721. case CCISS_DEREGDISK:
  722. case CCISS_REGNEWDISK:
  723. case CCISS_REGNEWD:
  724. case CCISS_RESCANDISK:
  725. case CCISS_GETLUNINFO:
  726. return do_ioctl(bdev, mode, cmd, arg);
  727. case CCISS_PASSTHRU32:
  728. return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
  729. case CCISS_BIG_PASSTHRU32:
  730. return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
  731. default:
  732. return -ENOIOCTLCMD;
  733. }
  734. }
  735. static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
  736. unsigned cmd, unsigned long arg)
  737. {
  738. IOCTL32_Command_struct __user *arg32 =
  739. (IOCTL32_Command_struct __user *) arg;
  740. IOCTL_Command_struct arg64;
  741. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  742. int err;
  743. u32 cp;
  744. err = 0;
  745. err |=
  746. copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  747. sizeof(arg64.LUN_info));
  748. err |=
  749. copy_from_user(&arg64.Request, &arg32->Request,
  750. sizeof(arg64.Request));
  751. err |=
  752. copy_from_user(&arg64.error_info, &arg32->error_info,
  753. sizeof(arg64.error_info));
  754. err |= get_user(arg64.buf_size, &arg32->buf_size);
  755. err |= get_user(cp, &arg32->buf);
  756. arg64.buf = compat_ptr(cp);
  757. err |= copy_to_user(p, &arg64, sizeof(arg64));
  758. if (err)
  759. return -EFAULT;
  760. err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
  761. if (err)
  762. return err;
  763. err |=
  764. copy_in_user(&arg32->error_info, &p->error_info,
  765. sizeof(arg32->error_info));
  766. if (err)
  767. return -EFAULT;
  768. return err;
  769. }
  770. static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
  771. unsigned cmd, unsigned long arg)
  772. {
  773. BIG_IOCTL32_Command_struct __user *arg32 =
  774. (BIG_IOCTL32_Command_struct __user *) arg;
  775. BIG_IOCTL_Command_struct arg64;
  776. BIG_IOCTL_Command_struct __user *p =
  777. compat_alloc_user_space(sizeof(arg64));
  778. int err;
  779. u32 cp;
  780. err = 0;
  781. err |=
  782. copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  783. sizeof(arg64.LUN_info));
  784. err |=
  785. copy_from_user(&arg64.Request, &arg32->Request,
  786. sizeof(arg64.Request));
  787. err |=
  788. copy_from_user(&arg64.error_info, &arg32->error_info,
  789. sizeof(arg64.error_info));
  790. err |= get_user(arg64.buf_size, &arg32->buf_size);
  791. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  792. err |= get_user(cp, &arg32->buf);
  793. arg64.buf = compat_ptr(cp);
  794. err |= copy_to_user(p, &arg64, sizeof(arg64));
  795. if (err)
  796. return -EFAULT;
  797. err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
  798. if (err)
  799. return err;
  800. err |=
  801. copy_in_user(&arg32->error_info, &p->error_info,
  802. sizeof(arg32->error_info));
  803. if (err)
  804. return -EFAULT;
  805. return err;
  806. }
  807. #endif
  808. static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
  809. {
  810. drive_info_struct *drv = get_drv(bdev->bd_disk);
  811. if (!drv->cylinders)
  812. return -ENXIO;
  813. geo->heads = drv->heads;
  814. geo->sectors = drv->sectors;
  815. geo->cylinders = drv->cylinders;
  816. return 0;
  817. }
  818. static void check_ioctl_unit_attention(ctlr_info_t *host, CommandList_struct *c)
  819. {
  820. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  821. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  822. (void)check_for_unit_attention(host, c);
  823. }
  824. /*
  825. * ioctl
  826. */
  827. static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
  828. unsigned int cmd, unsigned long arg)
  829. {
  830. struct gendisk *disk = bdev->bd_disk;
  831. ctlr_info_t *host = get_host(disk);
  832. drive_info_struct *drv = get_drv(disk);
  833. int ctlr = host->ctlr;
  834. void __user *argp = (void __user *)arg;
  835. #ifdef CCISS_DEBUG
  836. printk(KERN_DEBUG "cciss_ioctl: Called with cmd=%x %lx\n", cmd, arg);
  837. #endif /* CCISS_DEBUG */
  838. switch (cmd) {
  839. case CCISS_GETPCIINFO:
  840. {
  841. cciss_pci_info_struct pciinfo;
  842. if (!arg)
  843. return -EINVAL;
  844. pciinfo.domain = pci_domain_nr(host->pdev->bus);
  845. pciinfo.bus = host->pdev->bus->number;
  846. pciinfo.dev_fn = host->pdev->devfn;
  847. pciinfo.board_id = host->board_id;
  848. if (copy_to_user
  849. (argp, &pciinfo, sizeof(cciss_pci_info_struct)))
  850. return -EFAULT;
  851. return 0;
  852. }
  853. case CCISS_GETINTINFO:
  854. {
  855. cciss_coalint_struct intinfo;
  856. if (!arg)
  857. return -EINVAL;
  858. intinfo.delay =
  859. readl(&host->cfgtable->HostWrite.CoalIntDelay);
  860. intinfo.count =
  861. readl(&host->cfgtable->HostWrite.CoalIntCount);
  862. if (copy_to_user
  863. (argp, &intinfo, sizeof(cciss_coalint_struct)))
  864. return -EFAULT;
  865. return 0;
  866. }
  867. case CCISS_SETINTINFO:
  868. {
  869. cciss_coalint_struct intinfo;
  870. unsigned long flags;
  871. int i;
  872. if (!arg)
  873. return -EINVAL;
  874. if (!capable(CAP_SYS_ADMIN))
  875. return -EPERM;
  876. if (copy_from_user
  877. (&intinfo, argp, sizeof(cciss_coalint_struct)))
  878. return -EFAULT;
  879. if ((intinfo.delay == 0) && (intinfo.count == 0))
  880. {
  881. // printk("cciss_ioctl: delay and count cannot be 0\n");
  882. return -EINVAL;
  883. }
  884. spin_lock_irqsave(CCISS_LOCK(ctlr), flags);
  885. /* Update the field, and then ring the doorbell */
  886. writel(intinfo.delay,
  887. &(host->cfgtable->HostWrite.CoalIntDelay));
  888. writel(intinfo.count,
  889. &(host->cfgtable->HostWrite.CoalIntCount));
  890. writel(CFGTBL_ChangeReq, host->vaddr + SA5_DOORBELL);
  891. for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
  892. if (!(readl(host->vaddr + SA5_DOORBELL)
  893. & CFGTBL_ChangeReq))
  894. break;
  895. /* delay and try again */
  896. udelay(1000);
  897. }
  898. spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
  899. if (i >= MAX_IOCTL_CONFIG_WAIT)
  900. return -EAGAIN;
  901. return 0;
  902. }
  903. case CCISS_GETNODENAME:
  904. {
  905. NodeName_type NodeName;
  906. int i;
  907. if (!arg)
  908. return -EINVAL;
  909. for (i = 0; i < 16; i++)
  910. NodeName[i] =
  911. readb(&host->cfgtable->ServerName[i]);
  912. if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
  913. return -EFAULT;
  914. return 0;
  915. }
  916. case CCISS_SETNODENAME:
  917. {
  918. NodeName_type NodeName;
  919. unsigned long flags;
  920. int i;
  921. if (!arg)
  922. return -EINVAL;
  923. if (!capable(CAP_SYS_ADMIN))
  924. return -EPERM;
  925. if (copy_from_user
  926. (NodeName, argp, sizeof(NodeName_type)))
  927. return -EFAULT;
  928. spin_lock_irqsave(CCISS_LOCK(ctlr), flags);
  929. /* Update the field, and then ring the doorbell */
  930. for (i = 0; i < 16; i++)
  931. writeb(NodeName[i],
  932. &host->cfgtable->ServerName[i]);
  933. writel(CFGTBL_ChangeReq, host->vaddr + SA5_DOORBELL);
  934. for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
  935. if (!(readl(host->vaddr + SA5_DOORBELL)
  936. & CFGTBL_ChangeReq))
  937. break;
  938. /* delay and try again */
  939. udelay(1000);
  940. }
  941. spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
  942. if (i >= MAX_IOCTL_CONFIG_WAIT)
  943. return -EAGAIN;
  944. return 0;
  945. }
  946. case CCISS_GETHEARTBEAT:
  947. {
  948. Heartbeat_type heartbeat;
  949. if (!arg)
  950. return -EINVAL;
  951. heartbeat = readl(&host->cfgtable->HeartBeat);
  952. if (copy_to_user
  953. (argp, &heartbeat, sizeof(Heartbeat_type)))
  954. return -EFAULT;
  955. return 0;
  956. }
  957. case CCISS_GETBUSTYPES:
  958. {
  959. BusTypes_type BusTypes;
  960. if (!arg)
  961. return -EINVAL;
  962. BusTypes = readl(&host->cfgtable->BusTypes);
  963. if (copy_to_user
  964. (argp, &BusTypes, sizeof(BusTypes_type)))
  965. return -EFAULT;
  966. return 0;
  967. }
  968. case CCISS_GETFIRMVER:
  969. {
  970. FirmwareVer_type firmware;
  971. if (!arg)
  972. return -EINVAL;
  973. memcpy(firmware, host->firm_ver, 4);
  974. if (copy_to_user
  975. (argp, firmware, sizeof(FirmwareVer_type)))
  976. return -EFAULT;
  977. return 0;
  978. }
  979. case CCISS_GETDRIVVER:
  980. {
  981. DriverVer_type DriverVer = DRIVER_VERSION;
  982. if (!arg)
  983. return -EINVAL;
  984. if (copy_to_user
  985. (argp, &DriverVer, sizeof(DriverVer_type)))
  986. return -EFAULT;
  987. return 0;
  988. }
  989. case CCISS_DEREGDISK:
  990. case CCISS_REGNEWD:
  991. case CCISS_REVALIDVOLS:
  992. return rebuild_lun_table(host, 0);
  993. case CCISS_GETLUNINFO:{
  994. LogvolInfo_struct luninfo;
  995. luninfo.LunID = drv->LunID;
  996. luninfo.num_opens = drv->usage_count;
  997. luninfo.num_parts = 0;
  998. if (copy_to_user(argp, &luninfo,
  999. sizeof(LogvolInfo_struct)))
  1000. return -EFAULT;
  1001. return 0;
  1002. }
  1003. case CCISS_PASSTHRU:
  1004. {
  1005. IOCTL_Command_struct iocommand;
  1006. CommandList_struct *c;
  1007. char *buff = NULL;
  1008. u64bit temp64;
  1009. unsigned long flags;
  1010. DECLARE_COMPLETION_ONSTACK(wait);
  1011. if (!arg)
  1012. return -EINVAL;
  1013. if (!capable(CAP_SYS_RAWIO))
  1014. return -EPERM;
  1015. if (copy_from_user
  1016. (&iocommand, argp, sizeof(IOCTL_Command_struct)))
  1017. return -EFAULT;
  1018. if ((iocommand.buf_size < 1) &&
  1019. (iocommand.Request.Type.Direction != XFER_NONE)) {
  1020. return -EINVAL;
  1021. }
  1022. #if 0 /* 'buf_size' member is 16-bits, and always smaller than kmalloc limit */
  1023. /* Check kmalloc limits */
  1024. if (iocommand.buf_size > 128000)
  1025. return -EINVAL;
  1026. #endif
  1027. if (iocommand.buf_size > 0) {
  1028. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  1029. if (buff == NULL)
  1030. return -EFAULT;
  1031. }
  1032. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  1033. /* Copy the data into the buffer we created */
  1034. if (copy_from_user
  1035. (buff, iocommand.buf, iocommand.buf_size)) {
  1036. kfree(buff);
  1037. return -EFAULT;
  1038. }
  1039. } else {
  1040. memset(buff, 0, iocommand.buf_size);
  1041. }
  1042. if ((c = cmd_alloc(host, 0)) == NULL) {
  1043. kfree(buff);
  1044. return -ENOMEM;
  1045. }
  1046. // Fill in the command type
  1047. c->cmd_type = CMD_IOCTL_PEND;
  1048. // Fill in Command Header
  1049. c->Header.ReplyQueue = 0; // unused in simple mode
  1050. if (iocommand.buf_size > 0) // buffer to fill
  1051. {
  1052. c->Header.SGList = 1;
  1053. c->Header.SGTotal = 1;
  1054. } else // no buffers to fill
  1055. {
  1056. c->Header.SGList = 0;
  1057. c->Header.SGTotal = 0;
  1058. }
  1059. c->Header.LUN = iocommand.LUN_info;
  1060. c->Header.Tag.lower = c->busaddr; // use the kernel address the cmd block for tag
  1061. // Fill in Request block
  1062. c->Request = iocommand.Request;
  1063. // Fill in the scatter gather information
  1064. if (iocommand.buf_size > 0) {
  1065. temp64.val = pci_map_single(host->pdev, buff,
  1066. iocommand.buf_size,
  1067. PCI_DMA_BIDIRECTIONAL);
  1068. c->SG[0].Addr.lower = temp64.val32.lower;
  1069. c->SG[0].Addr.upper = temp64.val32.upper;
  1070. c->SG[0].Len = iocommand.buf_size;
  1071. c->SG[0].Ext = 0; // we are not chaining
  1072. }
  1073. c->waiting = &wait;
  1074. /* Put the request on the tail of the request queue */
  1075. spin_lock_irqsave(CCISS_LOCK(ctlr), flags);
  1076. addQ(&host->reqQ, c);
  1077. host->Qdepth++;
  1078. start_io(host);
  1079. spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
  1080. wait_for_completion(&wait);
  1081. /* unlock the buffers from DMA */
  1082. temp64.val32.lower = c->SG[0].Addr.lower;
  1083. temp64.val32.upper = c->SG[0].Addr.upper;
  1084. pci_unmap_single(host->pdev, (dma_addr_t) temp64.val,
  1085. iocommand.buf_size,
  1086. PCI_DMA_BIDIRECTIONAL);
  1087. check_ioctl_unit_attention(host, c);
  1088. /* Copy the error information out */
  1089. iocommand.error_info = *(c->err_info);
  1090. if (copy_to_user
  1091. (argp, &iocommand, sizeof(IOCTL_Command_struct))) {
  1092. kfree(buff);
  1093. cmd_free(host, c, 0);
  1094. return -EFAULT;
  1095. }
  1096. if (iocommand.Request.Type.Direction == XFER_READ) {
  1097. /* Copy the data out of the buffer we created */
  1098. if (copy_to_user
  1099. (iocommand.buf, buff, iocommand.buf_size)) {
  1100. kfree(buff);
  1101. cmd_free(host, c, 0);
  1102. return -EFAULT;
  1103. }
  1104. }
  1105. kfree(buff);
  1106. cmd_free(host, c, 0);
  1107. return 0;
  1108. }
  1109. case CCISS_BIG_PASSTHRU:{
  1110. BIG_IOCTL_Command_struct *ioc;
  1111. CommandList_struct *c;
  1112. unsigned char **buff = NULL;
  1113. int *buff_size = NULL;
  1114. u64bit temp64;
  1115. unsigned long flags;
  1116. BYTE sg_used = 0;
  1117. int status = 0;
  1118. int i;
  1119. DECLARE_COMPLETION_ONSTACK(wait);
  1120. __u32 left;
  1121. __u32 sz;
  1122. BYTE __user *data_ptr;
  1123. if (!arg)
  1124. return -EINVAL;
  1125. if (!capable(CAP_SYS_RAWIO))
  1126. return -EPERM;
  1127. ioc = (BIG_IOCTL_Command_struct *)
  1128. kmalloc(sizeof(*ioc), GFP_KERNEL);
  1129. if (!ioc) {
  1130. status = -ENOMEM;
  1131. goto cleanup1;
  1132. }
  1133. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  1134. status = -EFAULT;
  1135. goto cleanup1;
  1136. }
  1137. if ((ioc->buf_size < 1) &&
  1138. (ioc->Request.Type.Direction != XFER_NONE)) {
  1139. status = -EINVAL;
  1140. goto cleanup1;
  1141. }
  1142. /* Check kmalloc limits using all SGs */
  1143. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  1144. status = -EINVAL;
  1145. goto cleanup1;
  1146. }
  1147. if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
  1148. status = -EINVAL;
  1149. goto cleanup1;
  1150. }
  1151. buff =
  1152. kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
  1153. if (!buff) {
  1154. status = -ENOMEM;
  1155. goto cleanup1;
  1156. }
  1157. buff_size = kmalloc(MAXSGENTRIES * sizeof(int),
  1158. GFP_KERNEL);
  1159. if (!buff_size) {
  1160. status = -ENOMEM;
  1161. goto cleanup1;
  1162. }
  1163. left = ioc->buf_size;
  1164. data_ptr = ioc->buf;
  1165. while (left) {
  1166. sz = (left >
  1167. ioc->malloc_size) ? ioc->
  1168. malloc_size : left;
  1169. buff_size[sg_used] = sz;
  1170. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  1171. if (buff[sg_used] == NULL) {
  1172. status = -ENOMEM;
  1173. goto cleanup1;
  1174. }
  1175. if (ioc->Request.Type.Direction == XFER_WRITE) {
  1176. if (copy_from_user
  1177. (buff[sg_used], data_ptr, sz)) {
  1178. status = -EFAULT;
  1179. goto cleanup1;
  1180. }
  1181. } else {
  1182. memset(buff[sg_used], 0, sz);
  1183. }
  1184. left -= sz;
  1185. data_ptr += sz;
  1186. sg_used++;
  1187. }
  1188. if ((c = cmd_alloc(host, 0)) == NULL) {
  1189. status = -ENOMEM;
  1190. goto cleanup1;
  1191. }
  1192. c->cmd_type = CMD_IOCTL_PEND;
  1193. c->Header.ReplyQueue = 0;
  1194. if (ioc->buf_size > 0) {
  1195. c->Header.SGList = sg_used;
  1196. c->Header.SGTotal = sg_used;
  1197. } else {
  1198. c->Header.SGList = 0;
  1199. c->Header.SGTotal = 0;
  1200. }
  1201. c->Header.LUN = ioc->LUN_info;
  1202. c->Header.Tag.lower = c->busaddr;
  1203. c->Request = ioc->Request;
  1204. if (ioc->buf_size > 0) {
  1205. int i;
  1206. for (i = 0; i < sg_used; i++) {
  1207. temp64.val =
  1208. pci_map_single(host->pdev, buff[i],
  1209. buff_size[i],
  1210. PCI_DMA_BIDIRECTIONAL);
  1211. c->SG[i].Addr.lower =
  1212. temp64.val32.lower;
  1213. c->SG[i].Addr.upper =
  1214. temp64.val32.upper;
  1215. c->SG[i].Len = buff_size[i];
  1216. c->SG[i].Ext = 0; /* we are not chaining */
  1217. }
  1218. }
  1219. c->waiting = &wait;
  1220. /* Put the request on the tail of the request queue */
  1221. spin_lock_irqsave(CCISS_LOCK(ctlr), flags);
  1222. addQ(&host->reqQ, c);
  1223. host->Qdepth++;
  1224. start_io(host);
  1225. spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
  1226. wait_for_completion(&wait);
  1227. /* unlock the buffers from DMA */
  1228. for (i = 0; i < sg_used; i++) {
  1229. temp64.val32.lower = c->SG[i].Addr.lower;
  1230. temp64.val32.upper = c->SG[i].Addr.upper;
  1231. pci_unmap_single(host->pdev,
  1232. (dma_addr_t) temp64.val, buff_size[i],
  1233. PCI_DMA_BIDIRECTIONAL);
  1234. }
  1235. check_ioctl_unit_attention(host, c);
  1236. /* Copy the error information out */
  1237. ioc->error_info = *(c->err_info);
  1238. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  1239. cmd_free(host, c, 0);
  1240. status = -EFAULT;
  1241. goto cleanup1;
  1242. }
  1243. if (ioc->Request.Type.Direction == XFER_READ) {
  1244. /* Copy the data out of the buffer we created */
  1245. BYTE __user *ptr = ioc->buf;
  1246. for (i = 0; i < sg_used; i++) {
  1247. if (copy_to_user
  1248. (ptr, buff[i], buff_size[i])) {
  1249. cmd_free(host, c, 0);
  1250. status = -EFAULT;
  1251. goto cleanup1;
  1252. }
  1253. ptr += buff_size[i];
  1254. }
  1255. }
  1256. cmd_free(host, c, 0);
  1257. status = 0;
  1258. cleanup1:
  1259. if (buff) {
  1260. for (i = 0; i < sg_used; i++)
  1261. kfree(buff[i]);
  1262. kfree(buff);
  1263. }
  1264. kfree(buff_size);
  1265. kfree(ioc);
  1266. return status;
  1267. }
  1268. /* scsi_cmd_ioctl handles these, below, though some are not */
  1269. /* very meaningful for cciss. SG_IO is the main one people want. */
  1270. case SG_GET_VERSION_NUM:
  1271. case SG_SET_TIMEOUT:
  1272. case SG_GET_TIMEOUT:
  1273. case SG_GET_RESERVED_SIZE:
  1274. case SG_SET_RESERVED_SIZE:
  1275. case SG_EMULATED_HOST:
  1276. case SG_IO:
  1277. case SCSI_IOCTL_SEND_COMMAND:
  1278. return scsi_cmd_ioctl(disk->queue, disk, mode, cmd, argp);
  1279. /* scsi_cmd_ioctl would normally handle these, below, but */
  1280. /* they aren't a good fit for cciss, as CD-ROMs are */
  1281. /* not supported, and we don't have any bus/target/lun */
  1282. /* which we present to the kernel. */
  1283. case CDROM_SEND_PACKET:
  1284. case CDROMCLOSETRAY:
  1285. case CDROMEJECT:
  1286. case SCSI_IOCTL_GET_IDLUN:
  1287. case SCSI_IOCTL_GET_BUS_NUMBER:
  1288. default:
  1289. return -ENOTTY;
  1290. }
  1291. }
  1292. static void cciss_check_queues(ctlr_info_t *h)
  1293. {
  1294. int start_queue = h->next_to_run;
  1295. int i;
  1296. /* check to see if we have maxed out the number of commands that can
  1297. * be placed on the queue. If so then exit. We do this check here
  1298. * in case the interrupt we serviced was from an ioctl and did not
  1299. * free any new commands.
  1300. */
  1301. if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
  1302. return;
  1303. /* We have room on the queue for more commands. Now we need to queue
  1304. * them up. We will also keep track of the next queue to run so
  1305. * that every queue gets a chance to be started first.
  1306. */
  1307. for (i = 0; i < h->highest_lun + 1; i++) {
  1308. int curr_queue = (start_queue + i) % (h->highest_lun + 1);
  1309. /* make sure the disk has been added and the drive is real
  1310. * because this can be called from the middle of init_one.
  1311. */
  1312. if (!(h->drv[curr_queue].queue) || !(h->drv[curr_queue].heads))
  1313. continue;
  1314. blk_start_queue(h->gendisk[curr_queue]->queue);
  1315. /* check to see if we have maxed out the number of commands
  1316. * that can be placed on the queue.
  1317. */
  1318. if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
  1319. if (curr_queue == start_queue) {
  1320. h->next_to_run =
  1321. (start_queue + 1) % (h->highest_lun + 1);
  1322. break;
  1323. } else {
  1324. h->next_to_run = curr_queue;
  1325. break;
  1326. }
  1327. }
  1328. }
  1329. }
  1330. static void cciss_softirq_done(struct request *rq)
  1331. {
  1332. CommandList_struct *cmd = rq->completion_data;
  1333. ctlr_info_t *h = hba[cmd->ctlr];
  1334. unsigned long flags;
  1335. u64bit temp64;
  1336. int i, ddir;
  1337. if (cmd->Request.Type.Direction == XFER_READ)
  1338. ddir = PCI_DMA_FROMDEVICE;
  1339. else
  1340. ddir = PCI_DMA_TODEVICE;
  1341. /* command did not need to be retried */
  1342. /* unmap the DMA mapping for all the scatter gather elements */
  1343. for (i = 0; i < cmd->Header.SGList; i++) {
  1344. temp64.val32.lower = cmd->SG[i].Addr.lower;
  1345. temp64.val32.upper = cmd->SG[i].Addr.upper;
  1346. pci_unmap_page(h->pdev, temp64.val, cmd->SG[i].Len, ddir);
  1347. }
  1348. #ifdef CCISS_DEBUG
  1349. printk("Done with %p\n", rq);
  1350. #endif /* CCISS_DEBUG */
  1351. /* set the residual count for pc requests */
  1352. if (blk_pc_request(rq))
  1353. rq->resid_len = cmd->err_info->ResidualCnt;
  1354. blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
  1355. spin_lock_irqsave(&h->lock, flags);
  1356. cmd_free(h, cmd, 1);
  1357. cciss_check_queues(h);
  1358. spin_unlock_irqrestore(&h->lock, flags);
  1359. }
  1360. static void log_unit_to_scsi3addr(ctlr_info_t *h, unsigned char scsi3addr[],
  1361. uint32_t log_unit)
  1362. {
  1363. log_unit = h->drv[log_unit].LunID & 0x03fff;
  1364. memset(&scsi3addr[4], 0, 4);
  1365. memcpy(&scsi3addr[0], &log_unit, 4);
  1366. scsi3addr[3] |= 0x40;
  1367. }
  1368. /* This function gets the SCSI vendor, model, and revision of a logical drive
  1369. * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
  1370. * they cannot be read.
  1371. */
  1372. static void cciss_get_device_descr(int ctlr, int logvol, int withirq,
  1373. char *vendor, char *model, char *rev)
  1374. {
  1375. int rc;
  1376. InquiryData_struct *inq_buf;
  1377. unsigned char scsi3addr[8];
  1378. *vendor = '\0';
  1379. *model = '\0';
  1380. *rev = '\0';
  1381. inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  1382. if (!inq_buf)
  1383. return;
  1384. log_unit_to_scsi3addr(hba[ctlr], scsi3addr, logvol);
  1385. if (withirq)
  1386. rc = sendcmd_withirq(CISS_INQUIRY, ctlr, inq_buf,
  1387. sizeof(InquiryData_struct), 0,
  1388. scsi3addr, TYPE_CMD);
  1389. else
  1390. rc = sendcmd(CISS_INQUIRY, ctlr, inq_buf,
  1391. sizeof(InquiryData_struct), 0,
  1392. scsi3addr, TYPE_CMD);
  1393. if (rc == IO_OK) {
  1394. memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
  1395. vendor[VENDOR_LEN] = '\0';
  1396. memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
  1397. model[MODEL_LEN] = '\0';
  1398. memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
  1399. rev[REV_LEN] = '\0';
  1400. }
  1401. kfree(inq_buf);
  1402. return;
  1403. }
  1404. /* This function gets the serial number of a logical drive via
  1405. * inquiry page 0x83. Serial no. is 16 bytes. If the serial
  1406. * number cannot be had, for whatever reason, 16 bytes of 0xff
  1407. * are returned instead.
  1408. */
  1409. static void cciss_get_serial_no(int ctlr, int logvol, int withirq,
  1410. unsigned char *serial_no, int buflen)
  1411. {
  1412. #define PAGE_83_INQ_BYTES 64
  1413. int rc;
  1414. unsigned char *buf;
  1415. unsigned char scsi3addr[8];
  1416. if (buflen > 16)
  1417. buflen = 16;
  1418. memset(serial_no, 0xff, buflen);
  1419. buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
  1420. if (!buf)
  1421. return;
  1422. memset(serial_no, 0, buflen);
  1423. log_unit_to_scsi3addr(hba[ctlr], scsi3addr, logvol);
  1424. if (withirq)
  1425. rc = sendcmd_withirq(CISS_INQUIRY, ctlr, buf,
  1426. PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
  1427. else
  1428. rc = sendcmd(CISS_INQUIRY, ctlr, buf,
  1429. PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
  1430. if (rc == IO_OK)
  1431. memcpy(serial_no, &buf[8], buflen);
  1432. kfree(buf);
  1433. return;
  1434. }
  1435. static void cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
  1436. int drv_index)
  1437. {
  1438. disk->queue = blk_init_queue(do_cciss_request, &h->lock);
  1439. sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
  1440. disk->major = h->major;
  1441. disk->first_minor = drv_index << NWD_SHIFT;
  1442. disk->fops = &cciss_fops;
  1443. disk->private_data = &h->drv[drv_index];
  1444. disk->driverfs_dev = &h->drv[drv_index].dev;
  1445. /* Set up queue information */
  1446. blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
  1447. /* This is a hardware imposed limit. */
  1448. blk_queue_max_hw_segments(disk->queue, MAXSGENTRIES);
  1449. /* This is a limit in the driver and could be eliminated. */
  1450. blk_queue_max_phys_segments(disk->queue, MAXSGENTRIES);
  1451. blk_queue_max_sectors(disk->queue, h->cciss_max_sectors);
  1452. blk_queue_softirq_done(disk->queue, cciss_softirq_done);
  1453. disk->queue->queuedata = h;
  1454. blk_queue_logical_block_size(disk->queue,
  1455. h->drv[drv_index].block_size);
  1456. /* Make sure all queue data is written out before */
  1457. /* setting h->drv[drv_index].queue, as setting this */
  1458. /* allows the interrupt handler to start the queue */
  1459. wmb();
  1460. h->drv[drv_index].queue = disk->queue;
  1461. add_disk(disk);
  1462. }
  1463. /* This function will check the usage_count of the drive to be updated/added.
  1464. * If the usage_count is zero and it is a heretofore unknown drive, or,
  1465. * the drive's capacity, geometry, or serial number has changed,
  1466. * then the drive information will be updated and the disk will be
  1467. * re-registered with the kernel. If these conditions don't hold,
  1468. * then it will be left alone for the next reboot. The exception to this
  1469. * is disk 0 which will always be left registered with the kernel since it
  1470. * is also the controller node. Any changes to disk 0 will show up on
  1471. * the next reboot.
  1472. */
  1473. static void cciss_update_drive_info(int ctlr, int drv_index, int first_time)
  1474. {
  1475. ctlr_info_t *h = hba[ctlr];
  1476. struct gendisk *disk;
  1477. InquiryData_struct *inq_buff = NULL;
  1478. unsigned int block_size;
  1479. sector_t total_size;
  1480. unsigned long flags = 0;
  1481. int ret = 0;
  1482. drive_info_struct *drvinfo;
  1483. int was_only_controller_node;
  1484. /* Get information about the disk and modify the driver structure */
  1485. inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  1486. drvinfo = kmalloc(sizeof(*drvinfo), GFP_KERNEL);
  1487. if (inq_buff == NULL || drvinfo == NULL)
  1488. goto mem_msg;
  1489. /* See if we're trying to update the "controller node"
  1490. * this will happen the when the first logical drive gets
  1491. * created by ACU.
  1492. */
  1493. was_only_controller_node = (drv_index == 0 &&
  1494. h->drv[0].raid_level == -1);
  1495. /* testing to see if 16-byte CDBs are already being used */
  1496. if (h->cciss_read == CCISS_READ_16) {
  1497. cciss_read_capacity_16(h->ctlr, drv_index, 1,
  1498. &total_size, &block_size);
  1499. } else {
  1500. cciss_read_capacity(ctlr, drv_index, 1,
  1501. &total_size, &block_size);
  1502. /* if read_capacity returns all F's this volume is >2TB */
  1503. /* in size so we switch to 16-byte CDB's for all */
  1504. /* read/write ops */
  1505. if (total_size == 0xFFFFFFFFULL) {
  1506. cciss_read_capacity_16(ctlr, drv_index, 1,
  1507. &total_size, &block_size);
  1508. h->cciss_read = CCISS_READ_16;
  1509. h->cciss_write = CCISS_WRITE_16;
  1510. } else {
  1511. h->cciss_read = CCISS_READ_10;
  1512. h->cciss_write = CCISS_WRITE_10;
  1513. }
  1514. }
  1515. cciss_geometry_inquiry(ctlr, drv_index, 1, total_size, block_size,
  1516. inq_buff, drvinfo);
  1517. drvinfo->block_size = block_size;
  1518. drvinfo->nr_blocks = total_size + 1;
  1519. cciss_get_device_descr(ctlr, drv_index, 1, drvinfo->vendor,
  1520. drvinfo->model, drvinfo->rev);
  1521. cciss_get_serial_no(ctlr, drv_index, 1, drvinfo->serial_no,
  1522. sizeof(drvinfo->serial_no));
  1523. /* Is it the same disk we already know, and nothing's changed? */
  1524. if (h->drv[drv_index].raid_level != -1 &&
  1525. ((memcmp(drvinfo->serial_no,
  1526. h->drv[drv_index].serial_no, 16) == 0) &&
  1527. drvinfo->block_size == h->drv[drv_index].block_size &&
  1528. drvinfo->nr_blocks == h->drv[drv_index].nr_blocks &&
  1529. drvinfo->heads == h->drv[drv_index].heads &&
  1530. drvinfo->sectors == h->drv[drv_index].sectors &&
  1531. drvinfo->cylinders == h->drv[drv_index].cylinders))
  1532. /* The disk is unchanged, nothing to update */
  1533. goto freeret;
  1534. /* If we get here it's not the same disk, or something's changed,
  1535. * so we need to * deregister it, and re-register it, if it's not
  1536. * in use.
  1537. * If the disk already exists then deregister it before proceeding
  1538. * (unless it's the first disk (for the controller node).
  1539. */
  1540. if (h->drv[drv_index].raid_level != -1 && drv_index != 0) {
  1541. printk(KERN_WARNING "disk %d has changed.\n", drv_index);
  1542. spin_lock_irqsave(CCISS_LOCK(h->ctlr), flags);
  1543. h->drv[drv_index].busy_configuring = 1;
  1544. spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
  1545. /* deregister_disk sets h->drv[drv_index].queue = NULL
  1546. * which keeps the interrupt handler from starting
  1547. * the queue.
  1548. */
  1549. ret = deregister_disk(h, drv_index, 0);
  1550. h->drv[drv_index].busy_configuring = 0;
  1551. }
  1552. /* If the disk is in use return */
  1553. if (ret)
  1554. goto freeret;
  1555. /* Save the new information from cciss_geometry_inquiry
  1556. * and serial number inquiry.
  1557. */
  1558. h->drv[drv_index].block_size = drvinfo->block_size;
  1559. h->drv[drv_index].nr_blocks = drvinfo->nr_blocks;
  1560. h->drv[drv_index].heads = drvinfo->heads;
  1561. h->drv[drv_index].sectors = drvinfo->sectors;
  1562. h->drv[drv_index].cylinders = drvinfo->cylinders;
  1563. h->drv[drv_index].raid_level = drvinfo->raid_level;
  1564. memcpy(h->drv[drv_index].serial_no, drvinfo->serial_no, 16);
  1565. memcpy(h->drv[drv_index].vendor, drvinfo->vendor, VENDOR_LEN + 1);
  1566. memcpy(h->drv[drv_index].model, drvinfo->model, MODEL_LEN + 1);
  1567. memcpy(h->drv[drv_index].rev, drvinfo->rev, REV_LEN + 1);
  1568. ++h->num_luns;
  1569. disk = h->gendisk[drv_index];
  1570. set_capacity(disk, h->drv[drv_index].nr_blocks);
  1571. /* If it's not disk 0 (drv_index != 0)
  1572. * or if it was disk 0, but there was previously
  1573. * no actual corresponding configured logical drive
  1574. * (raid_leve == -1) then we want to update the
  1575. * logical drive's information.
  1576. */
  1577. if (drv_index || first_time)
  1578. cciss_add_disk(h, disk, drv_index);
  1579. freeret:
  1580. kfree(inq_buff);
  1581. kfree(drvinfo);
  1582. return;
  1583. mem_msg:
  1584. printk(KERN_ERR "cciss: out of memory\n");
  1585. goto freeret;
  1586. }
  1587. /* This function will find the first index of the controllers drive array
  1588. * that has a -1 for the raid_level and will return that index. This is
  1589. * where new drives will be added. If the index to be returned is greater
  1590. * than the highest_lun index for the controller then highest_lun is set
  1591. * to this new index. If there are no available indexes then -1 is returned.
  1592. * "controller_node" is used to know if this is a real logical drive, or just
  1593. * the controller node, which determines if this counts towards highest_lun.
  1594. */
  1595. static int cciss_find_free_drive_index(int ctlr, int controller_node)
  1596. {
  1597. int i;
  1598. for (i = 0; i < CISS_MAX_LUN; i++) {
  1599. if (hba[ctlr]->drv[i].raid_level == -1) {
  1600. if (i > hba[ctlr]->highest_lun)
  1601. if (!controller_node)
  1602. hba[ctlr]->highest_lun = i;
  1603. return i;
  1604. }
  1605. }
  1606. return -1;
  1607. }
  1608. /* cciss_add_gendisk finds a free hba[]->drv structure
  1609. * and allocates a gendisk if needed, and sets the lunid
  1610. * in the drvinfo structure. It returns the index into
  1611. * the ->drv[] array, or -1 if none are free.
  1612. * is_controller_node indicates whether highest_lun should
  1613. * count this disk, or if it's only being added to provide
  1614. * a means to talk to the controller in case no logical
  1615. * drives have yet been configured.
  1616. */
  1617. static int cciss_add_gendisk(ctlr_info_t *h, __u32 lunid, int controller_node)
  1618. {
  1619. int drv_index;
  1620. drv_index = cciss_find_free_drive_index(h->ctlr, controller_node);
  1621. if (drv_index == -1)
  1622. return -1;
  1623. /*Check if the gendisk needs to be allocated */
  1624. if (!h->gendisk[drv_index]) {
  1625. h->gendisk[drv_index] =
  1626. alloc_disk(1 << NWD_SHIFT);
  1627. if (!h->gendisk[drv_index]) {
  1628. printk(KERN_ERR "cciss%d: could not "
  1629. "allocate a new disk %d\n",
  1630. h->ctlr, drv_index);
  1631. return -1;
  1632. }
  1633. }
  1634. h->drv[drv_index].LunID = lunid;
  1635. if (cciss_create_ld_sysfs_entry(h, &h->drv[drv_index], drv_index))
  1636. goto err_free_disk;
  1637. /* Don't need to mark this busy because nobody */
  1638. /* else knows about this disk yet to contend */
  1639. /* for access to it. */
  1640. h->drv[drv_index].busy_configuring = 0;
  1641. wmb();
  1642. return drv_index;
  1643. err_free_disk:
  1644. put_disk(h->gendisk[drv_index]);
  1645. h->gendisk[drv_index] = NULL;
  1646. return -1;
  1647. }
  1648. /* This is for the special case of a controller which
  1649. * has no logical drives. In this case, we still need
  1650. * to register a disk so the controller can be accessed
  1651. * by the Array Config Utility.
  1652. */
  1653. static void cciss_add_controller_node(ctlr_info_t *h)
  1654. {
  1655. struct gendisk *disk;
  1656. int drv_index;
  1657. if (h->gendisk[0] != NULL) /* already did this? Then bail. */
  1658. return;
  1659. drv_index = cciss_add_gendisk(h, 0, 1);
  1660. if (drv_index == -1) {
  1661. printk(KERN_WARNING "cciss%d: could not "
  1662. "add disk 0.\n", h->ctlr);
  1663. return;
  1664. }
  1665. h->drv[drv_index].block_size = 512;
  1666. h->drv[drv_index].nr_blocks = 0;
  1667. h->drv[drv_index].heads = 0;
  1668. h->drv[drv_index].sectors = 0;
  1669. h->drv[drv_index].cylinders = 0;
  1670. h->drv[drv_index].raid_level = -1;
  1671. memset(h->drv[drv_index].serial_no, 0, 16);
  1672. disk = h->gendisk[drv_index];
  1673. cciss_add_disk(h, disk, drv_index);
  1674. }
  1675. /* This function will add and remove logical drives from the Logical
  1676. * drive array of the controller and maintain persistency of ordering
  1677. * so that mount points are preserved until the next reboot. This allows
  1678. * for the removal of logical drives in the middle of the drive array
  1679. * without a re-ordering of those drives.
  1680. * INPUT
  1681. * h = The controller to perform the operations on
  1682. */
  1683. static int rebuild_lun_table(ctlr_info_t *h, int first_time)
  1684. {
  1685. int ctlr = h->ctlr;
  1686. int num_luns;
  1687. ReportLunData_struct *ld_buff = NULL;
  1688. int return_code;
  1689. int listlength = 0;
  1690. int i;
  1691. int drv_found;
  1692. int drv_index = 0;
  1693. __u32 lunid = 0;
  1694. unsigned long flags;
  1695. if (!capable(CAP_SYS_RAWIO))
  1696. return -EPERM;
  1697. /* Set busy_configuring flag for this operation */
  1698. spin_lock_irqsave(CCISS_LOCK(h->ctlr), flags);
  1699. if (h->busy_configuring) {
  1700. spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
  1701. return -EBUSY;
  1702. }
  1703. h->busy_configuring = 1;
  1704. spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
  1705. ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
  1706. if (ld_buff == NULL)
  1707. goto mem_msg;
  1708. return_code = sendcmd_withirq(CISS_REPORT_LOG, ctlr, ld_buff,
  1709. sizeof(ReportLunData_struct),
  1710. 0, CTLR_LUNID, TYPE_CMD);
  1711. if (return_code == IO_OK)
  1712. listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
  1713. else { /* reading number of logical volumes failed */
  1714. printk(KERN_WARNING "cciss: report logical volume"
  1715. " command failed\n");
  1716. listlength = 0;
  1717. goto freeret;
  1718. }
  1719. num_luns = listlength / 8; /* 8 bytes per entry */
  1720. if (num_luns > CISS_MAX_LUN) {
  1721. num_luns = CISS_MAX_LUN;
  1722. printk(KERN_WARNING "cciss: more luns configured"
  1723. " on controller than can be handled by"
  1724. " this driver.\n");
  1725. }
  1726. if (num_luns == 0)
  1727. cciss_add_controller_node(h);
  1728. /* Compare controller drive array to driver's drive array
  1729. * to see if any drives are missing on the controller due
  1730. * to action of Array Config Utility (user deletes drive)
  1731. * and deregister logical drives which have disappeared.
  1732. */
  1733. for (i = 0; i <= h->highest_lun; i++) {
  1734. int j;
  1735. drv_found = 0;
  1736. /* skip holes in the array from already deleted drives */
  1737. if (h->drv[i].raid_level == -1)
  1738. continue;
  1739. for (j = 0; j < num_luns; j++) {
  1740. memcpy(&lunid, &ld_buff->LUN[j][0], 4);
  1741. lunid = le32_to_cpu(lunid);
  1742. if (h->drv[i].LunID == lunid) {
  1743. drv_found = 1;
  1744. break;
  1745. }
  1746. }
  1747. if (!drv_found) {
  1748. /* Deregister it from the OS, it's gone. */
  1749. spin_lock_irqsave(CCISS_LOCK(h->ctlr), flags);
  1750. h->drv[i].busy_configuring = 1;
  1751. spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
  1752. return_code = deregister_disk(h, i, 1);
  1753. h->drv[i].busy_configuring = 0;
  1754. }
  1755. }
  1756. /* Compare controller drive array to driver's drive array.
  1757. * Check for updates in the drive information and any new drives
  1758. * on the controller due to ACU adding logical drives, or changing
  1759. * a logical drive's size, etc. Reregister any new/changed drives
  1760. */
  1761. for (i = 0; i < num_luns; i++) {
  1762. int j;
  1763. drv_found = 0;
  1764. memcpy(&lunid, &ld_buff->LUN[i][0], 4);
  1765. lunid = le32_to_cpu(lunid);
  1766. /* Find if the LUN is already in the drive array
  1767. * of the driver. If so then update its info
  1768. * if not in use. If it does not exist then find
  1769. * the first free index and add it.
  1770. */
  1771. for (j = 0; j <= h->highest_lun; j++) {
  1772. if (h->drv[j].raid_level != -1 &&
  1773. h->drv[j].LunID == lunid) {
  1774. drv_index = j;
  1775. drv_found = 1;
  1776. break;
  1777. }
  1778. }
  1779. /* check if the drive was found already in the array */
  1780. if (!drv_found) {
  1781. drv_index = cciss_add_gendisk(h, lunid, 0);
  1782. if (drv_index == -1)
  1783. goto freeret;
  1784. }
  1785. cciss_update_drive_info(ctlr, drv_index, first_time);
  1786. } /* end for */
  1787. freeret:
  1788. kfree(ld_buff);
  1789. h->busy_configuring = 0;
  1790. /* We return -1 here to tell the ACU that we have registered/updated
  1791. * all of the drives that we can and to keep it from calling us
  1792. * additional times.
  1793. */
  1794. return -1;
  1795. mem_msg:
  1796. printk(KERN_ERR "cciss: out of memory\n");
  1797. h->busy_configuring = 0;
  1798. goto freeret;
  1799. }
  1800. /* This function will deregister the disk and it's queue from the
  1801. * kernel. It must be called with the controller lock held and the
  1802. * drv structures busy_configuring flag set. It's parameters are:
  1803. *
  1804. * disk = This is the disk to be deregistered
  1805. * drv = This is the drive_info_struct associated with the disk to be
  1806. * deregistered. It contains information about the disk used
  1807. * by the driver.
  1808. * clear_all = This flag determines whether or not the disk information
  1809. * is going to be completely cleared out and the highest_lun
  1810. * reset. Sometimes we want to clear out information about
  1811. * the disk in preparation for re-adding it. In this case
  1812. * the highest_lun should be left unchanged and the LunID
  1813. * should not be cleared.
  1814. */
  1815. static int deregister_disk(ctlr_info_t *h, int drv_index,
  1816. int clear_all)
  1817. {
  1818. int i;
  1819. struct gendisk *disk;
  1820. drive_info_struct *drv;
  1821. if (!capable(CAP_SYS_RAWIO))
  1822. return -EPERM;
  1823. drv = &h->drv[drv_index];
  1824. disk = h->gendisk[drv_index];
  1825. /* make sure logical volume is NOT is use */
  1826. if (clear_all || (h->gendisk[0] == disk)) {
  1827. if (drv->usage_count > 1)
  1828. return -EBUSY;
  1829. } else if (drv->usage_count > 0)
  1830. return -EBUSY;
  1831. /* invalidate the devices and deregister the disk. If it is disk
  1832. * zero do not deregister it but just zero out it's values. This
  1833. * allows us to delete disk zero but keep the controller registered.
  1834. */
  1835. if (h->gendisk[0] != disk) {
  1836. struct request_queue *q = disk->queue;
  1837. if (disk->flags & GENHD_FL_UP)
  1838. del_gendisk(disk);
  1839. if (q) {
  1840. blk_cleanup_queue(q);
  1841. /* Set drv->queue to NULL so that we do not try
  1842. * to call blk_start_queue on this queue in the
  1843. * interrupt handler
  1844. */
  1845. drv->queue = NULL;
  1846. }
  1847. /* If clear_all is set then we are deleting the logical
  1848. * drive, not just refreshing its info. For drives
  1849. * other than disk 0 we will call put_disk. We do not
  1850. * do this for disk 0 as we need it to be able to
  1851. * configure the controller.
  1852. */
  1853. if (clear_all){
  1854. /* This isn't pretty, but we need to find the
  1855. * disk in our array and NULL our the pointer.
  1856. * This is so that we will call alloc_disk if
  1857. * this index is used again later.
  1858. */
  1859. for (i=0; i < CISS_MAX_LUN; i++){
  1860. if (h->gendisk[i] == disk) {
  1861. h->gendisk[i] = NULL;
  1862. break;
  1863. }
  1864. }
  1865. put_disk(disk);
  1866. }
  1867. } else {
  1868. set_capacity(disk, 0);
  1869. }
  1870. --h->num_luns;
  1871. /* zero out the disk size info */
  1872. drv->nr_blocks = 0;
  1873. drv->block_size = 0;
  1874. drv->heads = 0;
  1875. drv->sectors = 0;
  1876. drv->cylinders = 0;
  1877. drv->raid_level = -1; /* This can be used as a flag variable to
  1878. * indicate that this element of the drive
  1879. * array is free.
  1880. */
  1881. cciss_destroy_ld_sysfs_entry(drv);
  1882. if (clear_all) {
  1883. /* check to see if it was the last disk */
  1884. if (drv == h->drv + h->highest_lun) {
  1885. /* if so, find the new hightest lun */
  1886. int i, newhighest = -1;
  1887. for (i = 0; i <= h->highest_lun; i++) {
  1888. /* if the disk has size > 0, it is available */
  1889. if (h->drv[i].heads)
  1890. newhighest = i;
  1891. }
  1892. h->highest_lun = newhighest;
  1893. }
  1894. drv->LunID = 0;
  1895. }
  1896. return 0;
  1897. }
  1898. static int fill_cmd(CommandList_struct *c, __u8 cmd, int ctlr, void *buff,
  1899. size_t size, __u8 page_code, unsigned char *scsi3addr,
  1900. int cmd_type)
  1901. {
  1902. ctlr_info_t *h = hba[ctlr];
  1903. u64bit buff_dma_handle;
  1904. int status = IO_OK;
  1905. c->cmd_type = CMD_IOCTL_PEND;
  1906. c->Header.ReplyQueue = 0;
  1907. if (buff != NULL) {
  1908. c->Header.SGList = 1;
  1909. c->Header.SGTotal = 1;
  1910. } else {
  1911. c->Header.SGList = 0;
  1912. c->Header.SGTotal = 0;
  1913. }
  1914. c->Header.Tag.lower = c->busaddr;
  1915. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  1916. c->Request.Type.Type = cmd_type;
  1917. if (cmd_type == TYPE_CMD) {
  1918. switch (cmd) {
  1919. case CISS_INQUIRY:
  1920. /* are we trying to read a vital product page */
  1921. if (page_code != 0) {
  1922. c->Request.CDB[1] = 0x01;
  1923. c->Request.CDB[2] = page_code;
  1924. }
  1925. c->Request.CDBLen = 6;
  1926. c->Request.Type.Attribute = ATTR_SIMPLE;
  1927. c->Request.Type.Direction = XFER_READ;
  1928. c->Request.Timeout = 0;
  1929. c->Request.CDB[0] = CISS_INQUIRY;
  1930. c->Request.CDB[4] = size & 0xFF;
  1931. break;
  1932. case CISS_REPORT_LOG:
  1933. case CISS_REPORT_PHYS:
  1934. /* Talking to controller so It's a physical command
  1935. mode = 00 target = 0. Nothing to write.
  1936. */
  1937. c->Request.CDBLen = 12;
  1938. c->Request.Type.Attribute = ATTR_SIMPLE;
  1939. c->Request.Type.Direction = XFER_READ;
  1940. c->Request.Timeout = 0;
  1941. c->Request.CDB[0] = cmd;
  1942. c->Request.CDB[6] = (size >> 24) & 0xFF; //MSB
  1943. c->Request.CDB[7] = (size >> 16) & 0xFF;
  1944. c->Request.CDB[8] = (size >> 8) & 0xFF;
  1945. c->Request.CDB[9] = size & 0xFF;
  1946. break;
  1947. case CCISS_READ_CAPACITY:
  1948. c->Request.CDBLen = 10;
  1949. c->Request.Type.Attribute = ATTR_SIMPLE;
  1950. c->Request.Type.Direction = XFER_READ;
  1951. c->Request.Timeout = 0;
  1952. c->Request.CDB[0] = cmd;
  1953. break;
  1954. case CCISS_READ_CAPACITY_16:
  1955. c->Request.CDBLen = 16;
  1956. c->Request.Type.Attribute = ATTR_SIMPLE;
  1957. c->Request.Type.Direction = XFER_READ;
  1958. c->Request.Timeout = 0;
  1959. c->Request.CDB[0] = cmd;
  1960. c->Request.CDB[1] = 0x10;
  1961. c->Request.CDB[10] = (size >> 24) & 0xFF;
  1962. c->Request.CDB[11] = (size >> 16) & 0xFF;
  1963. c->Request.CDB[12] = (size >> 8) & 0xFF;
  1964. c->Request.CDB[13] = size & 0xFF;
  1965. c->Request.Timeout = 0;
  1966. c->Request.CDB[0] = cmd;
  1967. break;
  1968. case CCISS_CACHE_FLUSH:
  1969. c->Request.CDBLen = 12;
  1970. c->Request.Type.Attribute = ATTR_SIMPLE;
  1971. c->Request.Type.Direction = XFER_WRITE;
  1972. c->Request.Timeout = 0;
  1973. c->Request.CDB[0] = BMIC_WRITE;
  1974. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  1975. break;
  1976. case TEST_UNIT_READY:
  1977. c->Request.CDBLen = 6;
  1978. c->Request.Type.Attribute = ATTR_SIMPLE;
  1979. c->Request.Type.Direction = XFER_NONE;
  1980. c->Request.Timeout = 0;
  1981. break;
  1982. default:
  1983. printk(KERN_WARNING
  1984. "cciss%d: Unknown Command 0x%c\n", ctlr, cmd);
  1985. return IO_ERROR;
  1986. }
  1987. } else if (cmd_type == TYPE_MSG) {
  1988. switch (cmd) {
  1989. case 0: /* ABORT message */
  1990. c->Request.CDBLen = 12;
  1991. c->Request.Type.Attribute = ATTR_SIMPLE;
  1992. c->Request.Type.Direction = XFER_WRITE;
  1993. c->Request.Timeout = 0;
  1994. c->Request.CDB[0] = cmd; /* abort */
  1995. c->Request.CDB[1] = 0; /* abort a command */
  1996. /* buff contains the tag of the command to abort */
  1997. memcpy(&c->Request.CDB[4], buff, 8);
  1998. break;
  1999. case 1: /* RESET message */
  2000. c->Request.CDBLen = 16;
  2001. c->Request.Type.Attribute = ATTR_SIMPLE;
  2002. c->Request.Type.Direction = XFER_NONE;
  2003. c->Request.Timeout = 0;
  2004. memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
  2005. c->Request.CDB[0] = cmd; /* reset */
  2006. c->Request.CDB[1] = 0x03; /* reset a target */
  2007. break;
  2008. case 3: /* No-Op message */
  2009. c->Request.CDBLen = 1;
  2010. c->Request.Type.Attribute = ATTR_SIMPLE;
  2011. c->Request.Type.Direction = XFER_WRITE;
  2012. c->Request.Timeout = 0;
  2013. c->Request.CDB[0] = cmd;
  2014. break;
  2015. default:
  2016. printk(KERN_WARNING
  2017. "cciss%d: unknown message type %d\n", ctlr, cmd);
  2018. return IO_ERROR;
  2019. }
  2020. } else {
  2021. printk(KERN_WARNING
  2022. "cciss%d: unknown command type %d\n", ctlr, cmd_type);
  2023. return IO_ERROR;
  2024. }
  2025. /* Fill in the scatter gather information */
  2026. if (size > 0) {
  2027. buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
  2028. buff, size,
  2029. PCI_DMA_BIDIRECTIONAL);
  2030. c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
  2031. c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
  2032. c->SG[0].Len = size;
  2033. c->SG[0].Ext = 0; /* we are not chaining */
  2034. }
  2035. return status;
  2036. }
  2037. static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
  2038. {
  2039. switch (c->err_info->ScsiStatus) {
  2040. case SAM_STAT_GOOD:
  2041. return IO_OK;
  2042. case SAM_STAT_CHECK_CONDITION:
  2043. switch (0xf & c->err_info->SenseInfo[2]) {
  2044. case 0: return IO_OK; /* no sense */
  2045. case 1: return IO_OK; /* recovered error */
  2046. default:
  2047. printk(KERN_WARNING "cciss%d: cmd 0x%02x "
  2048. "check condition, sense key = 0x%02x\n",
  2049. h->ctlr, c->Request.CDB[0],
  2050. c->err_info->SenseInfo[2]);
  2051. }
  2052. break;
  2053. default:
  2054. printk(KERN_WARNING "cciss%d: cmd 0x%02x"
  2055. "scsi status = 0x%02x\n", h->ctlr,
  2056. c->Request.CDB[0], c->err_info->ScsiStatus);
  2057. break;
  2058. }
  2059. return IO_ERROR;
  2060. }
  2061. static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
  2062. {
  2063. int return_status = IO_OK;
  2064. if (c->err_info->CommandStatus == CMD_SUCCESS)
  2065. return IO_OK;
  2066. switch (c->err_info->CommandStatus) {
  2067. case CMD_TARGET_STATUS:
  2068. return_status = check_target_status(h, c);
  2069. break;
  2070. case CMD_DATA_UNDERRUN:
  2071. case CMD_DATA_OVERRUN:
  2072. /* expected for inquiry and report lun commands */
  2073. break;
  2074. case CMD_INVALID:
  2075. printk(KERN_WARNING "cciss: cmd 0x%02x is "
  2076. "reported invalid\n", c->Request.CDB[0]);
  2077. return_status = IO_ERROR;
  2078. break;
  2079. case CMD_PROTOCOL_ERR:
  2080. printk(KERN_WARNING "cciss: cmd 0x%02x has "
  2081. "protocol error \n", c->Request.CDB[0]);
  2082. return_status = IO_ERROR;
  2083. break;
  2084. case CMD_HARDWARE_ERR:
  2085. printk(KERN_WARNING "cciss: cmd 0x%02x had "
  2086. " hardware error\n", c->Request.CDB[0]);
  2087. return_status = IO_ERROR;
  2088. break;
  2089. case CMD_CONNECTION_LOST:
  2090. printk(KERN_WARNING "cciss: cmd 0x%02x had "
  2091. "connection lost\n", c->Request.CDB[0]);
  2092. return_status = IO_ERROR;
  2093. break;
  2094. case CMD_ABORTED:
  2095. printk(KERN_WARNING "cciss: cmd 0x%02x was "
  2096. "aborted\n", c->Request.CDB[0]);
  2097. return_status = IO_ERROR;
  2098. break;
  2099. case CMD_ABORT_FAILED:
  2100. printk(KERN_WARNING "cciss: cmd 0x%02x reports "
  2101. "abort failed\n", c->Request.CDB[0]);
  2102. return_status = IO_ERROR;
  2103. break;
  2104. case CMD_UNSOLICITED_ABORT:
  2105. printk(KERN_WARNING
  2106. "cciss%d: unsolicited abort 0x%02x\n", h->ctlr,
  2107. c->Request.CDB[0]);
  2108. return_status = IO_NEEDS_RETRY;
  2109. break;
  2110. default:
  2111. printk(KERN_WARNING "cciss: cmd 0x%02x returned "
  2112. "unknown status %x\n", c->Request.CDB[0],
  2113. c->err_info->CommandStatus);
  2114. return_status = IO_ERROR;
  2115. }
  2116. return return_status;
  2117. }
  2118. static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
  2119. int attempt_retry)
  2120. {
  2121. DECLARE_COMPLETION_ONSTACK(wait);
  2122. u64bit buff_dma_handle;
  2123. unsigned long flags;
  2124. int return_status = IO_OK;
  2125. resend_cmd2:
  2126. c->waiting = &wait;
  2127. /* Put the request on the tail of the queue and send it */
  2128. spin_lock_irqsave(CCISS_LOCK(h->ctlr), flags);
  2129. addQ(&h->reqQ, c);
  2130. h->Qdepth++;
  2131. start_io(h);
  2132. spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
  2133. wait_for_completion(&wait);
  2134. if (c->err_info->CommandStatus == 0 || !attempt_retry)
  2135. goto command_done;
  2136. return_status = process_sendcmd_error(h, c);
  2137. if (return_status == IO_NEEDS_RETRY &&
  2138. c->retry_count < MAX_CMD_RETRIES) {
  2139. printk(KERN_WARNING "cciss%d: retrying 0x%02x\n", h->ctlr,
  2140. c->Request.CDB[0]);
  2141. c->retry_count++;
  2142. /* erase the old error information */
  2143. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  2144. return_status = IO_OK;
  2145. INIT_COMPLETION(wait);
  2146. goto resend_cmd2;
  2147. }
  2148. command_done:
  2149. /* unlock the buffers from DMA */
  2150. buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
  2151. buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
  2152. pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
  2153. c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
  2154. return return_status;
  2155. }
  2156. static int sendcmd_withirq(__u8 cmd, int ctlr, void *buff, size_t size,
  2157. __u8 page_code, unsigned char scsi3addr[],
  2158. int cmd_type)
  2159. {
  2160. ctlr_info_t *h = hba[ctlr];
  2161. CommandList_struct *c;
  2162. int return_status;
  2163. c = cmd_alloc(h, 0);
  2164. if (!c)
  2165. return -ENOMEM;
  2166. return_status = fill_cmd(c, cmd, ctlr, buff, size, page_code,
  2167. scsi3addr, cmd_type);
  2168. if (return_status == IO_OK)
  2169. return_status = sendcmd_withirq_core(h, c, 1);
  2170. cmd_free(h, c, 0);
  2171. return return_status;
  2172. }
  2173. static void cciss_geometry_inquiry(int ctlr, int logvol,
  2174. int withirq, sector_t total_size,
  2175. unsigned int block_size,
  2176. InquiryData_struct *inq_buff,
  2177. drive_info_struct *drv)
  2178. {
  2179. int return_code;
  2180. unsigned long t;
  2181. unsigned char scsi3addr[8];
  2182. memset(inq_buff, 0, sizeof(InquiryData_struct));
  2183. log_unit_to_scsi3addr(hba[ctlr], scsi3addr, logvol);
  2184. if (withirq)
  2185. return_code = sendcmd_withirq(CISS_INQUIRY, ctlr,
  2186. inq_buff, sizeof(*inq_buff),
  2187. 0xC1, scsi3addr, TYPE_CMD);
  2188. else
  2189. return_code = sendcmd(CISS_INQUIRY, ctlr, inq_buff,
  2190. sizeof(*inq_buff), 0xC1, scsi3addr,
  2191. TYPE_CMD);
  2192. if (return_code == IO_OK) {
  2193. if (inq_buff->data_byte[8] == 0xFF) {
  2194. printk(KERN_WARNING
  2195. "cciss: reading geometry failed, volume "
  2196. "does not support reading geometry\n");
  2197. drv->heads = 255;
  2198. drv->sectors = 32; // Sectors per track
  2199. drv->cylinders = total_size + 1;
  2200. drv->raid_level = RAID_UNKNOWN;
  2201. } else {
  2202. drv->heads = inq_buff->data_byte[6];
  2203. drv->sectors = inq_buff->data_byte[7];
  2204. drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
  2205. drv->cylinders += inq_buff->data_byte[5];
  2206. drv->raid_level = inq_buff->data_byte[8];
  2207. }
  2208. drv->block_size = block_size;
  2209. drv->nr_blocks = total_size + 1;
  2210. t = drv->heads * drv->sectors;
  2211. if (t > 1) {
  2212. sector_t real_size = total_size + 1;
  2213. unsigned long rem = sector_div(real_size, t);
  2214. if (rem)
  2215. real_size++;
  2216. drv->cylinders = real_size;
  2217. }
  2218. } else { /* Get geometry failed */
  2219. printk(KERN_WARNING "cciss: reading geometry failed\n");
  2220. }
  2221. printk(KERN_INFO " heads=%d, sectors=%d, cylinders=%d\n\n",
  2222. drv->heads, drv->sectors, drv->cylinders);
  2223. }
  2224. static void
  2225. cciss_read_capacity(int ctlr, int logvol, int withirq, sector_t *total_size,
  2226. unsigned int *block_size)
  2227. {
  2228. ReadCapdata_struct *buf;
  2229. int return_code;
  2230. unsigned char scsi3addr[8];
  2231. buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
  2232. if (!buf) {
  2233. printk(KERN_WARNING "cciss: out of memory\n");
  2234. return;
  2235. }
  2236. log_unit_to_scsi3addr(hba[ctlr], scsi3addr, logvol);
  2237. if (withirq)
  2238. return_code = sendcmd_withirq(CCISS_READ_CAPACITY,
  2239. ctlr, buf, sizeof(ReadCapdata_struct),
  2240. 0, scsi3addr, TYPE_CMD);
  2241. else
  2242. return_code = sendcmd(CCISS_READ_CAPACITY,
  2243. ctlr, buf, sizeof(ReadCapdata_struct),
  2244. 0, scsi3addr, TYPE_CMD);
  2245. if (return_code == IO_OK) {
  2246. *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
  2247. *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
  2248. } else { /* read capacity command failed */
  2249. printk(KERN_WARNING "cciss: read capacity failed\n");
  2250. *total_size = 0;
  2251. *block_size = BLOCK_SIZE;
  2252. }
  2253. if (*total_size != 0)
  2254. printk(KERN_INFO " blocks= %llu block_size= %d\n",
  2255. (unsigned long long)*total_size+1, *block_size);
  2256. kfree(buf);
  2257. }
  2258. static void
  2259. cciss_read_capacity_16(int ctlr, int logvol, int withirq, sector_t *total_size, unsigned int *block_size)
  2260. {
  2261. ReadCapdata_struct_16 *buf;
  2262. int return_code;
  2263. unsigned char scsi3addr[8];
  2264. buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
  2265. if (!buf) {
  2266. printk(KERN_WARNING "cciss: out of memory\n");
  2267. return;
  2268. }
  2269. log_unit_to_scsi3addr(hba[ctlr], scsi3addr, logvol);
  2270. if (withirq) {
  2271. return_code = sendcmd_withirq(CCISS_READ_CAPACITY_16,
  2272. ctlr, buf, sizeof(ReadCapdata_struct_16),
  2273. 0, scsi3addr, TYPE_CMD);
  2274. }
  2275. else {
  2276. return_code = sendcmd(CCISS_READ_CAPACITY_16,
  2277. ctlr, buf, sizeof(ReadCapdata_struct_16),
  2278. 0, scsi3addr, TYPE_CMD);
  2279. }
  2280. if (return_code == IO_OK) {
  2281. *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
  2282. *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
  2283. } else { /* read capacity command failed */
  2284. printk(KERN_WARNING "cciss: read capacity failed\n");
  2285. *total_size = 0;
  2286. *block_size = BLOCK_SIZE;
  2287. }
  2288. printk(KERN_INFO " blocks= %llu block_size= %d\n",
  2289. (unsigned long long)*total_size+1, *block_size);
  2290. kfree(buf);
  2291. }
  2292. static int cciss_revalidate(struct gendisk *disk)
  2293. {
  2294. ctlr_info_t *h = get_host(disk);
  2295. drive_info_struct *drv = get_drv(disk);
  2296. int logvol;
  2297. int FOUND = 0;
  2298. unsigned int block_size;
  2299. sector_t total_size;
  2300. InquiryData_struct *inq_buff = NULL;
  2301. for (logvol = 0; logvol < CISS_MAX_LUN; logvol++) {
  2302. if (h->drv[logvol].LunID == drv->LunID) {
  2303. FOUND = 1;
  2304. break;
  2305. }
  2306. }
  2307. if (!FOUND)
  2308. return 1;
  2309. inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  2310. if (inq_buff == NULL) {
  2311. printk(KERN_WARNING "cciss: out of memory\n");
  2312. return 1;
  2313. }
  2314. if (h->cciss_read == CCISS_READ_10) {
  2315. cciss_read_capacity(h->ctlr, logvol, 1,
  2316. &total_size, &block_size);
  2317. } else {
  2318. cciss_read_capacity_16(h->ctlr, logvol, 1,
  2319. &total_size, &block_size);
  2320. }
  2321. cciss_geometry_inquiry(h->ctlr, logvol, 1, total_size, block_size,
  2322. inq_buff, drv);
  2323. blk_queue_logical_block_size(drv->queue, drv->block_size);
  2324. set_capacity(disk, drv->nr_blocks);
  2325. kfree(inq_buff);
  2326. return 0;
  2327. }
  2328. /*
  2329. * Wait polling for a command to complete.
  2330. * The memory mapped FIFO is polled for the completion.
  2331. * Used only at init time, interrupts from the HBA are disabled.
  2332. */
  2333. static unsigned long pollcomplete(int ctlr)
  2334. {
  2335. unsigned long done;
  2336. int i;
  2337. /* Wait (up to 20 seconds) for a command to complete */
  2338. for (i = 20 * HZ; i > 0; i--) {
  2339. done = hba[ctlr]->access.command_completed(hba[ctlr]);
  2340. if (done == FIFO_EMPTY)
  2341. schedule_timeout_uninterruptible(1);
  2342. else
  2343. return done;
  2344. }
  2345. /* Invalid address to tell caller we ran out of time */
  2346. return 1;
  2347. }
  2348. /* Send command c to controller h and poll for it to complete.
  2349. * Turns interrupts off on the board. Used at driver init time
  2350. * and during SCSI error recovery.
  2351. */
  2352. static int sendcmd_core(ctlr_info_t *h, CommandList_struct *c)
  2353. {
  2354. int i;
  2355. unsigned long complete;
  2356. int status = IO_ERROR;
  2357. u64bit buff_dma_handle;
  2358. resend_cmd1:
  2359. /* Disable interrupt on the board. */
  2360. h->access.set_intr_mask(h, CCISS_INTR_OFF);
  2361. /* Make sure there is room in the command FIFO */
  2362. /* Actually it should be completely empty at this time */
  2363. /* unless we are in here doing error handling for the scsi */
  2364. /* tape side of the driver. */
  2365. for (i = 200000; i > 0; i--) {
  2366. /* if fifo isn't full go */
  2367. if (!(h->access.fifo_full(h)))
  2368. break;
  2369. udelay(10);
  2370. printk(KERN_WARNING "cciss cciss%d: SendCmd FIFO full,"
  2371. " waiting!\n", h->ctlr);
  2372. }
  2373. h->access.submit_command(h, c); /* Send the cmd */
  2374. do {
  2375. complete = pollcomplete(h->ctlr);
  2376. #ifdef CCISS_DEBUG
  2377. printk(KERN_DEBUG "cciss: command completed\n");
  2378. #endif /* CCISS_DEBUG */
  2379. if (complete == 1) {
  2380. printk(KERN_WARNING
  2381. "cciss cciss%d: SendCmd Timeout out, "
  2382. "No command list address returned!\n", h->ctlr);
  2383. status = IO_ERROR;
  2384. break;
  2385. }
  2386. /* Make sure it's the command we're expecting. */
  2387. if ((complete & ~CISS_ERROR_BIT) != c->busaddr) {
  2388. printk(KERN_WARNING "cciss%d: Unexpected command "
  2389. "completion.\n", h->ctlr);
  2390. continue;
  2391. }
  2392. /* It is our command. If no error, we're done. */
  2393. if (!(complete & CISS_ERROR_BIT)) {
  2394. status = IO_OK;
  2395. break;
  2396. }
  2397. /* There is an error... */
  2398. /* if data overrun or underun on Report command ignore it */
  2399. if (((c->Request.CDB[0] == CISS_REPORT_LOG) ||
  2400. (c->Request.CDB[0] == CISS_REPORT_PHYS) ||
  2401. (c->Request.CDB[0] == CISS_INQUIRY)) &&
  2402. ((c->err_info->CommandStatus == CMD_DATA_OVERRUN) ||
  2403. (c->err_info->CommandStatus == CMD_DATA_UNDERRUN))) {
  2404. complete = c->busaddr;
  2405. status = IO_OK;
  2406. break;
  2407. }
  2408. if (c->err_info->CommandStatus == CMD_UNSOLICITED_ABORT) {
  2409. printk(KERN_WARNING "cciss%d: unsolicited abort %p\n",
  2410. h->ctlr, c);
  2411. if (c->retry_count < MAX_CMD_RETRIES) {
  2412. printk(KERN_WARNING "cciss%d: retrying %p\n",
  2413. h->ctlr, c);
  2414. c->retry_count++;
  2415. /* erase the old error information */
  2416. memset(c->err_info, 0, sizeof(c->err_info));
  2417. goto resend_cmd1;
  2418. }
  2419. printk(KERN_WARNING "cciss%d: retried %p too many "
  2420. "times\n", h->ctlr, c);
  2421. status = IO_ERROR;
  2422. break;
  2423. }
  2424. if (c->err_info->CommandStatus == CMD_UNABORTABLE) {
  2425. printk(KERN_WARNING "cciss%d: command could not be "
  2426. "aborted.\n", h->ctlr);
  2427. status = IO_ERROR;
  2428. break;
  2429. }
  2430. if (c->err_info->CommandStatus == CMD_TARGET_STATUS) {
  2431. status = check_target_status(h, c);
  2432. break;
  2433. }
  2434. printk(KERN_WARNING "cciss%d: sendcmd error\n", h->ctlr);
  2435. printk(KERN_WARNING "cmd = 0x%02x, CommandStatus = 0x%02x\n",
  2436. c->Request.CDB[0], c->err_info->CommandStatus);
  2437. status = IO_ERROR;
  2438. break;
  2439. } while (1);
  2440. /* unlock the data buffer from DMA */
  2441. buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
  2442. buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
  2443. pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
  2444. c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
  2445. return status;
  2446. }
  2447. /*
  2448. * Send a command to the controller, and wait for it to complete.
  2449. * Used at init time, and during SCSI error recovery.
  2450. */
  2451. static int sendcmd(__u8 cmd, int ctlr, void *buff, size_t size,
  2452. __u8 page_code, unsigned char *scsi3addr, int cmd_type)
  2453. {
  2454. CommandList_struct *c;
  2455. int status;
  2456. c = cmd_alloc(hba[ctlr], 1);
  2457. if (!c) {
  2458. printk(KERN_WARNING "cciss: unable to get memory");
  2459. return IO_ERROR;
  2460. }
  2461. status = fill_cmd(c, cmd, ctlr, buff, size, page_code,
  2462. scsi3addr, cmd_type);
  2463. if (status == IO_OK)
  2464. status = sendcmd_core(hba[ctlr], c);
  2465. cmd_free(hba[ctlr], c, 1);
  2466. return status;
  2467. }
  2468. /*
  2469. * Map (physical) PCI mem into (virtual) kernel space
  2470. */
  2471. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2472. {
  2473. ulong page_base = ((ulong) base) & PAGE_MASK;
  2474. ulong page_offs = ((ulong) base) - page_base;
  2475. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2476. return page_remapped ? (page_remapped + page_offs) : NULL;
  2477. }
  2478. /*
  2479. * Takes jobs of the Q and sends them to the hardware, then puts it on
  2480. * the Q to wait for completion.
  2481. */
  2482. static void start_io(ctlr_info_t *h)
  2483. {
  2484. CommandList_struct *c;
  2485. while (!hlist_empty(&h->reqQ)) {
  2486. c = hlist_entry(h->reqQ.first, CommandList_struct, list);
  2487. /* can't do anything if fifo is full */
  2488. if ((h->access.fifo_full(h))) {
  2489. printk(KERN_WARNING "cciss: fifo full\n");
  2490. break;
  2491. }
  2492. /* Get the first entry from the Request Q */
  2493. removeQ(c);
  2494. h->Qdepth--;
  2495. /* Tell the controller execute command */
  2496. h->access.submit_command(h, c);
  2497. /* Put job onto the completed Q */
  2498. addQ(&h->cmpQ, c);
  2499. }
  2500. }
  2501. /* Assumes that CCISS_LOCK(h->ctlr) is held. */
  2502. /* Zeros out the error record and then resends the command back */
  2503. /* to the controller */
  2504. static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
  2505. {
  2506. /* erase the old error information */
  2507. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  2508. /* add it to software queue and then send it to the controller */
  2509. addQ(&h->reqQ, c);
  2510. h->Qdepth++;
  2511. if (h->Qdepth > h->maxQsinceinit)
  2512. h->maxQsinceinit = h->Qdepth;
  2513. start_io(h);
  2514. }
  2515. static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
  2516. unsigned int msg_byte, unsigned int host_byte,
  2517. unsigned int driver_byte)
  2518. {
  2519. /* inverse of macros in scsi.h */
  2520. return (scsi_status_byte & 0xff) |
  2521. ((msg_byte & 0xff) << 8) |
  2522. ((host_byte & 0xff) << 16) |
  2523. ((driver_byte & 0xff) << 24);
  2524. }
  2525. static inline int evaluate_target_status(ctlr_info_t *h,
  2526. CommandList_struct *cmd, int *retry_cmd)
  2527. {
  2528. unsigned char sense_key;
  2529. unsigned char status_byte, msg_byte, host_byte, driver_byte;
  2530. int error_value;
  2531. *retry_cmd = 0;
  2532. /* If we get in here, it means we got "target status", that is, scsi status */
  2533. status_byte = cmd->err_info->ScsiStatus;
  2534. driver_byte = DRIVER_OK;
  2535. msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */
  2536. if (blk_pc_request(cmd->rq))
  2537. host_byte = DID_PASSTHROUGH;
  2538. else
  2539. host_byte = DID_OK;
  2540. error_value = make_status_bytes(status_byte, msg_byte,
  2541. host_byte, driver_byte);
  2542. if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
  2543. if (!blk_pc_request(cmd->rq))
  2544. printk(KERN_WARNING "cciss: cmd %p "
  2545. "has SCSI Status 0x%x\n",
  2546. cmd, cmd->err_info->ScsiStatus);
  2547. return error_value;
  2548. }
  2549. /* check the sense key */
  2550. sense_key = 0xf & cmd->err_info->SenseInfo[2];
  2551. /* no status or recovered error */
  2552. if (((sense_key == 0x0) || (sense_key == 0x1)) && !blk_pc_request(cmd->rq))
  2553. error_value = 0;
  2554. if (check_for_unit_attention(h, cmd)) {
  2555. *retry_cmd = !blk_pc_request(cmd->rq);
  2556. return 0;
  2557. }
  2558. if (!blk_pc_request(cmd->rq)) { /* Not SG_IO or similar? */
  2559. if (error_value != 0)
  2560. printk(KERN_WARNING "cciss: cmd %p has CHECK CONDITION"
  2561. " sense key = 0x%x\n", cmd, sense_key);
  2562. return error_value;
  2563. }
  2564. /* SG_IO or similar, copy sense data back */
  2565. if (cmd->rq->sense) {
  2566. if (cmd->rq->sense_len > cmd->err_info->SenseLen)
  2567. cmd->rq->sense_len = cmd->err_info->SenseLen;
  2568. memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
  2569. cmd->rq->sense_len);
  2570. } else
  2571. cmd->rq->sense_len = 0;
  2572. return error_value;
  2573. }
  2574. /* checks the status of the job and calls complete buffers to mark all
  2575. * buffers for the completed job. Note that this function does not need
  2576. * to hold the hba/queue lock.
  2577. */
  2578. static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
  2579. int timeout)
  2580. {
  2581. int retry_cmd = 0;
  2582. struct request *rq = cmd->rq;
  2583. rq->errors = 0;
  2584. if (timeout)
  2585. rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
  2586. if (cmd->err_info->CommandStatus == 0) /* no error has occurred */
  2587. goto after_error_processing;
  2588. switch (cmd->err_info->CommandStatus) {
  2589. case CMD_TARGET_STATUS:
  2590. rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
  2591. break;
  2592. case CMD_DATA_UNDERRUN:
  2593. if (blk_fs_request(cmd->rq)) {
  2594. printk(KERN_WARNING "cciss: cmd %p has"
  2595. " completed with data underrun "
  2596. "reported\n", cmd);
  2597. cmd->rq->resid_len = cmd->err_info->ResidualCnt;
  2598. }
  2599. break;
  2600. case CMD_DATA_OVERRUN:
  2601. if (blk_fs_request(cmd->rq))
  2602. printk(KERN_WARNING "cciss: cmd %p has"
  2603. " completed with data overrun "
  2604. "reported\n", cmd);
  2605. break;
  2606. case CMD_INVALID:
  2607. printk(KERN_WARNING "cciss: cmd %p is "
  2608. "reported invalid\n", cmd);
  2609. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2610. cmd->err_info->CommandStatus, DRIVER_OK,
  2611. blk_pc_request(cmd->rq) ? DID_PASSTHROUGH : DID_ERROR);
  2612. break;
  2613. case CMD_PROTOCOL_ERR:
  2614. printk(KERN_WARNING "cciss: cmd %p has "
  2615. "protocol error \n", cmd);
  2616. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2617. cmd->err_info->CommandStatus, DRIVER_OK,
  2618. blk_pc_request(cmd->rq) ? DID_PASSTHROUGH : DID_ERROR);
  2619. break;
  2620. case CMD_HARDWARE_ERR:
  2621. printk(KERN_WARNING "cciss: cmd %p had "
  2622. " hardware error\n", cmd);
  2623. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2624. cmd->err_info->CommandStatus, DRIVER_OK,
  2625. blk_pc_request(cmd->rq) ? DID_PASSTHROUGH : DID_ERROR);
  2626. break;
  2627. case CMD_CONNECTION_LOST:
  2628. printk(KERN_WARNING "cciss: cmd %p had "
  2629. "connection lost\n", cmd);
  2630. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2631. cmd->err_info->CommandStatus, DRIVER_OK,
  2632. blk_pc_request(cmd->rq) ? DID_PASSTHROUGH : DID_ERROR);
  2633. break;
  2634. case CMD_ABORTED:
  2635. printk(KERN_WARNING "cciss: cmd %p was "
  2636. "aborted\n", cmd);
  2637. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2638. cmd->err_info->CommandStatus, DRIVER_OK,
  2639. blk_pc_request(cmd->rq) ? DID_PASSTHROUGH : DID_ABORT);
  2640. break;
  2641. case CMD_ABORT_FAILED:
  2642. printk(KERN_WARNING "cciss: cmd %p reports "
  2643. "abort failed\n", cmd);
  2644. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2645. cmd->err_info->CommandStatus, DRIVER_OK,
  2646. blk_pc_request(cmd->rq) ? DID_PASSTHROUGH : DID_ERROR);
  2647. break;
  2648. case CMD_UNSOLICITED_ABORT:
  2649. printk(KERN_WARNING "cciss%d: unsolicited "
  2650. "abort %p\n", h->ctlr, cmd);
  2651. if (cmd->retry_count < MAX_CMD_RETRIES) {
  2652. retry_cmd = 1;
  2653. printk(KERN_WARNING
  2654. "cciss%d: retrying %p\n", h->ctlr, cmd);
  2655. cmd->retry_count++;
  2656. } else
  2657. printk(KERN_WARNING
  2658. "cciss%d: %p retried too "
  2659. "many times\n", h->ctlr, cmd);
  2660. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2661. cmd->err_info->CommandStatus, DRIVER_OK,
  2662. blk_pc_request(cmd->rq) ? DID_PASSTHROUGH : DID_ABORT);
  2663. break;
  2664. case CMD_TIMEOUT:
  2665. printk(KERN_WARNING "cciss: cmd %p timedout\n", cmd);
  2666. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2667. cmd->err_info->CommandStatus, DRIVER_OK,
  2668. blk_pc_request(cmd->rq) ? DID_PASSTHROUGH : DID_ERROR);
  2669. break;
  2670. default:
  2671. printk(KERN_WARNING "cciss: cmd %p returned "
  2672. "unknown status %x\n", cmd,
  2673. cmd->err_info->CommandStatus);
  2674. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2675. cmd->err_info->CommandStatus, DRIVER_OK,
  2676. blk_pc_request(cmd->rq) ? DID_PASSTHROUGH : DID_ERROR);
  2677. }
  2678. after_error_processing:
  2679. /* We need to return this command */
  2680. if (retry_cmd) {
  2681. resend_cciss_cmd(h, cmd);
  2682. return;
  2683. }
  2684. cmd->rq->completion_data = cmd;
  2685. blk_complete_request(cmd->rq);
  2686. }
  2687. /*
  2688. * Get a request and submit it to the controller.
  2689. */
  2690. static void do_cciss_request(struct request_queue *q)
  2691. {
  2692. ctlr_info_t *h = q->queuedata;
  2693. CommandList_struct *c;
  2694. sector_t start_blk;
  2695. int seg;
  2696. struct request *creq;
  2697. u64bit temp64;
  2698. struct scatterlist tmp_sg[MAXSGENTRIES];
  2699. drive_info_struct *drv;
  2700. int i, dir;
  2701. /* We call start_io here in case there is a command waiting on the
  2702. * queue that has not been sent.
  2703. */
  2704. if (blk_queue_plugged(q))
  2705. goto startio;
  2706. queue:
  2707. creq = blk_peek_request(q);
  2708. if (!creq)
  2709. goto startio;
  2710. BUG_ON(creq->nr_phys_segments > MAXSGENTRIES);
  2711. if ((c = cmd_alloc(h, 1)) == NULL)
  2712. goto full;
  2713. blk_start_request(creq);
  2714. spin_unlock_irq(q->queue_lock);
  2715. c->cmd_type = CMD_RWREQ;
  2716. c->rq = creq;
  2717. /* fill in the request */
  2718. drv = creq->rq_disk->private_data;
  2719. c->Header.ReplyQueue = 0; // unused in simple mode
  2720. /* got command from pool, so use the command block index instead */
  2721. /* for direct lookups. */
  2722. /* The first 2 bits are reserved for controller error reporting. */
  2723. c->Header.Tag.lower = (c->cmdindex << 3);
  2724. c->Header.Tag.lower |= 0x04; /* flag for direct lookup. */
  2725. c->Header.LUN.LogDev.VolId = drv->LunID;
  2726. c->Header.LUN.LogDev.Mode = 1;
  2727. c->Request.CDBLen = 10; // 12 byte commands not in FW yet;
  2728. c->Request.Type.Type = TYPE_CMD; // It is a command.
  2729. c->Request.Type.Attribute = ATTR_SIMPLE;
  2730. c->Request.Type.Direction =
  2731. (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
  2732. c->Request.Timeout = 0; // Don't time out
  2733. c->Request.CDB[0] =
  2734. (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
  2735. start_blk = blk_rq_pos(creq);
  2736. #ifdef CCISS_DEBUG
  2737. printk(KERN_DEBUG "ciss: sector =%d nr_sectors=%d\n",
  2738. (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
  2739. #endif /* CCISS_DEBUG */
  2740. sg_init_table(tmp_sg, MAXSGENTRIES);
  2741. seg = blk_rq_map_sg(q, creq, tmp_sg);
  2742. /* get the DMA records for the setup */
  2743. if (c->Request.Type.Direction == XFER_READ)
  2744. dir = PCI_DMA_FROMDEVICE;
  2745. else
  2746. dir = PCI_DMA_TODEVICE;
  2747. for (i = 0; i < seg; i++) {
  2748. c->SG[i].Len = tmp_sg[i].length;
  2749. temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
  2750. tmp_sg[i].offset,
  2751. tmp_sg[i].length, dir);
  2752. c->SG[i].Addr.lower = temp64.val32.lower;
  2753. c->SG[i].Addr.upper = temp64.val32.upper;
  2754. c->SG[i].Ext = 0; // we are not chaining
  2755. }
  2756. /* track how many SG entries we are using */
  2757. if (seg > h->maxSG)
  2758. h->maxSG = seg;
  2759. #ifdef CCISS_DEBUG
  2760. printk(KERN_DEBUG "cciss: Submitting %u sectors in %d segments\n",
  2761. blk_rq_sectors(creq), seg);
  2762. #endif /* CCISS_DEBUG */
  2763. c->Header.SGList = c->Header.SGTotal = seg;
  2764. if (likely(blk_fs_request(creq))) {
  2765. if(h->cciss_read == CCISS_READ_10) {
  2766. c->Request.CDB[1] = 0;
  2767. c->Request.CDB[2] = (start_blk >> 24) & 0xff; //MSB
  2768. c->Request.CDB[3] = (start_blk >> 16) & 0xff;
  2769. c->Request.CDB[4] = (start_blk >> 8) & 0xff;
  2770. c->Request.CDB[5] = start_blk & 0xff;
  2771. c->Request.CDB[6] = 0; // (sect >> 24) & 0xff; MSB
  2772. c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
  2773. c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
  2774. c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
  2775. } else {
  2776. u32 upper32 = upper_32_bits(start_blk);
  2777. c->Request.CDBLen = 16;
  2778. c->Request.CDB[1]= 0;
  2779. c->Request.CDB[2]= (upper32 >> 24) & 0xff; //MSB
  2780. c->Request.CDB[3]= (upper32 >> 16) & 0xff;
  2781. c->Request.CDB[4]= (upper32 >> 8) & 0xff;
  2782. c->Request.CDB[5]= upper32 & 0xff;
  2783. c->Request.CDB[6]= (start_blk >> 24) & 0xff;
  2784. c->Request.CDB[7]= (start_blk >> 16) & 0xff;
  2785. c->Request.CDB[8]= (start_blk >> 8) & 0xff;
  2786. c->Request.CDB[9]= start_blk & 0xff;
  2787. c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
  2788. c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
  2789. c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff;
  2790. c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
  2791. c->Request.CDB[14] = c->Request.CDB[15] = 0;
  2792. }
  2793. } else if (blk_pc_request(creq)) {
  2794. c->Request.CDBLen = creq->cmd_len;
  2795. memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
  2796. } else {
  2797. printk(KERN_WARNING "cciss%d: bad request type %d\n", h->ctlr, creq->cmd_type);
  2798. BUG();
  2799. }
  2800. spin_lock_irq(q->queue_lock);
  2801. addQ(&h->reqQ, c);
  2802. h->Qdepth++;
  2803. if (h->Qdepth > h->maxQsinceinit)
  2804. h->maxQsinceinit = h->Qdepth;
  2805. goto queue;
  2806. full:
  2807. blk_stop_queue(q);
  2808. startio:
  2809. /* We will already have the driver lock here so not need
  2810. * to lock it.
  2811. */
  2812. start_io(h);
  2813. }
  2814. static inline unsigned long get_next_completion(ctlr_info_t *h)
  2815. {
  2816. return h->access.command_completed(h);
  2817. }
  2818. static inline int interrupt_pending(ctlr_info_t *h)
  2819. {
  2820. return h->access.intr_pending(h);
  2821. }
  2822. static inline long interrupt_not_for_us(ctlr_info_t *h)
  2823. {
  2824. return (((h->access.intr_pending(h) == 0) ||
  2825. (h->interrupts_enabled == 0)));
  2826. }
  2827. static irqreturn_t do_cciss_intr(int irq, void *dev_id)
  2828. {
  2829. ctlr_info_t *h = dev_id;
  2830. CommandList_struct *c;
  2831. unsigned long flags;
  2832. __u32 a, a1, a2;
  2833. if (interrupt_not_for_us(h))
  2834. return IRQ_NONE;
  2835. /*
  2836. * If there are completed commands in the completion queue,
  2837. * we had better do something about it.
  2838. */
  2839. spin_lock_irqsave(CCISS_LOCK(h->ctlr), flags);
  2840. while (interrupt_pending(h)) {
  2841. while ((a = get_next_completion(h)) != FIFO_EMPTY) {
  2842. a1 = a;
  2843. if ((a & 0x04)) {
  2844. a2 = (a >> 3);
  2845. if (a2 >= h->nr_cmds) {
  2846. printk(KERN_WARNING
  2847. "cciss: controller cciss%d failed, stopping.\n",
  2848. h->ctlr);
  2849. fail_all_cmds(h->ctlr);
  2850. return IRQ_HANDLED;
  2851. }
  2852. c = h->cmd_pool + a2;
  2853. a = c->busaddr;
  2854. } else {
  2855. struct hlist_node *tmp;
  2856. a &= ~3;
  2857. c = NULL;
  2858. hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
  2859. if (c->busaddr == a)
  2860. break;
  2861. }
  2862. }
  2863. /*
  2864. * If we've found the command, take it off the
  2865. * completion Q and free it
  2866. */
  2867. if (c && c->busaddr == a) {
  2868. removeQ(c);
  2869. if (c->cmd_type == CMD_RWREQ) {
  2870. complete_command(h, c, 0);
  2871. } else if (c->cmd_type == CMD_IOCTL_PEND) {
  2872. complete(c->waiting);
  2873. }
  2874. # ifdef CONFIG_CISS_SCSI_TAPE
  2875. else if (c->cmd_type == CMD_SCSI)
  2876. complete_scsi_command(c, 0, a1);
  2877. # endif
  2878. continue;
  2879. }
  2880. }
  2881. }
  2882. spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
  2883. return IRQ_HANDLED;
  2884. }
  2885. static int scan_thread(void *data)
  2886. {
  2887. ctlr_info_t *h = data;
  2888. int rc;
  2889. DECLARE_COMPLETION_ONSTACK(wait);
  2890. h->rescan_wait = &wait;
  2891. for (;;) {
  2892. rc = wait_for_completion_interruptible(&wait);
  2893. if (kthread_should_stop())
  2894. break;
  2895. if (!rc)
  2896. rebuild_lun_table(h, 0);
  2897. }
  2898. return 0;
  2899. }
  2900. static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
  2901. {
  2902. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  2903. return 0;
  2904. switch (c->err_info->SenseInfo[12]) {
  2905. case STATE_CHANGED:
  2906. printk(KERN_WARNING "cciss%d: a state change "
  2907. "detected, command retried\n", h->ctlr);
  2908. return 1;
  2909. break;
  2910. case LUN_FAILED:
  2911. printk(KERN_WARNING "cciss%d: LUN failure "
  2912. "detected, action required\n", h->ctlr);
  2913. return 1;
  2914. break;
  2915. case REPORT_LUNS_CHANGED:
  2916. printk(KERN_WARNING "cciss%d: report LUN data "
  2917. "changed\n", h->ctlr);
  2918. if (h->rescan_wait)
  2919. complete(h->rescan_wait);
  2920. return 1;
  2921. break;
  2922. case POWER_OR_RESET:
  2923. printk(KERN_WARNING "cciss%d: a power on "
  2924. "or device reset detected\n", h->ctlr);
  2925. return 1;
  2926. break;
  2927. case UNIT_ATTENTION_CLEARED:
  2928. printk(KERN_WARNING "cciss%d: unit attention "
  2929. "cleared by another initiator\n", h->ctlr);
  2930. return 1;
  2931. break;
  2932. default:
  2933. printk(KERN_WARNING "cciss%d: unknown "
  2934. "unit attention detected\n", h->ctlr);
  2935. return 1;
  2936. }
  2937. }
  2938. /*
  2939. * We cannot read the structure directly, for portability we must use
  2940. * the io functions.
  2941. * This is for debug only.
  2942. */
  2943. #ifdef CCISS_DEBUG
  2944. static void print_cfg_table(CfgTable_struct *tb)
  2945. {
  2946. int i;
  2947. char temp_name[17];
  2948. printk("Controller Configuration information\n");
  2949. printk("------------------------------------\n");
  2950. for (i = 0; i < 4; i++)
  2951. temp_name[i] = readb(&(tb->Signature[i]));
  2952. temp_name[4] = '\0';
  2953. printk(" Signature = %s\n", temp_name);
  2954. printk(" Spec Number = %d\n", readl(&(tb->SpecValence)));
  2955. printk(" Transport methods supported = 0x%x\n",
  2956. readl(&(tb->TransportSupport)));
  2957. printk(" Transport methods active = 0x%x\n",
  2958. readl(&(tb->TransportActive)));
  2959. printk(" Requested transport Method = 0x%x\n",
  2960. readl(&(tb->HostWrite.TransportRequest)));
  2961. printk(" Coalesce Interrupt Delay = 0x%x\n",
  2962. readl(&(tb->HostWrite.CoalIntDelay)));
  2963. printk(" Coalesce Interrupt Count = 0x%x\n",
  2964. readl(&(tb->HostWrite.CoalIntCount)));
  2965. printk(" Max outstanding commands = 0x%d\n",
  2966. readl(&(tb->CmdsOutMax)));
  2967. printk(" Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
  2968. for (i = 0; i < 16; i++)
  2969. temp_name[i] = readb(&(tb->ServerName[i]));
  2970. temp_name[16] = '\0';
  2971. printk(" Server Name = %s\n", temp_name);
  2972. printk(" Heartbeat Counter = 0x%x\n\n\n", readl(&(tb->HeartBeat)));
  2973. }
  2974. #endif /* CCISS_DEBUG */
  2975. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  2976. {
  2977. int i, offset, mem_type, bar_type;
  2978. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  2979. return 0;
  2980. offset = 0;
  2981. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  2982. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  2983. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  2984. offset += 4;
  2985. else {
  2986. mem_type = pci_resource_flags(pdev, i) &
  2987. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  2988. switch (mem_type) {
  2989. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  2990. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  2991. offset += 4; /* 32 bit */
  2992. break;
  2993. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  2994. offset += 8;
  2995. break;
  2996. default: /* reserved in PCI 2.2 */
  2997. printk(KERN_WARNING
  2998. "Base address is invalid\n");
  2999. return -1;
  3000. break;
  3001. }
  3002. }
  3003. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  3004. return i + 1;
  3005. }
  3006. return -1;
  3007. }
  3008. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  3009. * controllers that are capable. If not, we use IO-APIC mode.
  3010. */
  3011. static void __devinit cciss_interrupt_mode(ctlr_info_t *c,
  3012. struct pci_dev *pdev, __u32 board_id)
  3013. {
  3014. #ifdef CONFIG_PCI_MSI
  3015. int err;
  3016. struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
  3017. {0, 2}, {0, 3}
  3018. };
  3019. /* Some boards advertise MSI but don't really support it */
  3020. if ((board_id == 0x40700E11) ||
  3021. (board_id == 0x40800E11) ||
  3022. (board_id == 0x40820E11) || (board_id == 0x40830E11))
  3023. goto default_int_mode;
  3024. if (pci_find_capability(pdev, PCI_CAP_ID_MSIX)) {
  3025. err = pci_enable_msix(pdev, cciss_msix_entries, 4);
  3026. if (!err) {
  3027. c->intr[0] = cciss_msix_entries[0].vector;
  3028. c->intr[1] = cciss_msix_entries[1].vector;
  3029. c->intr[2] = cciss_msix_entries[2].vector;
  3030. c->intr[3] = cciss_msix_entries[3].vector;
  3031. c->msix_vector = 1;
  3032. return;
  3033. }
  3034. if (err > 0) {
  3035. printk(KERN_WARNING "cciss: only %d MSI-X vectors "
  3036. "available\n", err);
  3037. goto default_int_mode;
  3038. } else {
  3039. printk(KERN_WARNING "cciss: MSI-X init failed %d\n",
  3040. err);
  3041. goto default_int_mode;
  3042. }
  3043. }
  3044. if (pci_find_capability(pdev, PCI_CAP_ID_MSI)) {
  3045. if (!pci_enable_msi(pdev)) {
  3046. c->msi_vector = 1;
  3047. } else {
  3048. printk(KERN_WARNING "cciss: MSI init failed\n");
  3049. }
  3050. }
  3051. default_int_mode:
  3052. #endif /* CONFIG_PCI_MSI */
  3053. /* if we get here we're going to use the default interrupt mode */
  3054. c->intr[SIMPLE_MODE_INT] = pdev->irq;
  3055. return;
  3056. }
  3057. static int __devinit cciss_pci_init(ctlr_info_t *c, struct pci_dev *pdev)
  3058. {
  3059. ushort subsystem_vendor_id, subsystem_device_id, command;
  3060. __u32 board_id, scratchpad = 0;
  3061. __u64 cfg_offset;
  3062. __u32 cfg_base_addr;
  3063. __u64 cfg_base_addr_index;
  3064. int i, err;
  3065. /* check to see if controller has been disabled */
  3066. /* BEFORE trying to enable it */
  3067. (void)pci_read_config_word(pdev, PCI_COMMAND, &command);
  3068. if (!(command & 0x02)) {
  3069. printk(KERN_WARNING
  3070. "cciss: controller appears to be disabled\n");
  3071. return -ENODEV;
  3072. }
  3073. err = pci_enable_device(pdev);
  3074. if (err) {
  3075. printk(KERN_ERR "cciss: Unable to Enable PCI device\n");
  3076. return err;
  3077. }
  3078. err = pci_request_regions(pdev, "cciss");
  3079. if (err) {
  3080. printk(KERN_ERR "cciss: Cannot obtain PCI resources, "
  3081. "aborting\n");
  3082. return err;
  3083. }
  3084. subsystem_vendor_id = pdev->subsystem_vendor;
  3085. subsystem_device_id = pdev->subsystem_device;
  3086. board_id = (((__u32) (subsystem_device_id << 16) & 0xffff0000) |
  3087. subsystem_vendor_id);
  3088. #ifdef CCISS_DEBUG
  3089. printk("command = %x\n", command);
  3090. printk("irq = %x\n", pdev->irq);
  3091. printk("board_id = %x\n", board_id);
  3092. #endif /* CCISS_DEBUG */
  3093. /* If the kernel supports MSI/MSI-X we will try to enable that functionality,
  3094. * else we use the IO-APIC interrupt assigned to us by system ROM.
  3095. */
  3096. cciss_interrupt_mode(c, pdev, board_id);
  3097. /* find the memory BAR */
  3098. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  3099. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM)
  3100. break;
  3101. }
  3102. if (i == DEVICE_COUNT_RESOURCE) {
  3103. printk(KERN_WARNING "cciss: No memory BAR found\n");
  3104. err = -ENODEV;
  3105. goto err_out_free_res;
  3106. }
  3107. c->paddr = pci_resource_start(pdev, i); /* addressing mode bits
  3108. * already removed
  3109. */
  3110. #ifdef CCISS_DEBUG
  3111. printk("address 0 = %lx\n", c->paddr);
  3112. #endif /* CCISS_DEBUG */
  3113. c->vaddr = remap_pci_mem(c->paddr, 0x250);
  3114. /* Wait for the board to become ready. (PCI hotplug needs this.)
  3115. * We poll for up to 120 secs, once per 100ms. */
  3116. for (i = 0; i < 1200; i++) {
  3117. scratchpad = readl(c->vaddr + SA5_SCRATCHPAD_OFFSET);
  3118. if (scratchpad == CCISS_FIRMWARE_READY)
  3119. break;
  3120. set_current_state(TASK_INTERRUPTIBLE);
  3121. schedule_timeout(msecs_to_jiffies(100)); /* wait 100ms */
  3122. }
  3123. if (scratchpad != CCISS_FIRMWARE_READY) {
  3124. printk(KERN_WARNING "cciss: Board not ready. Timed out.\n");
  3125. err = -ENODEV;
  3126. goto err_out_free_res;
  3127. }
  3128. /* get the address index number */
  3129. cfg_base_addr = readl(c->vaddr + SA5_CTCFG_OFFSET);
  3130. cfg_base_addr &= (__u32) 0x0000ffff;
  3131. #ifdef CCISS_DEBUG
  3132. printk("cfg base address = %x\n", cfg_base_addr);
  3133. #endif /* CCISS_DEBUG */
  3134. cfg_base_addr_index = find_PCI_BAR_index(pdev, cfg_base_addr);
  3135. #ifdef CCISS_DEBUG
  3136. printk("cfg base address index = %llx\n",
  3137. (unsigned long long)cfg_base_addr_index);
  3138. #endif /* CCISS_DEBUG */
  3139. if (cfg_base_addr_index == -1) {
  3140. printk(KERN_WARNING "cciss: Cannot find cfg_base_addr_index\n");
  3141. err = -ENODEV;
  3142. goto err_out_free_res;
  3143. }
  3144. cfg_offset = readl(c->vaddr + SA5_CTMEM_OFFSET);
  3145. #ifdef CCISS_DEBUG
  3146. printk("cfg offset = %llx\n", (unsigned long long)cfg_offset);
  3147. #endif /* CCISS_DEBUG */
  3148. c->cfgtable = remap_pci_mem(pci_resource_start(pdev,
  3149. cfg_base_addr_index) +
  3150. cfg_offset, sizeof(CfgTable_struct));
  3151. c->board_id = board_id;
  3152. #ifdef CCISS_DEBUG
  3153. print_cfg_table(c->cfgtable);
  3154. #endif /* CCISS_DEBUG */
  3155. /* Some controllers support Zero Memory Raid (ZMR).
  3156. * When configured in ZMR mode the number of supported
  3157. * commands drops to 64. So instead of just setting an
  3158. * arbitrary value we make the driver a little smarter.
  3159. * We read the config table to tell us how many commands
  3160. * are supported on the controller then subtract 4 to
  3161. * leave a little room for ioctl calls.
  3162. */
  3163. c->max_commands = readl(&(c->cfgtable->CmdsOutMax));
  3164. for (i = 0; i < ARRAY_SIZE(products); i++) {
  3165. if (board_id == products[i].board_id) {
  3166. c->product_name = products[i].product_name;
  3167. c->access = *(products[i].access);
  3168. c->nr_cmds = c->max_commands - 4;
  3169. break;
  3170. }
  3171. }
  3172. if ((readb(&c->cfgtable->Signature[0]) != 'C') ||
  3173. (readb(&c->cfgtable->Signature[1]) != 'I') ||
  3174. (readb(&c->cfgtable->Signature[2]) != 'S') ||
  3175. (readb(&c->cfgtable->Signature[3]) != 'S')) {
  3176. printk("Does not appear to be a valid CISS config table\n");
  3177. err = -ENODEV;
  3178. goto err_out_free_res;
  3179. }
  3180. /* We didn't find the controller in our list. We know the
  3181. * signature is valid. If it's an HP device let's try to
  3182. * bind to the device and fire it up. Otherwise we bail.
  3183. */
  3184. if (i == ARRAY_SIZE(products)) {
  3185. if (subsystem_vendor_id == PCI_VENDOR_ID_HP) {
  3186. c->product_name = products[i-1].product_name;
  3187. c->access = *(products[i-1].access);
  3188. c->nr_cmds = c->max_commands - 4;
  3189. printk(KERN_WARNING "cciss: This is an unknown "
  3190. "Smart Array controller.\n"
  3191. "cciss: Please update to the latest driver "
  3192. "available from www.hp.com.\n");
  3193. } else {
  3194. printk(KERN_WARNING "cciss: Sorry, I don't know how"
  3195. " to access the Smart Array controller %08lx\n"
  3196. , (unsigned long)board_id);
  3197. err = -ENODEV;
  3198. goto err_out_free_res;
  3199. }
  3200. }
  3201. #ifdef CONFIG_X86
  3202. {
  3203. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3204. __u32 prefetch;
  3205. prefetch = readl(&(c->cfgtable->SCSI_Prefetch));
  3206. prefetch |= 0x100;
  3207. writel(prefetch, &(c->cfgtable->SCSI_Prefetch));
  3208. }
  3209. #endif
  3210. /* Disabling DMA prefetch and refetch for the P600.
  3211. * An ASIC bug may result in accesses to invalid memory addresses.
  3212. * We've disabled prefetch for some time now. Testing with XEN
  3213. * kernels revealed a bug in the refetch if dom0 resides on a P600.
  3214. */
  3215. if(board_id == 0x3225103C) {
  3216. __u32 dma_prefetch;
  3217. __u32 dma_refetch;
  3218. dma_prefetch = readl(c->vaddr + I2O_DMA1_CFG);
  3219. dma_prefetch |= 0x8000;
  3220. writel(dma_prefetch, c->vaddr + I2O_DMA1_CFG);
  3221. pci_read_config_dword(pdev, PCI_COMMAND_PARITY, &dma_refetch);
  3222. dma_refetch |= 0x1;
  3223. pci_write_config_dword(pdev, PCI_COMMAND_PARITY, dma_refetch);
  3224. }
  3225. #ifdef CCISS_DEBUG
  3226. printk("Trying to put board into Simple mode\n");
  3227. #endif /* CCISS_DEBUG */
  3228. c->max_commands = readl(&(c->cfgtable->CmdsOutMax));
  3229. /* Update the field, and then ring the doorbell */
  3230. writel(CFGTBL_Trans_Simple, &(c->cfgtable->HostWrite.TransportRequest));
  3231. writel(CFGTBL_ChangeReq, c->vaddr + SA5_DOORBELL);
  3232. /* under certain very rare conditions, this can take awhile.
  3233. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3234. * as we enter this code.) */
  3235. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3236. if (!(readl(c->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
  3237. break;
  3238. /* delay and try again */
  3239. set_current_state(TASK_INTERRUPTIBLE);
  3240. schedule_timeout(msecs_to_jiffies(1));
  3241. }
  3242. #ifdef CCISS_DEBUG
  3243. printk(KERN_DEBUG "I counter got to %d %x\n", i,
  3244. readl(c->vaddr + SA5_DOORBELL));
  3245. #endif /* CCISS_DEBUG */
  3246. #ifdef CCISS_DEBUG
  3247. print_cfg_table(c->cfgtable);
  3248. #endif /* CCISS_DEBUG */
  3249. if (!(readl(&(c->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
  3250. printk(KERN_WARNING "cciss: unable to get board into"
  3251. " simple mode\n");
  3252. err = -ENODEV;
  3253. goto err_out_free_res;
  3254. }
  3255. return 0;
  3256. err_out_free_res:
  3257. /*
  3258. * Deliberately omit pci_disable_device(): it does something nasty to
  3259. * Smart Array controllers that pci_enable_device does not undo
  3260. */
  3261. pci_release_regions(pdev);
  3262. return err;
  3263. }
  3264. /* Function to find the first free pointer into our hba[] array
  3265. * Returns -1 if no free entries are left.
  3266. */
  3267. static int alloc_cciss_hba(void)
  3268. {
  3269. int i;
  3270. for (i = 0; i < MAX_CTLR; i++) {
  3271. if (!hba[i]) {
  3272. ctlr_info_t *p;
  3273. p = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
  3274. if (!p)
  3275. goto Enomem;
  3276. hba[i] = p;
  3277. return i;
  3278. }
  3279. }
  3280. printk(KERN_WARNING "cciss: This driver supports a maximum"
  3281. " of %d controllers.\n", MAX_CTLR);
  3282. return -1;
  3283. Enomem:
  3284. printk(KERN_ERR "cciss: out of memory.\n");
  3285. return -1;
  3286. }
  3287. static void free_hba(int i)
  3288. {
  3289. ctlr_info_t *p = hba[i];
  3290. int n;
  3291. hba[i] = NULL;
  3292. for (n = 0; n < CISS_MAX_LUN; n++)
  3293. put_disk(p->gendisk[n]);
  3294. kfree(p);
  3295. }
  3296. /* Send a message CDB to the firmware. */
  3297. static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type)
  3298. {
  3299. typedef struct {
  3300. CommandListHeader_struct CommandHeader;
  3301. RequestBlock_struct Request;
  3302. ErrDescriptor_struct ErrorDescriptor;
  3303. } Command;
  3304. static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
  3305. Command *cmd;
  3306. dma_addr_t paddr64;
  3307. uint32_t paddr32, tag;
  3308. void __iomem *vaddr;
  3309. int i, err;
  3310. vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
  3311. if (vaddr == NULL)
  3312. return -ENOMEM;
  3313. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  3314. CCISS commands, so they must be allocated from the lower 4GiB of
  3315. memory. */
  3316. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3317. if (err) {
  3318. iounmap(vaddr);
  3319. return -ENOMEM;
  3320. }
  3321. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  3322. if (cmd == NULL) {
  3323. iounmap(vaddr);
  3324. return -ENOMEM;
  3325. }
  3326. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  3327. although there's no guarantee, we assume that the address is at
  3328. least 4-byte aligned (most likely, it's page-aligned). */
  3329. paddr32 = paddr64;
  3330. cmd->CommandHeader.ReplyQueue = 0;
  3331. cmd->CommandHeader.SGList = 0;
  3332. cmd->CommandHeader.SGTotal = 0;
  3333. cmd->CommandHeader.Tag.lower = paddr32;
  3334. cmd->CommandHeader.Tag.upper = 0;
  3335. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  3336. cmd->Request.CDBLen = 16;
  3337. cmd->Request.Type.Type = TYPE_MSG;
  3338. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  3339. cmd->Request.Type.Direction = XFER_NONE;
  3340. cmd->Request.Timeout = 0; /* Don't time out */
  3341. cmd->Request.CDB[0] = opcode;
  3342. cmd->Request.CDB[1] = type;
  3343. memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
  3344. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
  3345. cmd->ErrorDescriptor.Addr.upper = 0;
  3346. cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
  3347. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  3348. for (i = 0; i < 10; i++) {
  3349. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  3350. if ((tag & ~3) == paddr32)
  3351. break;
  3352. schedule_timeout_uninterruptible(HZ);
  3353. }
  3354. iounmap(vaddr);
  3355. /* we leak the DMA buffer here ... no choice since the controller could
  3356. still complete the command. */
  3357. if (i == 10) {
  3358. printk(KERN_ERR "cciss: controller message %02x:%02x timed out\n",
  3359. opcode, type);
  3360. return -ETIMEDOUT;
  3361. }
  3362. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  3363. if (tag & 2) {
  3364. printk(KERN_ERR "cciss: controller message %02x:%02x failed\n",
  3365. opcode, type);
  3366. return -EIO;
  3367. }
  3368. printk(KERN_INFO "cciss: controller message %02x:%02x succeeded\n",
  3369. opcode, type);
  3370. return 0;
  3371. }
  3372. #define cciss_soft_reset_controller(p) cciss_message(p, 1, 0)
  3373. #define cciss_noop(p) cciss_message(p, 3, 0)
  3374. static __devinit int cciss_reset_msi(struct pci_dev *pdev)
  3375. {
  3376. /* the #defines are stolen from drivers/pci/msi.h. */
  3377. #define msi_control_reg(base) (base + PCI_MSI_FLAGS)
  3378. #define PCI_MSIX_FLAGS_ENABLE (1 << 15)
  3379. int pos;
  3380. u16 control = 0;
  3381. pos = pci_find_capability(pdev, PCI_CAP_ID_MSI);
  3382. if (pos) {
  3383. pci_read_config_word(pdev, msi_control_reg(pos), &control);
  3384. if (control & PCI_MSI_FLAGS_ENABLE) {
  3385. printk(KERN_INFO "cciss: resetting MSI\n");
  3386. pci_write_config_word(pdev, msi_control_reg(pos), control & ~PCI_MSI_FLAGS_ENABLE);
  3387. }
  3388. }
  3389. pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
  3390. if (pos) {
  3391. pci_read_config_word(pdev, msi_control_reg(pos), &control);
  3392. if (control & PCI_MSIX_FLAGS_ENABLE) {
  3393. printk(KERN_INFO "cciss: resetting MSI-X\n");
  3394. pci_write_config_word(pdev, msi_control_reg(pos), control & ~PCI_MSIX_FLAGS_ENABLE);
  3395. }
  3396. }
  3397. return 0;
  3398. }
  3399. /* This does a hard reset of the controller using PCI power management
  3400. * states. */
  3401. static __devinit int cciss_hard_reset_controller(struct pci_dev *pdev)
  3402. {
  3403. u16 pmcsr, saved_config_space[32];
  3404. int i, pos;
  3405. printk(KERN_INFO "cciss: using PCI PM to reset controller\n");
  3406. /* This is very nearly the same thing as
  3407. pci_save_state(pci_dev);
  3408. pci_set_power_state(pci_dev, PCI_D3hot);
  3409. pci_set_power_state(pci_dev, PCI_D0);
  3410. pci_restore_state(pci_dev);
  3411. but we can't use these nice canned kernel routines on
  3412. kexec, because they also check the MSI/MSI-X state in PCI
  3413. configuration space and do the wrong thing when it is
  3414. set/cleared. Also, the pci_save/restore_state functions
  3415. violate the ordering requirements for restoring the
  3416. configuration space from the CCISS document (see the
  3417. comment below). So we roll our own .... */
  3418. for (i = 0; i < 32; i++)
  3419. pci_read_config_word(pdev, 2*i, &saved_config_space[i]);
  3420. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  3421. if (pos == 0) {
  3422. printk(KERN_ERR "cciss_reset_controller: PCI PM not supported\n");
  3423. return -ENODEV;
  3424. }
  3425. /* Quoting from the Open CISS Specification: "The Power
  3426. * Management Control/Status Register (CSR) controls the power
  3427. * state of the device. The normal operating state is D0,
  3428. * CSR=00h. The software off state is D3, CSR=03h. To reset
  3429. * the controller, place the interface device in D3 then to
  3430. * D0, this causes a secondary PCI reset which will reset the
  3431. * controller." */
  3432. /* enter the D3hot power management state */
  3433. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  3434. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3435. pmcsr |= PCI_D3hot;
  3436. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3437. schedule_timeout_uninterruptible(HZ >> 1);
  3438. /* enter the D0 power management state */
  3439. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3440. pmcsr |= PCI_D0;
  3441. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3442. schedule_timeout_uninterruptible(HZ >> 1);
  3443. /* Restore the PCI configuration space. The Open CISS
  3444. * Specification says, "Restore the PCI Configuration
  3445. * Registers, offsets 00h through 60h. It is important to
  3446. * restore the command register, 16-bits at offset 04h,
  3447. * last. Do not restore the configuration status register,
  3448. * 16-bits at offset 06h." Note that the offset is 2*i. */
  3449. for (i = 0; i < 32; i++) {
  3450. if (i == 2 || i == 3)
  3451. continue;
  3452. pci_write_config_word(pdev, 2*i, saved_config_space[i]);
  3453. }
  3454. wmb();
  3455. pci_write_config_word(pdev, 4, saved_config_space[2]);
  3456. return 0;
  3457. }
  3458. /*
  3459. * This is it. Find all the controllers and register them. I really hate
  3460. * stealing all these major device numbers.
  3461. * returns the number of block devices registered.
  3462. */
  3463. static int __devinit cciss_init_one(struct pci_dev *pdev,
  3464. const struct pci_device_id *ent)
  3465. {
  3466. int i;
  3467. int j = 0;
  3468. int rc;
  3469. int dac, return_code;
  3470. InquiryData_struct *inq_buff;
  3471. if (reset_devices) {
  3472. /* Reset the controller with a PCI power-cycle */
  3473. if (cciss_hard_reset_controller(pdev) || cciss_reset_msi(pdev))
  3474. return -ENODEV;
  3475. /* Now try to get the controller to respond to a no-op. Some
  3476. devices (notably the HP Smart Array 5i Controller) need
  3477. up to 30 seconds to respond. */
  3478. for (i=0; i<30; i++) {
  3479. if (cciss_noop(pdev) == 0)
  3480. break;
  3481. schedule_timeout_uninterruptible(HZ);
  3482. }
  3483. if (i == 30) {
  3484. printk(KERN_ERR "cciss: controller seems dead\n");
  3485. return -EBUSY;
  3486. }
  3487. }
  3488. i = alloc_cciss_hba();
  3489. if (i < 0)
  3490. return -1;
  3491. hba[i]->busy_initializing = 1;
  3492. INIT_HLIST_HEAD(&hba[i]->cmpQ);
  3493. INIT_HLIST_HEAD(&hba[i]->reqQ);
  3494. if (cciss_pci_init(hba[i], pdev) != 0)
  3495. goto clean0;
  3496. sprintf(hba[i]->devname, "cciss%d", i);
  3497. hba[i]->ctlr = i;
  3498. hba[i]->pdev = pdev;
  3499. if (cciss_create_hba_sysfs_entry(hba[i]))
  3500. goto clean0;
  3501. /* configure PCI DMA stuff */
  3502. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
  3503. dac = 1;
  3504. else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
  3505. dac = 0;
  3506. else {
  3507. printk(KERN_ERR "cciss: no suitable DMA available\n");
  3508. goto clean1;
  3509. }
  3510. /*
  3511. * register with the major number, or get a dynamic major number
  3512. * by passing 0 as argument. This is done for greater than
  3513. * 8 controller support.
  3514. */
  3515. if (i < MAX_CTLR_ORIG)
  3516. hba[i]->major = COMPAQ_CISS_MAJOR + i;
  3517. rc = register_blkdev(hba[i]->major, hba[i]->devname);
  3518. if (rc == -EBUSY || rc == -EINVAL) {
  3519. printk(KERN_ERR
  3520. "cciss: Unable to get major number %d for %s "
  3521. "on hba %d\n", hba[i]->major, hba[i]->devname, i);
  3522. goto clean1;
  3523. } else {
  3524. if (i >= MAX_CTLR_ORIG)
  3525. hba[i]->major = rc;
  3526. }
  3527. /* make sure the board interrupts are off */
  3528. hba[i]->access.set_intr_mask(hba[i], CCISS_INTR_OFF);
  3529. if (request_irq(hba[i]->intr[SIMPLE_MODE_INT], do_cciss_intr,
  3530. IRQF_DISABLED | IRQF_SHARED, hba[i]->devname, hba[i])) {
  3531. printk(KERN_ERR "cciss: Unable to get irq %d for %s\n",
  3532. hba[i]->intr[SIMPLE_MODE_INT], hba[i]->devname);
  3533. goto clean2;
  3534. }
  3535. printk(KERN_INFO "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
  3536. hba[i]->devname, pdev->device, pci_name(pdev),
  3537. hba[i]->intr[SIMPLE_MODE_INT], dac ? "" : " not");
  3538. hba[i]->cmd_pool_bits =
  3539. kmalloc(DIV_ROUND_UP(hba[i]->nr_cmds, BITS_PER_LONG)
  3540. * sizeof(unsigned long), GFP_KERNEL);
  3541. hba[i]->cmd_pool = (CommandList_struct *)
  3542. pci_alloc_consistent(hba[i]->pdev,
  3543. hba[i]->nr_cmds * sizeof(CommandList_struct),
  3544. &(hba[i]->cmd_pool_dhandle));
  3545. hba[i]->errinfo_pool = (ErrorInfo_struct *)
  3546. pci_alloc_consistent(hba[i]->pdev,
  3547. hba[i]->nr_cmds * sizeof(ErrorInfo_struct),
  3548. &(hba[i]->errinfo_pool_dhandle));
  3549. if ((hba[i]->cmd_pool_bits == NULL)
  3550. || (hba[i]->cmd_pool == NULL)
  3551. || (hba[i]->errinfo_pool == NULL)) {
  3552. printk(KERN_ERR "cciss: out of memory");
  3553. goto clean4;
  3554. }
  3555. spin_lock_init(&hba[i]->lock);
  3556. /* Initialize the pdev driver private data.
  3557. have it point to hba[i]. */
  3558. pci_set_drvdata(pdev, hba[i]);
  3559. /* command and error info recs zeroed out before
  3560. they are used */
  3561. memset(hba[i]->cmd_pool_bits, 0,
  3562. DIV_ROUND_UP(hba[i]->nr_cmds, BITS_PER_LONG)
  3563. * sizeof(unsigned long));
  3564. hba[i]->num_luns = 0;
  3565. hba[i]->highest_lun = -1;
  3566. for (j = 0; j < CISS_MAX_LUN; j++) {
  3567. hba[i]->drv[j].raid_level = -1;
  3568. hba[i]->drv[j].queue = NULL;
  3569. hba[i]->gendisk[j] = NULL;
  3570. }
  3571. cciss_scsi_setup(i);
  3572. /* Turn the interrupts on so we can service requests */
  3573. hba[i]->access.set_intr_mask(hba[i], CCISS_INTR_ON);
  3574. /* Get the firmware version */
  3575. inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  3576. if (inq_buff == NULL) {
  3577. printk(KERN_ERR "cciss: out of memory\n");
  3578. goto clean4;
  3579. }
  3580. return_code = sendcmd_withirq(CISS_INQUIRY, i, inq_buff,
  3581. sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
  3582. if (return_code == IO_OK) {
  3583. hba[i]->firm_ver[0] = inq_buff->data_byte[32];
  3584. hba[i]->firm_ver[1] = inq_buff->data_byte[33];
  3585. hba[i]->firm_ver[2] = inq_buff->data_byte[34];
  3586. hba[i]->firm_ver[3] = inq_buff->data_byte[35];
  3587. } else { /* send command failed */
  3588. printk(KERN_WARNING "cciss: unable to determine firmware"
  3589. " version of controller\n");
  3590. }
  3591. kfree(inq_buff);
  3592. cciss_procinit(i);
  3593. hba[i]->cciss_max_sectors = 2048;
  3594. hba[i]->busy_initializing = 0;
  3595. rebuild_lun_table(hba[i], 1);
  3596. hba[i]->cciss_scan_thread = kthread_run(scan_thread, hba[i],
  3597. "cciss_scan%02d", i);
  3598. if (IS_ERR(hba[i]->cciss_scan_thread))
  3599. return PTR_ERR(hba[i]->cciss_scan_thread);
  3600. return 1;
  3601. clean4:
  3602. kfree(hba[i]->cmd_pool_bits);
  3603. if (hba[i]->cmd_pool)
  3604. pci_free_consistent(hba[i]->pdev,
  3605. hba[i]->nr_cmds * sizeof(CommandList_struct),
  3606. hba[i]->cmd_pool, hba[i]->cmd_pool_dhandle);
  3607. if (hba[i]->errinfo_pool)
  3608. pci_free_consistent(hba[i]->pdev,
  3609. hba[i]->nr_cmds * sizeof(ErrorInfo_struct),
  3610. hba[i]->errinfo_pool,
  3611. hba[i]->errinfo_pool_dhandle);
  3612. free_irq(hba[i]->intr[SIMPLE_MODE_INT], hba[i]);
  3613. clean2:
  3614. unregister_blkdev(hba[i]->major, hba[i]->devname);
  3615. clean1:
  3616. cciss_destroy_hba_sysfs_entry(hba[i]);
  3617. clean0:
  3618. hba[i]->busy_initializing = 0;
  3619. /* cleanup any queues that may have been initialized */
  3620. for (j=0; j <= hba[i]->highest_lun; j++){
  3621. drive_info_struct *drv = &(hba[i]->drv[j]);
  3622. if (drv->queue)
  3623. blk_cleanup_queue(drv->queue);
  3624. }
  3625. /*
  3626. * Deliberately omit pci_disable_device(): it does something nasty to
  3627. * Smart Array controllers that pci_enable_device does not undo
  3628. */
  3629. pci_release_regions(pdev);
  3630. pci_set_drvdata(pdev, NULL);
  3631. free_hba(i);
  3632. return -1;
  3633. }
  3634. static void cciss_shutdown(struct pci_dev *pdev)
  3635. {
  3636. ctlr_info_t *tmp_ptr;
  3637. int i;
  3638. char flush_buf[4];
  3639. int return_code;
  3640. tmp_ptr = pci_get_drvdata(pdev);
  3641. if (tmp_ptr == NULL)
  3642. return;
  3643. i = tmp_ptr->ctlr;
  3644. if (hba[i] == NULL)
  3645. return;
  3646. /* Turn board interrupts off and send the flush cache command */
  3647. /* sendcmd will turn off interrupt, and send the flush...
  3648. * To write all data in the battery backed cache to disks */
  3649. memset(flush_buf, 0, 4);
  3650. return_code = sendcmd(CCISS_CACHE_FLUSH, i, flush_buf, 4, 0,
  3651. CTLR_LUNID, TYPE_CMD);
  3652. if (return_code == IO_OK) {
  3653. printk(KERN_INFO "Completed flushing cache on controller %d\n", i);
  3654. } else {
  3655. printk(KERN_WARNING "Error flushing cache on controller %d\n", i);
  3656. }
  3657. free_irq(hba[i]->intr[2], hba[i]);
  3658. }
  3659. static void __devexit cciss_remove_one(struct pci_dev *pdev)
  3660. {
  3661. ctlr_info_t *tmp_ptr;
  3662. int i, j;
  3663. if (pci_get_drvdata(pdev) == NULL) {
  3664. printk(KERN_ERR "cciss: Unable to remove device \n");
  3665. return;
  3666. }
  3667. tmp_ptr = pci_get_drvdata(pdev);
  3668. i = tmp_ptr->ctlr;
  3669. if (hba[i] == NULL) {
  3670. printk(KERN_ERR "cciss: device appears to "
  3671. "already be removed \n");
  3672. return;
  3673. }
  3674. kthread_stop(hba[i]->cciss_scan_thread);
  3675. remove_proc_entry(hba[i]->devname, proc_cciss);
  3676. unregister_blkdev(hba[i]->major, hba[i]->devname);
  3677. /* remove it from the disk list */
  3678. for (j = 0; j < CISS_MAX_LUN; j++) {
  3679. struct gendisk *disk = hba[i]->gendisk[j];
  3680. if (disk) {
  3681. struct request_queue *q = disk->queue;
  3682. if (disk->flags & GENHD_FL_UP)
  3683. del_gendisk(disk);
  3684. if (q)
  3685. blk_cleanup_queue(q);
  3686. }
  3687. if (hba[i]->drv[j].raid_level != -1)
  3688. cciss_destroy_ld_sysfs_entry(&hba[i]->drv[j]);
  3689. }
  3690. #ifdef CONFIG_CISS_SCSI_TAPE
  3691. cciss_unregister_scsi(i); /* unhook from SCSI subsystem */
  3692. #endif
  3693. cciss_shutdown(pdev);
  3694. #ifdef CONFIG_PCI_MSI
  3695. if (hba[i]->msix_vector)
  3696. pci_disable_msix(hba[i]->pdev);
  3697. else if (hba[i]->msi_vector)
  3698. pci_disable_msi(hba[i]->pdev);
  3699. #endif /* CONFIG_PCI_MSI */
  3700. iounmap(hba[i]->vaddr);
  3701. pci_free_consistent(hba[i]->pdev, hba[i]->nr_cmds * sizeof(CommandList_struct),
  3702. hba[i]->cmd_pool, hba[i]->cmd_pool_dhandle);
  3703. pci_free_consistent(hba[i]->pdev, hba[i]->nr_cmds * sizeof(ErrorInfo_struct),
  3704. hba[i]->errinfo_pool, hba[i]->errinfo_pool_dhandle);
  3705. kfree(hba[i]->cmd_pool_bits);
  3706. /*
  3707. * Deliberately omit pci_disable_device(): it does something nasty to
  3708. * Smart Array controllers that pci_enable_device does not undo
  3709. */
  3710. pci_release_regions(pdev);
  3711. pci_set_drvdata(pdev, NULL);
  3712. cciss_destroy_hba_sysfs_entry(hba[i]);
  3713. free_hba(i);
  3714. }
  3715. static struct pci_driver cciss_pci_driver = {
  3716. .name = "cciss",
  3717. .probe = cciss_init_one,
  3718. .remove = __devexit_p(cciss_remove_one),
  3719. .id_table = cciss_pci_device_id, /* id_table */
  3720. .shutdown = cciss_shutdown,
  3721. };
  3722. /*
  3723. * This is it. Register the PCI driver information for the cards we control
  3724. * the OS will call our registered routines when it finds one of our cards.
  3725. */
  3726. static int __init cciss_init(void)
  3727. {
  3728. int err;
  3729. /*
  3730. * The hardware requires that commands are aligned on a 64-bit
  3731. * boundary. Given that we use pci_alloc_consistent() to allocate an
  3732. * array of them, the size must be a multiple of 8 bytes.
  3733. */
  3734. BUILD_BUG_ON(sizeof(CommandList_struct) % 8);
  3735. printk(KERN_INFO DRIVER_NAME "\n");
  3736. err = bus_register(&cciss_bus_type);
  3737. if (err)
  3738. return err;
  3739. /* Register for our PCI devices */
  3740. err = pci_register_driver(&cciss_pci_driver);
  3741. if (err)
  3742. goto err_bus_register;
  3743. return 0;
  3744. err_bus_register:
  3745. bus_unregister(&cciss_bus_type);
  3746. return err;
  3747. }
  3748. static void __exit cciss_cleanup(void)
  3749. {
  3750. int i;
  3751. pci_unregister_driver(&cciss_pci_driver);
  3752. /* double check that all controller entrys have been removed */
  3753. for (i = 0; i < MAX_CTLR; i++) {
  3754. if (hba[i] != NULL) {
  3755. printk(KERN_WARNING "cciss: had to remove"
  3756. " controller %d\n", i);
  3757. cciss_remove_one(hba[i]->pdev);
  3758. }
  3759. }
  3760. remove_proc_entry("driver/cciss", NULL);
  3761. bus_unregister(&cciss_bus_type);
  3762. }
  3763. static void fail_all_cmds(unsigned long ctlr)
  3764. {
  3765. /* If we get here, the board is apparently dead. */
  3766. ctlr_info_t *h = hba[ctlr];
  3767. CommandList_struct *c;
  3768. unsigned long flags;
  3769. printk(KERN_WARNING "cciss%d: controller not responding.\n", h->ctlr);
  3770. h->alive = 0; /* the controller apparently died... */
  3771. spin_lock_irqsave(CCISS_LOCK(ctlr), flags);
  3772. pci_disable_device(h->pdev); /* Make sure it is really dead. */
  3773. /* move everything off the request queue onto the completed queue */
  3774. while (!hlist_empty(&h->reqQ)) {
  3775. c = hlist_entry(h->reqQ.first, CommandList_struct, list);
  3776. removeQ(c);
  3777. h->Qdepth--;
  3778. addQ(&h->cmpQ, c);
  3779. }
  3780. /* Now, fail everything on the completed queue with a HW error */
  3781. while (!hlist_empty(&h->cmpQ)) {
  3782. c = hlist_entry(h->cmpQ.first, CommandList_struct, list);
  3783. removeQ(c);
  3784. if (c->cmd_type != CMD_MSG_STALE)
  3785. c->err_info->CommandStatus = CMD_HARDWARE_ERR;
  3786. if (c->cmd_type == CMD_RWREQ) {
  3787. complete_command(h, c, 0);
  3788. } else if (c->cmd_type == CMD_IOCTL_PEND)
  3789. complete(c->waiting);
  3790. #ifdef CONFIG_CISS_SCSI_TAPE
  3791. else if (c->cmd_type == CMD_SCSI)
  3792. complete_scsi_command(c, 0, 0);
  3793. #endif
  3794. }
  3795. spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
  3796. return;
  3797. }
  3798. module_init(cciss_init);
  3799. module_exit(cciss_cleanup);