spear.h 3.1 KB

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  1. /*
  2. * arch/arm/mach-spear3xx/include/mach/spear.h
  3. *
  4. * SPEAr3xx Machine family specific definition
  5. *
  6. * Copyright (C) 2009 ST Microelectronics
  7. * Viresh Kumar<viresh.kumar@st.com>
  8. *
  9. * This file is licensed under the terms of the GNU General Public
  10. * License version 2. This program is licensed "as is" without any
  11. * warranty of any kind, whether express or implied.
  12. */
  13. #ifndef __MACH_SPEAR3XX_H
  14. #define __MACH_SPEAR3XX_H
  15. #include <asm/memory.h>
  16. #include <mach/spear300.h>
  17. #include <mach/spear310.h>
  18. #include <mach/spear320.h>
  19. #define SPEAR3XX_ML_SDRAM_BASE UL(0x00000000)
  20. #define SPEAR3XX_ICM9_BASE UL(0xC0000000)
  21. /* ICM1 - Low speed connection */
  22. #define SPEAR3XX_ICM1_2_BASE UL(0xD0000000)
  23. #define VA_SPEAR3XX_ICM1_2_BASE UL(0xFD000000)
  24. #define SPEAR3XX_ICM1_UART_BASE UL(0xD0000000)
  25. #define VA_SPEAR3XX_ICM1_UART_BASE (VA_SPEAR3XX_ICM1_2_BASE | SPEAR3XX_ICM1_UART_BASE)
  26. #define SPEAR3XX_ICM1_ADC_BASE UL(0xD0080000)
  27. #define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000)
  28. #define SPEAR3XX_ICM1_I2C_BASE UL(0xD0180000)
  29. #define SPEAR3XX_ICM1_JPEG_BASE UL(0xD0800000)
  30. #define SPEAR3XX_ICM1_IRDA_BASE UL(0xD1000000)
  31. #define SPEAR3XX_ICM1_SRAM_BASE UL(0xD2800000)
  32. /* ICM2 - Application Subsystem */
  33. #define SPEAR3XX_ICM2_HWACCEL0_BASE UL(0xD8800000)
  34. #define SPEAR3XX_ICM2_HWACCEL1_BASE UL(0xD9000000)
  35. /* ICM4 - High Speed Connection */
  36. #define SPEAR3XX_ICM4_BASE UL(0xE0000000)
  37. #define SPEAR3XX_ICM4_MII_BASE UL(0xE0800000)
  38. #define SPEAR3XX_ICM4_USBD_FIFO_BASE UL(0xE1000000)
  39. #define SPEAR3XX_ICM4_USBD_CSR_BASE UL(0xE1100000)
  40. #define SPEAR3XX_ICM4_USBD_PLDT_BASE UL(0xE1200000)
  41. #define SPEAR3XX_ICM4_USB_EHCI0_1_BASE UL(0xE1800000)
  42. #define SPEAR3XX_ICM4_USB_OHCI0_BASE UL(0xE1900000)
  43. #define SPEAR3XX_ICM4_USB_OHCI1_BASE UL(0xE2100000)
  44. #define SPEAR3XX_ICM4_USB_ARB_BASE UL(0xE2800000)
  45. /* ML1 - Multi Layer CPU Subsystem */
  46. #define SPEAR3XX_ICM3_ML1_2_BASE UL(0xF0000000)
  47. #define SPEAR3XX_ML1_TMR_BASE UL(0xF0000000)
  48. #define SPEAR3XX_ML1_VIC_BASE UL(0xF1100000)
  49. /* ICM3 - Basic Subsystem */
  50. #define SPEAR3XX_ICM3_SMEM_BASE UL(0xF8000000)
  51. #define SPEAR3XX_ICM3_SMI_CTRL_BASE UL(0xFC000000)
  52. #define VA_SPEAR3XX_ICM3_SMI_CTRL_BASE UL(0xFC000000)
  53. #define SPEAR3XX_ICM3_DMA_BASE UL(0xFC400000)
  54. #define SPEAR3XX_ICM3_SDRAM_CTRL_BASE UL(0xFC600000)
  55. #define SPEAR3XX_ICM3_TMR0_BASE UL(0xFC800000)
  56. #define SPEAR3XX_ICM3_WDT_BASE UL(0xFC880000)
  57. #define SPEAR3XX_ICM3_RTC_BASE UL(0xFC900000)
  58. #define SPEAR3XX_ICM3_GPIO_BASE UL(0xFC980000)
  59. #define SPEAR3XX_ICM3_SYS_CTRL_BASE UL(0xFCA00000)
  60. #define VA_SPEAR3XX_ICM3_SYS_CTRL_BASE (VA_SPEAR3XX_ICM3_SMI_CTRL_BASE | SPEAR3XX_ICM3_SYS_CTRL_BASE)
  61. #define SPEAR3XX_ICM3_MISC_REG_BASE UL(0xFCA80000)
  62. #define VA_SPEAR3XX_ICM3_MISC_REG_BASE (VA_SPEAR3XX_ICM3_SMI_CTRL_BASE | SPEAR3XX_ICM3_MISC_REG_BASE)
  63. #define SPEAR3XX_ICM3_TMR1_BASE UL(0xFCB00000)
  64. /* Debug uart for linux, will be used for debug and uncompress messages */
  65. #define SPEAR_DBG_UART_BASE SPEAR3XX_ICM1_UART_BASE
  66. #define VA_SPEAR_DBG_UART_BASE VA_SPEAR3XX_ICM1_UART_BASE
  67. /* Sysctl base for spear platform */
  68. #define SPEAR_SYS_CTRL_BASE SPEAR3XX_ICM3_SYS_CTRL_BASE
  69. #define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR3XX_ICM3_SYS_CTRL_BASE
  70. #endif /* __MACH_SPEAR3XX_H */