spear3xx.dtsi 2.8 KB

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  1. /*
  2. * DTS file for all SPEAr3xx SoCs
  3. *
  4. * Copyright 2012 Viresh Kumar <viresh.kumar@st.com>
  5. *
  6. * The code contained herein is licensed under the GNU General Public
  7. * License. You may obtain a copy of the GNU General Public License
  8. * Version 2 or later at the following locations:
  9. *
  10. * http://www.opensource.org/licenses/gpl-license.html
  11. * http://www.gnu.org/copyleft/gpl.html
  12. */
  13. /include/ "skeleton.dtsi"
  14. / {
  15. interrupt-parent = <&vic>;
  16. cpus {
  17. cpu@0 {
  18. compatible = "arm,arm926ejs";
  19. };
  20. };
  21. memory {
  22. device_type = "memory";
  23. reg = <0 0x40000000>;
  24. };
  25. ahb {
  26. #address-cells = <1>;
  27. #size-cells = <1>;
  28. compatible = "simple-bus";
  29. ranges = <0xd0000000 0xd0000000 0x30000000>;
  30. vic: interrupt-controller@f1100000 {
  31. compatible = "arm,pl190-vic";
  32. interrupt-controller;
  33. reg = <0xf1100000 0x1000>;
  34. #interrupt-cells = <1>;
  35. };
  36. gmac: eth@e0800000 {
  37. compatible = "st,spear600-gmac";
  38. reg = <0xe0800000 0x8000>;
  39. interrupts = <23 22>;
  40. interrupt-names = "macirq", "eth_wake_irq";
  41. status = "disabled";
  42. };
  43. smi: flash@fc000000 {
  44. compatible = "st,spear600-smi";
  45. #address-cells = <1>;
  46. #size-cells = <1>;
  47. reg = <0xfc000000 0x1000>;
  48. interrupts = <9>;
  49. status = "disabled";
  50. };
  51. spi0: spi@d0100000 {
  52. compatible = "arm,pl022", "arm,primecell";
  53. reg = <0xd0100000 0x1000>;
  54. interrupts = <20>;
  55. status = "disabled";
  56. };
  57. ehci@e1800000 {
  58. compatible = "st,spear600-ehci", "usb-ehci";
  59. reg = <0xe1800000 0x1000>;
  60. interrupts = <26>;
  61. status = "disabled";
  62. };
  63. ohci@e1900000 {
  64. compatible = "st,spear600-ohci", "usb-ohci";
  65. reg = <0xe1900000 0x1000>;
  66. interrupts = <25>;
  67. status = "disabled";
  68. };
  69. ohci@e2100000 {
  70. compatible = "st,spear600-ohci", "usb-ohci";
  71. reg = <0xe2100000 0x1000>;
  72. interrupts = <27>;
  73. status = "disabled";
  74. };
  75. apb {
  76. #address-cells = <1>;
  77. #size-cells = <1>;
  78. compatible = "simple-bus";
  79. ranges = <0xd0000000 0xd0000000 0x30000000>;
  80. gpio0: gpio@fc980000 {
  81. compatible = "arm,pl061", "arm,primecell";
  82. reg = <0xfc980000 0x1000>;
  83. interrupts = <11>;
  84. gpio-controller;
  85. #gpio-cells = <2>;
  86. interrupt-controller;
  87. #interrupt-cells = <2>;
  88. status = "disabled";
  89. };
  90. i2c0: i2c@d0180000 {
  91. #address-cells = <1>;
  92. #size-cells = <0>;
  93. compatible = "snps,designware-i2c";
  94. reg = <0xd0180000 0x1000>;
  95. interrupts = <21>;
  96. status = "disabled";
  97. };
  98. rtc@fc900000 {
  99. compatible = "st,spear-rtc";
  100. reg = <0xfc900000 0x1000>;
  101. interrupts = <10>;
  102. status = "disabled";
  103. };
  104. serial@d0000000 {
  105. compatible = "arm,pl011", "arm,primecell";
  106. reg = <0xd0000000 0x1000>;
  107. interrupts = <19>;
  108. status = "disabled";
  109. };
  110. wdt@fc880000 {
  111. compatible = "arm,sp805", "arm,primecell";
  112. reg = <0xfc880000 0x1000>;
  113. interrupts = <12>;
  114. status = "disabled";
  115. };
  116. };
  117. };
  118. };