ide.h 41 KB

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  1. #ifndef _IDE_H
  2. #define _IDE_H
  3. /*
  4. * linux/include/linux/ide.h
  5. *
  6. * Copyright (C) 1994-2002 Linus Torvalds & authors
  7. */
  8. #include <linux/init.h>
  9. #include <linux/ioport.h>
  10. #include <linux/hdreg.h>
  11. #include <linux/blkdev.h>
  12. #include <linux/proc_fs.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/bitops.h>
  15. #include <linux/bio.h>
  16. #include <linux/device.h>
  17. #include <linux/pci.h>
  18. #include <linux/completion.h>
  19. #ifdef CONFIG_BLK_DEV_IDEACPI
  20. #include <acpi/acpi.h>
  21. #endif
  22. #include <asm/byteorder.h>
  23. #include <asm/system.h>
  24. #include <asm/io.h>
  25. #include <asm/mutex.h>
  26. #if defined(CONFIG_CRIS) || defined(CONFIG_FRV)
  27. # define SUPPORT_VLB_SYNC 0
  28. #else
  29. # define SUPPORT_VLB_SYNC 1
  30. #endif
  31. /*
  32. * Used to indicate "no IRQ", should be a value that cannot be an IRQ
  33. * number.
  34. */
  35. #define IDE_NO_IRQ (-1)
  36. typedef unsigned char byte; /* used everywhere */
  37. /*
  38. * Probably not wise to fiddle with these
  39. */
  40. #define ERROR_MAX 8 /* Max read/write errors per sector */
  41. #define ERROR_RESET 3 /* Reset controller every 4th retry */
  42. #define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
  43. /*
  44. * state flags
  45. */
  46. #define DMA_PIO_RETRY 1 /* retrying in PIO */
  47. #define HWIF(drive) ((ide_hwif_t *)((drive)->hwif))
  48. #define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup))
  49. /*
  50. * Definitions for accessing IDE controller registers
  51. */
  52. #define IDE_NR_PORTS (10)
  53. struct ide_io_ports {
  54. unsigned long data_addr;
  55. union {
  56. unsigned long error_addr; /* read: error */
  57. unsigned long feature_addr; /* write: feature */
  58. };
  59. unsigned long nsect_addr;
  60. unsigned long lbal_addr;
  61. unsigned long lbam_addr;
  62. unsigned long lbah_addr;
  63. unsigned long device_addr;
  64. union {
  65. unsigned long status_addr; /*  read: status  */
  66. unsigned long command_addr; /* write: command */
  67. };
  68. unsigned long ctl_addr;
  69. unsigned long irq_addr;
  70. };
  71. #define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
  72. #define BAD_R_STAT (BUSY_STAT | ERR_STAT)
  73. #define BAD_W_STAT (BAD_R_STAT | WRERR_STAT)
  74. #define BAD_STAT (BAD_R_STAT | DRQ_STAT)
  75. #define DRIVE_READY (READY_STAT | SEEK_STAT)
  76. #define BAD_CRC (ABRT_ERR | ICRC_ERR)
  77. #define SATA_NR_PORTS (3) /* 16 possible ?? */
  78. #define SATA_STATUS_OFFSET (0)
  79. #define SATA_ERROR_OFFSET (1)
  80. #define SATA_CONTROL_OFFSET (2)
  81. /*
  82. * Our Physical Region Descriptor (PRD) table should be large enough
  83. * to handle the biggest I/O request we are likely to see. Since requests
  84. * can have no more than 256 sectors, and since the typical blocksize is
  85. * two or more sectors, we could get by with a limit of 128 entries here for
  86. * the usual worst case. Most requests seem to include some contiguous blocks,
  87. * further reducing the number of table entries required.
  88. *
  89. * The driver reverts to PIO mode for individual requests that exceed
  90. * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
  91. * 100% of all crazy scenarios here is not necessary.
  92. *
  93. * As it turns out though, we must allocate a full 4KB page for this,
  94. * so the two PRD tables (ide0 & ide1) will each get half of that,
  95. * allowing each to have about 256 entries (8 bytes each) from this.
  96. */
  97. #define PRD_BYTES 8
  98. #define PRD_ENTRIES 256
  99. /*
  100. * Some more useful definitions
  101. */
  102. #define PARTN_BITS 6 /* number of minor dev bits for partitions */
  103. #define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
  104. #define SECTOR_SIZE 512
  105. #define SECTOR_WORDS (SECTOR_SIZE / 4) /* number of 32bit words per sector */
  106. #define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t)))
  107. /*
  108. * Timeouts for various operations:
  109. */
  110. #define WAIT_DRQ (HZ/10) /* 100msec - spec allows up to 20ms */
  111. #define WAIT_READY (5*HZ) /* 5sec - some laptops are very slow */
  112. #define WAIT_PIDENTIFY (10*HZ) /* 10sec - should be less than 3ms (?), if all ATAPI CD is closed at boot */
  113. #define WAIT_WORSTCASE (30*HZ) /* 30sec - worst case when spinning up */
  114. #define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */
  115. #define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */
  116. /*
  117. * Check for an interrupt and acknowledge the interrupt status
  118. */
  119. struct hwif_s;
  120. typedef int (ide_ack_intr_t)(struct hwif_s *);
  121. /*
  122. * hwif_chipset_t is used to keep track of the specific hardware
  123. * chipset used by each IDE interface, if known.
  124. */
  125. enum { ide_unknown, ide_generic, ide_pci,
  126. ide_cmd640, ide_dtc2278, ide_ali14xx,
  127. ide_qd65xx, ide_umc8672, ide_ht6560b,
  128. ide_rz1000, ide_trm290,
  129. ide_cmd646, ide_cy82c693, ide_4drives,
  130. ide_pmac, ide_etrax100, ide_acorn,
  131. ide_au1xxx, ide_palm3710
  132. };
  133. typedef u8 hwif_chipset_t;
  134. /*
  135. * Structure to hold all information about the location of this port
  136. */
  137. typedef struct hw_regs_s {
  138. union {
  139. struct ide_io_ports io_ports;
  140. unsigned long io_ports_array[IDE_NR_PORTS];
  141. };
  142. int irq; /* our irq number */
  143. ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
  144. hwif_chipset_t chipset;
  145. struct device *dev;
  146. } hw_regs_t;
  147. void ide_init_port_data(struct hwif_s *, unsigned int);
  148. void ide_init_port_hw(struct hwif_s *, hw_regs_t *);
  149. static inline void ide_std_init_ports(hw_regs_t *hw,
  150. unsigned long io_addr,
  151. unsigned long ctl_addr)
  152. {
  153. unsigned int i;
  154. for (i = 0; i <= 7; i++)
  155. hw->io_ports_array[i] = io_addr++;
  156. hw->io_ports.ctl_addr = ctl_addr;
  157. }
  158. #include <asm/ide.h>
  159. #if !defined(MAX_HWIFS) || defined(CONFIG_EMBEDDED)
  160. #undef MAX_HWIFS
  161. #define MAX_HWIFS CONFIG_IDE_MAX_HWIFS
  162. #endif
  163. /* Currently only m68k, apus and m8xx need it */
  164. #ifndef IDE_ARCH_ACK_INTR
  165. # define ide_ack_intr(hwif) (1)
  166. #endif
  167. /* Currently only Atari needs it */
  168. #ifndef IDE_ARCH_LOCK
  169. # define ide_release_lock() do {} while (0)
  170. # define ide_get_lock(hdlr, data) do {} while (0)
  171. #endif /* IDE_ARCH_LOCK */
  172. /*
  173. * Now for the data we need to maintain per-drive: ide_drive_t
  174. */
  175. #define ide_scsi 0x21
  176. #define ide_disk 0x20
  177. #define ide_optical 0x7
  178. #define ide_cdrom 0x5
  179. #define ide_tape 0x1
  180. #define ide_floppy 0x0
  181. /*
  182. * Special Driver Flags
  183. *
  184. * set_geometry : respecify drive geometry
  185. * recalibrate : seek to cyl 0
  186. * set_multmode : set multmode count
  187. * set_tune : tune interface for drive
  188. * serviced : service command
  189. * reserved : unused
  190. */
  191. typedef union {
  192. unsigned all : 8;
  193. struct {
  194. unsigned set_geometry : 1;
  195. unsigned recalibrate : 1;
  196. unsigned set_multmode : 1;
  197. unsigned set_tune : 1;
  198. unsigned serviced : 1;
  199. unsigned reserved : 3;
  200. } b;
  201. } special_t;
  202. /*
  203. * ATA-IDE Select Register, aka Device-Head
  204. *
  205. * head : always zeros here
  206. * unit : drive select number: 0/1
  207. * bit5 : always 1
  208. * lba : using LBA instead of CHS
  209. * bit7 : always 1
  210. */
  211. typedef union {
  212. unsigned all : 8;
  213. struct {
  214. #if defined(__LITTLE_ENDIAN_BITFIELD)
  215. unsigned head : 4;
  216. unsigned unit : 1;
  217. unsigned bit5 : 1;
  218. unsigned lba : 1;
  219. unsigned bit7 : 1;
  220. #elif defined(__BIG_ENDIAN_BITFIELD)
  221. unsigned bit7 : 1;
  222. unsigned lba : 1;
  223. unsigned bit5 : 1;
  224. unsigned unit : 1;
  225. unsigned head : 4;
  226. #else
  227. #error "Please fix <asm/byteorder.h>"
  228. #endif
  229. } b;
  230. } select_t, ata_select_t;
  231. /*
  232. * Status returned from various ide_ functions
  233. */
  234. typedef enum {
  235. ide_stopped, /* no drive operation was started */
  236. ide_started, /* a drive operation was started, handler was set */
  237. } ide_startstop_t;
  238. struct ide_driver_s;
  239. struct ide_settings_s;
  240. #ifdef CONFIG_BLK_DEV_IDEACPI
  241. struct ide_acpi_drive_link;
  242. struct ide_acpi_hwif_link;
  243. #endif
  244. typedef struct ide_drive_s {
  245. char name[4]; /* drive name, such as "hda" */
  246. char driver_req[10]; /* requests specific driver */
  247. struct request_queue *queue; /* request queue */
  248. struct request *rq; /* current request */
  249. struct ide_drive_s *next; /* circular list of hwgroup drives */
  250. void *driver_data; /* extra driver data */
  251. struct hd_driveid *id; /* drive model identification info */
  252. #ifdef CONFIG_IDE_PROC_FS
  253. struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
  254. struct ide_settings_s *settings;/* /proc/ide/ drive settings */
  255. #endif
  256. struct hwif_s *hwif; /* actually (ide_hwif_t *) */
  257. unsigned long sleep; /* sleep until this time */
  258. unsigned long service_start; /* time we started last request */
  259. unsigned long service_time; /* service time of last request */
  260. unsigned long timeout; /* max time to wait for irq */
  261. special_t special; /* special action flags */
  262. select_t select; /* basic drive/head select reg value */
  263. u8 keep_settings; /* restore settings after drive reset */
  264. u8 using_dma; /* disk is using dma for read/write */
  265. u8 retry_pio; /* retrying dma capable host in pio */
  266. u8 state; /* retry state */
  267. u8 waiting_for_dma; /* dma currently in progress */
  268. u8 unmask; /* okay to unmask other irqs */
  269. u8 noflush; /* don't attempt flushes */
  270. u8 dsc_overlap; /* DSC overlap */
  271. u8 nice1; /* give potential excess bandwidth */
  272. unsigned present : 1; /* drive is physically present */
  273. unsigned dead : 1; /* device ejected hint */
  274. unsigned id_read : 1; /* 1=id read from disk 0 = synthetic */
  275. unsigned noprobe : 1; /* from: hdx=noprobe */
  276. unsigned removable : 1; /* 1 if need to do check_media_change */
  277. unsigned attach : 1; /* needed for removable devices */
  278. unsigned forced_geom : 1; /* 1 if hdx=c,h,s was given at boot */
  279. unsigned no_unmask : 1; /* disallow setting unmask bit */
  280. unsigned no_io_32bit : 1; /* disallow enabling 32bit I/O */
  281. unsigned atapi_overlap : 1; /* ATAPI overlap (not supported) */
  282. unsigned doorlocking : 1; /* for removable only: door lock/unlock works */
  283. unsigned nodma : 1; /* disallow DMA */
  284. unsigned remap_0_to_1 : 1; /* 0=noremap, 1=remap 0->1 (for EZDrive) */
  285. unsigned blocked : 1; /* 1=powermanagment told us not to do anything, so sleep nicely */
  286. unsigned vdma : 1; /* 1=doing PIO over DMA 0=doing normal DMA */
  287. unsigned scsi : 1; /* 0=default, 1=ide-scsi emulation */
  288. unsigned sleeping : 1; /* 1=sleeping & sleep field valid */
  289. unsigned post_reset : 1;
  290. unsigned udma33_warned : 1;
  291. u8 addressing; /* 0=28-bit, 1=48-bit, 2=48-bit doing 28-bit */
  292. u8 quirk_list; /* considered quirky, set for a specific host */
  293. u8 init_speed; /* transfer rate set at boot */
  294. u8 current_speed; /* current transfer rate set */
  295. u8 desired_speed; /* desired transfer rate set */
  296. u8 dn; /* now wide spread use */
  297. u8 wcache; /* status of write cache */
  298. u8 acoustic; /* acoustic management */
  299. u8 media; /* disk, cdrom, tape, floppy, ... */
  300. u8 ctl; /* "normal" value for Control register */
  301. u8 ready_stat; /* min status value for drive ready */
  302. u8 mult_count; /* current multiple sector setting */
  303. u8 mult_req; /* requested multiple sector setting */
  304. u8 tune_req; /* requested drive tuning setting */
  305. u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
  306. u8 bad_wstat; /* used for ignoring WRERR_STAT */
  307. u8 nowerr; /* used for ignoring WRERR_STAT */
  308. u8 sect0; /* offset of first sector for DM6:DDO */
  309. u8 head; /* "real" number of heads */
  310. u8 sect; /* "real" sectors per track */
  311. u8 bios_head; /* BIOS/fdisk/LILO number of heads */
  312. u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
  313. unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
  314. unsigned int cyl; /* "real" number of cyls */
  315. unsigned int drive_data; /* used by set_pio_mode/selectproc */
  316. unsigned int failures; /* current failure count */
  317. unsigned int max_failures; /* maximum allowed failure count */
  318. u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
  319. u64 capacity64; /* total number of sectors */
  320. int lun; /* logical unit */
  321. int crc_count; /* crc counter to reduce drive speed */
  322. #ifdef CONFIG_BLK_DEV_IDEACPI
  323. struct ide_acpi_drive_link *acpidata;
  324. #endif
  325. struct list_head list;
  326. struct device gendev;
  327. struct completion gendev_rel_comp; /* to deal with device release() */
  328. } ide_drive_t;
  329. #define to_ide_device(dev)container_of(dev, ide_drive_t, gendev)
  330. #define IDE_CHIPSET_PCI_MASK \
  331. ((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx))
  332. #define IDE_CHIPSET_IS_PCI(c) ((IDE_CHIPSET_PCI_MASK >> (c)) & 1)
  333. struct ide_port_info;
  334. struct ide_port_ops {
  335. /* host specific initialization of devices on a port */
  336. void (*port_init_devs)(struct hwif_s *);
  337. /* routine to program host for PIO mode */
  338. void (*set_pio_mode)(ide_drive_t *, const u8);
  339. /* routine to program host for DMA mode */
  340. void (*set_dma_mode)(ide_drive_t *, const u8);
  341. /* tweaks hardware to select drive */
  342. void (*selectproc)(ide_drive_t *);
  343. /* chipset polling based on hba specifics */
  344. int (*reset_poll)(ide_drive_t *);
  345. /* chipset specific changes to default for device-hba resets */
  346. void (*pre_reset)(ide_drive_t *);
  347. /* routine to reset controller after a disk reset */
  348. void (*resetproc)(ide_drive_t *);
  349. /* special host masking for drive selection */
  350. void (*maskproc)(ide_drive_t *, int);
  351. /* check host's drive quirk list */
  352. void (*quirkproc)(ide_drive_t *);
  353. u8 (*mdma_filter)(ide_drive_t *);
  354. u8 (*udma_filter)(ide_drive_t *);
  355. u8 (*cable_detect)(struct hwif_s *);
  356. };
  357. struct ide_dma_ops {
  358. void (*dma_host_set)(struct ide_drive_s *, int);
  359. int (*dma_setup)(struct ide_drive_s *);
  360. void (*dma_exec_cmd)(struct ide_drive_s *, u8);
  361. void (*dma_start)(struct ide_drive_s *);
  362. int (*dma_end)(struct ide_drive_s *);
  363. int (*dma_test_irq)(struct ide_drive_s *);
  364. void (*dma_lost_irq)(struct ide_drive_s *);
  365. void (*dma_timeout)(struct ide_drive_s *);
  366. };
  367. typedef struct hwif_s {
  368. struct hwif_s *next; /* for linked-list in ide_hwgroup_t */
  369. struct hwif_s *mate; /* other hwif from same PCI chip */
  370. struct hwgroup_s *hwgroup; /* actually (ide_hwgroup_t *) */
  371. struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
  372. char name[6]; /* name of interface, eg. "ide0" */
  373. struct ide_io_ports io_ports;
  374. unsigned long sata_scr[SATA_NR_PORTS];
  375. ide_drive_t drives[MAX_DRIVES]; /* drive info */
  376. u8 major; /* our major number */
  377. u8 index; /* 0 for ide0; 1 for ide1; ... */
  378. u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
  379. u8 bus_state; /* power state of the IDE bus */
  380. u32 host_flags;
  381. u8 pio_mask;
  382. u8 ultra_mask;
  383. u8 mwdma_mask;
  384. u8 swdma_mask;
  385. u8 cbl; /* cable type */
  386. hwif_chipset_t chipset; /* sub-module for tuning.. */
  387. struct device *dev;
  388. ide_ack_intr_t *ack_intr;
  389. void (*rw_disk)(ide_drive_t *, struct request *);
  390. const struct ide_port_ops *port_ops;
  391. const struct ide_dma_ops *dma_ops;
  392. void (*input_data)(ide_drive_t *, struct request *, void *, unsigned);
  393. void (*output_data)(ide_drive_t *, struct request *, void *, unsigned);
  394. void (*ide_dma_clear_irq)(ide_drive_t *drive);
  395. void (*OUTB)(u8 addr, unsigned long port);
  396. void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port);
  397. void (*OUTW)(u16 addr, unsigned long port);
  398. void (*OUTSW)(unsigned long port, void *addr, u32 count);
  399. void (*OUTSL)(unsigned long port, void *addr, u32 count);
  400. u8 (*INB)(unsigned long port);
  401. u16 (*INW)(unsigned long port);
  402. void (*INSW)(unsigned long port, void *addr, u32 count);
  403. void (*INSL)(unsigned long port, void *addr, u32 count);
  404. /* dma physical region descriptor table (cpu view) */
  405. unsigned int *dmatable_cpu;
  406. /* dma physical region descriptor table (dma view) */
  407. dma_addr_t dmatable_dma;
  408. /* Scatter-gather list used to build the above */
  409. struct scatterlist *sg_table;
  410. int sg_max_nents; /* Maximum number of entries in it */
  411. int sg_nents; /* Current number of entries in it */
  412. int sg_dma_direction; /* dma transfer direction */
  413. /* data phase of the active command (currently only valid for PIO/DMA) */
  414. int data_phase;
  415. unsigned int nsect;
  416. unsigned int nleft;
  417. struct scatterlist *cursg;
  418. unsigned int cursg_ofs;
  419. int rqsize; /* max sectors per request */
  420. int irq; /* our irq number */
  421. unsigned long dma_base; /* base addr for dma ports */
  422. unsigned long dma_command; /* dma command register */
  423. unsigned long dma_vendor1; /* dma vendor 1 register */
  424. unsigned long dma_status; /* dma status register */
  425. unsigned long dma_vendor3; /* dma vendor 3 register */
  426. unsigned long dma_prdtable; /* actual prd table address */
  427. unsigned long config_data; /* for use by chipset-specific code */
  428. unsigned long select_data; /* for use by chipset-specific code */
  429. unsigned long extra_base; /* extra addr for dma ports */
  430. unsigned extra_ports; /* number of extra dma ports */
  431. unsigned present : 1; /* this interface exists */
  432. unsigned serialized : 1; /* serialized all channel operation */
  433. unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */
  434. unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */
  435. unsigned mmio : 1; /* host uses MMIO */
  436. struct device gendev;
  437. struct device *portdev;
  438. struct completion gendev_rel_comp; /* To deal with device release() */
  439. void *hwif_data; /* extra hwif data */
  440. unsigned dma;
  441. #ifdef CONFIG_BLK_DEV_IDEACPI
  442. struct ide_acpi_hwif_link *acpidata;
  443. #endif
  444. } ____cacheline_internodealigned_in_smp ide_hwif_t;
  445. /*
  446. * internal ide interrupt handler type
  447. */
  448. typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
  449. typedef int (ide_expiry_t)(ide_drive_t *);
  450. /* used by ide-cd, ide-floppy, etc. */
  451. typedef void (xfer_func_t)(ide_drive_t *, struct request *rq, void *, unsigned);
  452. typedef struct hwgroup_s {
  453. /* irq handler, if active */
  454. ide_startstop_t (*handler)(ide_drive_t *);
  455. /* BOOL: protects all fields below */
  456. volatile int busy;
  457. /* BOOL: wake us up on timer expiry */
  458. unsigned int sleeping : 1;
  459. /* BOOL: polling active & poll_timeout field valid */
  460. unsigned int polling : 1;
  461. /* BOOL: in a polling reset situation. Must not trigger another reset yet */
  462. unsigned int resetting : 1;
  463. /* current drive */
  464. ide_drive_t *drive;
  465. /* ptr to current hwif in linked-list */
  466. ide_hwif_t *hwif;
  467. /* current request */
  468. struct request *rq;
  469. /* failsafe timer */
  470. struct timer_list timer;
  471. /* timeout value during long polls */
  472. unsigned long poll_timeout;
  473. /* queried upon timeouts */
  474. int (*expiry)(ide_drive_t *);
  475. int req_gen;
  476. int req_gen_timer;
  477. } ide_hwgroup_t;
  478. typedef struct ide_driver_s ide_driver_t;
  479. extern struct mutex ide_setting_mtx;
  480. int set_io_32bit(ide_drive_t *, int);
  481. int set_pio_mode(ide_drive_t *, int);
  482. int set_using_dma(ide_drive_t *, int);
  483. /* ATAPI packet command flags */
  484. enum {
  485. /* set when an error is considered normal - no retry (ide-tape) */
  486. PC_FLAG_ABORT = (1 << 0),
  487. PC_FLAG_SUPPRESS_ERROR = (1 << 1),
  488. PC_FLAG_WAIT_FOR_DSC = (1 << 2),
  489. PC_FLAG_DMA_OK = (1 << 3),
  490. PC_FLAG_DMA_RECOMMENDED = (1 << 4),
  491. PC_FLAG_DMA_IN_PROGRESS = (1 << 5),
  492. PC_FLAG_DMA_ERROR = (1 << 6),
  493. PC_FLAG_WRITING = (1 << 7),
  494. /* command timed out */
  495. PC_FLAG_TIMEDOUT = (1 << 8),
  496. };
  497. struct ide_atapi_pc {
  498. /* actual packet bytes */
  499. u8 c[12];
  500. /* incremented on each retry */
  501. int retries;
  502. int error;
  503. /* bytes to transfer */
  504. int req_xfer;
  505. /* bytes actually transferred */
  506. int xferred;
  507. /* data buffer */
  508. u8 *buf;
  509. /* current buffer position */
  510. u8 *cur_pos;
  511. int buf_size;
  512. /* missing/available data on the current buffer */
  513. int b_count;
  514. /* the corresponding request */
  515. struct request *rq;
  516. unsigned long flags;
  517. /*
  518. * those are more or less driver-specific and some of them are subject
  519. * to change/removal later.
  520. */
  521. u8 pc_buf[256];
  522. void (*idefloppy_callback) (ide_drive_t *);
  523. ide_startstop_t (*idetape_callback) (ide_drive_t *);
  524. /* idetape only */
  525. struct idetape_bh *bh;
  526. char *b_data;
  527. /* idescsi only for now */
  528. struct scatterlist *sg;
  529. unsigned int sg_cnt;
  530. struct scsi_cmnd *scsi_cmd;
  531. void (*done) (struct scsi_cmnd *);
  532. unsigned long timeout;
  533. };
  534. #ifdef CONFIG_IDE_PROC_FS
  535. /*
  536. * configurable drive settings
  537. */
  538. #define TYPE_INT 0
  539. #define TYPE_BYTE 1
  540. #define TYPE_SHORT 2
  541. #define SETTING_READ (1 << 0)
  542. #define SETTING_WRITE (1 << 1)
  543. #define SETTING_RW (SETTING_READ | SETTING_WRITE)
  544. typedef int (ide_procset_t)(ide_drive_t *, int);
  545. typedef struct ide_settings_s {
  546. char *name;
  547. int rw;
  548. int data_type;
  549. int min;
  550. int max;
  551. int mul_factor;
  552. int div_factor;
  553. void *data;
  554. ide_procset_t *set;
  555. int auto_remove;
  556. struct ide_settings_s *next;
  557. } ide_settings_t;
  558. int ide_add_setting(ide_drive_t *, const char *, int, int, int, int, int, int, void *, ide_procset_t *set);
  559. /*
  560. * /proc/ide interface
  561. */
  562. typedef struct {
  563. const char *name;
  564. mode_t mode;
  565. read_proc_t *read_proc;
  566. write_proc_t *write_proc;
  567. } ide_proc_entry_t;
  568. void proc_ide_create(void);
  569. void proc_ide_destroy(void);
  570. void ide_proc_register_port(ide_hwif_t *);
  571. void ide_proc_port_register_devices(ide_hwif_t *);
  572. void ide_proc_unregister_device(ide_drive_t *);
  573. void ide_proc_unregister_port(ide_hwif_t *);
  574. void ide_proc_register_driver(ide_drive_t *, ide_driver_t *);
  575. void ide_proc_unregister_driver(ide_drive_t *, ide_driver_t *);
  576. void ide_add_generic_settings(ide_drive_t *);
  577. read_proc_t proc_ide_read_capacity;
  578. read_proc_t proc_ide_read_geometry;
  579. /*
  580. * Standard exit stuff:
  581. */
  582. #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
  583. { \
  584. len -= off; \
  585. if (len < count) { \
  586. *eof = 1; \
  587. if (len <= 0) \
  588. return 0; \
  589. } else \
  590. len = count; \
  591. *start = page + off; \
  592. return len; \
  593. }
  594. #else
  595. static inline void proc_ide_create(void) { ; }
  596. static inline void proc_ide_destroy(void) { ; }
  597. static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
  598. static inline void ide_proc_port_register_devices(ide_hwif_t *hwif) { ; }
  599. static inline void ide_proc_unregister_device(ide_drive_t *drive) { ; }
  600. static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
  601. static inline void ide_proc_register_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
  602. static inline void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
  603. static inline void ide_add_generic_settings(ide_drive_t *drive) { ; }
  604. #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
  605. #endif
  606. /*
  607. * Power Management step value (rq->pm->pm_step).
  608. *
  609. * The step value starts at 0 (ide_pm_state_start_suspend) for a
  610. * suspend operation or 1000 (ide_pm_state_start_resume) for a
  611. * resume operation.
  612. *
  613. * For each step, the core calls the subdriver start_power_step() first.
  614. * This can return:
  615. * - ide_stopped : In this case, the core calls us back again unless
  616. * step have been set to ide_power_state_completed.
  617. * - ide_started : In this case, the channel is left busy until an
  618. * async event (interrupt) occurs.
  619. * Typically, start_power_step() will issue a taskfile request with
  620. * do_rw_taskfile().
  621. *
  622. * Upon reception of the interrupt, the core will call complete_power_step()
  623. * with the error code if any. This routine should update the step value
  624. * and return. It should not start a new request. The core will call
  625. * start_power_step for the new step value, unless step have been set to
  626. * ide_power_state_completed.
  627. *
  628. * Subdrivers are expected to define their own additional power
  629. * steps from 1..999 for suspend and from 1001..1999 for resume,
  630. * other values are reserved for future use.
  631. */
  632. enum {
  633. ide_pm_state_completed = -1,
  634. ide_pm_state_start_suspend = 0,
  635. ide_pm_state_start_resume = 1000,
  636. };
  637. /*
  638. * Subdrivers support.
  639. *
  640. * The gendriver.owner field should be set to the module owner of this driver.
  641. * The gendriver.name field should be set to the name of this driver
  642. */
  643. struct ide_driver_s {
  644. const char *version;
  645. u8 media;
  646. unsigned supports_dsc_overlap : 1;
  647. ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
  648. int (*end_request)(ide_drive_t *, int, int);
  649. ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
  650. ide_startstop_t (*abort)(ide_drive_t *, struct request *rq);
  651. struct device_driver gen_driver;
  652. int (*probe)(ide_drive_t *);
  653. void (*remove)(ide_drive_t *);
  654. void (*resume)(ide_drive_t *);
  655. void (*shutdown)(ide_drive_t *);
  656. #ifdef CONFIG_IDE_PROC_FS
  657. ide_proc_entry_t *proc;
  658. #endif
  659. };
  660. #define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver)
  661. int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsigned, unsigned long);
  662. /*
  663. * ide_hwifs[] is the master data structure used to keep track
  664. * of just about everything in ide.c. Whenever possible, routines
  665. * should be using pointers to a drive (ide_drive_t *) or
  666. * pointers to a hwif (ide_hwif_t *), rather than indexing this
  667. * structure directly (the allocation/layout may change!).
  668. *
  669. */
  670. #ifndef _IDE_C
  671. extern ide_hwif_t ide_hwifs[]; /* master data repository */
  672. #endif
  673. extern int ide_noacpi;
  674. extern int ide_acpigtf;
  675. extern int ide_acpionboot;
  676. extern int noautodma;
  677. extern int ide_vlb_clk;
  678. extern int ide_pci_clk;
  679. ide_hwif_t *ide_find_port_slot(const struct ide_port_info *);
  680. static inline ide_hwif_t *ide_find_port(void)
  681. {
  682. return ide_find_port_slot(NULL);
  683. }
  684. extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs);
  685. int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq,
  686. int uptodate, int nr_sectors);
  687. extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry);
  688. void ide_execute_command(ide_drive_t *, u8, ide_handler_t *, unsigned int,
  689. ide_expiry_t *);
  690. ide_startstop_t __ide_error(ide_drive_t *, struct request *, u8, u8);
  691. ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat);
  692. ide_startstop_t __ide_abort(ide_drive_t *, struct request *);
  693. extern ide_startstop_t ide_abort(ide_drive_t *, const char *);
  694. extern void ide_fix_driveid(struct hd_driveid *);
  695. extern void ide_fixstring(u8 *, const int, const int);
  696. int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
  697. extern ide_startstop_t ide_do_reset (ide_drive_t *);
  698. extern void ide_init_drive_cmd (struct request *rq);
  699. /*
  700. * "action" parameter type for ide_do_drive_cmd() below.
  701. */
  702. typedef enum {
  703. ide_wait, /* insert rq at end of list, and wait for it */
  704. ide_preempt, /* insert rq in front of current request */
  705. ide_head_wait, /* insert rq in front of current request and wait for it */
  706. ide_end /* insert rq at end of list, but don't wait for it */
  707. } ide_action_t;
  708. extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t);
  709. extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
  710. enum {
  711. IDE_TFLAG_LBA48 = (1 << 0),
  712. IDE_TFLAG_NO_SELECT_MASK = (1 << 1),
  713. IDE_TFLAG_FLAGGED = (1 << 2),
  714. IDE_TFLAG_OUT_DATA = (1 << 3),
  715. IDE_TFLAG_OUT_HOB_FEATURE = (1 << 4),
  716. IDE_TFLAG_OUT_HOB_NSECT = (1 << 5),
  717. IDE_TFLAG_OUT_HOB_LBAL = (1 << 6),
  718. IDE_TFLAG_OUT_HOB_LBAM = (1 << 7),
  719. IDE_TFLAG_OUT_HOB_LBAH = (1 << 8),
  720. IDE_TFLAG_OUT_HOB = IDE_TFLAG_OUT_HOB_FEATURE |
  721. IDE_TFLAG_OUT_HOB_NSECT |
  722. IDE_TFLAG_OUT_HOB_LBAL |
  723. IDE_TFLAG_OUT_HOB_LBAM |
  724. IDE_TFLAG_OUT_HOB_LBAH,
  725. IDE_TFLAG_OUT_FEATURE = (1 << 9),
  726. IDE_TFLAG_OUT_NSECT = (1 << 10),
  727. IDE_TFLAG_OUT_LBAL = (1 << 11),
  728. IDE_TFLAG_OUT_LBAM = (1 << 12),
  729. IDE_TFLAG_OUT_LBAH = (1 << 13),
  730. IDE_TFLAG_OUT_TF = IDE_TFLAG_OUT_FEATURE |
  731. IDE_TFLAG_OUT_NSECT |
  732. IDE_TFLAG_OUT_LBAL |
  733. IDE_TFLAG_OUT_LBAM |
  734. IDE_TFLAG_OUT_LBAH,
  735. IDE_TFLAG_OUT_DEVICE = (1 << 14),
  736. IDE_TFLAG_WRITE = (1 << 15),
  737. IDE_TFLAG_FLAGGED_SET_IN_FLAGS = (1 << 16),
  738. IDE_TFLAG_IN_DATA = (1 << 17),
  739. IDE_TFLAG_CUSTOM_HANDLER = (1 << 18),
  740. IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 19),
  741. IDE_TFLAG_IN_HOB_FEATURE = (1 << 20),
  742. IDE_TFLAG_IN_HOB_NSECT = (1 << 21),
  743. IDE_TFLAG_IN_HOB_LBAL = (1 << 22),
  744. IDE_TFLAG_IN_HOB_LBAM = (1 << 23),
  745. IDE_TFLAG_IN_HOB_LBAH = (1 << 24),
  746. IDE_TFLAG_IN_HOB_LBA = IDE_TFLAG_IN_HOB_LBAL |
  747. IDE_TFLAG_IN_HOB_LBAM |
  748. IDE_TFLAG_IN_HOB_LBAH,
  749. IDE_TFLAG_IN_HOB = IDE_TFLAG_IN_HOB_FEATURE |
  750. IDE_TFLAG_IN_HOB_NSECT |
  751. IDE_TFLAG_IN_HOB_LBA,
  752. IDE_TFLAG_IN_NSECT = (1 << 25),
  753. IDE_TFLAG_IN_LBAL = (1 << 26),
  754. IDE_TFLAG_IN_LBAM = (1 << 27),
  755. IDE_TFLAG_IN_LBAH = (1 << 28),
  756. IDE_TFLAG_IN_LBA = IDE_TFLAG_IN_LBAL |
  757. IDE_TFLAG_IN_LBAM |
  758. IDE_TFLAG_IN_LBAH,
  759. IDE_TFLAG_IN_TF = IDE_TFLAG_IN_NSECT |
  760. IDE_TFLAG_IN_LBA,
  761. IDE_TFLAG_IN_DEVICE = (1 << 29),
  762. IDE_TFLAG_HOB = IDE_TFLAG_OUT_HOB |
  763. IDE_TFLAG_IN_HOB,
  764. IDE_TFLAG_TF = IDE_TFLAG_OUT_TF |
  765. IDE_TFLAG_IN_TF,
  766. IDE_TFLAG_DEVICE = IDE_TFLAG_OUT_DEVICE |
  767. IDE_TFLAG_IN_DEVICE,
  768. /* force 16-bit I/O operations */
  769. IDE_TFLAG_IO_16BIT = (1 << 30),
  770. /* ide_task_t was allocated using kmalloc() */
  771. IDE_TFLAG_DYN = (1 << 31),
  772. };
  773. struct ide_taskfile {
  774. u8 hob_data; /* 0: high data byte (for TASKFILE IOCTL) */
  775. u8 hob_feature; /* 1-5: additional data to support LBA48 */
  776. u8 hob_nsect;
  777. u8 hob_lbal;
  778. u8 hob_lbam;
  779. u8 hob_lbah;
  780. u8 data; /* 6: low data byte (for TASKFILE IOCTL) */
  781. union { /*  7: */
  782. u8 error; /* read: error */
  783. u8 feature; /* write: feature */
  784. };
  785. u8 nsect; /* 8: number of sectors */
  786. u8 lbal; /* 9: LBA low */
  787. u8 lbam; /* 10: LBA mid */
  788. u8 lbah; /* 11: LBA high */
  789. u8 device; /* 12: device select */
  790. union { /* 13: */
  791. u8 status; /*  read: status  */
  792. u8 command; /* write: command */
  793. };
  794. };
  795. typedef struct ide_task_s {
  796. union {
  797. struct ide_taskfile tf;
  798. u8 tf_array[14];
  799. };
  800. u32 tf_flags;
  801. int data_phase;
  802. struct request *rq; /* copy of request */
  803. void *special; /* valid_t generally */
  804. } ide_task_t;
  805. void ide_tf_load(ide_drive_t *, ide_task_t *);
  806. void ide_tf_read(ide_drive_t *, ide_task_t *);
  807. extern void SELECT_DRIVE(ide_drive_t *);
  808. extern void SELECT_MASK(ide_drive_t *, int);
  809. extern int drive_is_ready(ide_drive_t *);
  810. void ide_pktcmd_tf_load(ide_drive_t *, u32, u16, u8);
  811. ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
  812. void task_end_request(ide_drive_t *, struct request *, u8);
  813. int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *, u16);
  814. int ide_no_data_taskfile(ide_drive_t *, ide_task_t *);
  815. int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
  816. int ide_cmd_ioctl(ide_drive_t *, unsigned int, unsigned long);
  817. int ide_task_ioctl(ide_drive_t *, unsigned int, unsigned long);
  818. extern int system_bus_clock(void);
  819. extern int ide_driveid_update(ide_drive_t *);
  820. extern int ide_config_drive_speed(ide_drive_t *, u8);
  821. extern u8 eighty_ninty_three (ide_drive_t *);
  822. extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
  823. extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
  824. extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
  825. extern int ide_spin_wait_hwgroup(ide_drive_t *);
  826. extern void ide_timer_expiry(unsigned long);
  827. extern irqreturn_t ide_intr(int irq, void *dev_id);
  828. extern void do_ide_request(struct request_queue *);
  829. void ide_init_disk(struct gendisk *, ide_drive_t *);
  830. #ifdef CONFIG_IDEPCI_PCIBUS_ORDER
  831. extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
  832. #define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
  833. #else
  834. #define ide_pci_register_driver(d) pci_register_driver(d)
  835. #endif
  836. void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int, u8 *);
  837. void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
  838. #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
  839. int ide_pci_set_master(struct pci_dev *, const char *);
  840. unsigned long ide_pci_dma_base(ide_hwif_t *, const struct ide_port_info *);
  841. int ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *);
  842. #else
  843. static inline int ide_hwif_setup_dma(ide_hwif_t *hwif,
  844. const struct ide_port_info *d)
  845. {
  846. return -EINVAL;
  847. }
  848. #endif
  849. extern void default_hwif_iops(ide_hwif_t *);
  850. extern void default_hwif_mmiops(ide_hwif_t *);
  851. extern void default_hwif_transport(ide_hwif_t *);
  852. typedef struct ide_pci_enablebit_s {
  853. u8 reg; /* byte pci reg holding the enable-bit */
  854. u8 mask; /* mask to isolate the enable-bit */
  855. u8 val; /* value of masked reg when "enabled" */
  856. } ide_pci_enablebit_t;
  857. enum {
  858. /* Uses ISA control ports not PCI ones. */
  859. IDE_HFLAG_ISA_PORTS = (1 << 0),
  860. /* single port device */
  861. IDE_HFLAG_SINGLE = (1 << 1),
  862. /* don't use legacy PIO blacklist */
  863. IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
  864. /* set for the second port of QD65xx */
  865. IDE_HFLAG_QD_2ND_PORT = (1 << 3),
  866. /* use PIO8/9 for prefetch off/on */
  867. IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
  868. /* use PIO6/7 for fast-devsel off/on */
  869. IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
  870. /* use 100-102 and 200-202 PIO values to set DMA modes */
  871. IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
  872. /*
  873. * keep DMA setting when programming PIO mode, may be used only
  874. * for hosts which have separate PIO and DMA timings (ie. PMAC)
  875. */
  876. IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
  877. /* program host for the transfer mode after programming device */
  878. IDE_HFLAG_POST_SET_MODE = (1 << 8),
  879. /* don't program host/device for the transfer mode ("smart" hosts) */
  880. IDE_HFLAG_NO_SET_MODE = (1 << 9),
  881. /* trust BIOS for programming chipset/device for DMA */
  882. IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
  883. /* host uses VDMA (tied with IDE_HFLAG_CS5520 for now) */
  884. IDE_HFLAG_VDMA = (1 << 11),
  885. /* ATAPI DMA is unsupported */
  886. IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
  887. /* set if host is a "non-bootable" controller */
  888. IDE_HFLAG_NON_BOOTABLE = (1 << 13),
  889. /* host doesn't support DMA */
  890. IDE_HFLAG_NO_DMA = (1 << 14),
  891. /* check if host is PCI IDE device before allowing DMA */
  892. IDE_HFLAG_NO_AUTODMA = (1 << 15),
  893. /* host uses MMIO */
  894. IDE_HFLAG_MMIO = (1 << 16),
  895. /* host is CS5510/CS5520 */
  896. IDE_HFLAG_CS5520 = IDE_HFLAG_VDMA,
  897. /* no LBA48 */
  898. IDE_HFLAG_NO_LBA48 = (1 << 17),
  899. /* no LBA48 DMA */
  900. IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
  901. /* data FIFO is cleared by an error */
  902. IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
  903. /* serialize ports */
  904. IDE_HFLAG_SERIALIZE = (1 << 20),
  905. /* use legacy IRQs */
  906. IDE_HFLAG_LEGACY_IRQS = (1 << 21),
  907. /* force use of legacy IRQs */
  908. IDE_HFLAG_FORCE_LEGACY_IRQS = (1 << 22),
  909. /* limit LBA48 requests to 256 sectors */
  910. IDE_HFLAG_RQSIZE_256 = (1 << 23),
  911. /* use 32-bit I/O ops */
  912. IDE_HFLAG_IO_32BIT = (1 << 24),
  913. /* unmask IRQs */
  914. IDE_HFLAG_UNMASK_IRQS = (1 << 25),
  915. IDE_HFLAG_ABUSE_SET_DMA_MODE = (1 << 26),
  916. /* serialize ports if DMA is possible (for sl82c105) */
  917. IDE_HFLAG_SERIALIZE_DMA = (1 << 27),
  918. /* force host out of "simplex" mode */
  919. IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28),
  920. /* DSC overlap is unsupported */
  921. IDE_HFLAG_NO_DSC = (1 << 29),
  922. /* never use 32-bit I/O ops */
  923. IDE_HFLAG_NO_IO_32BIT = (1 << 30),
  924. /* never unmask IRQs */
  925. IDE_HFLAG_NO_UNMASK_IRQS = (1 << 31),
  926. };
  927. #ifdef CONFIG_BLK_DEV_OFFBOARD
  928. # define IDE_HFLAG_OFF_BOARD 0
  929. #else
  930. # define IDE_HFLAG_OFF_BOARD IDE_HFLAG_NON_BOOTABLE
  931. #endif
  932. struct ide_port_info {
  933. char *name;
  934. unsigned int (*init_chipset)(struct pci_dev *, const char *);
  935. void (*init_iops)(ide_hwif_t *);
  936. void (*init_hwif)(ide_hwif_t *);
  937. int (*init_dma)(ide_hwif_t *,
  938. const struct ide_port_info *);
  939. const struct ide_port_ops *port_ops;
  940. const struct ide_dma_ops *dma_ops;
  941. ide_pci_enablebit_t enablebits[2];
  942. hwif_chipset_t chipset;
  943. u32 host_flags;
  944. u8 pio_mask;
  945. u8 swdma_mask;
  946. u8 mwdma_mask;
  947. u8 udma_mask;
  948. };
  949. int ide_setup_pci_device(struct pci_dev *, const struct ide_port_info *);
  950. int ide_setup_pci_devices(struct pci_dev *, struct pci_dev *, const struct ide_port_info *);
  951. void ide_map_sg(ide_drive_t *, struct request *);
  952. void ide_init_sg_cmd(ide_drive_t *, struct request *);
  953. #define BAD_DMA_DRIVE 0
  954. #define GOOD_DMA_DRIVE 1
  955. struct drive_list_entry {
  956. const char *id_model;
  957. const char *id_firmware;
  958. };
  959. int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *);
  960. #ifdef CONFIG_BLK_DEV_IDEDMA
  961. int __ide_dma_bad_drive(ide_drive_t *);
  962. int ide_id_dma_bug(ide_drive_t *);
  963. u8 ide_find_dma_mode(ide_drive_t *, u8);
  964. static inline u8 ide_max_dma_mode(ide_drive_t *drive)
  965. {
  966. return ide_find_dma_mode(drive, XFER_UDMA_6);
  967. }
  968. void ide_dma_off_quietly(ide_drive_t *);
  969. void ide_dma_off(ide_drive_t *);
  970. void ide_dma_on(ide_drive_t *);
  971. int ide_set_dma(ide_drive_t *);
  972. void ide_check_dma_crc(ide_drive_t *);
  973. ide_startstop_t ide_dma_intr(ide_drive_t *);
  974. int ide_build_sglist(ide_drive_t *, struct request *);
  975. void ide_destroy_dmatable(ide_drive_t *);
  976. #ifdef CONFIG_BLK_DEV_IDEDMA_SFF
  977. extern int ide_build_dmatable(ide_drive_t *, struct request *);
  978. int ide_allocate_dma_engine(ide_hwif_t *);
  979. void ide_release_dma_engine(ide_hwif_t *);
  980. void ide_setup_dma(ide_hwif_t *, unsigned long);
  981. void ide_dma_host_set(ide_drive_t *, int);
  982. extern int ide_dma_setup(ide_drive_t *);
  983. void ide_dma_exec_cmd(ide_drive_t *, u8);
  984. extern void ide_dma_start(ide_drive_t *);
  985. extern int __ide_dma_end(ide_drive_t *);
  986. int ide_dma_test_irq(ide_drive_t *);
  987. extern void ide_dma_lost_irq(ide_drive_t *);
  988. extern void ide_dma_timeout(ide_drive_t *);
  989. #endif /* CONFIG_BLK_DEV_IDEDMA_SFF */
  990. #else
  991. static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; }
  992. static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
  993. static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
  994. static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; }
  995. static inline void ide_dma_off(ide_drive_t *drive) { ; }
  996. static inline void ide_dma_on(ide_drive_t *drive) { ; }
  997. static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
  998. static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
  999. static inline void ide_check_dma_crc(ide_drive_t *drive) { ; }
  1000. #endif /* CONFIG_BLK_DEV_IDEDMA */
  1001. #ifndef CONFIG_BLK_DEV_IDEDMA_SFF
  1002. static inline void ide_release_dma_engine(ide_hwif_t *hwif) { ; }
  1003. #endif
  1004. #ifdef CONFIG_BLK_DEV_IDEACPI
  1005. extern int ide_acpi_exec_tfs(ide_drive_t *drive);
  1006. extern void ide_acpi_get_timing(ide_hwif_t *hwif);
  1007. extern void ide_acpi_push_timing(ide_hwif_t *hwif);
  1008. extern void ide_acpi_init(ide_hwif_t *hwif);
  1009. void ide_acpi_port_init_devices(ide_hwif_t *);
  1010. extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
  1011. #else
  1012. static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
  1013. static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
  1014. static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
  1015. static inline void ide_acpi_init(ide_hwif_t *hwif) { ; }
  1016. static inline void ide_acpi_port_init_devices(ide_hwif_t *hwif) { ; }
  1017. static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
  1018. #endif
  1019. void ide_remove_port_from_hwgroup(ide_hwif_t *);
  1020. void ide_unregister(ide_hwif_t *);
  1021. void ide_register_region(struct gendisk *);
  1022. void ide_unregister_region(struct gendisk *);
  1023. void ide_undecoded_slave(ide_drive_t *);
  1024. void ide_port_apply_params(ide_hwif_t *);
  1025. int ide_device_add_all(u8 *idx, const struct ide_port_info *);
  1026. int ide_device_add(u8 idx[4], const struct ide_port_info *);
  1027. int ide_legacy_device_add(const struct ide_port_info *, unsigned long);
  1028. void ide_port_unregister_devices(ide_hwif_t *);
  1029. void ide_port_scan(ide_hwif_t *);
  1030. static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
  1031. {
  1032. return hwif->hwif_data;
  1033. }
  1034. static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
  1035. {
  1036. hwif->hwif_data = data;
  1037. }
  1038. const char *ide_xfer_verbose(u8 mode);
  1039. extern void ide_toggle_bounce(ide_drive_t *drive, int on);
  1040. extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
  1041. static inline int ide_dev_has_iordy(struct hd_driveid *id)
  1042. {
  1043. return ((id->field_valid & 2) && (id->capability & 8)) ? 1 : 0;
  1044. }
  1045. static inline int ide_dev_is_sata(struct hd_driveid *id)
  1046. {
  1047. /*
  1048. * See if word 93 is 0 AND drive is at least ATA-5 compatible
  1049. * verifying that word 80 by casting it to a signed type --
  1050. * this trick allows us to filter out the reserved values of
  1051. * 0x0000 and 0xffff along with the earlier ATA revisions...
  1052. */
  1053. if (id->hw_config == 0 && (short)id->major_rev_num >= 0x0020)
  1054. return 1;
  1055. return 0;
  1056. }
  1057. u64 ide_get_lba_addr(struct ide_taskfile *, int);
  1058. u8 ide_dump_status(ide_drive_t *, const char *, u8);
  1059. typedef struct ide_pio_timings_s {
  1060. int setup_time; /* Address setup (ns) minimum */
  1061. int active_time; /* Active pulse (ns) minimum */
  1062. int cycle_time; /* Cycle time (ns) minimum = */
  1063. /* active + recovery (+ setup for some chips) */
  1064. } ide_pio_timings_t;
  1065. unsigned int ide_pio_cycle_time(ide_drive_t *, u8);
  1066. u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
  1067. extern const ide_pio_timings_t ide_pio_timings[6];
  1068. int ide_set_pio_mode(ide_drive_t *, u8);
  1069. int ide_set_dma_mode(ide_drive_t *, u8);
  1070. void ide_set_pio(ide_drive_t *, u8);
  1071. static inline void ide_set_max_pio(ide_drive_t *drive)
  1072. {
  1073. ide_set_pio(drive, 255);
  1074. }
  1075. extern spinlock_t ide_lock;
  1076. extern struct mutex ide_cfg_mtx;
  1077. /*
  1078. * Structure locking:
  1079. *
  1080. * ide_cfg_mtx and ide_lock together protect changes to
  1081. * ide_hwif_t->{next,hwgroup}
  1082. * ide_drive_t->next
  1083. *
  1084. * ide_hwgroup_t->busy: ide_lock
  1085. * ide_hwgroup_t->hwif: ide_lock
  1086. * ide_hwif_t->mate: constant, no locking
  1087. * ide_drive_t->hwif: constant, no locking
  1088. */
  1089. #define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0)
  1090. extern struct bus_type ide_bus_type;
  1091. extern struct class *ide_port_class;
  1092. /* check if CACHE FLUSH (EXT) command is supported (bits defined in ATA-6) */
  1093. #define ide_id_has_flush_cache(id) ((id)->cfs_enable_2 & 0x3000)
  1094. /* some Maxtor disks have bit 13 defined incorrectly so check bit 10 too */
  1095. #define ide_id_has_flush_cache_ext(id) \
  1096. (((id)->cfs_enable_2 & 0x2400) == 0x2400)
  1097. static inline void ide_dump_identify(u8 *id)
  1098. {
  1099. print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0);
  1100. }
  1101. static inline int hwif_to_node(ide_hwif_t *hwif)
  1102. {
  1103. struct pci_dev *dev = to_pci_dev(hwif->dev);
  1104. return hwif->dev ? pcibus_to_node(dev->bus) : -1;
  1105. }
  1106. static inline ide_drive_t *ide_get_paired_drive(ide_drive_t *drive)
  1107. {
  1108. ide_hwif_t *hwif = HWIF(drive);
  1109. return &hwif->drives[(drive->dn ^ 1) & 1];
  1110. }
  1111. static inline void ide_set_irq(ide_drive_t *drive, int on)
  1112. {
  1113. ide_hwif_t *hwif = drive->hwif;
  1114. hwif->OUTB(drive->ctl | (on ? 0 : 2), hwif->io_ports.ctl_addr);
  1115. }
  1116. static inline u8 ide_read_status(ide_drive_t *drive)
  1117. {
  1118. ide_hwif_t *hwif = drive->hwif;
  1119. return hwif->INB(hwif->io_ports.status_addr);
  1120. }
  1121. static inline u8 ide_read_altstatus(ide_drive_t *drive)
  1122. {
  1123. ide_hwif_t *hwif = drive->hwif;
  1124. return hwif->INB(hwif->io_ports.ctl_addr);
  1125. }
  1126. static inline u8 ide_read_error(ide_drive_t *drive)
  1127. {
  1128. ide_hwif_t *hwif = drive->hwif;
  1129. return hwif->INB(hwif->io_ports.error_addr);
  1130. }
  1131. /*
  1132. * Too bad. The drive wants to send us data which we are not ready to accept.
  1133. * Just throw it away.
  1134. */
  1135. static inline void ide_atapi_discard_data(ide_drive_t *drive, unsigned bcount)
  1136. {
  1137. ide_hwif_t *hwif = drive->hwif;
  1138. /* FIXME: use ->input_data */
  1139. while (bcount--)
  1140. (void)hwif->INB(hwif->io_ports.data_addr);
  1141. }
  1142. static inline void ide_atapi_write_zeros(ide_drive_t *drive, unsigned bcount)
  1143. {
  1144. ide_hwif_t *hwif = drive->hwif;
  1145. /* FIXME: use ->output_data */
  1146. while (bcount--)
  1147. hwif->OUTB(0, hwif->io_ports.data_addr);
  1148. }
  1149. #endif /* _IDE_H */