langwell_otg.c 50 KB

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  1. /*
  2. * Intel Langwell USB OTG transceiver driver
  3. * Copyright (C) 2008 - 2009, Intel Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  17. *
  18. */
  19. /* This driver helps to switch Langwell OTG controller function between host
  20. * and peripheral. It works with EHCI driver and Langwell client controller
  21. * driver together.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/pci.h>
  26. #include <linux/errno.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/kernel.h>
  29. #include <linux/device.h>
  30. #include <linux/moduleparam.h>
  31. #include <linux/usb/ch9.h>
  32. #include <linux/usb/gadget.h>
  33. #include <linux/usb.h>
  34. #include <linux/usb/otg.h>
  35. #include <linux/notifier.h>
  36. #include <asm/ipc_defs.h>
  37. #include <linux/delay.h>
  38. #include "../core/hcd.h"
  39. #include <linux/usb/langwell_otg.h>
  40. #define DRIVER_DESC "Intel Langwell USB OTG transceiver driver"
  41. #define DRIVER_VERSION "3.0.0.32L.0002"
  42. MODULE_DESCRIPTION(DRIVER_DESC);
  43. MODULE_AUTHOR("Henry Yuan <hang.yuan@intel.com>, Hao Wu <hao.wu@intel.com>");
  44. MODULE_VERSION(DRIVER_VERSION);
  45. MODULE_LICENSE("GPL");
  46. static const char driver_name[] = "langwell_otg";
  47. static int langwell_otg_probe(struct pci_dev *pdev,
  48. const struct pci_device_id *id);
  49. static void langwell_otg_remove(struct pci_dev *pdev);
  50. static int langwell_otg_suspend(struct pci_dev *pdev, pm_message_t message);
  51. static int langwell_otg_resume(struct pci_dev *pdev);
  52. static int langwell_otg_set_host(struct otg_transceiver *otg,
  53. struct usb_bus *host);
  54. static int langwell_otg_set_peripheral(struct otg_transceiver *otg,
  55. struct usb_gadget *gadget);
  56. static int langwell_otg_start_srp(struct otg_transceiver *otg);
  57. static const struct pci_device_id pci_ids[] = {{
  58. .class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
  59. .class_mask = ~0,
  60. .vendor = 0x8086,
  61. .device = 0x0811,
  62. .subvendor = PCI_ANY_ID,
  63. .subdevice = PCI_ANY_ID,
  64. }, { /* end: all zeroes */ }
  65. };
  66. static struct pci_driver otg_pci_driver = {
  67. .name = (char *) driver_name,
  68. .id_table = pci_ids,
  69. .probe = langwell_otg_probe,
  70. .remove = langwell_otg_remove,
  71. .suspend = langwell_otg_suspend,
  72. .resume = langwell_otg_resume,
  73. };
  74. static const char *state_string(enum usb_otg_state state)
  75. {
  76. switch (state) {
  77. case OTG_STATE_A_IDLE:
  78. return "a_idle";
  79. case OTG_STATE_A_WAIT_VRISE:
  80. return "a_wait_vrise";
  81. case OTG_STATE_A_WAIT_BCON:
  82. return "a_wait_bcon";
  83. case OTG_STATE_A_HOST:
  84. return "a_host";
  85. case OTG_STATE_A_SUSPEND:
  86. return "a_suspend";
  87. case OTG_STATE_A_PERIPHERAL:
  88. return "a_peripheral";
  89. case OTG_STATE_A_WAIT_VFALL:
  90. return "a_wait_vfall";
  91. case OTG_STATE_A_VBUS_ERR:
  92. return "a_vbus_err";
  93. case OTG_STATE_B_IDLE:
  94. return "b_idle";
  95. case OTG_STATE_B_SRP_INIT:
  96. return "b_srp_init";
  97. case OTG_STATE_B_PERIPHERAL:
  98. return "b_peripheral";
  99. case OTG_STATE_B_WAIT_ACON:
  100. return "b_wait_acon";
  101. case OTG_STATE_B_HOST:
  102. return "b_host";
  103. default:
  104. return "UNDEFINED";
  105. }
  106. }
  107. /* HSM timers */
  108. static inline struct langwell_otg_timer *otg_timer_initializer
  109. (void (*function)(unsigned long), unsigned long expires, unsigned long data)
  110. {
  111. struct langwell_otg_timer *timer;
  112. timer = kmalloc(sizeof(struct langwell_otg_timer), GFP_KERNEL);
  113. timer->function = function;
  114. timer->expires = expires;
  115. timer->data = data;
  116. return timer;
  117. }
  118. static struct langwell_otg_timer *a_wait_vrise_tmr, *a_wait_bcon_tmr,
  119. *a_aidl_bdis_tmr, *b_ase0_brst_tmr, *b_se0_srp_tmr, *b_srp_res_tmr,
  120. *b_bus_suspend_tmr;
  121. static struct list_head active_timers;
  122. static struct langwell_otg *the_transceiver;
  123. /* host/client notify transceiver when event affects HNP state */
  124. void langwell_update_transceiver()
  125. {
  126. otg_dbg("transceiver driver is notified\n");
  127. queue_work(the_transceiver->qwork, &the_transceiver->work);
  128. }
  129. EXPORT_SYMBOL(langwell_update_transceiver);
  130. static int langwell_otg_set_host(struct otg_transceiver *otg,
  131. struct usb_bus *host)
  132. {
  133. otg->host = host;
  134. return 0;
  135. }
  136. static int langwell_otg_set_peripheral(struct otg_transceiver *otg,
  137. struct usb_gadget *gadget)
  138. {
  139. otg->gadget = gadget;
  140. return 0;
  141. }
  142. static int langwell_otg_set_power(struct otg_transceiver *otg,
  143. unsigned mA)
  144. {
  145. return 0;
  146. }
  147. /* A-device drives vbus, controlled through PMIC CHRGCNTL register*/
  148. static void langwell_otg_drv_vbus(int on)
  149. {
  150. struct ipc_pmic_reg_data pmic_data = {0};
  151. struct ipc_pmic_reg_data battery_data;
  152. /* Check if battery is attached or not */
  153. battery_data.pmic_reg_data[0].register_address = 0xd2;
  154. battery_data.ioc = 0;
  155. battery_data.num_entries = 1;
  156. if (ipc_pmic_register_read(&battery_data)) {
  157. otg_dbg("Failed to read PMIC register 0xd2.\n");
  158. return;
  159. }
  160. if ((battery_data.pmic_reg_data[0].value & 0x20) == 0) {
  161. otg_dbg("no battery attached\n");
  162. return;
  163. }
  164. /* Workaround for battery attachment issue */
  165. if (battery_data.pmic_reg_data[0].value == 0x34) {
  166. otg_dbg("battery \n");
  167. return;
  168. }
  169. otg_dbg("battery attached\n");
  170. pmic_data.ioc = 0;
  171. pmic_data.pmic_reg_data[0].register_address = 0xD4;
  172. pmic_data.num_entries = 1;
  173. if (on)
  174. pmic_data.pmic_reg_data[0].value = 0x20;
  175. else
  176. pmic_data.pmic_reg_data[0].value = 0xc0;
  177. if (ipc_pmic_register_write(&pmic_data, TRUE))
  178. otg_dbg("Failed to write PMIC.\n");
  179. }
  180. /* charge vbus or discharge vbus through a resistor to ground */
  181. static void langwell_otg_chrg_vbus(int on)
  182. {
  183. u32 val;
  184. val = readl(the_transceiver->regs + CI_OTGSC);
  185. if (on)
  186. writel((val & ~OTGSC_INTSTS_MASK) | OTGSC_VC,
  187. the_transceiver->regs + CI_OTGSC);
  188. else
  189. writel((val & ~OTGSC_INTSTS_MASK) | OTGSC_VD,
  190. the_transceiver->regs + CI_OTGSC);
  191. }
  192. /* Start SRP */
  193. static int langwell_otg_start_srp(struct otg_transceiver *otg)
  194. {
  195. u32 val;
  196. otg_dbg("Start SRP ->\n");
  197. val = readl(the_transceiver->regs + CI_OTGSC);
  198. writel((val & ~OTGSC_INTSTS_MASK) | OTGSC_HADP,
  199. the_transceiver->regs + CI_OTGSC);
  200. /* Check if the data plus is finished or not */
  201. msleep(8);
  202. val = readl(the_transceiver->regs + CI_OTGSC);
  203. if (val & (OTGSC_HADP | OTGSC_DP))
  204. otg_dbg("DataLine SRP Error\n");
  205. /* FIXME: VBus SRP */
  206. return 0;
  207. }
  208. /* stop SOF via bus_suspend */
  209. static void langwell_otg_loc_sof(int on)
  210. {
  211. struct usb_hcd *hcd;
  212. int err;
  213. otg_dbg("loc_sof -> %d\n", on);
  214. hcd = bus_to_hcd(the_transceiver->otg.host);
  215. if (on)
  216. err = hcd->driver->bus_resume(hcd);
  217. else
  218. err = hcd->driver->bus_suspend(hcd);
  219. if (err)
  220. otg_dbg("Failed to resume/suspend bus - %d\n", err);
  221. }
  222. static void langwell_otg_phy_low_power(int on)
  223. {
  224. u32 val;
  225. otg_dbg("phy low power mode-> %d\n", on);
  226. val = readl(the_transceiver->regs + CI_HOSTPC1);
  227. if (on)
  228. writel(val | HOSTPC1_PHCD, the_transceiver->regs + CI_HOSTPC1);
  229. else
  230. writel(val & ~HOSTPC1_PHCD, the_transceiver->regs + CI_HOSTPC1);
  231. }
  232. /* Enable/Disable OTG interrupt */
  233. static void langwell_otg_intr(int on)
  234. {
  235. u32 val;
  236. otg_dbg("interrupt -> %d\n", on);
  237. val = readl(the_transceiver->regs + CI_OTGSC);
  238. if (on) {
  239. val = val | (OTGSC_INTEN_MASK | OTGSC_IDPU);
  240. writel(val, the_transceiver->regs + CI_OTGSC);
  241. } else {
  242. val = val & ~(OTGSC_INTEN_MASK | OTGSC_IDPU);
  243. writel(val, the_transceiver->regs + CI_OTGSC);
  244. }
  245. }
  246. /* set HAAR: Hardware Assist Auto-Reset */
  247. static void langwell_otg_HAAR(int on)
  248. {
  249. u32 val;
  250. otg_dbg("HAAR -> %d\n", on);
  251. val = readl(the_transceiver->regs + CI_OTGSC);
  252. if (on)
  253. writel((val & ~OTGSC_INTSTS_MASK) | OTGSC_HAAR,
  254. the_transceiver->regs + CI_OTGSC);
  255. else
  256. writel((val & ~OTGSC_INTSTS_MASK) & ~OTGSC_HAAR,
  257. the_transceiver->regs + CI_OTGSC);
  258. }
  259. /* set HABA: Hardware Assist B-Disconnect to A-Connect */
  260. static void langwell_otg_HABA(int on)
  261. {
  262. u32 val;
  263. otg_dbg("HABA -> %d\n", on);
  264. val = readl(the_transceiver->regs + CI_OTGSC);
  265. if (on)
  266. writel((val & ~OTGSC_INTSTS_MASK) | OTGSC_HABA,
  267. the_transceiver->regs + CI_OTGSC);
  268. else
  269. writel((val & ~OTGSC_INTSTS_MASK) & ~OTGSC_HABA,
  270. the_transceiver->regs + CI_OTGSC);
  271. }
  272. static int langwell_otg_check_se0_srp(int on)
  273. {
  274. u32 val;
  275. int delay_time = TB_SE0_SRP * 10; /* step is 100us */
  276. otg_dbg("check_se0_srp -> \n");
  277. do {
  278. udelay(100);
  279. if (!delay_time--)
  280. break;
  281. val = readl(the_transceiver->regs + CI_PORTSC1);
  282. val &= PORTSC_LS;
  283. } while (!val);
  284. otg_dbg("check_se0_srp <- \n");
  285. return val;
  286. }
  287. /* The timeout callback function to set time out bit */
  288. static void set_tmout(unsigned long indicator)
  289. {
  290. *(int *)indicator = 1;
  291. }
  292. void langwell_otg_nsf_msg(unsigned long indicator)
  293. {
  294. switch (indicator) {
  295. case 2:
  296. case 4:
  297. case 6:
  298. case 7:
  299. printk(KERN_ERR "OTG:NSF-%lu - deivce not responding\n",
  300. indicator);
  301. break;
  302. case 3:
  303. printk(KERN_ERR "OTG:NSF-%lu - deivce not supported\n",
  304. indicator);
  305. break;
  306. default:
  307. printk(KERN_ERR "Do not have this kind of NSF\n");
  308. break;
  309. }
  310. }
  311. /* Initialize timers */
  312. static void langwell_otg_init_timers(struct otg_hsm *hsm)
  313. {
  314. /* HSM used timers */
  315. a_wait_vrise_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_VRISE,
  316. (unsigned long)&hsm->a_wait_vrise_tmout);
  317. a_wait_bcon_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_BCON,
  318. (unsigned long)&hsm->a_wait_bcon_tmout);
  319. a_aidl_bdis_tmr = otg_timer_initializer(&set_tmout, TA_AIDL_BDIS,
  320. (unsigned long)&hsm->a_aidl_bdis_tmout);
  321. b_ase0_brst_tmr = otg_timer_initializer(&set_tmout, TB_ASE0_BRST,
  322. (unsigned long)&hsm->b_ase0_brst_tmout);
  323. b_se0_srp_tmr = otg_timer_initializer(&set_tmout, TB_SE0_SRP,
  324. (unsigned long)&hsm->b_se0_srp);
  325. b_srp_res_tmr = otg_timer_initializer(&set_tmout, TB_SRP_RES,
  326. (unsigned long)&hsm->b_srp_res_tmout);
  327. b_bus_suspend_tmr = otg_timer_initializer(&set_tmout, TB_BUS_SUSPEND,
  328. (unsigned long)&hsm->b_bus_suspend_tmout);
  329. }
  330. /* Free timers */
  331. static void langwell_otg_free_timers(void)
  332. {
  333. kfree(a_wait_vrise_tmr);
  334. kfree(a_wait_bcon_tmr);
  335. kfree(a_aidl_bdis_tmr);
  336. kfree(b_ase0_brst_tmr);
  337. kfree(b_se0_srp_tmr);
  338. kfree(b_srp_res_tmr);
  339. kfree(b_bus_suspend_tmr);
  340. }
  341. /* Add timer to timer list */
  342. static void langwell_otg_add_timer(void *gtimer)
  343. {
  344. struct langwell_otg_timer *timer = (struct langwell_otg_timer *)gtimer;
  345. struct langwell_otg_timer *tmp_timer;
  346. u32 val32;
  347. /* Check if the timer is already in the active list,
  348. * if so update timer count
  349. */
  350. list_for_each_entry(tmp_timer, &active_timers, list)
  351. if (tmp_timer == timer) {
  352. timer->count = timer->expires;
  353. return;
  354. }
  355. timer->count = timer->expires;
  356. if (list_empty(&active_timers)) {
  357. val32 = readl(the_transceiver->regs + CI_OTGSC);
  358. writel(val32 | OTGSC_1MSE, the_transceiver->regs + CI_OTGSC);
  359. }
  360. list_add_tail(&timer->list, &active_timers);
  361. }
  362. /* Remove timer from the timer list; clear timeout status */
  363. static void langwell_otg_del_timer(void *gtimer)
  364. {
  365. struct langwell_otg_timer *timer = (struct langwell_otg_timer *)gtimer;
  366. struct langwell_otg_timer *tmp_timer, *del_tmp;
  367. u32 val32;
  368. list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list)
  369. if (tmp_timer == timer)
  370. list_del(&timer->list);
  371. if (list_empty(&active_timers)) {
  372. val32 = readl(the_transceiver->regs + CI_OTGSC);
  373. writel(val32 & ~OTGSC_1MSE, the_transceiver->regs + CI_OTGSC);
  374. }
  375. }
  376. /* Reduce timer count by 1, and find timeout conditions.*/
  377. static int langwell_otg_tick_timer(u32 *int_sts)
  378. {
  379. struct langwell_otg_timer *tmp_timer, *del_tmp;
  380. int expired = 0;
  381. list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list) {
  382. tmp_timer->count--;
  383. /* check if timer expires */
  384. if (!tmp_timer->count) {
  385. list_del(&tmp_timer->list);
  386. tmp_timer->function(tmp_timer->data);
  387. expired = 1;
  388. }
  389. }
  390. if (list_empty(&active_timers)) {
  391. otg_dbg("tick timer: disable 1ms int\n");
  392. *int_sts = *int_sts & ~OTGSC_1MSE;
  393. }
  394. return expired;
  395. }
  396. static void reset_otg(void)
  397. {
  398. u32 val;
  399. int delay_time = 1000;
  400. otg_dbg("reseting OTG controller ...\n");
  401. val = readl(the_transceiver->regs + CI_USBCMD);
  402. writel(val | USBCMD_RST, the_transceiver->regs + CI_USBCMD);
  403. do {
  404. udelay(100);
  405. if (!delay_time--)
  406. otg_dbg("reset timeout\n");
  407. val = readl(the_transceiver->regs + CI_USBCMD);
  408. val &= USBCMD_RST;
  409. } while (val != 0);
  410. otg_dbg("reset done.\n");
  411. }
  412. static void set_host_mode(void)
  413. {
  414. u32 val;
  415. reset_otg();
  416. val = readl(the_transceiver->regs + CI_USBMODE);
  417. val = (val & (~USBMODE_CM)) | USBMODE_HOST;
  418. writel(val, the_transceiver->regs + CI_USBMODE);
  419. }
  420. static void set_client_mode(void)
  421. {
  422. u32 val;
  423. reset_otg();
  424. val = readl(the_transceiver->regs + CI_USBMODE);
  425. val = (val & (~USBMODE_CM)) | USBMODE_DEVICE;
  426. writel(val, the_transceiver->regs + CI_USBMODE);
  427. }
  428. static void init_hsm(void)
  429. {
  430. struct langwell_otg *langwell = the_transceiver;
  431. u32 val32;
  432. /* read OTGSC after reset */
  433. val32 = readl(langwell->regs + CI_OTGSC);
  434. otg_dbg("%s: OTGSC init value = 0x%x\n", __func__, val32);
  435. /* set init state */
  436. if (val32 & OTGSC_ID) {
  437. langwell->hsm.id = 1;
  438. langwell->otg.default_a = 0;
  439. set_client_mode();
  440. langwell->otg.state = OTG_STATE_B_IDLE;
  441. langwell_otg_drv_vbus(0);
  442. } else {
  443. langwell->hsm.id = 0;
  444. langwell->otg.default_a = 1;
  445. set_host_mode();
  446. langwell->otg.state = OTG_STATE_A_IDLE;
  447. }
  448. /* set session indicator */
  449. if (val32 & OTGSC_BSE)
  450. langwell->hsm.b_sess_end = 1;
  451. if (val32 & OTGSC_BSV)
  452. langwell->hsm.b_sess_vld = 1;
  453. if (val32 & OTGSC_ASV)
  454. langwell->hsm.a_sess_vld = 1;
  455. if (val32 & OTGSC_AVV)
  456. langwell->hsm.a_vbus_vld = 1;
  457. /* defautly power the bus */
  458. langwell->hsm.a_bus_req = 1;
  459. langwell->hsm.a_bus_drop = 0;
  460. /* defautly don't request bus as B device */
  461. langwell->hsm.b_bus_req = 0;
  462. /* no system error */
  463. langwell->hsm.a_clr_err = 0;
  464. }
  465. static irqreturn_t otg_dummy_irq(int irq, void *_dev)
  466. {
  467. void __iomem *reg_base = _dev;
  468. u32 val;
  469. u32 int_mask = 0;
  470. val = readl(reg_base + CI_USBMODE);
  471. if ((val & USBMODE_CM) != USBMODE_DEVICE)
  472. return IRQ_NONE;
  473. val = readl(reg_base + CI_USBSTS);
  474. int_mask = val & INTR_DUMMY_MASK;
  475. if (int_mask == 0)
  476. return IRQ_NONE;
  477. /* clear hsm.b_conn here since host driver can't detect it
  478. * otg_dummy_irq called means B-disconnect happened.
  479. */
  480. if (the_transceiver->hsm.b_conn) {
  481. the_transceiver->hsm.b_conn = 0;
  482. if (spin_trylock(&the_transceiver->wq_lock)) {
  483. queue_work(the_transceiver->qwork,
  484. &the_transceiver->work);
  485. spin_unlock(&the_transceiver->wq_lock);
  486. }
  487. }
  488. /* Clear interrupts */
  489. writel(int_mask, reg_base + CI_USBSTS);
  490. return IRQ_HANDLED;
  491. }
  492. static irqreturn_t otg_irq(int irq, void *_dev)
  493. {
  494. struct langwell_otg *langwell = _dev;
  495. u32 int_sts, int_en;
  496. u32 int_mask = 0;
  497. int flag = 0;
  498. int_sts = readl(langwell->regs + CI_OTGSC);
  499. int_en = (int_sts & OTGSC_INTEN_MASK) >> 8;
  500. int_mask = int_sts & int_en;
  501. if (int_mask == 0)
  502. return IRQ_NONE;
  503. if (int_mask & OTGSC_IDIS) {
  504. otg_dbg("%s: id change int\n", __func__);
  505. langwell->hsm.id = (int_sts & OTGSC_ID) ? 1 : 0;
  506. flag = 1;
  507. }
  508. if (int_mask & OTGSC_DPIS) {
  509. otg_dbg("%s: data pulse int\n", __func__);
  510. langwell->hsm.a_srp_det = (int_sts & OTGSC_DPS) ? 1 : 0;
  511. flag = 1;
  512. }
  513. if (int_mask & OTGSC_BSEIS) {
  514. otg_dbg("%s: b session end int\n", __func__);
  515. langwell->hsm.b_sess_end = (int_sts & OTGSC_BSE) ? 1 : 0;
  516. flag = 1;
  517. }
  518. if (int_mask & OTGSC_BSVIS) {
  519. otg_dbg("%s: b session valid int\n", __func__);
  520. langwell->hsm.b_sess_vld = (int_sts & OTGSC_BSV) ? 1 : 0;
  521. flag = 1;
  522. }
  523. if (int_mask & OTGSC_ASVIS) {
  524. otg_dbg("%s: a session valid int\n", __func__);
  525. langwell->hsm.a_sess_vld = (int_sts & OTGSC_ASV) ? 1 : 0;
  526. flag = 1;
  527. }
  528. if (int_mask & OTGSC_AVVIS) {
  529. otg_dbg("%s: a vbus valid int\n", __func__);
  530. langwell->hsm.a_vbus_vld = (int_sts & OTGSC_AVV) ? 1 : 0;
  531. flag = 1;
  532. }
  533. if (int_mask & OTGSC_1MSS) {
  534. /* need to schedule otg_work if any timer is expired */
  535. if (langwell_otg_tick_timer(&int_sts))
  536. flag = 1;
  537. }
  538. writel((int_sts & ~OTGSC_INTSTS_MASK) | int_mask,
  539. langwell->regs + CI_OTGSC);
  540. if (flag)
  541. queue_work(langwell->qwork, &langwell->work);
  542. return IRQ_HANDLED;
  543. }
  544. static void langwell_otg_work(struct work_struct *work)
  545. {
  546. struct langwell_otg *langwell = container_of(work,
  547. struct langwell_otg, work);
  548. int retval;
  549. otg_dbg("%s: old state = %s\n", __func__,
  550. state_string(langwell->otg.state));
  551. switch (langwell->otg.state) {
  552. case OTG_STATE_UNDEFINED:
  553. case OTG_STATE_B_IDLE:
  554. if (!langwell->hsm.id) {
  555. langwell_otg_del_timer(b_srp_res_tmr);
  556. langwell->otg.default_a = 1;
  557. langwell->hsm.a_srp_det = 0;
  558. langwell_otg_chrg_vbus(0);
  559. langwell_otg_drv_vbus(0);
  560. set_host_mode();
  561. langwell->otg.state = OTG_STATE_A_IDLE;
  562. queue_work(langwell->qwork, &langwell->work);
  563. } else if (langwell->hsm.b_srp_res_tmout) {
  564. langwell->hsm.b_srp_res_tmout = 0;
  565. langwell->hsm.b_bus_req = 0;
  566. langwell_otg_nsf_msg(6);
  567. } else if (langwell->hsm.b_sess_vld) {
  568. langwell_otg_del_timer(b_srp_res_tmr);
  569. langwell->hsm.b_sess_end = 0;
  570. langwell->hsm.a_bus_suspend = 0;
  571. langwell_otg_chrg_vbus(0);
  572. if (langwell->client_ops) {
  573. langwell->client_ops->resume(langwell->pdev);
  574. langwell->otg.state = OTG_STATE_B_PERIPHERAL;
  575. } else
  576. otg_dbg("client driver not loaded.\n");
  577. } else if (langwell->hsm.b_bus_req &&
  578. (langwell->hsm.b_sess_end)) {
  579. /* workaround for b_se0_srp detection */
  580. retval = langwell_otg_check_se0_srp(0);
  581. if (retval) {
  582. langwell->hsm.b_bus_req = 0;
  583. otg_dbg("LS is not SE0, try again later\n");
  584. } else {
  585. /* Start SRP */
  586. langwell_otg_start_srp(&langwell->otg);
  587. langwell_otg_add_timer(b_srp_res_tmr);
  588. }
  589. }
  590. break;
  591. case OTG_STATE_B_SRP_INIT:
  592. if (!langwell->hsm.id) {
  593. langwell->otg.default_a = 1;
  594. langwell->hsm.a_srp_det = 0;
  595. langwell_otg_drv_vbus(0);
  596. langwell_otg_chrg_vbus(0);
  597. langwell->otg.state = OTG_STATE_A_IDLE;
  598. queue_work(langwell->qwork, &langwell->work);
  599. } else if (langwell->hsm.b_sess_vld) {
  600. langwell_otg_chrg_vbus(0);
  601. if (langwell->client_ops) {
  602. langwell->client_ops->resume(langwell->pdev);
  603. langwell->otg.state = OTG_STATE_B_PERIPHERAL;
  604. } else
  605. otg_dbg("client driver not loaded.\n");
  606. }
  607. break;
  608. case OTG_STATE_B_PERIPHERAL:
  609. if (!langwell->hsm.id) {
  610. langwell->otg.default_a = 1;
  611. langwell->hsm.a_srp_det = 0;
  612. langwell_otg_drv_vbus(0);
  613. langwell_otg_chrg_vbus(0);
  614. set_host_mode();
  615. if (langwell->client_ops) {
  616. langwell->client_ops->suspend(langwell->pdev,
  617. PMSG_FREEZE);
  618. } else
  619. otg_dbg("client driver has been removed.\n");
  620. langwell->otg.state = OTG_STATE_A_IDLE;
  621. queue_work(langwell->qwork, &langwell->work);
  622. } else if (!langwell->hsm.b_sess_vld) {
  623. langwell->hsm.b_hnp_enable = 0;
  624. if (langwell->client_ops) {
  625. langwell->client_ops->suspend(langwell->pdev,
  626. PMSG_FREEZE);
  627. } else
  628. otg_dbg("client driver has been removed.\n");
  629. langwell->otg.state = OTG_STATE_B_IDLE;
  630. } else if (langwell->hsm.b_bus_req && langwell->hsm.b_hnp_enable
  631. && langwell->hsm.a_bus_suspend) {
  632. if (langwell->client_ops) {
  633. langwell->client_ops->suspend(langwell->pdev,
  634. PMSG_FREEZE);
  635. } else
  636. otg_dbg("client driver has been removed.\n");
  637. langwell_otg_HAAR(1);
  638. langwell->hsm.a_conn = 0;
  639. if (langwell->host_ops) {
  640. langwell->host_ops->probe(langwell->pdev,
  641. langwell->host_ops->id_table);
  642. langwell->otg.state = OTG_STATE_B_WAIT_ACON;
  643. } else
  644. otg_dbg("host driver not loaded.\n");
  645. langwell->hsm.a_bus_resume = 0;
  646. langwell->hsm.b_ase0_brst_tmout = 0;
  647. langwell_otg_add_timer(b_ase0_brst_tmr);
  648. }
  649. break;
  650. case OTG_STATE_B_WAIT_ACON:
  651. if (!langwell->hsm.id) {
  652. langwell_otg_del_timer(b_ase0_brst_tmr);
  653. langwell->otg.default_a = 1;
  654. langwell->hsm.a_srp_det = 0;
  655. langwell_otg_drv_vbus(0);
  656. langwell_otg_chrg_vbus(0);
  657. set_host_mode();
  658. langwell_otg_HAAR(0);
  659. if (langwell->host_ops)
  660. langwell->host_ops->remove(langwell->pdev);
  661. else
  662. otg_dbg("host driver has been removed.\n");
  663. langwell->otg.state = OTG_STATE_A_IDLE;
  664. queue_work(langwell->qwork, &langwell->work);
  665. } else if (!langwell->hsm.b_sess_vld) {
  666. langwell_otg_del_timer(b_ase0_brst_tmr);
  667. langwell->hsm.b_hnp_enable = 0;
  668. langwell->hsm.b_bus_req = 0;
  669. langwell_otg_chrg_vbus(0);
  670. langwell_otg_HAAR(0);
  671. if (langwell->host_ops)
  672. langwell->host_ops->remove(langwell->pdev);
  673. else
  674. otg_dbg("host driver has been removed.\n");
  675. langwell->otg.state = OTG_STATE_B_IDLE;
  676. } else if (langwell->hsm.a_conn) {
  677. langwell_otg_del_timer(b_ase0_brst_tmr);
  678. langwell_otg_HAAR(0);
  679. langwell->otg.state = OTG_STATE_B_HOST;
  680. queue_work(langwell->qwork, &langwell->work);
  681. } else if (langwell->hsm.a_bus_resume ||
  682. langwell->hsm.b_ase0_brst_tmout) {
  683. langwell_otg_del_timer(b_ase0_brst_tmr);
  684. langwell_otg_HAAR(0);
  685. langwell_otg_nsf_msg(7);
  686. if (langwell->host_ops)
  687. langwell->host_ops->remove(langwell->pdev);
  688. else
  689. otg_dbg("host driver has been removed.\n");
  690. langwell->hsm.a_bus_suspend = 0;
  691. langwell->hsm.b_bus_req = 0;
  692. if (langwell->client_ops)
  693. langwell->client_ops->resume(langwell->pdev);
  694. else
  695. otg_dbg("client driver not loaded.\n");
  696. langwell->otg.state = OTG_STATE_B_PERIPHERAL;
  697. }
  698. break;
  699. case OTG_STATE_B_HOST:
  700. if (!langwell->hsm.id) {
  701. langwell->otg.default_a = 1;
  702. langwell->hsm.a_srp_det = 0;
  703. langwell_otg_drv_vbus(0);
  704. langwell_otg_chrg_vbus(0);
  705. set_host_mode();
  706. if (langwell->host_ops)
  707. langwell->host_ops->remove(langwell->pdev);
  708. else
  709. otg_dbg("host driver has been removed.\n");
  710. langwell->otg.state = OTG_STATE_A_IDLE;
  711. queue_work(langwell->qwork, &langwell->work);
  712. } else if (!langwell->hsm.b_sess_vld) {
  713. langwell->hsm.b_hnp_enable = 0;
  714. langwell->hsm.b_bus_req = 0;
  715. langwell_otg_chrg_vbus(0);
  716. if (langwell->host_ops)
  717. langwell->host_ops->remove(langwell->pdev);
  718. else
  719. otg_dbg("host driver has been removed.\n");
  720. langwell->otg.state = OTG_STATE_B_IDLE;
  721. } else if ((!langwell->hsm.b_bus_req) ||
  722. (!langwell->hsm.a_conn)) {
  723. langwell->hsm.b_bus_req = 0;
  724. langwell_otg_loc_sof(0);
  725. if (langwell->host_ops)
  726. langwell->host_ops->remove(langwell->pdev);
  727. else
  728. otg_dbg("host driver has been removed.\n");
  729. langwell->hsm.a_bus_suspend = 0;
  730. if (langwell->client_ops)
  731. langwell->client_ops->resume(langwell->pdev);
  732. else
  733. otg_dbg("client driver not loaded.\n");
  734. langwell->otg.state = OTG_STATE_B_PERIPHERAL;
  735. }
  736. break;
  737. case OTG_STATE_A_IDLE:
  738. langwell->otg.default_a = 1;
  739. if (langwell->hsm.id) {
  740. langwell->otg.default_a = 0;
  741. langwell->hsm.b_bus_req = 0;
  742. langwell_otg_drv_vbus(0);
  743. langwell_otg_chrg_vbus(0);
  744. langwell->otg.state = OTG_STATE_B_IDLE;
  745. queue_work(langwell->qwork, &langwell->work);
  746. } else if (langwell->hsm.a_sess_vld) {
  747. langwell_otg_drv_vbus(1);
  748. langwell->hsm.a_srp_det = 1;
  749. langwell->hsm.a_wait_vrise_tmout = 0;
  750. langwell_otg_add_timer(a_wait_vrise_tmr);
  751. langwell->otg.state = OTG_STATE_A_WAIT_VRISE;
  752. queue_work(langwell->qwork, &langwell->work);
  753. } else if (!langwell->hsm.a_bus_drop &&
  754. (langwell->hsm.a_srp_det || langwell->hsm.a_bus_req)) {
  755. langwell_otg_drv_vbus(1);
  756. langwell->hsm.a_wait_vrise_tmout = 0;
  757. langwell_otg_add_timer(a_wait_vrise_tmr);
  758. langwell->otg.state = OTG_STATE_A_WAIT_VRISE;
  759. queue_work(langwell->qwork, &langwell->work);
  760. }
  761. break;
  762. case OTG_STATE_A_WAIT_VRISE:
  763. if (langwell->hsm.id) {
  764. langwell_otg_del_timer(a_wait_vrise_tmr);
  765. langwell->hsm.b_bus_req = 0;
  766. langwell->otg.default_a = 0;
  767. langwell_otg_drv_vbus(0);
  768. langwell->otg.state = OTG_STATE_B_IDLE;
  769. } else if (langwell->hsm.a_vbus_vld) {
  770. langwell_otg_del_timer(a_wait_vrise_tmr);
  771. if (langwell->host_ops)
  772. langwell->host_ops->probe(langwell->pdev,
  773. langwell->host_ops->id_table);
  774. else
  775. otg_dbg("host driver not loaded.\n");
  776. langwell->hsm.b_conn = 0;
  777. langwell->hsm.a_set_b_hnp_en = 0;
  778. langwell->hsm.a_wait_bcon_tmout = 0;
  779. langwell_otg_add_timer(a_wait_bcon_tmr);
  780. langwell->otg.state = OTG_STATE_A_WAIT_BCON;
  781. } else if (langwell->hsm.a_wait_vrise_tmout) {
  782. if (langwell->hsm.a_vbus_vld) {
  783. if (langwell->host_ops)
  784. langwell->host_ops->probe(
  785. langwell->pdev,
  786. langwell->host_ops->id_table);
  787. else
  788. otg_dbg("host driver not loaded.\n");
  789. langwell->hsm.b_conn = 0;
  790. langwell->hsm.a_set_b_hnp_en = 0;
  791. langwell->hsm.a_wait_bcon_tmout = 0;
  792. langwell_otg_add_timer(a_wait_bcon_tmr);
  793. langwell->otg.state = OTG_STATE_A_WAIT_BCON;
  794. } else {
  795. langwell_otg_drv_vbus(0);
  796. langwell->otg.state = OTG_STATE_A_VBUS_ERR;
  797. }
  798. }
  799. break;
  800. case OTG_STATE_A_WAIT_BCON:
  801. if (langwell->hsm.id) {
  802. langwell_otg_del_timer(a_wait_bcon_tmr);
  803. langwell->otg.default_a = 0;
  804. langwell->hsm.b_bus_req = 0;
  805. if (langwell->host_ops)
  806. langwell->host_ops->remove(langwell->pdev);
  807. else
  808. otg_dbg("host driver has been removed.\n");
  809. langwell_otg_drv_vbus(0);
  810. langwell->otg.state = OTG_STATE_B_IDLE;
  811. queue_work(langwell->qwork, &langwell->work);
  812. } else if (!langwell->hsm.a_vbus_vld) {
  813. langwell_otg_del_timer(a_wait_bcon_tmr);
  814. if (langwell->host_ops)
  815. langwell->host_ops->remove(langwell->pdev);
  816. else
  817. otg_dbg("host driver has been removed.\n");
  818. langwell_otg_drv_vbus(0);
  819. langwell->otg.state = OTG_STATE_A_VBUS_ERR;
  820. } else if (langwell->hsm.a_bus_drop ||
  821. (langwell->hsm.a_wait_bcon_tmout &&
  822. !langwell->hsm.a_bus_req)) {
  823. langwell_otg_del_timer(a_wait_bcon_tmr);
  824. if (langwell->host_ops)
  825. langwell->host_ops->remove(langwell->pdev);
  826. else
  827. otg_dbg("host driver has been removed.\n");
  828. langwell_otg_drv_vbus(0);
  829. langwell->otg.state = OTG_STATE_A_WAIT_VFALL;
  830. } else if (langwell->hsm.b_conn) {
  831. langwell_otg_del_timer(a_wait_bcon_tmr);
  832. langwell->hsm.a_suspend_req = 0;
  833. langwell->otg.state = OTG_STATE_A_HOST;
  834. if (!langwell->hsm.a_bus_req &&
  835. langwell->hsm.a_set_b_hnp_en) {
  836. /* It is not safe enough to do a fast
  837. * transistion from A_WAIT_BCON to
  838. * A_SUSPEND */
  839. msleep(10000);
  840. if (langwell->hsm.a_bus_req)
  841. break;
  842. if (request_irq(langwell->pdev->irq,
  843. otg_dummy_irq, IRQF_SHARED,
  844. driver_name, langwell->regs) != 0) {
  845. otg_dbg("request interrupt %d fail\n",
  846. langwell->pdev->irq);
  847. }
  848. langwell_otg_HABA(1);
  849. langwell->hsm.b_bus_resume = 0;
  850. langwell->hsm.a_aidl_bdis_tmout = 0;
  851. langwell_otg_add_timer(a_aidl_bdis_tmr);
  852. langwell_otg_loc_sof(0);
  853. langwell->otg.state = OTG_STATE_A_SUSPEND;
  854. } else if (!langwell->hsm.a_bus_req &&
  855. !langwell->hsm.a_set_b_hnp_en) {
  856. struct pci_dev *pdev = langwell->pdev;
  857. if (langwell->host_ops)
  858. langwell->host_ops->remove(pdev);
  859. else
  860. otg_dbg("host driver removed.\n");
  861. langwell_otg_drv_vbus(0);
  862. langwell->otg.state = OTG_STATE_A_WAIT_VFALL;
  863. }
  864. }
  865. break;
  866. case OTG_STATE_A_HOST:
  867. if (langwell->hsm.id) {
  868. langwell->otg.default_a = 0;
  869. langwell->hsm.b_bus_req = 0;
  870. if (langwell->host_ops)
  871. langwell->host_ops->remove(langwell->pdev);
  872. else
  873. otg_dbg("host driver has been removed.\n");
  874. langwell_otg_drv_vbus(0);
  875. langwell->otg.state = OTG_STATE_B_IDLE;
  876. queue_work(langwell->qwork, &langwell->work);
  877. } else if (langwell->hsm.a_bus_drop ||
  878. (!langwell->hsm.a_set_b_hnp_en && !langwell->hsm.a_bus_req)) {
  879. if (langwell->host_ops)
  880. langwell->host_ops->remove(langwell->pdev);
  881. else
  882. otg_dbg("host driver has been removed.\n");
  883. langwell_otg_drv_vbus(0);
  884. langwell->otg.state = OTG_STATE_A_WAIT_VFALL;
  885. } else if (!langwell->hsm.a_vbus_vld) {
  886. if (langwell->host_ops)
  887. langwell->host_ops->remove(langwell->pdev);
  888. else
  889. otg_dbg("host driver has been removed.\n");
  890. langwell_otg_drv_vbus(0);
  891. langwell->otg.state = OTG_STATE_A_VBUS_ERR;
  892. } else if (langwell->hsm.a_set_b_hnp_en
  893. && !langwell->hsm.a_bus_req) {
  894. /* Set HABA to enable hardware assistance to signal
  895. * A-connect after receiver B-disconnect. Hardware
  896. * will then set client mode and enable URE, SLE and
  897. * PCE after the assistance. otg_dummy_irq is used to
  898. * clean these ints when client driver is not resumed.
  899. */
  900. if (request_irq(langwell->pdev->irq,
  901. otg_dummy_irq, IRQF_SHARED, driver_name,
  902. langwell->regs) != 0) {
  903. otg_dbg("request interrupt %d failed\n",
  904. langwell->pdev->irq);
  905. }
  906. /* set HABA */
  907. langwell_otg_HABA(1);
  908. langwell->hsm.b_bus_resume = 0;
  909. langwell->hsm.a_aidl_bdis_tmout = 0;
  910. langwell_otg_add_timer(a_aidl_bdis_tmr);
  911. langwell_otg_loc_sof(0);
  912. langwell->otg.state = OTG_STATE_A_SUSPEND;
  913. } else if (!langwell->hsm.b_conn || !langwell->hsm.a_bus_req) {
  914. langwell->hsm.a_wait_bcon_tmout = 0;
  915. langwell->hsm.a_set_b_hnp_en = 0;
  916. langwell_otg_add_timer(a_wait_bcon_tmr);
  917. langwell->otg.state = OTG_STATE_A_WAIT_BCON;
  918. }
  919. break;
  920. case OTG_STATE_A_SUSPEND:
  921. if (langwell->hsm.id) {
  922. langwell_otg_del_timer(a_aidl_bdis_tmr);
  923. langwell_otg_HABA(0);
  924. free_irq(langwell->pdev->irq, langwell->regs);
  925. langwell->otg.default_a = 0;
  926. langwell->hsm.b_bus_req = 0;
  927. if (langwell->host_ops)
  928. langwell->host_ops->remove(langwell->pdev);
  929. else
  930. otg_dbg("host driver has been removed.\n");
  931. langwell_otg_drv_vbus(0);
  932. langwell->otg.state = OTG_STATE_B_IDLE;
  933. queue_work(langwell->qwork, &langwell->work);
  934. } else if (langwell->hsm.a_bus_req ||
  935. langwell->hsm.b_bus_resume) {
  936. langwell_otg_del_timer(a_aidl_bdis_tmr);
  937. langwell_otg_HABA(0);
  938. free_irq(langwell->pdev->irq, langwell->regs);
  939. langwell->hsm.a_suspend_req = 0;
  940. langwell_otg_loc_sof(1);
  941. langwell->otg.state = OTG_STATE_A_HOST;
  942. } else if (langwell->hsm.a_aidl_bdis_tmout ||
  943. langwell->hsm.a_bus_drop) {
  944. langwell_otg_del_timer(a_aidl_bdis_tmr);
  945. langwell_otg_HABA(0);
  946. free_irq(langwell->pdev->irq, langwell->regs);
  947. if (langwell->host_ops)
  948. langwell->host_ops->remove(langwell->pdev);
  949. else
  950. otg_dbg("host driver has been removed.\n");
  951. langwell_otg_drv_vbus(0);
  952. langwell->otg.state = OTG_STATE_A_WAIT_VFALL;
  953. } else if (!langwell->hsm.b_conn &&
  954. langwell->hsm.a_set_b_hnp_en) {
  955. langwell_otg_del_timer(a_aidl_bdis_tmr);
  956. langwell_otg_HABA(0);
  957. free_irq(langwell->pdev->irq, langwell->regs);
  958. if (langwell->host_ops)
  959. langwell->host_ops->remove(langwell->pdev);
  960. else
  961. otg_dbg("host driver has been removed.\n");
  962. langwell->hsm.b_bus_suspend = 0;
  963. langwell->hsm.b_bus_suspend_vld = 0;
  964. langwell->hsm.b_bus_suspend_tmout = 0;
  965. /* msleep(200); */
  966. if (langwell->client_ops)
  967. langwell->client_ops->resume(langwell->pdev);
  968. else
  969. otg_dbg("client driver not loaded.\n");
  970. langwell_otg_add_timer(b_bus_suspend_tmr);
  971. langwell->otg.state = OTG_STATE_A_PERIPHERAL;
  972. break;
  973. } else if (!langwell->hsm.a_vbus_vld) {
  974. langwell_otg_del_timer(a_aidl_bdis_tmr);
  975. langwell_otg_HABA(0);
  976. free_irq(langwell->pdev->irq, langwell->regs);
  977. if (langwell->host_ops)
  978. langwell->host_ops->remove(langwell->pdev);
  979. else
  980. otg_dbg("host driver has been removed.\n");
  981. langwell_otg_drv_vbus(0);
  982. langwell->otg.state = OTG_STATE_A_VBUS_ERR;
  983. }
  984. break;
  985. case OTG_STATE_A_PERIPHERAL:
  986. if (langwell->hsm.id) {
  987. langwell_otg_del_timer(b_bus_suspend_tmr);
  988. langwell->otg.default_a = 0;
  989. langwell->hsm.b_bus_req = 0;
  990. if (langwell->client_ops)
  991. langwell->client_ops->suspend(langwell->pdev,
  992. PMSG_FREEZE);
  993. else
  994. otg_dbg("client driver has been removed.\n");
  995. langwell_otg_drv_vbus(0);
  996. langwell->otg.state = OTG_STATE_B_IDLE;
  997. queue_work(langwell->qwork, &langwell->work);
  998. } else if (!langwell->hsm.a_vbus_vld) {
  999. langwell_otg_del_timer(b_bus_suspend_tmr);
  1000. if (langwell->client_ops)
  1001. langwell->client_ops->suspend(langwell->pdev,
  1002. PMSG_FREEZE);
  1003. else
  1004. otg_dbg("client driver has been removed.\n");
  1005. langwell_otg_drv_vbus(0);
  1006. langwell->otg.state = OTG_STATE_A_VBUS_ERR;
  1007. } else if (langwell->hsm.a_bus_drop) {
  1008. langwell_otg_del_timer(b_bus_suspend_tmr);
  1009. if (langwell->client_ops)
  1010. langwell->client_ops->suspend(langwell->pdev,
  1011. PMSG_FREEZE);
  1012. else
  1013. otg_dbg("client driver has been removed.\n");
  1014. langwell_otg_drv_vbus(0);
  1015. langwell->otg.state = OTG_STATE_A_WAIT_VFALL;
  1016. } else if (langwell->hsm.b_bus_suspend) {
  1017. langwell_otg_del_timer(b_bus_suspend_tmr);
  1018. if (langwell->client_ops)
  1019. langwell->client_ops->suspend(langwell->pdev,
  1020. PMSG_FREEZE);
  1021. else
  1022. otg_dbg("client driver has been removed.\n");
  1023. if (langwell->host_ops)
  1024. langwell->host_ops->probe(langwell->pdev,
  1025. langwell->host_ops->id_table);
  1026. else
  1027. otg_dbg("host driver not loaded.\n");
  1028. langwell->hsm.a_set_b_hnp_en = 0;
  1029. langwell->hsm.a_wait_bcon_tmout = 0;
  1030. langwell_otg_add_timer(a_wait_bcon_tmr);
  1031. langwell->otg.state = OTG_STATE_A_WAIT_BCON;
  1032. } else if (langwell->hsm.b_bus_suspend_tmout) {
  1033. u32 val;
  1034. val = readl(langwell->regs + CI_PORTSC1);
  1035. if (!(val & PORTSC_SUSP))
  1036. break;
  1037. if (langwell->client_ops)
  1038. langwell->client_ops->suspend(langwell->pdev,
  1039. PMSG_FREEZE);
  1040. else
  1041. otg_dbg("client driver has been removed.\n");
  1042. if (langwell->host_ops)
  1043. langwell->host_ops->probe(langwell->pdev,
  1044. langwell->host_ops->id_table);
  1045. else
  1046. otg_dbg("host driver not loaded.\n");
  1047. langwell->hsm.a_set_b_hnp_en = 0;
  1048. langwell->hsm.a_wait_bcon_tmout = 0;
  1049. langwell_otg_add_timer(a_wait_bcon_tmr);
  1050. langwell->otg.state = OTG_STATE_A_WAIT_BCON;
  1051. }
  1052. break;
  1053. case OTG_STATE_A_VBUS_ERR:
  1054. if (langwell->hsm.id) {
  1055. langwell->otg.default_a = 0;
  1056. langwell->hsm.a_clr_err = 0;
  1057. langwell->hsm.a_srp_det = 0;
  1058. langwell->otg.state = OTG_STATE_B_IDLE;
  1059. queue_work(langwell->qwork, &langwell->work);
  1060. } else if (langwell->hsm.a_clr_err) {
  1061. langwell->hsm.a_clr_err = 0;
  1062. langwell->hsm.a_srp_det = 0;
  1063. reset_otg();
  1064. init_hsm();
  1065. if (langwell->otg.state == OTG_STATE_A_IDLE)
  1066. queue_work(langwell->qwork, &langwell->work);
  1067. }
  1068. break;
  1069. case OTG_STATE_A_WAIT_VFALL:
  1070. if (langwell->hsm.id) {
  1071. langwell->otg.default_a = 0;
  1072. langwell->otg.state = OTG_STATE_B_IDLE;
  1073. queue_work(langwell->qwork, &langwell->work);
  1074. } else if (langwell->hsm.a_bus_req) {
  1075. langwell_otg_drv_vbus(1);
  1076. langwell->hsm.a_wait_vrise_tmout = 0;
  1077. langwell_otg_add_timer(a_wait_vrise_tmr);
  1078. langwell->otg.state = OTG_STATE_A_WAIT_VRISE;
  1079. } else if (!langwell->hsm.a_sess_vld) {
  1080. langwell->hsm.a_srp_det = 0;
  1081. langwell_otg_drv_vbus(0);
  1082. set_host_mode();
  1083. langwell->otg.state = OTG_STATE_A_IDLE;
  1084. }
  1085. break;
  1086. default:
  1087. ;
  1088. }
  1089. otg_dbg("%s: new state = %s\n", __func__,
  1090. state_string(langwell->otg.state));
  1091. }
  1092. static ssize_t
  1093. show_registers(struct device *_dev, struct device_attribute *attr, char *buf)
  1094. {
  1095. struct langwell_otg *langwell;
  1096. char *next;
  1097. unsigned size;
  1098. unsigned t;
  1099. langwell = the_transceiver;
  1100. next = buf;
  1101. size = PAGE_SIZE;
  1102. t = scnprintf(next, size,
  1103. "\n"
  1104. "USBCMD = 0x%08x \n"
  1105. "USBSTS = 0x%08x \n"
  1106. "USBINTR = 0x%08x \n"
  1107. "ASYNCLISTADDR = 0x%08x \n"
  1108. "PORTSC1 = 0x%08x \n"
  1109. "HOSTPC1 = 0x%08x \n"
  1110. "OTGSC = 0x%08x \n"
  1111. "USBMODE = 0x%08x \n",
  1112. readl(langwell->regs + 0x30),
  1113. readl(langwell->regs + 0x34),
  1114. readl(langwell->regs + 0x38),
  1115. readl(langwell->regs + 0x48),
  1116. readl(langwell->regs + 0x74),
  1117. readl(langwell->regs + 0xb4),
  1118. readl(langwell->regs + 0xf4),
  1119. readl(langwell->regs + 0xf8)
  1120. );
  1121. size -= t;
  1122. next += t;
  1123. return PAGE_SIZE - size;
  1124. }
  1125. static DEVICE_ATTR(registers, S_IRUGO, show_registers, NULL);
  1126. static ssize_t
  1127. show_hsm(struct device *_dev, struct device_attribute *attr, char *buf)
  1128. {
  1129. struct langwell_otg *langwell;
  1130. char *next;
  1131. unsigned size;
  1132. unsigned t;
  1133. langwell = the_transceiver;
  1134. next = buf;
  1135. size = PAGE_SIZE;
  1136. t = scnprintf(next, size,
  1137. "\n"
  1138. "current state = %s\n"
  1139. "a_bus_resume = \t%d\n"
  1140. "a_bus_suspend = \t%d\n"
  1141. "a_conn = \t%d\n"
  1142. "a_sess_vld = \t%d\n"
  1143. "a_srp_det = \t%d\n"
  1144. "a_vbus_vld = \t%d\n"
  1145. "b_bus_resume = \t%d\n"
  1146. "b_bus_suspend = \t%d\n"
  1147. "b_conn = \t%d\n"
  1148. "b_se0_srp = \t%d\n"
  1149. "b_sess_end = \t%d\n"
  1150. "b_sess_vld = \t%d\n"
  1151. "id = \t%d\n"
  1152. "a_set_b_hnp_en = \t%d\n"
  1153. "b_srp_done = \t%d\n"
  1154. "b_hnp_enable = \t%d\n"
  1155. "a_wait_vrise_tmout = \t%d\n"
  1156. "a_wait_bcon_tmout = \t%d\n"
  1157. "a_aidl_bdis_tmout = \t%d\n"
  1158. "b_ase0_brst_tmout = \t%d\n"
  1159. "a_bus_drop = \t%d\n"
  1160. "a_bus_req = \t%d\n"
  1161. "a_clr_err = \t%d\n"
  1162. "a_suspend_req = \t%d\n"
  1163. "b_bus_req = \t%d\n"
  1164. "b_bus_suspend_tmout = \t%d\n"
  1165. "b_bus_suspend_vld = \t%d\n",
  1166. state_string(langwell->otg.state),
  1167. langwell->hsm.a_bus_resume,
  1168. langwell->hsm.a_bus_suspend,
  1169. langwell->hsm.a_conn,
  1170. langwell->hsm.a_sess_vld,
  1171. langwell->hsm.a_srp_det,
  1172. langwell->hsm.a_vbus_vld,
  1173. langwell->hsm.b_bus_resume,
  1174. langwell->hsm.b_bus_suspend,
  1175. langwell->hsm.b_conn,
  1176. langwell->hsm.b_se0_srp,
  1177. langwell->hsm.b_sess_end,
  1178. langwell->hsm.b_sess_vld,
  1179. langwell->hsm.id,
  1180. langwell->hsm.a_set_b_hnp_en,
  1181. langwell->hsm.b_srp_done,
  1182. langwell->hsm.b_hnp_enable,
  1183. langwell->hsm.a_wait_vrise_tmout,
  1184. langwell->hsm.a_wait_bcon_tmout,
  1185. langwell->hsm.a_aidl_bdis_tmout,
  1186. langwell->hsm.b_ase0_brst_tmout,
  1187. langwell->hsm.a_bus_drop,
  1188. langwell->hsm.a_bus_req,
  1189. langwell->hsm.a_clr_err,
  1190. langwell->hsm.a_suspend_req,
  1191. langwell->hsm.b_bus_req,
  1192. langwell->hsm.b_bus_suspend_tmout,
  1193. langwell->hsm.b_bus_suspend_vld
  1194. );
  1195. size -= t;
  1196. next += t;
  1197. return PAGE_SIZE - size;
  1198. }
  1199. static DEVICE_ATTR(hsm, S_IRUGO, show_hsm, NULL);
  1200. static ssize_t
  1201. get_a_bus_req(struct device *dev, struct device_attribute *attr, char *buf)
  1202. {
  1203. struct langwell_otg *langwell;
  1204. char *next;
  1205. unsigned size;
  1206. unsigned t;
  1207. langwell = the_transceiver;
  1208. next = buf;
  1209. size = PAGE_SIZE;
  1210. t = scnprintf(next, size, "%d", langwell->hsm.a_bus_req);
  1211. size -= t;
  1212. next += t;
  1213. return PAGE_SIZE - size;
  1214. }
  1215. static ssize_t
  1216. set_a_bus_req(struct device *dev, struct device_attribute *attr,
  1217. const char *buf, size_t count)
  1218. {
  1219. struct langwell_otg *langwell;
  1220. langwell = the_transceiver;
  1221. if (!langwell->otg.default_a)
  1222. return -1;
  1223. if (count > 2)
  1224. return -1;
  1225. if (buf[0] == '0') {
  1226. langwell->hsm.a_bus_req = 0;
  1227. otg_dbg("a_bus_req = 0\n");
  1228. } else if (buf[0] == '1') {
  1229. /* If a_bus_drop is TRUE, a_bus_req can't be set */
  1230. if (langwell->hsm.a_bus_drop)
  1231. return -1;
  1232. langwell->hsm.a_bus_req = 1;
  1233. otg_dbg("a_bus_req = 1\n");
  1234. }
  1235. if (spin_trylock(&langwell->wq_lock)) {
  1236. queue_work(langwell->qwork, &langwell->work);
  1237. spin_unlock(&langwell->wq_lock);
  1238. }
  1239. return count;
  1240. }
  1241. static DEVICE_ATTR(a_bus_req, S_IRUGO | S_IWUGO, get_a_bus_req, set_a_bus_req);
  1242. static ssize_t
  1243. get_a_bus_drop(struct device *dev, struct device_attribute *attr, char *buf)
  1244. {
  1245. struct langwell_otg *langwell;
  1246. char *next;
  1247. unsigned size;
  1248. unsigned t;
  1249. langwell = the_transceiver;
  1250. next = buf;
  1251. size = PAGE_SIZE;
  1252. t = scnprintf(next, size, "%d", langwell->hsm.a_bus_drop);
  1253. size -= t;
  1254. next += t;
  1255. return PAGE_SIZE - size;
  1256. }
  1257. static ssize_t
  1258. set_a_bus_drop(struct device *dev, struct device_attribute *attr,
  1259. const char *buf, size_t count)
  1260. {
  1261. struct langwell_otg *langwell;
  1262. langwell = the_transceiver;
  1263. if (!langwell->otg.default_a)
  1264. return -1;
  1265. if (count > 2)
  1266. return -1;
  1267. if (buf[0] == '0') {
  1268. langwell->hsm.a_bus_drop = 0;
  1269. otg_dbg("a_bus_drop = 0\n");
  1270. } else if (buf[0] == '1') {
  1271. langwell->hsm.a_bus_drop = 1;
  1272. langwell->hsm.a_bus_req = 0;
  1273. otg_dbg("a_bus_drop = 1, then a_bus_req = 0\n");
  1274. }
  1275. if (spin_trylock(&langwell->wq_lock)) {
  1276. queue_work(langwell->qwork, &langwell->work);
  1277. spin_unlock(&langwell->wq_lock);
  1278. }
  1279. return count;
  1280. }
  1281. static DEVICE_ATTR(a_bus_drop, S_IRUGO | S_IWUGO,
  1282. get_a_bus_drop, set_a_bus_drop);
  1283. static ssize_t
  1284. get_b_bus_req(struct device *dev, struct device_attribute *attr, char *buf)
  1285. {
  1286. struct langwell_otg *langwell;
  1287. char *next;
  1288. unsigned size;
  1289. unsigned t;
  1290. langwell = the_transceiver;
  1291. next = buf;
  1292. size = PAGE_SIZE;
  1293. t = scnprintf(next, size, "%d", langwell->hsm.b_bus_req);
  1294. size -= t;
  1295. next += t;
  1296. return PAGE_SIZE - size;
  1297. }
  1298. static ssize_t
  1299. set_b_bus_req(struct device *dev, struct device_attribute *attr,
  1300. const char *buf, size_t count)
  1301. {
  1302. struct langwell_otg *langwell;
  1303. langwell = the_transceiver;
  1304. if (langwell->otg.default_a)
  1305. return -1;
  1306. if (count > 2)
  1307. return -1;
  1308. if (buf[0] == '0') {
  1309. langwell->hsm.b_bus_req = 0;
  1310. otg_dbg("b_bus_req = 0\n");
  1311. } else if (buf[0] == '1') {
  1312. langwell->hsm.b_bus_req = 1;
  1313. otg_dbg("b_bus_req = 1\n");
  1314. }
  1315. if (spin_trylock(&langwell->wq_lock)) {
  1316. queue_work(langwell->qwork, &langwell->work);
  1317. spin_unlock(&langwell->wq_lock);
  1318. }
  1319. return count;
  1320. }
  1321. static DEVICE_ATTR(b_bus_req, S_IRUGO | S_IWUGO, get_b_bus_req, set_b_bus_req);
  1322. static ssize_t
  1323. set_a_clr_err(struct device *dev, struct device_attribute *attr,
  1324. const char *buf, size_t count)
  1325. {
  1326. struct langwell_otg *langwell;
  1327. langwell = the_transceiver;
  1328. if (!langwell->otg.default_a)
  1329. return -1;
  1330. if (count > 2)
  1331. return -1;
  1332. if (buf[0] == '1') {
  1333. langwell->hsm.a_clr_err = 1;
  1334. otg_dbg("a_clr_err = 1\n");
  1335. }
  1336. if (spin_trylock(&langwell->wq_lock)) {
  1337. queue_work(langwell->qwork, &langwell->work);
  1338. spin_unlock(&langwell->wq_lock);
  1339. }
  1340. return count;
  1341. }
  1342. static DEVICE_ATTR(a_clr_err, S_IWUGO, NULL, set_a_clr_err);
  1343. static struct attribute *inputs_attrs[] = {
  1344. &dev_attr_a_bus_req.attr,
  1345. &dev_attr_a_bus_drop.attr,
  1346. &dev_attr_b_bus_req.attr,
  1347. &dev_attr_a_clr_err.attr,
  1348. NULL,
  1349. };
  1350. static struct attribute_group debug_dev_attr_group = {
  1351. .name = "inputs",
  1352. .attrs = inputs_attrs,
  1353. };
  1354. int langwell_register_host(struct pci_driver *host_driver)
  1355. {
  1356. int ret = 0;
  1357. the_transceiver->host_ops = host_driver;
  1358. queue_work(the_transceiver->qwork, &the_transceiver->work);
  1359. otg_dbg("host controller driver is registered\n");
  1360. return ret;
  1361. }
  1362. EXPORT_SYMBOL(langwell_register_host);
  1363. void langwell_unregister_host(struct pci_driver *host_driver)
  1364. {
  1365. if (the_transceiver->host_ops)
  1366. the_transceiver->host_ops->remove(the_transceiver->pdev);
  1367. the_transceiver->host_ops = NULL;
  1368. the_transceiver->hsm.a_bus_drop = 1;
  1369. queue_work(the_transceiver->qwork, &the_transceiver->work);
  1370. otg_dbg("host controller driver is unregistered\n");
  1371. }
  1372. EXPORT_SYMBOL(langwell_unregister_host);
  1373. int langwell_register_peripheral(struct pci_driver *client_driver)
  1374. {
  1375. int ret = 0;
  1376. if (client_driver)
  1377. ret = client_driver->probe(the_transceiver->pdev,
  1378. client_driver->id_table);
  1379. if (!ret) {
  1380. the_transceiver->client_ops = client_driver;
  1381. queue_work(the_transceiver->qwork, &the_transceiver->work);
  1382. otg_dbg("client controller driver is registered\n");
  1383. }
  1384. return ret;
  1385. }
  1386. EXPORT_SYMBOL(langwell_register_peripheral);
  1387. void langwell_unregister_peripheral(struct pci_driver *client_driver)
  1388. {
  1389. if (the_transceiver->client_ops)
  1390. the_transceiver->client_ops->remove(the_transceiver->pdev);
  1391. the_transceiver->client_ops = NULL;
  1392. the_transceiver->hsm.b_bus_req = 0;
  1393. queue_work(the_transceiver->qwork, &the_transceiver->work);
  1394. otg_dbg("client controller driver is unregistered\n");
  1395. }
  1396. EXPORT_SYMBOL(langwell_unregister_peripheral);
  1397. static int langwell_otg_probe(struct pci_dev *pdev,
  1398. const struct pci_device_id *id)
  1399. {
  1400. unsigned long resource, len;
  1401. void __iomem *base = NULL;
  1402. int retval;
  1403. u32 val32;
  1404. struct langwell_otg *langwell;
  1405. char qname[] = "langwell_otg_queue";
  1406. retval = 0;
  1407. otg_dbg("\notg controller is detected.\n");
  1408. if (pci_enable_device(pdev) < 0) {
  1409. retval = -ENODEV;
  1410. goto done;
  1411. }
  1412. langwell = kzalloc(sizeof *langwell, GFP_KERNEL);
  1413. if (langwell == NULL) {
  1414. retval = -ENOMEM;
  1415. goto done;
  1416. }
  1417. the_transceiver = langwell;
  1418. /* control register: BAR 0 */
  1419. resource = pci_resource_start(pdev, 0);
  1420. len = pci_resource_len(pdev, 0);
  1421. if (!request_mem_region(resource, len, driver_name)) {
  1422. retval = -EBUSY;
  1423. goto err;
  1424. }
  1425. langwell->region = 1;
  1426. base = ioremap_nocache(resource, len);
  1427. if (base == NULL) {
  1428. retval = -EFAULT;
  1429. goto err;
  1430. }
  1431. langwell->regs = base;
  1432. if (!pdev->irq) {
  1433. otg_dbg("No IRQ.\n");
  1434. retval = -ENODEV;
  1435. goto err;
  1436. }
  1437. langwell->qwork = create_workqueue(qname);
  1438. if (!langwell->qwork) {
  1439. otg_dbg("cannot create workqueue %s\n", qname);
  1440. retval = -ENOMEM;
  1441. goto err;
  1442. }
  1443. INIT_WORK(&langwell->work, langwell_otg_work);
  1444. /* OTG common part */
  1445. langwell->pdev = pdev;
  1446. langwell->otg.dev = &pdev->dev;
  1447. langwell->otg.label = driver_name;
  1448. langwell->otg.set_host = langwell_otg_set_host;
  1449. langwell->otg.set_peripheral = langwell_otg_set_peripheral;
  1450. langwell->otg.set_power = langwell_otg_set_power;
  1451. langwell->otg.start_srp = langwell_otg_start_srp;
  1452. langwell->otg.state = OTG_STATE_UNDEFINED;
  1453. if (otg_set_transceiver(&langwell->otg)) {
  1454. otg_dbg("can't set transceiver\n");
  1455. retval = -EBUSY;
  1456. goto err;
  1457. }
  1458. reset_otg();
  1459. init_hsm();
  1460. spin_lock_init(&langwell->lock);
  1461. spin_lock_init(&langwell->wq_lock);
  1462. INIT_LIST_HEAD(&active_timers);
  1463. langwell_otg_init_timers(&langwell->hsm);
  1464. if (request_irq(pdev->irq, otg_irq, IRQF_SHARED,
  1465. driver_name, langwell) != 0) {
  1466. otg_dbg("request interrupt %d failed\n", pdev->irq);
  1467. retval = -EBUSY;
  1468. goto err;
  1469. }
  1470. /* enable OTGSC int */
  1471. val32 = OTGSC_DPIE | OTGSC_BSEIE | OTGSC_BSVIE |
  1472. OTGSC_ASVIE | OTGSC_AVVIE | OTGSC_IDIE | OTGSC_IDPU;
  1473. writel(val32, langwell->regs + CI_OTGSC);
  1474. retval = device_create_file(&pdev->dev, &dev_attr_registers);
  1475. if (retval < 0) {
  1476. otg_dbg("Can't register sysfs attribute: %d\n", retval);
  1477. goto err;
  1478. }
  1479. retval = device_create_file(&pdev->dev, &dev_attr_hsm);
  1480. if (retval < 0) {
  1481. otg_dbg("Can't hsm sysfs attribute: %d\n", retval);
  1482. goto err;
  1483. }
  1484. retval = sysfs_create_group(&pdev->dev.kobj, &debug_dev_attr_group);
  1485. if (retval < 0) {
  1486. otg_dbg("Can't register sysfs attr group: %d\n", retval);
  1487. goto err;
  1488. }
  1489. if (langwell->otg.state == OTG_STATE_A_IDLE)
  1490. queue_work(langwell->qwork, &langwell->work);
  1491. return 0;
  1492. err:
  1493. if (the_transceiver)
  1494. langwell_otg_remove(pdev);
  1495. done:
  1496. return retval;
  1497. }
  1498. static void langwell_otg_remove(struct pci_dev *pdev)
  1499. {
  1500. struct langwell_otg *langwell;
  1501. langwell = the_transceiver;
  1502. if (langwell->qwork) {
  1503. flush_workqueue(langwell->qwork);
  1504. destroy_workqueue(langwell->qwork);
  1505. }
  1506. langwell_otg_free_timers();
  1507. /* disable OTGSC interrupt as OTGSC doesn't change in reset */
  1508. writel(0, langwell->regs + CI_OTGSC);
  1509. if (pdev->irq)
  1510. free_irq(pdev->irq, langwell);
  1511. if (langwell->regs)
  1512. iounmap(langwell->regs);
  1513. if (langwell->region)
  1514. release_mem_region(pci_resource_start(pdev, 0),
  1515. pci_resource_len(pdev, 0));
  1516. otg_set_transceiver(NULL);
  1517. pci_disable_device(pdev);
  1518. sysfs_remove_group(&pdev->dev.kobj, &debug_dev_attr_group);
  1519. device_remove_file(&pdev->dev, &dev_attr_hsm);
  1520. device_remove_file(&pdev->dev, &dev_attr_registers);
  1521. kfree(langwell);
  1522. langwell = NULL;
  1523. }
  1524. static void transceiver_suspend(struct pci_dev *pdev)
  1525. {
  1526. pci_save_state(pdev);
  1527. pci_set_power_state(pdev, PCI_D3hot);
  1528. langwell_otg_phy_low_power(1);
  1529. }
  1530. static int langwell_otg_suspend(struct pci_dev *pdev, pm_message_t message)
  1531. {
  1532. int ret = 0;
  1533. struct langwell_otg *langwell;
  1534. langwell = the_transceiver;
  1535. /* Disbale OTG interrupts */
  1536. langwell_otg_intr(0);
  1537. if (pdev->irq)
  1538. free_irq(pdev->irq, langwell);
  1539. /* Prevent more otg_work */
  1540. flush_workqueue(langwell->qwork);
  1541. spin_lock(&langwell->wq_lock);
  1542. /* start actions */
  1543. switch (langwell->otg.state) {
  1544. case OTG_STATE_A_IDLE:
  1545. case OTG_STATE_B_IDLE:
  1546. case OTG_STATE_A_WAIT_VFALL:
  1547. case OTG_STATE_A_VBUS_ERR:
  1548. transceiver_suspend(pdev);
  1549. break;
  1550. case OTG_STATE_A_WAIT_VRISE:
  1551. langwell_otg_del_timer(a_wait_vrise_tmr);
  1552. langwell->hsm.a_srp_det = 0;
  1553. langwell_otg_drv_vbus(0);
  1554. langwell->otg.state = OTG_STATE_A_IDLE;
  1555. transceiver_suspend(pdev);
  1556. break;
  1557. case OTG_STATE_A_WAIT_BCON:
  1558. langwell_otg_del_timer(a_wait_bcon_tmr);
  1559. if (langwell->host_ops)
  1560. ret = langwell->host_ops->suspend(pdev, message);
  1561. langwell_otg_drv_vbus(0);
  1562. break;
  1563. case OTG_STATE_A_HOST:
  1564. if (langwell->host_ops)
  1565. ret = langwell->host_ops->suspend(pdev, message);
  1566. langwell_otg_drv_vbus(0);
  1567. langwell_otg_phy_low_power(1);
  1568. break;
  1569. case OTG_STATE_A_SUSPEND:
  1570. langwell_otg_del_timer(a_aidl_bdis_tmr);
  1571. langwell_otg_HABA(0);
  1572. if (langwell->host_ops)
  1573. langwell->host_ops->remove(pdev);
  1574. else
  1575. otg_dbg("host driver has been removed.\n");
  1576. langwell_otg_drv_vbus(0);
  1577. transceiver_suspend(pdev);
  1578. langwell->otg.state = OTG_STATE_A_WAIT_VFALL;
  1579. break;
  1580. case OTG_STATE_A_PERIPHERAL:
  1581. if (langwell->client_ops)
  1582. ret = langwell->client_ops->suspend(pdev, message);
  1583. else
  1584. otg_dbg("client driver has been removed.\n");
  1585. langwell_otg_drv_vbus(0);
  1586. transceiver_suspend(pdev);
  1587. langwell->otg.state = OTG_STATE_A_WAIT_VFALL;
  1588. break;
  1589. case OTG_STATE_B_HOST:
  1590. if (langwell->host_ops)
  1591. langwell->host_ops->remove(pdev);
  1592. else
  1593. otg_dbg("host driver has been removed.\n");
  1594. langwell->hsm.b_bus_req = 0;
  1595. transceiver_suspend(pdev);
  1596. langwell->otg.state = OTG_STATE_B_IDLE;
  1597. break;
  1598. case OTG_STATE_B_PERIPHERAL:
  1599. if (langwell->client_ops)
  1600. ret = langwell->client_ops->suspend(pdev, message);
  1601. else
  1602. otg_dbg("client driver has been removed.\n");
  1603. break;
  1604. case OTG_STATE_B_WAIT_ACON:
  1605. langwell_otg_del_timer(b_ase0_brst_tmr);
  1606. langwell_otg_HAAR(0);
  1607. if (langwell->host_ops)
  1608. langwell->host_ops->remove(pdev);
  1609. else
  1610. otg_dbg("host driver has been removed.\n");
  1611. langwell->hsm.b_bus_req = 0;
  1612. langwell->otg.state = OTG_STATE_B_IDLE;
  1613. transceiver_suspend(pdev);
  1614. break;
  1615. default:
  1616. otg_dbg("error state before suspend\n ");
  1617. break;
  1618. }
  1619. spin_unlock(&langwell->wq_lock);
  1620. return ret;
  1621. }
  1622. static void transceiver_resume(struct pci_dev *pdev)
  1623. {
  1624. pci_restore_state(pdev);
  1625. pci_set_power_state(pdev, PCI_D0);
  1626. langwell_otg_phy_low_power(0);
  1627. }
  1628. static int langwell_otg_resume(struct pci_dev *pdev)
  1629. {
  1630. int ret = 0;
  1631. struct langwell_otg *langwell;
  1632. langwell = the_transceiver;
  1633. spin_lock(&langwell->wq_lock);
  1634. switch (langwell->otg.state) {
  1635. case OTG_STATE_A_IDLE:
  1636. case OTG_STATE_B_IDLE:
  1637. case OTG_STATE_A_WAIT_VFALL:
  1638. case OTG_STATE_A_VBUS_ERR:
  1639. transceiver_resume(pdev);
  1640. break;
  1641. case OTG_STATE_A_WAIT_BCON:
  1642. langwell_otg_add_timer(a_wait_bcon_tmr);
  1643. langwell_otg_drv_vbus(1);
  1644. if (langwell->host_ops)
  1645. ret = langwell->host_ops->resume(pdev);
  1646. break;
  1647. case OTG_STATE_A_HOST:
  1648. langwell_otg_drv_vbus(1);
  1649. langwell_otg_phy_low_power(0);
  1650. if (langwell->host_ops)
  1651. ret = langwell->host_ops->resume(pdev);
  1652. break;
  1653. case OTG_STATE_B_PERIPHERAL:
  1654. if (langwell->client_ops)
  1655. ret = langwell->client_ops->resume(pdev);
  1656. else
  1657. otg_dbg("client driver not loaded.\n");
  1658. break;
  1659. default:
  1660. otg_dbg("error state before suspend\n ");
  1661. break;
  1662. }
  1663. if (request_irq(pdev->irq, otg_irq, IRQF_SHARED,
  1664. driver_name, the_transceiver) != 0) {
  1665. otg_dbg("request interrupt %d failed\n", pdev->irq);
  1666. ret = -EBUSY;
  1667. }
  1668. /* enable OTG interrupts */
  1669. langwell_otg_intr(1);
  1670. spin_unlock(&langwell->wq_lock);
  1671. queue_work(langwell->qwork, &langwell->work);
  1672. return ret;
  1673. }
  1674. static int __init langwell_otg_init(void)
  1675. {
  1676. return pci_register_driver(&otg_pci_driver);
  1677. }
  1678. module_init(langwell_otg_init);
  1679. static void __exit langwell_otg_cleanup(void)
  1680. {
  1681. pci_unregister_driver(&otg_pci_driver);
  1682. }
  1683. module_exit(langwell_otg_cleanup);