fw.c 11 KB

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  1. /*
  2. * Intel Wireless Multicomm 3200 WiFi driver
  3. *
  4. * Copyright (C) 2009 Intel Corporation. All rights reserved.
  5. *
  6. * Redistribution and use in source and binary forms, with or without
  7. * modification, are permitted provided that the following conditions
  8. * are met:
  9. *
  10. * * Redistributions of source code must retain the above copyright
  11. * notice, this list of conditions and the following disclaimer.
  12. * * Redistributions in binary form must reproduce the above copyright
  13. * notice, this list of conditions and the following disclaimer in
  14. * the documentation and/or other materials provided with the
  15. * distribution.
  16. * * Neither the name of Intel Corporation nor the names of its
  17. * contributors may be used to endorse or promote products derived
  18. * from this software without specific prior written permission.
  19. *
  20. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  21. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  22. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  23. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  24. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  25. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  26. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  27. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  28. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31. *
  32. *
  33. * Intel Corporation <ilw@linux.intel.com>
  34. * Samuel Ortiz <samuel.ortiz@intel.com>
  35. * Zhu Yi <yi.zhu@intel.com>
  36. *
  37. */
  38. #include <linux/kernel.h>
  39. #include <linux/firmware.h>
  40. #include "iwm.h"
  41. #include "bus.h"
  42. #include "hal.h"
  43. #include "umac.h"
  44. #include "debug.h"
  45. #include "fw.h"
  46. #include "commands.h"
  47. static const char fw_barker[] = "*WESTOPFORNOONE*";
  48. /*
  49. * @op_code: Op code we're looking for.
  50. * @index: There can be several instances of the same opcode within
  51. * the firmware. Index specifies which one we're looking for.
  52. */
  53. static int iwm_fw_op_offset(struct iwm_priv *iwm, const struct firmware *fw,
  54. u16 op_code, u32 index)
  55. {
  56. int offset = -EINVAL, fw_offset;
  57. u32 op_index = 0;
  58. const u8 *fw_ptr;
  59. struct iwm_fw_hdr_rec *rec;
  60. fw_offset = 0;
  61. fw_ptr = fw->data;
  62. /* We first need to look for the firmware barker */
  63. if (memcmp(fw_ptr, fw_barker, IWM_HDR_BARKER_LEN)) {
  64. IWM_ERR(iwm, "No barker string in this FW\n");
  65. return -EINVAL;
  66. }
  67. if (fw->size < IWM_HDR_LEN) {
  68. IWM_ERR(iwm, "FW is too small (%zu)\n", fw->size);
  69. return -EINVAL;
  70. }
  71. fw_offset += IWM_HDR_BARKER_LEN;
  72. while (fw_offset < fw->size) {
  73. rec = (struct iwm_fw_hdr_rec *)(fw_ptr + fw_offset);
  74. IWM_DBG_FW(iwm, DBG, "FW: op_code: 0x%x, len: %d @ 0x%x\n",
  75. rec->op_code, rec->len, fw_offset);
  76. if (rec->op_code == IWM_HDR_REC_OP_INVALID) {
  77. IWM_DBG_FW(iwm, DBG, "Reached INVALID op code\n");
  78. break;
  79. }
  80. if (rec->op_code == op_code) {
  81. if (op_index == index) {
  82. fw_offset += sizeof(struct iwm_fw_hdr_rec);
  83. offset = fw_offset;
  84. goto out;
  85. }
  86. op_index++;
  87. }
  88. fw_offset += sizeof(struct iwm_fw_hdr_rec) + rec->len;
  89. }
  90. out:
  91. return offset;
  92. }
  93. static int iwm_load_firmware_chunk(struct iwm_priv *iwm,
  94. const struct firmware *fw,
  95. struct iwm_fw_img_desc *img_desc)
  96. {
  97. struct iwm_udma_nonwifi_cmd target_cmd;
  98. u32 chunk_size;
  99. const u8 *chunk_ptr;
  100. int ret = 0;
  101. IWM_DBG_FW(iwm, INFO, "Loading FW chunk: %d bytes @ 0x%x\n",
  102. img_desc->length, img_desc->address);
  103. target_cmd.opcode = UMAC_HDI_OUT_OPCODE_WRITE;
  104. target_cmd.handle_by_hw = 1;
  105. target_cmd.op2 = 0;
  106. target_cmd.resp = 0;
  107. target_cmd.eop = 1;
  108. chunk_size = img_desc->length;
  109. chunk_ptr = fw->data + img_desc->offset;
  110. while (chunk_size > 0) {
  111. u32 tmp_chunk_size;
  112. tmp_chunk_size = min_t(u32, chunk_size,
  113. IWM_MAX_NONWIFI_CMD_BUFF_SIZE);
  114. target_cmd.addr = cpu_to_le32(img_desc->address +
  115. (chunk_ptr - fw->data - img_desc->offset));
  116. target_cmd.op1_sz = cpu_to_le32(tmp_chunk_size);
  117. IWM_DBG_FW(iwm, DBG, "\t%d bytes @ 0x%x\n",
  118. tmp_chunk_size, target_cmd.addr);
  119. ret = iwm_hal_send_target_cmd(iwm, &target_cmd, chunk_ptr);
  120. if (ret < 0) {
  121. IWM_ERR(iwm, "Couldn't load FW chunk\n");
  122. break;
  123. }
  124. chunk_size -= tmp_chunk_size;
  125. chunk_ptr += tmp_chunk_size;
  126. }
  127. return ret;
  128. }
  129. /*
  130. * To load a fw image to the target, we basically go through the
  131. * fw, looking for OP_MEM_DESC records. Once we found one, we
  132. * pass it to iwm_load_firmware_chunk().
  133. * The OP_MEM_DESC records contain the actuall memory chunk to be
  134. * sent, but also the destination address.
  135. */
  136. static int iwm_load_img(struct iwm_priv *iwm, const char *img_name)
  137. {
  138. const struct firmware *fw;
  139. struct iwm_fw_img_desc *img_desc;
  140. struct iwm_fw_img_ver *ver;
  141. int ret = 0, fw_offset;
  142. u32 opcode_idx = 0, build_date;
  143. char *build_tag;
  144. ret = request_firmware(&fw, img_name, iwm_to_dev(iwm));
  145. if (ret) {
  146. IWM_ERR(iwm, "Request firmware failed");
  147. return ret;
  148. }
  149. IWM_DBG_FW(iwm, INFO, "Start to load FW %s\n", img_name);
  150. while (1) {
  151. fw_offset = iwm_fw_op_offset(iwm, fw,
  152. IWM_HDR_REC_OP_MEM_DESC,
  153. opcode_idx);
  154. if (fw_offset < 0)
  155. break;
  156. img_desc = (struct iwm_fw_img_desc *)(fw->data + fw_offset);
  157. ret = iwm_load_firmware_chunk(iwm, fw, img_desc);
  158. if (ret < 0)
  159. goto err_release_fw;
  160. opcode_idx++;
  161. };
  162. /* Read firmware version */
  163. fw_offset = iwm_fw_op_offset(iwm, fw, IWM_HDR_REC_OP_SW_VER, 0);
  164. if (fw_offset < 0)
  165. goto err_release_fw;
  166. ver = (struct iwm_fw_img_ver *)(fw->data + fw_offset);
  167. /* Read build tag */
  168. fw_offset = iwm_fw_op_offset(iwm, fw, IWM_HDR_REC_OP_BUILD_TAG, 0);
  169. if (fw_offset < 0)
  170. goto err_release_fw;
  171. build_tag = (char *)(fw->data + fw_offset);
  172. /* Read build date */
  173. fw_offset = iwm_fw_op_offset(iwm, fw, IWM_HDR_REC_OP_BUILD_DATE, 0);
  174. if (fw_offset < 0)
  175. goto err_release_fw;
  176. build_date = *(u32 *)(fw->data + fw_offset);
  177. IWM_INFO(iwm, "%s:\n", img_name);
  178. IWM_INFO(iwm, "\tVersion: %02X.%02X\n", ver->major, ver->minor);
  179. IWM_INFO(iwm, "\tBuild tag: %s\n", build_tag);
  180. IWM_INFO(iwm, "\tBuild date: %x-%x-%x\n",
  181. IWM_BUILD_YEAR(build_date), IWM_BUILD_MONTH(build_date),
  182. IWM_BUILD_DAY(build_date));
  183. err_release_fw:
  184. release_firmware(fw);
  185. return ret;
  186. }
  187. static int iwm_load_umac(struct iwm_priv *iwm)
  188. {
  189. struct iwm_udma_nonwifi_cmd target_cmd;
  190. int ret;
  191. ret = iwm_load_img(iwm, iwm->bus_ops->umac_name);
  192. if (ret < 0)
  193. return ret;
  194. /* We've loaded the UMAC, we can tell the target to jump there */
  195. target_cmd.opcode = UMAC_HDI_OUT_OPCODE_JUMP;
  196. target_cmd.addr = cpu_to_le32(UMAC_MU_FW_INST_DATA_12_ADDR);
  197. target_cmd.op1_sz = 0;
  198. target_cmd.op2 = 0;
  199. target_cmd.handle_by_hw = 0;
  200. target_cmd.resp = 1 ;
  201. target_cmd.eop = 1;
  202. ret = iwm_hal_send_target_cmd(iwm, &target_cmd, NULL);
  203. if (ret < 0)
  204. IWM_ERR(iwm, "Couldn't send JMP command\n");
  205. return ret;
  206. }
  207. static int iwm_load_lmac(struct iwm_priv *iwm, const char *img_name)
  208. {
  209. int ret;
  210. ret = iwm_load_img(iwm, img_name);
  211. if (ret < 0)
  212. return ret;
  213. return iwm_send_umac_reset(iwm,
  214. cpu_to_le32(UMAC_RST_CTRL_FLG_LARC_CLK_EN), 0);
  215. }
  216. /*
  217. * We currently have to load 3 FWs:
  218. * 1) The UMAC (Upper MAC).
  219. * 2) The calibration LMAC (Lower MAC).
  220. * We then send the calibration init command, so that the device can
  221. * run a first calibration round.
  222. * 3) The operational LMAC, which replaces the calibration one when it's
  223. * done with the first calibration round.
  224. *
  225. * Once those 3 FWs have been loaded, we send the periodic calibration
  226. * command, and then the device is available for regular 802.11 operations.
  227. */
  228. int iwm_load_fw(struct iwm_priv *iwm)
  229. {
  230. int ret;
  231. /* We first start downloading the UMAC */
  232. ret = iwm_load_umac(iwm);
  233. if (ret < 0) {
  234. IWM_ERR(iwm, "UMAC loading failed\n");
  235. return ret;
  236. }
  237. /* Handle UMAC_ALIVE notification */
  238. ret = iwm_notif_handle(iwm, UMAC_NOTIFY_OPCODE_ALIVE, IWM_SRC_UMAC,
  239. WAIT_NOTIF_TIMEOUT);
  240. if (ret) {
  241. IWM_ERR(iwm, "Handle UMAC_ALIVE failed: %d\n", ret);
  242. return ret;
  243. }
  244. /* UMAC is alive, we can download the calibration LMAC */
  245. ret = iwm_load_lmac(iwm, iwm->bus_ops->calib_lmac_name);
  246. if (ret) {
  247. IWM_ERR(iwm, "Calibration LMAC loading failed\n");
  248. return ret;
  249. }
  250. /* Handle UMAC_INIT_COMPLETE notification */
  251. ret = iwm_notif_handle(iwm, UMAC_NOTIFY_OPCODE_INIT_COMPLETE,
  252. IWM_SRC_UMAC, WAIT_NOTIF_TIMEOUT);
  253. if (ret) {
  254. IWM_ERR(iwm, "Handle INIT_COMPLETE failed for calibration "
  255. "LMAC: %d\n", ret);
  256. return ret;
  257. }
  258. /* Read EEPROM data */
  259. ret = iwm_eeprom_init(iwm);
  260. if (ret < 0) {
  261. IWM_ERR(iwm, "Couldn't init eeprom array\n");
  262. return ret;
  263. }
  264. #ifdef CONFIG_IWM_B0_HW_SUPPORT
  265. if (iwm->conf.hw_b0) {
  266. clear_bit(PHY_CALIBRATE_RX_IQ_CMD, &iwm->conf.init_calib_map);
  267. clear_bit(PHY_CALIBRATE_RX_IQ_CMD,
  268. &iwm->conf.periodic_calib_map);
  269. }
  270. #endif
  271. /* Read RX IQ calibration result from EEPROM */
  272. if (test_bit(PHY_CALIBRATE_RX_IQ_CMD, &iwm->conf.init_calib_map)) {
  273. iwm_store_rxiq_calib_result(iwm);
  274. set_bit(PHY_CALIBRATE_RX_IQ_CMD, &iwm->calib_done_map);
  275. }
  276. iwm_send_prio_table(iwm);
  277. iwm_send_init_calib_cfg(iwm, iwm->conf.init_calib_map);
  278. while (iwm->calib_done_map != iwm->conf.init_calib_map) {
  279. ret = iwm_notif_handle(iwm, CALIBRATION_RES_NOTIFICATION,
  280. IWM_SRC_LMAC, WAIT_NOTIF_TIMEOUT);
  281. if (ret) {
  282. IWM_ERR(iwm, "Wait for calibration result timeout\n");
  283. goto out;
  284. }
  285. IWM_DBG_FW(iwm, DBG, "Got calibration result. calib_done_map: "
  286. "0x%lx, requested calibrations: 0x%lx\n",
  287. iwm->calib_done_map, iwm->conf.init_calib_map);
  288. }
  289. /* Handle LMAC CALIBRATION_COMPLETE notification */
  290. ret = iwm_notif_handle(iwm, CALIBRATION_COMPLETE_NOTIFICATION,
  291. IWM_SRC_LMAC, WAIT_NOTIF_TIMEOUT);
  292. if (ret) {
  293. IWM_ERR(iwm, "Wait for CALIBRATION_COMPLETE timeout\n");
  294. goto out;
  295. }
  296. IWM_INFO(iwm, "LMAC calibration done: 0x%lx\n", iwm->calib_done_map);
  297. iwm_send_umac_reset(iwm, cpu_to_le32(UMAC_RST_CTRL_FLG_LARC_RESET), 1);
  298. ret = iwm_notif_handle(iwm, UMAC_CMD_OPCODE_RESET, IWM_SRC_UMAC,
  299. WAIT_NOTIF_TIMEOUT);
  300. if (ret) {
  301. IWM_ERR(iwm, "Wait for UMAC RESET timeout\n");
  302. goto out;
  303. }
  304. /* Download the operational LMAC */
  305. ret = iwm_load_lmac(iwm, iwm->bus_ops->lmac_name);
  306. if (ret) {
  307. IWM_ERR(iwm, "LMAC loading failed\n");
  308. goto out;
  309. }
  310. ret = iwm_notif_handle(iwm, UMAC_NOTIFY_OPCODE_INIT_COMPLETE,
  311. IWM_SRC_UMAC, WAIT_NOTIF_TIMEOUT);
  312. if (ret) {
  313. IWM_ERR(iwm, "Handle INIT_COMPLETE failed for LMAC: %d\n", ret);
  314. goto out;
  315. }
  316. iwm_send_prio_table(iwm);
  317. iwm_send_calib_results(iwm);
  318. iwm_send_periodic_calib_cfg(iwm, iwm->conf.periodic_calib_map);
  319. return 0;
  320. out:
  321. iwm_eeprom_exit(iwm);
  322. return ret;
  323. }