iwl-power.c 8.7 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2007 - 2009 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *****************************************************************************/
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/init.h>
  31. #include <net/mac80211.h>
  32. #include "iwl-eeprom.h"
  33. #include "iwl-dev.h"
  34. #include "iwl-core.h"
  35. #include "iwl-commands.h"
  36. #include "iwl-debug.h"
  37. #include "iwl-power.h"
  38. /*
  39. * Setting power level allow the card to go to sleep when not busy.
  40. *
  41. * The power level is set to INDEX_1 (the least deep state) by
  42. * default, and will, in the future, be the deepest state unless
  43. * otherwise required by pm_qos network latency requirements.
  44. *
  45. * Using INDEX_1 without pm_qos is ok because mac80211 will disable
  46. * PS when even checking every beacon for the TIM bit would exceed
  47. * the required latency.
  48. */
  49. #define IWL_POWER_RANGE_0_MAX (2)
  50. #define IWL_POWER_RANGE_1_MAX (10)
  51. #define NOSLP cpu_to_le16(0), 0, 0
  52. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  53. #define TU_TO_USEC 1024
  54. #define SLP_TOUT(T) cpu_to_le32((T) * TU_TO_USEC)
  55. #define SLP_VEC(X0, X1, X2, X3, X4) {cpu_to_le32(X0), \
  56. cpu_to_le32(X1), \
  57. cpu_to_le32(X2), \
  58. cpu_to_le32(X3), \
  59. cpu_to_le32(X4)}
  60. /* default power management (not Tx power) table values */
  61. /* for DTIM period 0 through IWL_POWER_RANGE_0_MAX */
  62. static const struct iwl_power_vec_entry range_0[IWL_POWER_NUM] = {
  63. {{NOSLP, SLP_TOUT(0), SLP_TOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  64. {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 2, 2, 0xFF)}, 0},
  65. {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 2, 2, 0xFF)}, 0},
  66. {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 2, 2, 2, 0xFF)}, 0},
  67. {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 2, 4, 4, 0xFF)}, 1},
  68. {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(2, 2, 4, 6, 0xFF)}, 2}
  69. };
  70. /* for DTIM period IWL_POWER_RANGE_0_MAX + 1 through IWL_POWER_RANGE_1_MAX */
  71. static const struct iwl_power_vec_entry range_1[IWL_POWER_NUM] = {
  72. {{NOSLP, SLP_TOUT(0), SLP_TOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  73. {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  74. {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 3, 4, 7)}, 0},
  75. {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 4, 6, 7, 9)}, 0},
  76. {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 4, 6, 9, 10)}, 1},
  77. {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(2, 4, 7, 10, 10)}, 2}
  78. };
  79. /* for DTIM period > IWL_POWER_RANGE_1_MAX */
  80. static const struct iwl_power_vec_entry range_2[IWL_POWER_NUM] = {
  81. {{NOSLP, SLP_TOUT(0), SLP_TOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  82. {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  83. {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  84. {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  85. {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  86. {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  87. };
  88. /* set card power command */
  89. static int iwl_set_power(struct iwl_priv *priv, void *cmd)
  90. {
  91. return iwl_send_cmd_pdu(priv, POWER_TABLE_CMD,
  92. sizeof(struct iwl_powertable_cmd), cmd);
  93. }
  94. /* initialize to default */
  95. static void iwl_power_init_handle(struct iwl_priv *priv)
  96. {
  97. struct iwl_power_mgr *pow_data;
  98. int size = sizeof(struct iwl_power_vec_entry) * IWL_POWER_NUM;
  99. struct iwl_powertable_cmd *cmd;
  100. int i;
  101. u16 lctl;
  102. IWL_DEBUG_POWER(priv, "Initialize power \n");
  103. pow_data = &priv->power_data;
  104. memset(pow_data, 0, sizeof(*pow_data));
  105. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  106. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  107. memcpy(&pow_data->pwr_range_2[0], &range_2[0], size);
  108. lctl = iwl_pcie_link_ctl(priv);
  109. IWL_DEBUG_POWER(priv, "adjust power command flags\n");
  110. for (i = 0; i < IWL_POWER_NUM; i++) {
  111. cmd = &pow_data->pwr_range_0[i].cmd;
  112. if (lctl & PCI_CFG_LINK_CTRL_VAL_L0S_EN)
  113. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  114. else
  115. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  116. }
  117. }
  118. /* adjust power command according to DTIM period and power level*/
  119. static int iwl_update_power_cmd(struct iwl_priv *priv,
  120. struct iwl_powertable_cmd *cmd, u16 mode)
  121. {
  122. struct iwl_power_vec_entry *range;
  123. struct iwl_power_mgr *pow_data;
  124. int i;
  125. u32 max_sleep = 0;
  126. u8 period;
  127. bool skip;
  128. if (mode > IWL_POWER_INDEX_5) {
  129. IWL_DEBUG_POWER(priv, "Error invalid power mode \n");
  130. return -EINVAL;
  131. }
  132. pow_data = &priv->power_data;
  133. if (pow_data->dtim_period <= IWL_POWER_RANGE_0_MAX)
  134. range = &pow_data->pwr_range_0[0];
  135. else if (pow_data->dtim_period <= IWL_POWER_RANGE_1_MAX)
  136. range = &pow_data->pwr_range_1[0];
  137. else
  138. range = &pow_data->pwr_range_2[0];
  139. period = pow_data->dtim_period;
  140. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl_powertable_cmd));
  141. if (period == 0) {
  142. period = 1;
  143. skip = false;
  144. } else {
  145. skip = !!range[mode].no_dtim;
  146. }
  147. if (skip) {
  148. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  149. max_sleep = le32_to_cpu(slp_itrvl);
  150. if (max_sleep == 0xFF)
  151. max_sleep = period * (skip + 1);
  152. else if (max_sleep > period)
  153. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  154. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  155. } else {
  156. max_sleep = period;
  157. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  158. }
  159. for (i = 0; i < IWL_POWER_VEC_SIZE; i++)
  160. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  161. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  162. IWL_DEBUG_POWER(priv, "Flags value = 0x%08X\n", cmd->flags);
  163. IWL_DEBUG_POWER(priv, "Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  164. IWL_DEBUG_POWER(priv, "Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  165. IWL_DEBUG_POWER(priv, "Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  166. le32_to_cpu(cmd->sleep_interval[0]),
  167. le32_to_cpu(cmd->sleep_interval[1]),
  168. le32_to_cpu(cmd->sleep_interval[2]),
  169. le32_to_cpu(cmd->sleep_interval[3]),
  170. le32_to_cpu(cmd->sleep_interval[4]));
  171. return 0;
  172. }
  173. /*
  174. * compute the final power mode index
  175. */
  176. int iwl_power_update_mode(struct iwl_priv *priv, bool force)
  177. {
  178. struct iwl_power_mgr *setting = &(priv->power_data);
  179. int ret = 0;
  180. u16 uninitialized_var(final_mode);
  181. bool update_chains;
  182. /* Don't update the RX chain when chain noise calibration is running */
  183. update_chains = priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE ||
  184. priv->chain_noise_data.state == IWL_CHAIN_NOISE_ALIVE;
  185. final_mode = priv->power_data.user_power_setting;
  186. if (setting->power_disabled)
  187. final_mode = IWL_POWER_MODE_CAM;
  188. if (iwl_is_ready_rf(priv) &&
  189. ((setting->power_mode != final_mode) || force)) {
  190. struct iwl_powertable_cmd cmd;
  191. if (final_mode != IWL_POWER_MODE_CAM)
  192. set_bit(STATUS_POWER_PMI, &priv->status);
  193. iwl_update_power_cmd(priv, &cmd, final_mode);
  194. cmd.keep_alive_beacons = 0;
  195. if (final_mode == IWL_POWER_INDEX_5)
  196. cmd.flags |= IWL_POWER_FAST_PD;
  197. ret = iwl_set_power(priv, &cmd);
  198. if (final_mode == IWL_POWER_MODE_CAM)
  199. clear_bit(STATUS_POWER_PMI, &priv->status);
  200. if (priv->cfg->ops->lib->update_chain_flags && update_chains)
  201. priv->cfg->ops->lib->update_chain_flags(priv);
  202. else
  203. IWL_DEBUG_POWER(priv, "Cannot update the power, chain noise "
  204. "calibration running: %d\n",
  205. priv->chain_noise_data.state);
  206. if (!ret)
  207. setting->power_mode = final_mode;
  208. }
  209. return ret;
  210. }
  211. EXPORT_SYMBOL(iwl_power_update_mode);
  212. /* set user_power_setting */
  213. int iwl_power_set_user_mode(struct iwl_priv *priv, u16 mode)
  214. {
  215. if (mode >= IWL_POWER_NUM)
  216. return -EINVAL;
  217. priv->power_data.user_power_setting = mode;
  218. return iwl_power_update_mode(priv, 0);
  219. }
  220. EXPORT_SYMBOL(iwl_power_set_user_mode);
  221. /* initialize to default */
  222. void iwl_power_initialize(struct iwl_priv *priv)
  223. {
  224. iwl_power_init_handle(priv);
  225. priv->power_data.user_power_setting = IWL_POWER_INDEX_1;
  226. /* default to disabled until mac80211 says otherwise */
  227. priv->power_data.power_disabled = 1;
  228. }
  229. EXPORT_SYMBOL(iwl_power_initialize);