cciss.c 119 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array controllers.
  3. * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  12. * General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  17. * 02111-1307, USA.
  18. *
  19. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  20. *
  21. */
  22. #include <linux/module.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/types.h>
  25. #include <linux/pci.h>
  26. #include <linux/kernel.h>
  27. #include <linux/slab.h>
  28. #include <linux/delay.h>
  29. #include <linux/major.h>
  30. #include <linux/fs.h>
  31. #include <linux/bio.h>
  32. #include <linux/blkpg.h>
  33. #include <linux/timer.h>
  34. #include <linux/proc_fs.h>
  35. #include <linux/seq_file.h>
  36. #include <linux/init.h>
  37. #include <linux/hdreg.h>
  38. #include <linux/spinlock.h>
  39. #include <linux/compat.h>
  40. #include <asm/uaccess.h>
  41. #include <asm/io.h>
  42. #include <linux/dma-mapping.h>
  43. #include <linux/blkdev.h>
  44. #include <linux/genhd.h>
  45. #include <linux/completion.h>
  46. #include <scsi/scsi.h>
  47. #include <scsi/sg.h>
  48. #include <scsi/scsi_ioctl.h>
  49. #include <linux/cdrom.h>
  50. #include <linux/scatterlist.h>
  51. #include <linux/kthread.h>
  52. #define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
  53. #define DRIVER_NAME "HP CISS Driver (v 3.6.20)"
  54. #define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 20)
  55. /* Embedded module documentation macros - see modules.h */
  56. MODULE_AUTHOR("Hewlett-Packard Company");
  57. MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
  58. MODULE_SUPPORTED_DEVICE("HP SA5i SA5i+ SA532 SA5300 SA5312 SA641 SA642 SA6400"
  59. " SA6i P600 P800 P400 P400i E200 E200i E500 P700m"
  60. " Smart Array G2 Series SAS/SATA Controllers");
  61. MODULE_VERSION("3.6.20");
  62. MODULE_LICENSE("GPL");
  63. #include "cciss_cmd.h"
  64. #include "cciss.h"
  65. #include <linux/cciss_ioctl.h>
  66. /* define the PCI info for the cards we can control */
  67. static const struct pci_device_id cciss_pci_device_id[] = {
  68. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070},
  69. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
  70. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
  71. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
  72. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
  73. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
  74. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
  75. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
  76. {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
  77. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225},
  78. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
  79. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211},
  82. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215},
  86. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237},
  87. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
  88. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
  89. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
  90. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
  91. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
  92. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
  93. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
  94. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
  95. {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  96. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  97. {0,}
  98. };
  99. MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
  100. /* board_id = Subsystem Device ID & Vendor ID
  101. * product = Marketing Name for the board
  102. * access = Address of the struct of function pointers
  103. */
  104. static struct board_type products[] = {
  105. {0x40700E11, "Smart Array 5300", &SA5_access},
  106. {0x40800E11, "Smart Array 5i", &SA5B_access},
  107. {0x40820E11, "Smart Array 532", &SA5B_access},
  108. {0x40830E11, "Smart Array 5312", &SA5B_access},
  109. {0x409A0E11, "Smart Array 641", &SA5_access},
  110. {0x409B0E11, "Smart Array 642", &SA5_access},
  111. {0x409C0E11, "Smart Array 6400", &SA5_access},
  112. {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
  113. {0x40910E11, "Smart Array 6i", &SA5_access},
  114. {0x3225103C, "Smart Array P600", &SA5_access},
  115. {0x3223103C, "Smart Array P800", &SA5_access},
  116. {0x3234103C, "Smart Array P400", &SA5_access},
  117. {0x3235103C, "Smart Array P400i", &SA5_access},
  118. {0x3211103C, "Smart Array E200i", &SA5_access},
  119. {0x3212103C, "Smart Array E200", &SA5_access},
  120. {0x3213103C, "Smart Array E200i", &SA5_access},
  121. {0x3214103C, "Smart Array E200i", &SA5_access},
  122. {0x3215103C, "Smart Array E200i", &SA5_access},
  123. {0x3237103C, "Smart Array E500", &SA5_access},
  124. {0x323D103C, "Smart Array P700m", &SA5_access},
  125. {0x3241103C, "Smart Array P212", &SA5_access},
  126. {0x3243103C, "Smart Array P410", &SA5_access},
  127. {0x3245103C, "Smart Array P410i", &SA5_access},
  128. {0x3247103C, "Smart Array P411", &SA5_access},
  129. {0x3249103C, "Smart Array P812", &SA5_access},
  130. {0x324A103C, "Smart Array P712m", &SA5_access},
  131. {0x324B103C, "Smart Array P711m", &SA5_access},
  132. {0xFFFF103C, "Unknown Smart Array", &SA5_access},
  133. };
  134. /* How long to wait (in milliseconds) for board to go into simple mode */
  135. #define MAX_CONFIG_WAIT 30000
  136. #define MAX_IOCTL_CONFIG_WAIT 1000
  137. /*define how many times we will try a command because of bus resets */
  138. #define MAX_CMD_RETRIES 3
  139. #define MAX_CTLR 32
  140. /* Originally cciss driver only supports 8 major numbers */
  141. #define MAX_CTLR_ORIG 8
  142. static ctlr_info_t *hba[MAX_CTLR];
  143. static void do_cciss_request(struct request_queue *q);
  144. static irqreturn_t do_cciss_intr(int irq, void *dev_id);
  145. static int cciss_open(struct block_device *bdev, fmode_t mode);
  146. static int cciss_release(struct gendisk *disk, fmode_t mode);
  147. static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
  148. unsigned int cmd, unsigned long arg);
  149. static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
  150. static int cciss_revalidate(struct gendisk *disk);
  151. static int rebuild_lun_table(ctlr_info_t *h, int first_time);
  152. static int deregister_disk(ctlr_info_t *h, int drv_index,
  153. int clear_all);
  154. static void cciss_read_capacity(int ctlr, int logvol, int withirq,
  155. sector_t *total_size, unsigned int *block_size);
  156. static void cciss_read_capacity_16(int ctlr, int logvol, int withirq,
  157. sector_t *total_size, unsigned int *block_size);
  158. static void cciss_geometry_inquiry(int ctlr, int logvol,
  159. int withirq, sector_t total_size,
  160. unsigned int block_size, InquiryData_struct *inq_buff,
  161. drive_info_struct *drv);
  162. static void __devinit cciss_interrupt_mode(ctlr_info_t *, struct pci_dev *,
  163. __u32);
  164. static void start_io(ctlr_info_t *h);
  165. static int sendcmd(__u8 cmd, int ctlr, void *buff, size_t size,
  166. __u8 page_code, unsigned char *scsi3addr, int cmd_type);
  167. static int sendcmd_withirq(__u8 cmd, int ctlr, void *buff, size_t size,
  168. __u8 page_code, unsigned char scsi3addr[],
  169. int cmd_type);
  170. static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
  171. int attempt_retry);
  172. static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
  173. static void fail_all_cmds(unsigned long ctlr);
  174. static int scan_thread(void *data);
  175. static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
  176. #ifdef CONFIG_PROC_FS
  177. static void cciss_procinit(int i);
  178. #else
  179. static void cciss_procinit(int i)
  180. {
  181. }
  182. #endif /* CONFIG_PROC_FS */
  183. #ifdef CONFIG_COMPAT
  184. static int cciss_compat_ioctl(struct block_device *, fmode_t,
  185. unsigned, unsigned long);
  186. #endif
  187. static struct block_device_operations cciss_fops = {
  188. .owner = THIS_MODULE,
  189. .open = cciss_open,
  190. .release = cciss_release,
  191. .locked_ioctl = cciss_ioctl,
  192. .getgeo = cciss_getgeo,
  193. #ifdef CONFIG_COMPAT
  194. .compat_ioctl = cciss_compat_ioctl,
  195. #endif
  196. .revalidate_disk = cciss_revalidate,
  197. };
  198. /*
  199. * Enqueuing and dequeuing functions for cmdlists.
  200. */
  201. static inline void addQ(struct hlist_head *list, CommandList_struct *c)
  202. {
  203. hlist_add_head(&c->list, list);
  204. }
  205. static inline void removeQ(CommandList_struct *c)
  206. {
  207. /*
  208. * After kexec/dump some commands might still
  209. * be in flight, which the firmware will try
  210. * to complete. Resetting the firmware doesn't work
  211. * with old fw revisions, so we have to mark
  212. * them off as 'stale' to prevent the driver from
  213. * falling over.
  214. */
  215. if (WARN_ON(hlist_unhashed(&c->list))) {
  216. c->cmd_type = CMD_MSG_STALE;
  217. return;
  218. }
  219. hlist_del_init(&c->list);
  220. }
  221. #include "cciss_scsi.c" /* For SCSI tape support */
  222. #define RAID_UNKNOWN 6
  223. #ifdef CONFIG_PROC_FS
  224. /*
  225. * Report information about this controller.
  226. */
  227. #define ENG_GIG 1000000000
  228. #define ENG_GIG_FACTOR (ENG_GIG/512)
  229. #define ENGAGE_SCSI "engage scsi"
  230. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  231. "UNKNOWN"
  232. };
  233. static struct proc_dir_entry *proc_cciss;
  234. static void cciss_seq_show_header(struct seq_file *seq)
  235. {
  236. ctlr_info_t *h = seq->private;
  237. seq_printf(seq, "%s: HP %s Controller\n"
  238. "Board ID: 0x%08lx\n"
  239. "Firmware Version: %c%c%c%c\n"
  240. "IRQ: %d\n"
  241. "Logical drives: %d\n"
  242. "Current Q depth: %d\n"
  243. "Current # commands on controller: %d\n"
  244. "Max Q depth since init: %d\n"
  245. "Max # commands on controller since init: %d\n"
  246. "Max SG entries since init: %d\n",
  247. h->devname,
  248. h->product_name,
  249. (unsigned long)h->board_id,
  250. h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
  251. h->firm_ver[3], (unsigned int)h->intr[SIMPLE_MODE_INT],
  252. h->num_luns,
  253. h->Qdepth, h->commands_outstanding,
  254. h->maxQsinceinit, h->max_outstanding, h->maxSG);
  255. #ifdef CONFIG_CISS_SCSI_TAPE
  256. cciss_seq_tape_report(seq, h->ctlr);
  257. #endif /* CONFIG_CISS_SCSI_TAPE */
  258. }
  259. static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
  260. {
  261. ctlr_info_t *h = seq->private;
  262. unsigned ctlr = h->ctlr;
  263. unsigned long flags;
  264. /* prevent displaying bogus info during configuration
  265. * or deconfiguration of a logical volume
  266. */
  267. spin_lock_irqsave(CCISS_LOCK(ctlr), flags);
  268. if (h->busy_configuring) {
  269. spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
  270. return ERR_PTR(-EBUSY);
  271. }
  272. h->busy_configuring = 1;
  273. spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
  274. if (*pos == 0)
  275. cciss_seq_show_header(seq);
  276. return pos;
  277. }
  278. static int cciss_seq_show(struct seq_file *seq, void *v)
  279. {
  280. sector_t vol_sz, vol_sz_frac;
  281. ctlr_info_t *h = seq->private;
  282. unsigned ctlr = h->ctlr;
  283. loff_t *pos = v;
  284. drive_info_struct *drv = &h->drv[*pos];
  285. if (*pos > h->highest_lun)
  286. return 0;
  287. if (drv->heads == 0)
  288. return 0;
  289. vol_sz = drv->nr_blocks;
  290. vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
  291. vol_sz_frac *= 100;
  292. sector_div(vol_sz_frac, ENG_GIG_FACTOR);
  293. if (drv->raid_level > 5)
  294. drv->raid_level = RAID_UNKNOWN;
  295. seq_printf(seq, "cciss/c%dd%d:"
  296. "\t%4u.%02uGB\tRAID %s\n",
  297. ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
  298. raid_label[drv->raid_level]);
  299. return 0;
  300. }
  301. static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
  302. {
  303. ctlr_info_t *h = seq->private;
  304. if (*pos > h->highest_lun)
  305. return NULL;
  306. *pos += 1;
  307. return pos;
  308. }
  309. static void cciss_seq_stop(struct seq_file *seq, void *v)
  310. {
  311. ctlr_info_t *h = seq->private;
  312. /* Only reset h->busy_configuring if we succeeded in setting
  313. * it during cciss_seq_start. */
  314. if (v == ERR_PTR(-EBUSY))
  315. return;
  316. h->busy_configuring = 0;
  317. }
  318. static struct seq_operations cciss_seq_ops = {
  319. .start = cciss_seq_start,
  320. .show = cciss_seq_show,
  321. .next = cciss_seq_next,
  322. .stop = cciss_seq_stop,
  323. };
  324. static int cciss_seq_open(struct inode *inode, struct file *file)
  325. {
  326. int ret = seq_open(file, &cciss_seq_ops);
  327. struct seq_file *seq = file->private_data;
  328. if (!ret)
  329. seq->private = PDE(inode)->data;
  330. return ret;
  331. }
  332. static ssize_t
  333. cciss_proc_write(struct file *file, const char __user *buf,
  334. size_t length, loff_t *ppos)
  335. {
  336. int err;
  337. char *buffer;
  338. #ifndef CONFIG_CISS_SCSI_TAPE
  339. return -EINVAL;
  340. #endif
  341. if (!buf || length > PAGE_SIZE - 1)
  342. return -EINVAL;
  343. buffer = (char *)__get_free_page(GFP_KERNEL);
  344. if (!buffer)
  345. return -ENOMEM;
  346. err = -EFAULT;
  347. if (copy_from_user(buffer, buf, length))
  348. goto out;
  349. buffer[length] = '\0';
  350. #ifdef CONFIG_CISS_SCSI_TAPE
  351. if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
  352. struct seq_file *seq = file->private_data;
  353. ctlr_info_t *h = seq->private;
  354. int rc;
  355. rc = cciss_engage_scsi(h->ctlr);
  356. if (rc != 0)
  357. err = -rc;
  358. else
  359. err = length;
  360. } else
  361. #endif /* CONFIG_CISS_SCSI_TAPE */
  362. err = -EINVAL;
  363. /* might be nice to have "disengage" too, but it's not
  364. safely possible. (only 1 module use count, lock issues.) */
  365. out:
  366. free_page((unsigned long)buffer);
  367. return err;
  368. }
  369. static struct file_operations cciss_proc_fops = {
  370. .owner = THIS_MODULE,
  371. .open = cciss_seq_open,
  372. .read = seq_read,
  373. .llseek = seq_lseek,
  374. .release = seq_release,
  375. .write = cciss_proc_write,
  376. };
  377. static void __devinit cciss_procinit(int i)
  378. {
  379. struct proc_dir_entry *pde;
  380. if (proc_cciss == NULL)
  381. proc_cciss = proc_mkdir("driver/cciss", NULL);
  382. if (!proc_cciss)
  383. return;
  384. pde = proc_create_data(hba[i]->devname, S_IWUSR | S_IRUSR | S_IRGRP |
  385. S_IROTH, proc_cciss,
  386. &cciss_proc_fops, hba[i]);
  387. }
  388. #endif /* CONFIG_PROC_FS */
  389. #define MAX_PRODUCT_NAME_LEN 19
  390. #define to_hba(n) container_of(n, struct ctlr_info, dev)
  391. #define to_drv(n) container_of(n, drive_info_struct, dev)
  392. static struct device_type cciss_host_type = {
  393. .name = "cciss_host",
  394. };
  395. static ssize_t dev_show_unique_id(struct device *dev,
  396. struct device_attribute *attr,
  397. char *buf)
  398. {
  399. drive_info_struct *drv = to_drv(dev);
  400. struct ctlr_info *h = to_hba(drv->dev.parent);
  401. __u8 sn[16];
  402. unsigned long flags;
  403. int ret = 0;
  404. spin_lock_irqsave(CCISS_LOCK(h->ctlr), flags);
  405. if (h->busy_configuring)
  406. ret = -EBUSY;
  407. else
  408. memcpy(sn, drv->serial_no, sizeof(sn));
  409. spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
  410. if (ret)
  411. return ret;
  412. else
  413. return snprintf(buf, 16 * 2 + 2,
  414. "%02X%02X%02X%02X%02X%02X%02X%02X"
  415. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  416. sn[0], sn[1], sn[2], sn[3],
  417. sn[4], sn[5], sn[6], sn[7],
  418. sn[8], sn[9], sn[10], sn[11],
  419. sn[12], sn[13], sn[14], sn[15]);
  420. }
  421. DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
  422. static ssize_t dev_show_vendor(struct device *dev,
  423. struct device_attribute *attr,
  424. char *buf)
  425. {
  426. drive_info_struct *drv = to_drv(dev);
  427. struct ctlr_info *h = to_hba(drv->dev.parent);
  428. char vendor[VENDOR_LEN + 1];
  429. unsigned long flags;
  430. int ret = 0;
  431. spin_lock_irqsave(CCISS_LOCK(h->ctlr), flags);
  432. if (h->busy_configuring)
  433. ret = -EBUSY;
  434. else
  435. memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
  436. spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
  437. if (ret)
  438. return ret;
  439. else
  440. return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
  441. }
  442. DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
  443. static ssize_t dev_show_model(struct device *dev,
  444. struct device_attribute *attr,
  445. char *buf)
  446. {
  447. drive_info_struct *drv = to_drv(dev);
  448. struct ctlr_info *h = to_hba(drv->dev.parent);
  449. char model[MODEL_LEN + 1];
  450. unsigned long flags;
  451. int ret = 0;
  452. spin_lock_irqsave(CCISS_LOCK(h->ctlr), flags);
  453. if (h->busy_configuring)
  454. ret = -EBUSY;
  455. else
  456. memcpy(model, drv->model, MODEL_LEN + 1);
  457. spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
  458. if (ret)
  459. return ret;
  460. else
  461. return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
  462. }
  463. DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
  464. static ssize_t dev_show_rev(struct device *dev,
  465. struct device_attribute *attr,
  466. char *buf)
  467. {
  468. drive_info_struct *drv = to_drv(dev);
  469. struct ctlr_info *h = to_hba(drv->dev.parent);
  470. char rev[REV_LEN + 1];
  471. unsigned long flags;
  472. int ret = 0;
  473. spin_lock_irqsave(CCISS_LOCK(h->ctlr), flags);
  474. if (h->busy_configuring)
  475. ret = -EBUSY;
  476. else
  477. memcpy(rev, drv->rev, REV_LEN + 1);
  478. spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
  479. if (ret)
  480. return ret;
  481. else
  482. return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
  483. }
  484. DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
  485. static struct attribute *cciss_dev_attrs[] = {
  486. &dev_attr_unique_id.attr,
  487. &dev_attr_model.attr,
  488. &dev_attr_vendor.attr,
  489. &dev_attr_rev.attr,
  490. NULL
  491. };
  492. static struct attribute_group cciss_dev_attr_group = {
  493. .attrs = cciss_dev_attrs,
  494. };
  495. static struct attribute_group *cciss_dev_attr_groups[] = {
  496. &cciss_dev_attr_group,
  497. NULL
  498. };
  499. static struct device_type cciss_dev_type = {
  500. .name = "cciss_device",
  501. .groups = cciss_dev_attr_groups,
  502. };
  503. static struct bus_type cciss_bus_type = {
  504. .name = "cciss",
  505. };
  506. /*
  507. * Initialize sysfs entry for each controller. This sets up and registers
  508. * the 'cciss#' directory for each individual controller under
  509. * /sys/bus/pci/devices/<dev>/.
  510. */
  511. static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
  512. {
  513. device_initialize(&h->dev);
  514. h->dev.type = &cciss_host_type;
  515. h->dev.bus = &cciss_bus_type;
  516. dev_set_name(&h->dev, "%s", h->devname);
  517. h->dev.parent = &h->pdev->dev;
  518. return device_add(&h->dev);
  519. }
  520. /*
  521. * Remove sysfs entries for an hba.
  522. */
  523. static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
  524. {
  525. device_del(&h->dev);
  526. }
  527. /*
  528. * Initialize sysfs for each logical drive. This sets up and registers
  529. * the 'c#d#' directory for each individual logical drive under
  530. * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
  531. * /sys/block/cciss!c#d# to this entry.
  532. */
  533. static int cciss_create_ld_sysfs_entry(struct ctlr_info *h,
  534. drive_info_struct *drv,
  535. int drv_index)
  536. {
  537. device_initialize(&drv->dev);
  538. drv->dev.type = &cciss_dev_type;
  539. drv->dev.bus = &cciss_bus_type;
  540. dev_set_name(&drv->dev, "c%dd%d", h->ctlr, drv_index);
  541. drv->dev.parent = &h->dev;
  542. return device_add(&drv->dev);
  543. }
  544. /*
  545. * Remove sysfs entries for a logical drive.
  546. */
  547. static void cciss_destroy_ld_sysfs_entry(drive_info_struct *drv)
  548. {
  549. device_del(&drv->dev);
  550. }
  551. /*
  552. * For operations that cannot sleep, a command block is allocated at init,
  553. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  554. * which ones are free or in use. For operations that can wait for kmalloc
  555. * to possible sleep, this routine can be called with get_from_pool set to 0.
  556. * cmd_free() MUST be called with a got_from_pool set to 0 if cmd_alloc was.
  557. */
  558. static CommandList_struct *cmd_alloc(ctlr_info_t *h, int get_from_pool)
  559. {
  560. CommandList_struct *c;
  561. int i;
  562. u64bit temp64;
  563. dma_addr_t cmd_dma_handle, err_dma_handle;
  564. if (!get_from_pool) {
  565. c = (CommandList_struct *) pci_alloc_consistent(h->pdev,
  566. sizeof(CommandList_struct), &cmd_dma_handle);
  567. if (c == NULL)
  568. return NULL;
  569. memset(c, 0, sizeof(CommandList_struct));
  570. c->cmdindex = -1;
  571. c->err_info = (ErrorInfo_struct *)
  572. pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
  573. &err_dma_handle);
  574. if (c->err_info == NULL) {
  575. pci_free_consistent(h->pdev,
  576. sizeof(CommandList_struct), c, cmd_dma_handle);
  577. return NULL;
  578. }
  579. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  580. } else { /* get it out of the controllers pool */
  581. do {
  582. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  583. if (i == h->nr_cmds)
  584. return NULL;
  585. } while (test_and_set_bit
  586. (i & (BITS_PER_LONG - 1),
  587. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  588. #ifdef CCISS_DEBUG
  589. printk(KERN_DEBUG "cciss: using command buffer %d\n", i);
  590. #endif
  591. c = h->cmd_pool + i;
  592. memset(c, 0, sizeof(CommandList_struct));
  593. cmd_dma_handle = h->cmd_pool_dhandle
  594. + i * sizeof(CommandList_struct);
  595. c->err_info = h->errinfo_pool + i;
  596. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  597. err_dma_handle = h->errinfo_pool_dhandle
  598. + i * sizeof(ErrorInfo_struct);
  599. h->nr_allocs++;
  600. c->cmdindex = i;
  601. }
  602. INIT_HLIST_NODE(&c->list);
  603. c->busaddr = (__u32) cmd_dma_handle;
  604. temp64.val = (__u64) err_dma_handle;
  605. c->ErrDesc.Addr.lower = temp64.val32.lower;
  606. c->ErrDesc.Addr.upper = temp64.val32.upper;
  607. c->ErrDesc.Len = sizeof(ErrorInfo_struct);
  608. c->ctlr = h->ctlr;
  609. return c;
  610. }
  611. /*
  612. * Frees a command block that was previously allocated with cmd_alloc().
  613. */
  614. static void cmd_free(ctlr_info_t *h, CommandList_struct *c, int got_from_pool)
  615. {
  616. int i;
  617. u64bit temp64;
  618. if (!got_from_pool) {
  619. temp64.val32.lower = c->ErrDesc.Addr.lower;
  620. temp64.val32.upper = c->ErrDesc.Addr.upper;
  621. pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
  622. c->err_info, (dma_addr_t) temp64.val);
  623. pci_free_consistent(h->pdev, sizeof(CommandList_struct),
  624. c, (dma_addr_t) c->busaddr);
  625. } else {
  626. i = c - h->cmd_pool;
  627. clear_bit(i & (BITS_PER_LONG - 1),
  628. h->cmd_pool_bits + (i / BITS_PER_LONG));
  629. h->nr_frees++;
  630. }
  631. }
  632. static inline ctlr_info_t *get_host(struct gendisk *disk)
  633. {
  634. return disk->queue->queuedata;
  635. }
  636. static inline drive_info_struct *get_drv(struct gendisk *disk)
  637. {
  638. return disk->private_data;
  639. }
  640. /*
  641. * Open. Make sure the device is really there.
  642. */
  643. static int cciss_open(struct block_device *bdev, fmode_t mode)
  644. {
  645. ctlr_info_t *host = get_host(bdev->bd_disk);
  646. drive_info_struct *drv = get_drv(bdev->bd_disk);
  647. #ifdef CCISS_DEBUG
  648. printk(KERN_DEBUG "cciss_open %s\n", bdev->bd_disk->disk_name);
  649. #endif /* CCISS_DEBUG */
  650. if (host->busy_initializing || drv->busy_configuring)
  651. return -EBUSY;
  652. /*
  653. * Root is allowed to open raw volume zero even if it's not configured
  654. * so array config can still work. Root is also allowed to open any
  655. * volume that has a LUN ID, so it can issue IOCTL to reread the
  656. * disk information. I don't think I really like this
  657. * but I'm already using way to many device nodes to claim another one
  658. * for "raw controller".
  659. */
  660. if (drv->heads == 0) {
  661. if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
  662. /* if not node 0 make sure it is a partition = 0 */
  663. if (MINOR(bdev->bd_dev) & 0x0f) {
  664. return -ENXIO;
  665. /* if it is, make sure we have a LUN ID */
  666. } else if (drv->LunID == 0) {
  667. return -ENXIO;
  668. }
  669. }
  670. if (!capable(CAP_SYS_ADMIN))
  671. return -EPERM;
  672. }
  673. drv->usage_count++;
  674. host->usage_count++;
  675. return 0;
  676. }
  677. /*
  678. * Close. Sync first.
  679. */
  680. static int cciss_release(struct gendisk *disk, fmode_t mode)
  681. {
  682. ctlr_info_t *host = get_host(disk);
  683. drive_info_struct *drv = get_drv(disk);
  684. #ifdef CCISS_DEBUG
  685. printk(KERN_DEBUG "cciss_release %s\n", disk->disk_name);
  686. #endif /* CCISS_DEBUG */
  687. drv->usage_count--;
  688. host->usage_count--;
  689. return 0;
  690. }
  691. #ifdef CONFIG_COMPAT
  692. static int do_ioctl(struct block_device *bdev, fmode_t mode,
  693. unsigned cmd, unsigned long arg)
  694. {
  695. int ret;
  696. lock_kernel();
  697. ret = cciss_ioctl(bdev, mode, cmd, arg);
  698. unlock_kernel();
  699. return ret;
  700. }
  701. static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
  702. unsigned cmd, unsigned long arg);
  703. static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
  704. unsigned cmd, unsigned long arg);
  705. static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
  706. unsigned cmd, unsigned long arg)
  707. {
  708. switch (cmd) {
  709. case CCISS_GETPCIINFO:
  710. case CCISS_GETINTINFO:
  711. case CCISS_SETINTINFO:
  712. case CCISS_GETNODENAME:
  713. case CCISS_SETNODENAME:
  714. case CCISS_GETHEARTBEAT:
  715. case CCISS_GETBUSTYPES:
  716. case CCISS_GETFIRMVER:
  717. case CCISS_GETDRIVVER:
  718. case CCISS_REVALIDVOLS:
  719. case CCISS_DEREGDISK:
  720. case CCISS_REGNEWDISK:
  721. case CCISS_REGNEWD:
  722. case CCISS_RESCANDISK:
  723. case CCISS_GETLUNINFO:
  724. return do_ioctl(bdev, mode, cmd, arg);
  725. case CCISS_PASSTHRU32:
  726. return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
  727. case CCISS_BIG_PASSTHRU32:
  728. return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
  729. default:
  730. return -ENOIOCTLCMD;
  731. }
  732. }
  733. static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
  734. unsigned cmd, unsigned long arg)
  735. {
  736. IOCTL32_Command_struct __user *arg32 =
  737. (IOCTL32_Command_struct __user *) arg;
  738. IOCTL_Command_struct arg64;
  739. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  740. int err;
  741. u32 cp;
  742. err = 0;
  743. err |=
  744. copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  745. sizeof(arg64.LUN_info));
  746. err |=
  747. copy_from_user(&arg64.Request, &arg32->Request,
  748. sizeof(arg64.Request));
  749. err |=
  750. copy_from_user(&arg64.error_info, &arg32->error_info,
  751. sizeof(arg64.error_info));
  752. err |= get_user(arg64.buf_size, &arg32->buf_size);
  753. err |= get_user(cp, &arg32->buf);
  754. arg64.buf = compat_ptr(cp);
  755. err |= copy_to_user(p, &arg64, sizeof(arg64));
  756. if (err)
  757. return -EFAULT;
  758. err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
  759. if (err)
  760. return err;
  761. err |=
  762. copy_in_user(&arg32->error_info, &p->error_info,
  763. sizeof(arg32->error_info));
  764. if (err)
  765. return -EFAULT;
  766. return err;
  767. }
  768. static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
  769. unsigned cmd, unsigned long arg)
  770. {
  771. BIG_IOCTL32_Command_struct __user *arg32 =
  772. (BIG_IOCTL32_Command_struct __user *) arg;
  773. BIG_IOCTL_Command_struct arg64;
  774. BIG_IOCTL_Command_struct __user *p =
  775. compat_alloc_user_space(sizeof(arg64));
  776. int err;
  777. u32 cp;
  778. err = 0;
  779. err |=
  780. copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  781. sizeof(arg64.LUN_info));
  782. err |=
  783. copy_from_user(&arg64.Request, &arg32->Request,
  784. sizeof(arg64.Request));
  785. err |=
  786. copy_from_user(&arg64.error_info, &arg32->error_info,
  787. sizeof(arg64.error_info));
  788. err |= get_user(arg64.buf_size, &arg32->buf_size);
  789. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  790. err |= get_user(cp, &arg32->buf);
  791. arg64.buf = compat_ptr(cp);
  792. err |= copy_to_user(p, &arg64, sizeof(arg64));
  793. if (err)
  794. return -EFAULT;
  795. err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
  796. if (err)
  797. return err;
  798. err |=
  799. copy_in_user(&arg32->error_info, &p->error_info,
  800. sizeof(arg32->error_info));
  801. if (err)
  802. return -EFAULT;
  803. return err;
  804. }
  805. #endif
  806. static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
  807. {
  808. drive_info_struct *drv = get_drv(bdev->bd_disk);
  809. if (!drv->cylinders)
  810. return -ENXIO;
  811. geo->heads = drv->heads;
  812. geo->sectors = drv->sectors;
  813. geo->cylinders = drv->cylinders;
  814. return 0;
  815. }
  816. static void check_ioctl_unit_attention(ctlr_info_t *host, CommandList_struct *c)
  817. {
  818. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  819. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  820. (void)check_for_unit_attention(host, c);
  821. }
  822. /*
  823. * ioctl
  824. */
  825. static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
  826. unsigned int cmd, unsigned long arg)
  827. {
  828. struct gendisk *disk = bdev->bd_disk;
  829. ctlr_info_t *host = get_host(disk);
  830. drive_info_struct *drv = get_drv(disk);
  831. int ctlr = host->ctlr;
  832. void __user *argp = (void __user *)arg;
  833. #ifdef CCISS_DEBUG
  834. printk(KERN_DEBUG "cciss_ioctl: Called with cmd=%x %lx\n", cmd, arg);
  835. #endif /* CCISS_DEBUG */
  836. switch (cmd) {
  837. case CCISS_GETPCIINFO:
  838. {
  839. cciss_pci_info_struct pciinfo;
  840. if (!arg)
  841. return -EINVAL;
  842. pciinfo.domain = pci_domain_nr(host->pdev->bus);
  843. pciinfo.bus = host->pdev->bus->number;
  844. pciinfo.dev_fn = host->pdev->devfn;
  845. pciinfo.board_id = host->board_id;
  846. if (copy_to_user
  847. (argp, &pciinfo, sizeof(cciss_pci_info_struct)))
  848. return -EFAULT;
  849. return 0;
  850. }
  851. case CCISS_GETINTINFO:
  852. {
  853. cciss_coalint_struct intinfo;
  854. if (!arg)
  855. return -EINVAL;
  856. intinfo.delay =
  857. readl(&host->cfgtable->HostWrite.CoalIntDelay);
  858. intinfo.count =
  859. readl(&host->cfgtable->HostWrite.CoalIntCount);
  860. if (copy_to_user
  861. (argp, &intinfo, sizeof(cciss_coalint_struct)))
  862. return -EFAULT;
  863. return 0;
  864. }
  865. case CCISS_SETINTINFO:
  866. {
  867. cciss_coalint_struct intinfo;
  868. unsigned long flags;
  869. int i;
  870. if (!arg)
  871. return -EINVAL;
  872. if (!capable(CAP_SYS_ADMIN))
  873. return -EPERM;
  874. if (copy_from_user
  875. (&intinfo, argp, sizeof(cciss_coalint_struct)))
  876. return -EFAULT;
  877. if ((intinfo.delay == 0) && (intinfo.count == 0))
  878. {
  879. // printk("cciss_ioctl: delay and count cannot be 0\n");
  880. return -EINVAL;
  881. }
  882. spin_lock_irqsave(CCISS_LOCK(ctlr), flags);
  883. /* Update the field, and then ring the doorbell */
  884. writel(intinfo.delay,
  885. &(host->cfgtable->HostWrite.CoalIntDelay));
  886. writel(intinfo.count,
  887. &(host->cfgtable->HostWrite.CoalIntCount));
  888. writel(CFGTBL_ChangeReq, host->vaddr + SA5_DOORBELL);
  889. for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
  890. if (!(readl(host->vaddr + SA5_DOORBELL)
  891. & CFGTBL_ChangeReq))
  892. break;
  893. /* delay and try again */
  894. udelay(1000);
  895. }
  896. spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
  897. if (i >= MAX_IOCTL_CONFIG_WAIT)
  898. return -EAGAIN;
  899. return 0;
  900. }
  901. case CCISS_GETNODENAME:
  902. {
  903. NodeName_type NodeName;
  904. int i;
  905. if (!arg)
  906. return -EINVAL;
  907. for (i = 0; i < 16; i++)
  908. NodeName[i] =
  909. readb(&host->cfgtable->ServerName[i]);
  910. if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
  911. return -EFAULT;
  912. return 0;
  913. }
  914. case CCISS_SETNODENAME:
  915. {
  916. NodeName_type NodeName;
  917. unsigned long flags;
  918. int i;
  919. if (!arg)
  920. return -EINVAL;
  921. if (!capable(CAP_SYS_ADMIN))
  922. return -EPERM;
  923. if (copy_from_user
  924. (NodeName, argp, sizeof(NodeName_type)))
  925. return -EFAULT;
  926. spin_lock_irqsave(CCISS_LOCK(ctlr), flags);
  927. /* Update the field, and then ring the doorbell */
  928. for (i = 0; i < 16; i++)
  929. writeb(NodeName[i],
  930. &host->cfgtable->ServerName[i]);
  931. writel(CFGTBL_ChangeReq, host->vaddr + SA5_DOORBELL);
  932. for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
  933. if (!(readl(host->vaddr + SA5_DOORBELL)
  934. & CFGTBL_ChangeReq))
  935. break;
  936. /* delay and try again */
  937. udelay(1000);
  938. }
  939. spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
  940. if (i >= MAX_IOCTL_CONFIG_WAIT)
  941. return -EAGAIN;
  942. return 0;
  943. }
  944. case CCISS_GETHEARTBEAT:
  945. {
  946. Heartbeat_type heartbeat;
  947. if (!arg)
  948. return -EINVAL;
  949. heartbeat = readl(&host->cfgtable->HeartBeat);
  950. if (copy_to_user
  951. (argp, &heartbeat, sizeof(Heartbeat_type)))
  952. return -EFAULT;
  953. return 0;
  954. }
  955. case CCISS_GETBUSTYPES:
  956. {
  957. BusTypes_type BusTypes;
  958. if (!arg)
  959. return -EINVAL;
  960. BusTypes = readl(&host->cfgtable->BusTypes);
  961. if (copy_to_user
  962. (argp, &BusTypes, sizeof(BusTypes_type)))
  963. return -EFAULT;
  964. return 0;
  965. }
  966. case CCISS_GETFIRMVER:
  967. {
  968. FirmwareVer_type firmware;
  969. if (!arg)
  970. return -EINVAL;
  971. memcpy(firmware, host->firm_ver, 4);
  972. if (copy_to_user
  973. (argp, firmware, sizeof(FirmwareVer_type)))
  974. return -EFAULT;
  975. return 0;
  976. }
  977. case CCISS_GETDRIVVER:
  978. {
  979. DriverVer_type DriverVer = DRIVER_VERSION;
  980. if (!arg)
  981. return -EINVAL;
  982. if (copy_to_user
  983. (argp, &DriverVer, sizeof(DriverVer_type)))
  984. return -EFAULT;
  985. return 0;
  986. }
  987. case CCISS_DEREGDISK:
  988. case CCISS_REGNEWD:
  989. case CCISS_REVALIDVOLS:
  990. return rebuild_lun_table(host, 0);
  991. case CCISS_GETLUNINFO:{
  992. LogvolInfo_struct luninfo;
  993. luninfo.LunID = drv->LunID;
  994. luninfo.num_opens = drv->usage_count;
  995. luninfo.num_parts = 0;
  996. if (copy_to_user(argp, &luninfo,
  997. sizeof(LogvolInfo_struct)))
  998. return -EFAULT;
  999. return 0;
  1000. }
  1001. case CCISS_PASSTHRU:
  1002. {
  1003. IOCTL_Command_struct iocommand;
  1004. CommandList_struct *c;
  1005. char *buff = NULL;
  1006. u64bit temp64;
  1007. unsigned long flags;
  1008. DECLARE_COMPLETION_ONSTACK(wait);
  1009. if (!arg)
  1010. return -EINVAL;
  1011. if (!capable(CAP_SYS_RAWIO))
  1012. return -EPERM;
  1013. if (copy_from_user
  1014. (&iocommand, argp, sizeof(IOCTL_Command_struct)))
  1015. return -EFAULT;
  1016. if ((iocommand.buf_size < 1) &&
  1017. (iocommand.Request.Type.Direction != XFER_NONE)) {
  1018. return -EINVAL;
  1019. }
  1020. #if 0 /* 'buf_size' member is 16-bits, and always smaller than kmalloc limit */
  1021. /* Check kmalloc limits */
  1022. if (iocommand.buf_size > 128000)
  1023. return -EINVAL;
  1024. #endif
  1025. if (iocommand.buf_size > 0) {
  1026. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  1027. if (buff == NULL)
  1028. return -EFAULT;
  1029. }
  1030. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  1031. /* Copy the data into the buffer we created */
  1032. if (copy_from_user
  1033. (buff, iocommand.buf, iocommand.buf_size)) {
  1034. kfree(buff);
  1035. return -EFAULT;
  1036. }
  1037. } else {
  1038. memset(buff, 0, iocommand.buf_size);
  1039. }
  1040. if ((c = cmd_alloc(host, 0)) == NULL) {
  1041. kfree(buff);
  1042. return -ENOMEM;
  1043. }
  1044. // Fill in the command type
  1045. c->cmd_type = CMD_IOCTL_PEND;
  1046. // Fill in Command Header
  1047. c->Header.ReplyQueue = 0; // unused in simple mode
  1048. if (iocommand.buf_size > 0) // buffer to fill
  1049. {
  1050. c->Header.SGList = 1;
  1051. c->Header.SGTotal = 1;
  1052. } else // no buffers to fill
  1053. {
  1054. c->Header.SGList = 0;
  1055. c->Header.SGTotal = 0;
  1056. }
  1057. c->Header.LUN = iocommand.LUN_info;
  1058. c->Header.Tag.lower = c->busaddr; // use the kernel address the cmd block for tag
  1059. // Fill in Request block
  1060. c->Request = iocommand.Request;
  1061. // Fill in the scatter gather information
  1062. if (iocommand.buf_size > 0) {
  1063. temp64.val = pci_map_single(host->pdev, buff,
  1064. iocommand.buf_size,
  1065. PCI_DMA_BIDIRECTIONAL);
  1066. c->SG[0].Addr.lower = temp64.val32.lower;
  1067. c->SG[0].Addr.upper = temp64.val32.upper;
  1068. c->SG[0].Len = iocommand.buf_size;
  1069. c->SG[0].Ext = 0; // we are not chaining
  1070. }
  1071. c->waiting = &wait;
  1072. /* Put the request on the tail of the request queue */
  1073. spin_lock_irqsave(CCISS_LOCK(ctlr), flags);
  1074. addQ(&host->reqQ, c);
  1075. host->Qdepth++;
  1076. start_io(host);
  1077. spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
  1078. wait_for_completion(&wait);
  1079. /* unlock the buffers from DMA */
  1080. temp64.val32.lower = c->SG[0].Addr.lower;
  1081. temp64.val32.upper = c->SG[0].Addr.upper;
  1082. pci_unmap_single(host->pdev, (dma_addr_t) temp64.val,
  1083. iocommand.buf_size,
  1084. PCI_DMA_BIDIRECTIONAL);
  1085. check_ioctl_unit_attention(host, c);
  1086. /* Copy the error information out */
  1087. iocommand.error_info = *(c->err_info);
  1088. if (copy_to_user
  1089. (argp, &iocommand, sizeof(IOCTL_Command_struct))) {
  1090. kfree(buff);
  1091. cmd_free(host, c, 0);
  1092. return -EFAULT;
  1093. }
  1094. if (iocommand.Request.Type.Direction == XFER_READ) {
  1095. /* Copy the data out of the buffer we created */
  1096. if (copy_to_user
  1097. (iocommand.buf, buff, iocommand.buf_size)) {
  1098. kfree(buff);
  1099. cmd_free(host, c, 0);
  1100. return -EFAULT;
  1101. }
  1102. }
  1103. kfree(buff);
  1104. cmd_free(host, c, 0);
  1105. return 0;
  1106. }
  1107. case CCISS_BIG_PASSTHRU:{
  1108. BIG_IOCTL_Command_struct *ioc;
  1109. CommandList_struct *c;
  1110. unsigned char **buff = NULL;
  1111. int *buff_size = NULL;
  1112. u64bit temp64;
  1113. unsigned long flags;
  1114. BYTE sg_used = 0;
  1115. int status = 0;
  1116. int i;
  1117. DECLARE_COMPLETION_ONSTACK(wait);
  1118. __u32 left;
  1119. __u32 sz;
  1120. BYTE __user *data_ptr;
  1121. if (!arg)
  1122. return -EINVAL;
  1123. if (!capable(CAP_SYS_RAWIO))
  1124. return -EPERM;
  1125. ioc = (BIG_IOCTL_Command_struct *)
  1126. kmalloc(sizeof(*ioc), GFP_KERNEL);
  1127. if (!ioc) {
  1128. status = -ENOMEM;
  1129. goto cleanup1;
  1130. }
  1131. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  1132. status = -EFAULT;
  1133. goto cleanup1;
  1134. }
  1135. if ((ioc->buf_size < 1) &&
  1136. (ioc->Request.Type.Direction != XFER_NONE)) {
  1137. status = -EINVAL;
  1138. goto cleanup1;
  1139. }
  1140. /* Check kmalloc limits using all SGs */
  1141. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  1142. status = -EINVAL;
  1143. goto cleanup1;
  1144. }
  1145. if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
  1146. status = -EINVAL;
  1147. goto cleanup1;
  1148. }
  1149. buff =
  1150. kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
  1151. if (!buff) {
  1152. status = -ENOMEM;
  1153. goto cleanup1;
  1154. }
  1155. buff_size = kmalloc(MAXSGENTRIES * sizeof(int),
  1156. GFP_KERNEL);
  1157. if (!buff_size) {
  1158. status = -ENOMEM;
  1159. goto cleanup1;
  1160. }
  1161. left = ioc->buf_size;
  1162. data_ptr = ioc->buf;
  1163. while (left) {
  1164. sz = (left >
  1165. ioc->malloc_size) ? ioc->
  1166. malloc_size : left;
  1167. buff_size[sg_used] = sz;
  1168. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  1169. if (buff[sg_used] == NULL) {
  1170. status = -ENOMEM;
  1171. goto cleanup1;
  1172. }
  1173. if (ioc->Request.Type.Direction == XFER_WRITE) {
  1174. if (copy_from_user
  1175. (buff[sg_used], data_ptr, sz)) {
  1176. status = -EFAULT;
  1177. goto cleanup1;
  1178. }
  1179. } else {
  1180. memset(buff[sg_used], 0, sz);
  1181. }
  1182. left -= sz;
  1183. data_ptr += sz;
  1184. sg_used++;
  1185. }
  1186. if ((c = cmd_alloc(host, 0)) == NULL) {
  1187. status = -ENOMEM;
  1188. goto cleanup1;
  1189. }
  1190. c->cmd_type = CMD_IOCTL_PEND;
  1191. c->Header.ReplyQueue = 0;
  1192. if (ioc->buf_size > 0) {
  1193. c->Header.SGList = sg_used;
  1194. c->Header.SGTotal = sg_used;
  1195. } else {
  1196. c->Header.SGList = 0;
  1197. c->Header.SGTotal = 0;
  1198. }
  1199. c->Header.LUN = ioc->LUN_info;
  1200. c->Header.Tag.lower = c->busaddr;
  1201. c->Request = ioc->Request;
  1202. if (ioc->buf_size > 0) {
  1203. int i;
  1204. for (i = 0; i < sg_used; i++) {
  1205. temp64.val =
  1206. pci_map_single(host->pdev, buff[i],
  1207. buff_size[i],
  1208. PCI_DMA_BIDIRECTIONAL);
  1209. c->SG[i].Addr.lower =
  1210. temp64.val32.lower;
  1211. c->SG[i].Addr.upper =
  1212. temp64.val32.upper;
  1213. c->SG[i].Len = buff_size[i];
  1214. c->SG[i].Ext = 0; /* we are not chaining */
  1215. }
  1216. }
  1217. c->waiting = &wait;
  1218. /* Put the request on the tail of the request queue */
  1219. spin_lock_irqsave(CCISS_LOCK(ctlr), flags);
  1220. addQ(&host->reqQ, c);
  1221. host->Qdepth++;
  1222. start_io(host);
  1223. spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
  1224. wait_for_completion(&wait);
  1225. /* unlock the buffers from DMA */
  1226. for (i = 0; i < sg_used; i++) {
  1227. temp64.val32.lower = c->SG[i].Addr.lower;
  1228. temp64.val32.upper = c->SG[i].Addr.upper;
  1229. pci_unmap_single(host->pdev,
  1230. (dma_addr_t) temp64.val, buff_size[i],
  1231. PCI_DMA_BIDIRECTIONAL);
  1232. }
  1233. check_ioctl_unit_attention(host, c);
  1234. /* Copy the error information out */
  1235. ioc->error_info = *(c->err_info);
  1236. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  1237. cmd_free(host, c, 0);
  1238. status = -EFAULT;
  1239. goto cleanup1;
  1240. }
  1241. if (ioc->Request.Type.Direction == XFER_READ) {
  1242. /* Copy the data out of the buffer we created */
  1243. BYTE __user *ptr = ioc->buf;
  1244. for (i = 0; i < sg_used; i++) {
  1245. if (copy_to_user
  1246. (ptr, buff[i], buff_size[i])) {
  1247. cmd_free(host, c, 0);
  1248. status = -EFAULT;
  1249. goto cleanup1;
  1250. }
  1251. ptr += buff_size[i];
  1252. }
  1253. }
  1254. cmd_free(host, c, 0);
  1255. status = 0;
  1256. cleanup1:
  1257. if (buff) {
  1258. for (i = 0; i < sg_used; i++)
  1259. kfree(buff[i]);
  1260. kfree(buff);
  1261. }
  1262. kfree(buff_size);
  1263. kfree(ioc);
  1264. return status;
  1265. }
  1266. /* scsi_cmd_ioctl handles these, below, though some are not */
  1267. /* very meaningful for cciss. SG_IO is the main one people want. */
  1268. case SG_GET_VERSION_NUM:
  1269. case SG_SET_TIMEOUT:
  1270. case SG_GET_TIMEOUT:
  1271. case SG_GET_RESERVED_SIZE:
  1272. case SG_SET_RESERVED_SIZE:
  1273. case SG_EMULATED_HOST:
  1274. case SG_IO:
  1275. case SCSI_IOCTL_SEND_COMMAND:
  1276. return scsi_cmd_ioctl(disk->queue, disk, mode, cmd, argp);
  1277. /* scsi_cmd_ioctl would normally handle these, below, but */
  1278. /* they aren't a good fit for cciss, as CD-ROMs are */
  1279. /* not supported, and we don't have any bus/target/lun */
  1280. /* which we present to the kernel. */
  1281. case CDROM_SEND_PACKET:
  1282. case CDROMCLOSETRAY:
  1283. case CDROMEJECT:
  1284. case SCSI_IOCTL_GET_IDLUN:
  1285. case SCSI_IOCTL_GET_BUS_NUMBER:
  1286. default:
  1287. return -ENOTTY;
  1288. }
  1289. }
  1290. static void cciss_check_queues(ctlr_info_t *h)
  1291. {
  1292. int start_queue = h->next_to_run;
  1293. int i;
  1294. /* check to see if we have maxed out the number of commands that can
  1295. * be placed on the queue. If so then exit. We do this check here
  1296. * in case the interrupt we serviced was from an ioctl and did not
  1297. * free any new commands.
  1298. */
  1299. if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
  1300. return;
  1301. /* We have room on the queue for more commands. Now we need to queue
  1302. * them up. We will also keep track of the next queue to run so
  1303. * that every queue gets a chance to be started first.
  1304. */
  1305. for (i = 0; i < h->highest_lun + 1; i++) {
  1306. int curr_queue = (start_queue + i) % (h->highest_lun + 1);
  1307. /* make sure the disk has been added and the drive is real
  1308. * because this can be called from the middle of init_one.
  1309. */
  1310. if (!(h->drv[curr_queue].queue) || !(h->drv[curr_queue].heads))
  1311. continue;
  1312. blk_start_queue(h->gendisk[curr_queue]->queue);
  1313. /* check to see if we have maxed out the number of commands
  1314. * that can be placed on the queue.
  1315. */
  1316. if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
  1317. if (curr_queue == start_queue) {
  1318. h->next_to_run =
  1319. (start_queue + 1) % (h->highest_lun + 1);
  1320. break;
  1321. } else {
  1322. h->next_to_run = curr_queue;
  1323. break;
  1324. }
  1325. }
  1326. }
  1327. }
  1328. static void cciss_softirq_done(struct request *rq)
  1329. {
  1330. CommandList_struct *cmd = rq->completion_data;
  1331. ctlr_info_t *h = hba[cmd->ctlr];
  1332. unsigned long flags;
  1333. u64bit temp64;
  1334. int i, ddir;
  1335. if (cmd->Request.Type.Direction == XFER_READ)
  1336. ddir = PCI_DMA_FROMDEVICE;
  1337. else
  1338. ddir = PCI_DMA_TODEVICE;
  1339. /* command did not need to be retried */
  1340. /* unmap the DMA mapping for all the scatter gather elements */
  1341. for (i = 0; i < cmd->Header.SGList; i++) {
  1342. temp64.val32.lower = cmd->SG[i].Addr.lower;
  1343. temp64.val32.upper = cmd->SG[i].Addr.upper;
  1344. pci_unmap_page(h->pdev, temp64.val, cmd->SG[i].Len, ddir);
  1345. }
  1346. #ifdef CCISS_DEBUG
  1347. printk("Done with %p\n", rq);
  1348. #endif /* CCISS_DEBUG */
  1349. /* set the residual count for pc requests */
  1350. if (blk_pc_request(rq))
  1351. rq->resid_len = cmd->err_info->ResidualCnt;
  1352. blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
  1353. spin_lock_irqsave(&h->lock, flags);
  1354. cmd_free(h, cmd, 1);
  1355. cciss_check_queues(h);
  1356. spin_unlock_irqrestore(&h->lock, flags);
  1357. }
  1358. static void log_unit_to_scsi3addr(ctlr_info_t *h, unsigned char scsi3addr[],
  1359. uint32_t log_unit)
  1360. {
  1361. log_unit = h->drv[log_unit].LunID & 0x03fff;
  1362. memset(&scsi3addr[4], 0, 4);
  1363. memcpy(&scsi3addr[0], &log_unit, 4);
  1364. scsi3addr[3] |= 0x40;
  1365. }
  1366. /* This function gets the SCSI vendor, model, and revision of a logical drive
  1367. * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
  1368. * they cannot be read.
  1369. */
  1370. static void cciss_get_device_descr(int ctlr, int logvol, int withirq,
  1371. char *vendor, char *model, char *rev)
  1372. {
  1373. int rc;
  1374. InquiryData_struct *inq_buf;
  1375. unsigned char scsi3addr[8];
  1376. *vendor = '\0';
  1377. *model = '\0';
  1378. *rev = '\0';
  1379. inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  1380. if (!inq_buf)
  1381. return;
  1382. log_unit_to_scsi3addr(hba[ctlr], scsi3addr, logvol);
  1383. if (withirq)
  1384. rc = sendcmd_withirq(CISS_INQUIRY, ctlr, inq_buf,
  1385. sizeof(InquiryData_struct), 0,
  1386. scsi3addr, TYPE_CMD);
  1387. else
  1388. rc = sendcmd(CISS_INQUIRY, ctlr, inq_buf,
  1389. sizeof(InquiryData_struct), 0,
  1390. scsi3addr, TYPE_CMD);
  1391. if (rc == IO_OK) {
  1392. memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
  1393. vendor[VENDOR_LEN] = '\0';
  1394. memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
  1395. model[MODEL_LEN] = '\0';
  1396. memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
  1397. rev[REV_LEN] = '\0';
  1398. }
  1399. kfree(inq_buf);
  1400. return;
  1401. }
  1402. /* This function gets the serial number of a logical drive via
  1403. * inquiry page 0x83. Serial no. is 16 bytes. If the serial
  1404. * number cannot be had, for whatever reason, 16 bytes of 0xff
  1405. * are returned instead.
  1406. */
  1407. static void cciss_get_serial_no(int ctlr, int logvol, int withirq,
  1408. unsigned char *serial_no, int buflen)
  1409. {
  1410. #define PAGE_83_INQ_BYTES 64
  1411. int rc;
  1412. unsigned char *buf;
  1413. unsigned char scsi3addr[8];
  1414. if (buflen > 16)
  1415. buflen = 16;
  1416. memset(serial_no, 0xff, buflen);
  1417. buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
  1418. if (!buf)
  1419. return;
  1420. memset(serial_no, 0, buflen);
  1421. log_unit_to_scsi3addr(hba[ctlr], scsi3addr, logvol);
  1422. if (withirq)
  1423. rc = sendcmd_withirq(CISS_INQUIRY, ctlr, buf,
  1424. PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
  1425. else
  1426. rc = sendcmd(CISS_INQUIRY, ctlr, buf,
  1427. PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
  1428. if (rc == IO_OK)
  1429. memcpy(serial_no, &buf[8], buflen);
  1430. kfree(buf);
  1431. return;
  1432. }
  1433. static void cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
  1434. int drv_index)
  1435. {
  1436. disk->queue = blk_init_queue(do_cciss_request, &h->lock);
  1437. sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
  1438. disk->major = h->major;
  1439. disk->first_minor = drv_index << NWD_SHIFT;
  1440. disk->fops = &cciss_fops;
  1441. disk->private_data = &h->drv[drv_index];
  1442. disk->driverfs_dev = &h->drv[drv_index].dev;
  1443. /* Set up queue information */
  1444. blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
  1445. /* This is a hardware imposed limit. */
  1446. blk_queue_max_hw_segments(disk->queue, MAXSGENTRIES);
  1447. /* This is a limit in the driver and could be eliminated. */
  1448. blk_queue_max_phys_segments(disk->queue, MAXSGENTRIES);
  1449. blk_queue_max_sectors(disk->queue, h->cciss_max_sectors);
  1450. blk_queue_softirq_done(disk->queue, cciss_softirq_done);
  1451. disk->queue->queuedata = h;
  1452. blk_queue_logical_block_size(disk->queue,
  1453. h->drv[drv_index].block_size);
  1454. /* Make sure all queue data is written out before */
  1455. /* setting h->drv[drv_index].queue, as setting this */
  1456. /* allows the interrupt handler to start the queue */
  1457. wmb();
  1458. h->drv[drv_index].queue = disk->queue;
  1459. add_disk(disk);
  1460. }
  1461. /* This function will check the usage_count of the drive to be updated/added.
  1462. * If the usage_count is zero and it is a heretofore unknown drive, or,
  1463. * the drive's capacity, geometry, or serial number has changed,
  1464. * then the drive information will be updated and the disk will be
  1465. * re-registered with the kernel. If these conditions don't hold,
  1466. * then it will be left alone for the next reboot. The exception to this
  1467. * is disk 0 which will always be left registered with the kernel since it
  1468. * is also the controller node. Any changes to disk 0 will show up on
  1469. * the next reboot.
  1470. */
  1471. static void cciss_update_drive_info(int ctlr, int drv_index, int first_time)
  1472. {
  1473. ctlr_info_t *h = hba[ctlr];
  1474. struct gendisk *disk;
  1475. InquiryData_struct *inq_buff = NULL;
  1476. unsigned int block_size;
  1477. sector_t total_size;
  1478. unsigned long flags = 0;
  1479. int ret = 0;
  1480. drive_info_struct *drvinfo;
  1481. int was_only_controller_node;
  1482. /* Get information about the disk and modify the driver structure */
  1483. inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  1484. drvinfo = kmalloc(sizeof(*drvinfo), GFP_KERNEL);
  1485. if (inq_buff == NULL || drvinfo == NULL)
  1486. goto mem_msg;
  1487. /* See if we're trying to update the "controller node"
  1488. * this will happen the when the first logical drive gets
  1489. * created by ACU.
  1490. */
  1491. was_only_controller_node = (drv_index == 0 &&
  1492. h->drv[0].raid_level == -1);
  1493. /* testing to see if 16-byte CDBs are already being used */
  1494. if (h->cciss_read == CCISS_READ_16) {
  1495. cciss_read_capacity_16(h->ctlr, drv_index, 1,
  1496. &total_size, &block_size);
  1497. } else {
  1498. cciss_read_capacity(ctlr, drv_index, 1,
  1499. &total_size, &block_size);
  1500. /* if read_capacity returns all F's this volume is >2TB */
  1501. /* in size so we switch to 16-byte CDB's for all */
  1502. /* read/write ops */
  1503. if (total_size == 0xFFFFFFFFULL) {
  1504. cciss_read_capacity_16(ctlr, drv_index, 1,
  1505. &total_size, &block_size);
  1506. h->cciss_read = CCISS_READ_16;
  1507. h->cciss_write = CCISS_WRITE_16;
  1508. } else {
  1509. h->cciss_read = CCISS_READ_10;
  1510. h->cciss_write = CCISS_WRITE_10;
  1511. }
  1512. }
  1513. cciss_geometry_inquiry(ctlr, drv_index, 1, total_size, block_size,
  1514. inq_buff, drvinfo);
  1515. drvinfo->block_size = block_size;
  1516. drvinfo->nr_blocks = total_size + 1;
  1517. cciss_get_device_descr(ctlr, drv_index, 1, drvinfo->vendor,
  1518. drvinfo->model, drvinfo->rev);
  1519. cciss_get_serial_no(ctlr, drv_index, 1, drvinfo->serial_no,
  1520. sizeof(drvinfo->serial_no));
  1521. /* Is it the same disk we already know, and nothing's changed? */
  1522. if (h->drv[drv_index].raid_level != -1 &&
  1523. ((memcmp(drvinfo->serial_no,
  1524. h->drv[drv_index].serial_no, 16) == 0) &&
  1525. drvinfo->block_size == h->drv[drv_index].block_size &&
  1526. drvinfo->nr_blocks == h->drv[drv_index].nr_blocks &&
  1527. drvinfo->heads == h->drv[drv_index].heads &&
  1528. drvinfo->sectors == h->drv[drv_index].sectors &&
  1529. drvinfo->cylinders == h->drv[drv_index].cylinders))
  1530. /* The disk is unchanged, nothing to update */
  1531. goto freeret;
  1532. /* If we get here it's not the same disk, or something's changed,
  1533. * so we need to * deregister it, and re-register it, if it's not
  1534. * in use.
  1535. * If the disk already exists then deregister it before proceeding
  1536. * (unless it's the first disk (for the controller node).
  1537. */
  1538. if (h->drv[drv_index].raid_level != -1 && drv_index != 0) {
  1539. printk(KERN_WARNING "disk %d has changed.\n", drv_index);
  1540. spin_lock_irqsave(CCISS_LOCK(h->ctlr), flags);
  1541. h->drv[drv_index].busy_configuring = 1;
  1542. spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
  1543. /* deregister_disk sets h->drv[drv_index].queue = NULL
  1544. * which keeps the interrupt handler from starting
  1545. * the queue.
  1546. */
  1547. ret = deregister_disk(h, drv_index, 0);
  1548. h->drv[drv_index].busy_configuring = 0;
  1549. }
  1550. /* If the disk is in use return */
  1551. if (ret)
  1552. goto freeret;
  1553. /* Save the new information from cciss_geometry_inquiry
  1554. * and serial number inquiry.
  1555. */
  1556. h->drv[drv_index].block_size = drvinfo->block_size;
  1557. h->drv[drv_index].nr_blocks = drvinfo->nr_blocks;
  1558. h->drv[drv_index].heads = drvinfo->heads;
  1559. h->drv[drv_index].sectors = drvinfo->sectors;
  1560. h->drv[drv_index].cylinders = drvinfo->cylinders;
  1561. h->drv[drv_index].raid_level = drvinfo->raid_level;
  1562. memcpy(h->drv[drv_index].serial_no, drvinfo->serial_no, 16);
  1563. memcpy(h->drv[drv_index].vendor, drvinfo->vendor, VENDOR_LEN + 1);
  1564. memcpy(h->drv[drv_index].model, drvinfo->model, MODEL_LEN + 1);
  1565. memcpy(h->drv[drv_index].rev, drvinfo->rev, REV_LEN + 1);
  1566. ++h->num_luns;
  1567. disk = h->gendisk[drv_index];
  1568. set_capacity(disk, h->drv[drv_index].nr_blocks);
  1569. /* If it's not disk 0 (drv_index != 0)
  1570. * or if it was disk 0, but there was previously
  1571. * no actual corresponding configured logical drive
  1572. * (raid_leve == -1) then we want to update the
  1573. * logical drive's information.
  1574. */
  1575. if (drv_index || first_time)
  1576. cciss_add_disk(h, disk, drv_index);
  1577. freeret:
  1578. kfree(inq_buff);
  1579. kfree(drvinfo);
  1580. return;
  1581. mem_msg:
  1582. printk(KERN_ERR "cciss: out of memory\n");
  1583. goto freeret;
  1584. }
  1585. /* This function will find the first index of the controllers drive array
  1586. * that has a -1 for the raid_level and will return that index. This is
  1587. * where new drives will be added. If the index to be returned is greater
  1588. * than the highest_lun index for the controller then highest_lun is set
  1589. * to this new index. If there are no available indexes then -1 is returned.
  1590. * "controller_node" is used to know if this is a real logical drive, or just
  1591. * the controller node, which determines if this counts towards highest_lun.
  1592. */
  1593. static int cciss_find_free_drive_index(int ctlr, int controller_node)
  1594. {
  1595. int i;
  1596. for (i = 0; i < CISS_MAX_LUN; i++) {
  1597. if (hba[ctlr]->drv[i].raid_level == -1) {
  1598. if (i > hba[ctlr]->highest_lun)
  1599. if (!controller_node)
  1600. hba[ctlr]->highest_lun = i;
  1601. return i;
  1602. }
  1603. }
  1604. return -1;
  1605. }
  1606. /* cciss_add_gendisk finds a free hba[]->drv structure
  1607. * and allocates a gendisk if needed, and sets the lunid
  1608. * in the drvinfo structure. It returns the index into
  1609. * the ->drv[] array, or -1 if none are free.
  1610. * is_controller_node indicates whether highest_lun should
  1611. * count this disk, or if it's only being added to provide
  1612. * a means to talk to the controller in case no logical
  1613. * drives have yet been configured.
  1614. */
  1615. static int cciss_add_gendisk(ctlr_info_t *h, __u32 lunid, int controller_node)
  1616. {
  1617. int drv_index;
  1618. drv_index = cciss_find_free_drive_index(h->ctlr, controller_node);
  1619. if (drv_index == -1)
  1620. return -1;
  1621. /*Check if the gendisk needs to be allocated */
  1622. if (!h->gendisk[drv_index]) {
  1623. h->gendisk[drv_index] =
  1624. alloc_disk(1 << NWD_SHIFT);
  1625. if (!h->gendisk[drv_index]) {
  1626. printk(KERN_ERR "cciss%d: could not "
  1627. "allocate a new disk %d\n",
  1628. h->ctlr, drv_index);
  1629. return -1;
  1630. }
  1631. }
  1632. h->drv[drv_index].LunID = lunid;
  1633. if (cciss_create_ld_sysfs_entry(h, &h->drv[drv_index], drv_index))
  1634. goto err_free_disk;
  1635. /* Don't need to mark this busy because nobody */
  1636. /* else knows about this disk yet to contend */
  1637. /* for access to it. */
  1638. h->drv[drv_index].busy_configuring = 0;
  1639. wmb();
  1640. return drv_index;
  1641. err_free_disk:
  1642. put_disk(h->gendisk[drv_index]);
  1643. h->gendisk[drv_index] = NULL;
  1644. return -1;
  1645. }
  1646. /* This is for the special case of a controller which
  1647. * has no logical drives. In this case, we still need
  1648. * to register a disk so the controller can be accessed
  1649. * by the Array Config Utility.
  1650. */
  1651. static void cciss_add_controller_node(ctlr_info_t *h)
  1652. {
  1653. struct gendisk *disk;
  1654. int drv_index;
  1655. if (h->gendisk[0] != NULL) /* already did this? Then bail. */
  1656. return;
  1657. drv_index = cciss_add_gendisk(h, 0, 1);
  1658. if (drv_index == -1) {
  1659. printk(KERN_WARNING "cciss%d: could not "
  1660. "add disk 0.\n", h->ctlr);
  1661. return;
  1662. }
  1663. h->drv[drv_index].block_size = 512;
  1664. h->drv[drv_index].nr_blocks = 0;
  1665. h->drv[drv_index].heads = 0;
  1666. h->drv[drv_index].sectors = 0;
  1667. h->drv[drv_index].cylinders = 0;
  1668. h->drv[drv_index].raid_level = -1;
  1669. memset(h->drv[drv_index].serial_no, 0, 16);
  1670. disk = h->gendisk[drv_index];
  1671. cciss_add_disk(h, disk, drv_index);
  1672. }
  1673. /* This function will add and remove logical drives from the Logical
  1674. * drive array of the controller and maintain persistency of ordering
  1675. * so that mount points are preserved until the next reboot. This allows
  1676. * for the removal of logical drives in the middle of the drive array
  1677. * without a re-ordering of those drives.
  1678. * INPUT
  1679. * h = The controller to perform the operations on
  1680. */
  1681. static int rebuild_lun_table(ctlr_info_t *h, int first_time)
  1682. {
  1683. int ctlr = h->ctlr;
  1684. int num_luns;
  1685. ReportLunData_struct *ld_buff = NULL;
  1686. int return_code;
  1687. int listlength = 0;
  1688. int i;
  1689. int drv_found;
  1690. int drv_index = 0;
  1691. __u32 lunid = 0;
  1692. unsigned long flags;
  1693. if (!capable(CAP_SYS_RAWIO))
  1694. return -EPERM;
  1695. /* Set busy_configuring flag for this operation */
  1696. spin_lock_irqsave(CCISS_LOCK(h->ctlr), flags);
  1697. if (h->busy_configuring) {
  1698. spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
  1699. return -EBUSY;
  1700. }
  1701. h->busy_configuring = 1;
  1702. spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
  1703. ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
  1704. if (ld_buff == NULL)
  1705. goto mem_msg;
  1706. return_code = sendcmd_withirq(CISS_REPORT_LOG, ctlr, ld_buff,
  1707. sizeof(ReportLunData_struct),
  1708. 0, CTLR_LUNID, TYPE_CMD);
  1709. if (return_code == IO_OK)
  1710. listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
  1711. else { /* reading number of logical volumes failed */
  1712. printk(KERN_WARNING "cciss: report logical volume"
  1713. " command failed\n");
  1714. listlength = 0;
  1715. goto freeret;
  1716. }
  1717. num_luns = listlength / 8; /* 8 bytes per entry */
  1718. if (num_luns > CISS_MAX_LUN) {
  1719. num_luns = CISS_MAX_LUN;
  1720. printk(KERN_WARNING "cciss: more luns configured"
  1721. " on controller than can be handled by"
  1722. " this driver.\n");
  1723. }
  1724. if (num_luns == 0)
  1725. cciss_add_controller_node(h);
  1726. /* Compare controller drive array to driver's drive array
  1727. * to see if any drives are missing on the controller due
  1728. * to action of Array Config Utility (user deletes drive)
  1729. * and deregister logical drives which have disappeared.
  1730. */
  1731. for (i = 0; i <= h->highest_lun; i++) {
  1732. int j;
  1733. drv_found = 0;
  1734. /* skip holes in the array from already deleted drives */
  1735. if (h->drv[i].raid_level == -1)
  1736. continue;
  1737. for (j = 0; j < num_luns; j++) {
  1738. memcpy(&lunid, &ld_buff->LUN[j][0], 4);
  1739. lunid = le32_to_cpu(lunid);
  1740. if (h->drv[i].LunID == lunid) {
  1741. drv_found = 1;
  1742. break;
  1743. }
  1744. }
  1745. if (!drv_found) {
  1746. /* Deregister it from the OS, it's gone. */
  1747. spin_lock_irqsave(CCISS_LOCK(h->ctlr), flags);
  1748. h->drv[i].busy_configuring = 1;
  1749. spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
  1750. return_code = deregister_disk(h, i, 1);
  1751. cciss_destroy_ld_sysfs_entry(&h->drv[i]);
  1752. h->drv[i].busy_configuring = 0;
  1753. }
  1754. }
  1755. /* Compare controller drive array to driver's drive array.
  1756. * Check for updates in the drive information and any new drives
  1757. * on the controller due to ACU adding logical drives, or changing
  1758. * a logical drive's size, etc. Reregister any new/changed drives
  1759. */
  1760. for (i = 0; i < num_luns; i++) {
  1761. int j;
  1762. drv_found = 0;
  1763. memcpy(&lunid, &ld_buff->LUN[i][0], 4);
  1764. lunid = le32_to_cpu(lunid);
  1765. /* Find if the LUN is already in the drive array
  1766. * of the driver. If so then update its info
  1767. * if not in use. If it does not exist then find
  1768. * the first free index and add it.
  1769. */
  1770. for (j = 0; j <= h->highest_lun; j++) {
  1771. if (h->drv[j].raid_level != -1 &&
  1772. h->drv[j].LunID == lunid) {
  1773. drv_index = j;
  1774. drv_found = 1;
  1775. break;
  1776. }
  1777. }
  1778. /* check if the drive was found already in the array */
  1779. if (!drv_found) {
  1780. drv_index = cciss_add_gendisk(h, lunid, 0);
  1781. if (drv_index == -1)
  1782. goto freeret;
  1783. }
  1784. cciss_update_drive_info(ctlr, drv_index, first_time);
  1785. } /* end for */
  1786. freeret:
  1787. kfree(ld_buff);
  1788. h->busy_configuring = 0;
  1789. /* We return -1 here to tell the ACU that we have registered/updated
  1790. * all of the drives that we can and to keep it from calling us
  1791. * additional times.
  1792. */
  1793. return -1;
  1794. mem_msg:
  1795. printk(KERN_ERR "cciss: out of memory\n");
  1796. h->busy_configuring = 0;
  1797. goto freeret;
  1798. }
  1799. /* This function will deregister the disk and it's queue from the
  1800. * kernel. It must be called with the controller lock held and the
  1801. * drv structures busy_configuring flag set. It's parameters are:
  1802. *
  1803. * disk = This is the disk to be deregistered
  1804. * drv = This is the drive_info_struct associated with the disk to be
  1805. * deregistered. It contains information about the disk used
  1806. * by the driver.
  1807. * clear_all = This flag determines whether or not the disk information
  1808. * is going to be completely cleared out and the highest_lun
  1809. * reset. Sometimes we want to clear out information about
  1810. * the disk in preparation for re-adding it. In this case
  1811. * the highest_lun should be left unchanged and the LunID
  1812. * should not be cleared.
  1813. */
  1814. static int deregister_disk(ctlr_info_t *h, int drv_index,
  1815. int clear_all)
  1816. {
  1817. int i;
  1818. struct gendisk *disk;
  1819. drive_info_struct *drv;
  1820. if (!capable(CAP_SYS_RAWIO))
  1821. return -EPERM;
  1822. drv = &h->drv[drv_index];
  1823. disk = h->gendisk[drv_index];
  1824. /* make sure logical volume is NOT is use */
  1825. if (clear_all || (h->gendisk[0] == disk)) {
  1826. if (drv->usage_count > 1)
  1827. return -EBUSY;
  1828. } else if (drv->usage_count > 0)
  1829. return -EBUSY;
  1830. /* invalidate the devices and deregister the disk. If it is disk
  1831. * zero do not deregister it but just zero out it's values. This
  1832. * allows us to delete disk zero but keep the controller registered.
  1833. */
  1834. if (h->gendisk[0] != disk) {
  1835. struct request_queue *q = disk->queue;
  1836. if (disk->flags & GENHD_FL_UP)
  1837. del_gendisk(disk);
  1838. if (q) {
  1839. blk_cleanup_queue(q);
  1840. /* Set drv->queue to NULL so that we do not try
  1841. * to call blk_start_queue on this queue in the
  1842. * interrupt handler
  1843. */
  1844. drv->queue = NULL;
  1845. }
  1846. /* If clear_all is set then we are deleting the logical
  1847. * drive, not just refreshing its info. For drives
  1848. * other than disk 0 we will call put_disk. We do not
  1849. * do this for disk 0 as we need it to be able to
  1850. * configure the controller.
  1851. */
  1852. if (clear_all){
  1853. /* This isn't pretty, but we need to find the
  1854. * disk in our array and NULL our the pointer.
  1855. * This is so that we will call alloc_disk if
  1856. * this index is used again later.
  1857. */
  1858. for (i=0; i < CISS_MAX_LUN; i++){
  1859. if (h->gendisk[i] == disk) {
  1860. h->gendisk[i] = NULL;
  1861. break;
  1862. }
  1863. }
  1864. put_disk(disk);
  1865. }
  1866. } else {
  1867. set_capacity(disk, 0);
  1868. }
  1869. --h->num_luns;
  1870. /* zero out the disk size info */
  1871. drv->nr_blocks = 0;
  1872. drv->block_size = 0;
  1873. drv->heads = 0;
  1874. drv->sectors = 0;
  1875. drv->cylinders = 0;
  1876. drv->raid_level = -1; /* This can be used as a flag variable to
  1877. * indicate that this element of the drive
  1878. * array is free.
  1879. */
  1880. if (clear_all) {
  1881. /* check to see if it was the last disk */
  1882. if (drv == h->drv + h->highest_lun) {
  1883. /* if so, find the new hightest lun */
  1884. int i, newhighest = -1;
  1885. for (i = 0; i <= h->highest_lun; i++) {
  1886. /* if the disk has size > 0, it is available */
  1887. if (h->drv[i].heads)
  1888. newhighest = i;
  1889. }
  1890. h->highest_lun = newhighest;
  1891. }
  1892. drv->LunID = 0;
  1893. }
  1894. return 0;
  1895. }
  1896. static int fill_cmd(CommandList_struct *c, __u8 cmd, int ctlr, void *buff,
  1897. size_t size, __u8 page_code, unsigned char *scsi3addr,
  1898. int cmd_type)
  1899. {
  1900. ctlr_info_t *h = hba[ctlr];
  1901. u64bit buff_dma_handle;
  1902. int status = IO_OK;
  1903. c->cmd_type = CMD_IOCTL_PEND;
  1904. c->Header.ReplyQueue = 0;
  1905. if (buff != NULL) {
  1906. c->Header.SGList = 1;
  1907. c->Header.SGTotal = 1;
  1908. } else {
  1909. c->Header.SGList = 0;
  1910. c->Header.SGTotal = 0;
  1911. }
  1912. c->Header.Tag.lower = c->busaddr;
  1913. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  1914. c->Request.Type.Type = cmd_type;
  1915. if (cmd_type == TYPE_CMD) {
  1916. switch (cmd) {
  1917. case CISS_INQUIRY:
  1918. /* are we trying to read a vital product page */
  1919. if (page_code != 0) {
  1920. c->Request.CDB[1] = 0x01;
  1921. c->Request.CDB[2] = page_code;
  1922. }
  1923. c->Request.CDBLen = 6;
  1924. c->Request.Type.Attribute = ATTR_SIMPLE;
  1925. c->Request.Type.Direction = XFER_READ;
  1926. c->Request.Timeout = 0;
  1927. c->Request.CDB[0] = CISS_INQUIRY;
  1928. c->Request.CDB[4] = size & 0xFF;
  1929. break;
  1930. case CISS_REPORT_LOG:
  1931. case CISS_REPORT_PHYS:
  1932. /* Talking to controller so It's a physical command
  1933. mode = 00 target = 0. Nothing to write.
  1934. */
  1935. c->Request.CDBLen = 12;
  1936. c->Request.Type.Attribute = ATTR_SIMPLE;
  1937. c->Request.Type.Direction = XFER_READ;
  1938. c->Request.Timeout = 0;
  1939. c->Request.CDB[0] = cmd;
  1940. c->Request.CDB[6] = (size >> 24) & 0xFF; //MSB
  1941. c->Request.CDB[7] = (size >> 16) & 0xFF;
  1942. c->Request.CDB[8] = (size >> 8) & 0xFF;
  1943. c->Request.CDB[9] = size & 0xFF;
  1944. break;
  1945. case CCISS_READ_CAPACITY:
  1946. c->Request.CDBLen = 10;
  1947. c->Request.Type.Attribute = ATTR_SIMPLE;
  1948. c->Request.Type.Direction = XFER_READ;
  1949. c->Request.Timeout = 0;
  1950. c->Request.CDB[0] = cmd;
  1951. break;
  1952. case CCISS_READ_CAPACITY_16:
  1953. c->Request.CDBLen = 16;
  1954. c->Request.Type.Attribute = ATTR_SIMPLE;
  1955. c->Request.Type.Direction = XFER_READ;
  1956. c->Request.Timeout = 0;
  1957. c->Request.CDB[0] = cmd;
  1958. c->Request.CDB[1] = 0x10;
  1959. c->Request.CDB[10] = (size >> 24) & 0xFF;
  1960. c->Request.CDB[11] = (size >> 16) & 0xFF;
  1961. c->Request.CDB[12] = (size >> 8) & 0xFF;
  1962. c->Request.CDB[13] = size & 0xFF;
  1963. c->Request.Timeout = 0;
  1964. c->Request.CDB[0] = cmd;
  1965. break;
  1966. case CCISS_CACHE_FLUSH:
  1967. c->Request.CDBLen = 12;
  1968. c->Request.Type.Attribute = ATTR_SIMPLE;
  1969. c->Request.Type.Direction = XFER_WRITE;
  1970. c->Request.Timeout = 0;
  1971. c->Request.CDB[0] = BMIC_WRITE;
  1972. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  1973. break;
  1974. case TEST_UNIT_READY:
  1975. c->Request.CDBLen = 6;
  1976. c->Request.Type.Attribute = ATTR_SIMPLE;
  1977. c->Request.Type.Direction = XFER_NONE;
  1978. c->Request.Timeout = 0;
  1979. break;
  1980. default:
  1981. printk(KERN_WARNING
  1982. "cciss%d: Unknown Command 0x%c\n", ctlr, cmd);
  1983. return IO_ERROR;
  1984. }
  1985. } else if (cmd_type == TYPE_MSG) {
  1986. switch (cmd) {
  1987. case 0: /* ABORT message */
  1988. c->Request.CDBLen = 12;
  1989. c->Request.Type.Attribute = ATTR_SIMPLE;
  1990. c->Request.Type.Direction = XFER_WRITE;
  1991. c->Request.Timeout = 0;
  1992. c->Request.CDB[0] = cmd; /* abort */
  1993. c->Request.CDB[1] = 0; /* abort a command */
  1994. /* buff contains the tag of the command to abort */
  1995. memcpy(&c->Request.CDB[4], buff, 8);
  1996. break;
  1997. case 1: /* RESET message */
  1998. c->Request.CDBLen = 16;
  1999. c->Request.Type.Attribute = ATTR_SIMPLE;
  2000. c->Request.Type.Direction = XFER_NONE;
  2001. c->Request.Timeout = 0;
  2002. memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
  2003. c->Request.CDB[0] = cmd; /* reset */
  2004. c->Request.CDB[1] = 0x03; /* reset a target */
  2005. break;
  2006. case 3: /* No-Op message */
  2007. c->Request.CDBLen = 1;
  2008. c->Request.Type.Attribute = ATTR_SIMPLE;
  2009. c->Request.Type.Direction = XFER_WRITE;
  2010. c->Request.Timeout = 0;
  2011. c->Request.CDB[0] = cmd;
  2012. break;
  2013. default:
  2014. printk(KERN_WARNING
  2015. "cciss%d: unknown message type %d\n", ctlr, cmd);
  2016. return IO_ERROR;
  2017. }
  2018. } else {
  2019. printk(KERN_WARNING
  2020. "cciss%d: unknown command type %d\n", ctlr, cmd_type);
  2021. return IO_ERROR;
  2022. }
  2023. /* Fill in the scatter gather information */
  2024. if (size > 0) {
  2025. buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
  2026. buff, size,
  2027. PCI_DMA_BIDIRECTIONAL);
  2028. c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
  2029. c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
  2030. c->SG[0].Len = size;
  2031. c->SG[0].Ext = 0; /* we are not chaining */
  2032. }
  2033. return status;
  2034. }
  2035. static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
  2036. {
  2037. switch (c->err_info->ScsiStatus) {
  2038. case SAM_STAT_GOOD:
  2039. return IO_OK;
  2040. case SAM_STAT_CHECK_CONDITION:
  2041. switch (0xf & c->err_info->SenseInfo[2]) {
  2042. case 0: return IO_OK; /* no sense */
  2043. case 1: return IO_OK; /* recovered error */
  2044. default:
  2045. printk(KERN_WARNING "cciss%d: cmd 0x%02x "
  2046. "check condition, sense key = 0x%02x\n",
  2047. h->ctlr, c->Request.CDB[0],
  2048. c->err_info->SenseInfo[2]);
  2049. }
  2050. break;
  2051. default:
  2052. printk(KERN_WARNING "cciss%d: cmd 0x%02x"
  2053. "scsi status = 0x%02x\n", h->ctlr,
  2054. c->Request.CDB[0], c->err_info->ScsiStatus);
  2055. break;
  2056. }
  2057. return IO_ERROR;
  2058. }
  2059. static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
  2060. {
  2061. int return_status = IO_OK;
  2062. if (c->err_info->CommandStatus == CMD_SUCCESS)
  2063. return IO_OK;
  2064. switch (c->err_info->CommandStatus) {
  2065. case CMD_TARGET_STATUS:
  2066. return_status = check_target_status(h, c);
  2067. break;
  2068. case CMD_DATA_UNDERRUN:
  2069. case CMD_DATA_OVERRUN:
  2070. /* expected for inquiry and report lun commands */
  2071. break;
  2072. case CMD_INVALID:
  2073. printk(KERN_WARNING "cciss: cmd 0x%02x is "
  2074. "reported invalid\n", c->Request.CDB[0]);
  2075. return_status = IO_ERROR;
  2076. break;
  2077. case CMD_PROTOCOL_ERR:
  2078. printk(KERN_WARNING "cciss: cmd 0x%02x has "
  2079. "protocol error \n", c->Request.CDB[0]);
  2080. return_status = IO_ERROR;
  2081. break;
  2082. case CMD_HARDWARE_ERR:
  2083. printk(KERN_WARNING "cciss: cmd 0x%02x had "
  2084. " hardware error\n", c->Request.CDB[0]);
  2085. return_status = IO_ERROR;
  2086. break;
  2087. case CMD_CONNECTION_LOST:
  2088. printk(KERN_WARNING "cciss: cmd 0x%02x had "
  2089. "connection lost\n", c->Request.CDB[0]);
  2090. return_status = IO_ERROR;
  2091. break;
  2092. case CMD_ABORTED:
  2093. printk(KERN_WARNING "cciss: cmd 0x%02x was "
  2094. "aborted\n", c->Request.CDB[0]);
  2095. return_status = IO_ERROR;
  2096. break;
  2097. case CMD_ABORT_FAILED:
  2098. printk(KERN_WARNING "cciss: cmd 0x%02x reports "
  2099. "abort failed\n", c->Request.CDB[0]);
  2100. return_status = IO_ERROR;
  2101. break;
  2102. case CMD_UNSOLICITED_ABORT:
  2103. printk(KERN_WARNING
  2104. "cciss%d: unsolicited abort 0x%02x\n", h->ctlr,
  2105. c->Request.CDB[0]);
  2106. return_status = IO_NEEDS_RETRY;
  2107. break;
  2108. default:
  2109. printk(KERN_WARNING "cciss: cmd 0x%02x returned "
  2110. "unknown status %x\n", c->Request.CDB[0],
  2111. c->err_info->CommandStatus);
  2112. return_status = IO_ERROR;
  2113. }
  2114. return return_status;
  2115. }
  2116. static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
  2117. int attempt_retry)
  2118. {
  2119. DECLARE_COMPLETION_ONSTACK(wait);
  2120. u64bit buff_dma_handle;
  2121. unsigned long flags;
  2122. int return_status = IO_OK;
  2123. resend_cmd2:
  2124. c->waiting = &wait;
  2125. /* Put the request on the tail of the queue and send it */
  2126. spin_lock_irqsave(CCISS_LOCK(h->ctlr), flags);
  2127. addQ(&h->reqQ, c);
  2128. h->Qdepth++;
  2129. start_io(h);
  2130. spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
  2131. wait_for_completion(&wait);
  2132. if (c->err_info->CommandStatus == 0 || !attempt_retry)
  2133. goto command_done;
  2134. return_status = process_sendcmd_error(h, c);
  2135. if (return_status == IO_NEEDS_RETRY &&
  2136. c->retry_count < MAX_CMD_RETRIES) {
  2137. printk(KERN_WARNING "cciss%d: retrying 0x%02x\n", h->ctlr,
  2138. c->Request.CDB[0]);
  2139. c->retry_count++;
  2140. /* erase the old error information */
  2141. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  2142. return_status = IO_OK;
  2143. INIT_COMPLETION(wait);
  2144. goto resend_cmd2;
  2145. }
  2146. command_done:
  2147. /* unlock the buffers from DMA */
  2148. buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
  2149. buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
  2150. pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
  2151. c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
  2152. return return_status;
  2153. }
  2154. static int sendcmd_withirq(__u8 cmd, int ctlr, void *buff, size_t size,
  2155. __u8 page_code, unsigned char scsi3addr[],
  2156. int cmd_type)
  2157. {
  2158. ctlr_info_t *h = hba[ctlr];
  2159. CommandList_struct *c;
  2160. int return_status;
  2161. c = cmd_alloc(h, 0);
  2162. if (!c)
  2163. return -ENOMEM;
  2164. return_status = fill_cmd(c, cmd, ctlr, buff, size, page_code,
  2165. scsi3addr, cmd_type);
  2166. if (return_status == IO_OK)
  2167. return_status = sendcmd_withirq_core(h, c, 1);
  2168. cmd_free(h, c, 0);
  2169. return return_status;
  2170. }
  2171. static void cciss_geometry_inquiry(int ctlr, int logvol,
  2172. int withirq, sector_t total_size,
  2173. unsigned int block_size,
  2174. InquiryData_struct *inq_buff,
  2175. drive_info_struct *drv)
  2176. {
  2177. int return_code;
  2178. unsigned long t;
  2179. unsigned char scsi3addr[8];
  2180. memset(inq_buff, 0, sizeof(InquiryData_struct));
  2181. log_unit_to_scsi3addr(hba[ctlr], scsi3addr, logvol);
  2182. if (withirq)
  2183. return_code = sendcmd_withirq(CISS_INQUIRY, ctlr,
  2184. inq_buff, sizeof(*inq_buff),
  2185. 0xC1, scsi3addr, TYPE_CMD);
  2186. else
  2187. return_code = sendcmd(CISS_INQUIRY, ctlr, inq_buff,
  2188. sizeof(*inq_buff), 0xC1, scsi3addr,
  2189. TYPE_CMD);
  2190. if (return_code == IO_OK) {
  2191. if (inq_buff->data_byte[8] == 0xFF) {
  2192. printk(KERN_WARNING
  2193. "cciss: reading geometry failed, volume "
  2194. "does not support reading geometry\n");
  2195. drv->heads = 255;
  2196. drv->sectors = 32; // Sectors per track
  2197. drv->cylinders = total_size + 1;
  2198. drv->raid_level = RAID_UNKNOWN;
  2199. } else {
  2200. drv->heads = inq_buff->data_byte[6];
  2201. drv->sectors = inq_buff->data_byte[7];
  2202. drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
  2203. drv->cylinders += inq_buff->data_byte[5];
  2204. drv->raid_level = inq_buff->data_byte[8];
  2205. }
  2206. drv->block_size = block_size;
  2207. drv->nr_blocks = total_size + 1;
  2208. t = drv->heads * drv->sectors;
  2209. if (t > 1) {
  2210. sector_t real_size = total_size + 1;
  2211. unsigned long rem = sector_div(real_size, t);
  2212. if (rem)
  2213. real_size++;
  2214. drv->cylinders = real_size;
  2215. }
  2216. } else { /* Get geometry failed */
  2217. printk(KERN_WARNING "cciss: reading geometry failed\n");
  2218. }
  2219. printk(KERN_INFO " heads=%d, sectors=%d, cylinders=%d\n\n",
  2220. drv->heads, drv->sectors, drv->cylinders);
  2221. }
  2222. static void
  2223. cciss_read_capacity(int ctlr, int logvol, int withirq, sector_t *total_size,
  2224. unsigned int *block_size)
  2225. {
  2226. ReadCapdata_struct *buf;
  2227. int return_code;
  2228. unsigned char scsi3addr[8];
  2229. buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
  2230. if (!buf) {
  2231. printk(KERN_WARNING "cciss: out of memory\n");
  2232. return;
  2233. }
  2234. log_unit_to_scsi3addr(hba[ctlr], scsi3addr, logvol);
  2235. if (withirq)
  2236. return_code = sendcmd_withirq(CCISS_READ_CAPACITY,
  2237. ctlr, buf, sizeof(ReadCapdata_struct),
  2238. 0, scsi3addr, TYPE_CMD);
  2239. else
  2240. return_code = sendcmd(CCISS_READ_CAPACITY,
  2241. ctlr, buf, sizeof(ReadCapdata_struct),
  2242. 0, scsi3addr, TYPE_CMD);
  2243. if (return_code == IO_OK) {
  2244. *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
  2245. *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
  2246. } else { /* read capacity command failed */
  2247. printk(KERN_WARNING "cciss: read capacity failed\n");
  2248. *total_size = 0;
  2249. *block_size = BLOCK_SIZE;
  2250. }
  2251. if (*total_size != 0)
  2252. printk(KERN_INFO " blocks= %llu block_size= %d\n",
  2253. (unsigned long long)*total_size+1, *block_size);
  2254. kfree(buf);
  2255. }
  2256. static void
  2257. cciss_read_capacity_16(int ctlr, int logvol, int withirq, sector_t *total_size, unsigned int *block_size)
  2258. {
  2259. ReadCapdata_struct_16 *buf;
  2260. int return_code;
  2261. unsigned char scsi3addr[8];
  2262. buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
  2263. if (!buf) {
  2264. printk(KERN_WARNING "cciss: out of memory\n");
  2265. return;
  2266. }
  2267. log_unit_to_scsi3addr(hba[ctlr], scsi3addr, logvol);
  2268. if (withirq) {
  2269. return_code = sendcmd_withirq(CCISS_READ_CAPACITY_16,
  2270. ctlr, buf, sizeof(ReadCapdata_struct_16),
  2271. 0, scsi3addr, TYPE_CMD);
  2272. }
  2273. else {
  2274. return_code = sendcmd(CCISS_READ_CAPACITY_16,
  2275. ctlr, buf, sizeof(ReadCapdata_struct_16),
  2276. 0, scsi3addr, TYPE_CMD);
  2277. }
  2278. if (return_code == IO_OK) {
  2279. *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
  2280. *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
  2281. } else { /* read capacity command failed */
  2282. printk(KERN_WARNING "cciss: read capacity failed\n");
  2283. *total_size = 0;
  2284. *block_size = BLOCK_SIZE;
  2285. }
  2286. printk(KERN_INFO " blocks= %llu block_size= %d\n",
  2287. (unsigned long long)*total_size+1, *block_size);
  2288. kfree(buf);
  2289. }
  2290. static int cciss_revalidate(struct gendisk *disk)
  2291. {
  2292. ctlr_info_t *h = get_host(disk);
  2293. drive_info_struct *drv = get_drv(disk);
  2294. int logvol;
  2295. int FOUND = 0;
  2296. unsigned int block_size;
  2297. sector_t total_size;
  2298. InquiryData_struct *inq_buff = NULL;
  2299. for (logvol = 0; logvol < CISS_MAX_LUN; logvol++) {
  2300. if (h->drv[logvol].LunID == drv->LunID) {
  2301. FOUND = 1;
  2302. break;
  2303. }
  2304. }
  2305. if (!FOUND)
  2306. return 1;
  2307. inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  2308. if (inq_buff == NULL) {
  2309. printk(KERN_WARNING "cciss: out of memory\n");
  2310. return 1;
  2311. }
  2312. if (h->cciss_read == CCISS_READ_10) {
  2313. cciss_read_capacity(h->ctlr, logvol, 1,
  2314. &total_size, &block_size);
  2315. } else {
  2316. cciss_read_capacity_16(h->ctlr, logvol, 1,
  2317. &total_size, &block_size);
  2318. }
  2319. cciss_geometry_inquiry(h->ctlr, logvol, 1, total_size, block_size,
  2320. inq_buff, drv);
  2321. blk_queue_logical_block_size(drv->queue, drv->block_size);
  2322. set_capacity(disk, drv->nr_blocks);
  2323. kfree(inq_buff);
  2324. return 0;
  2325. }
  2326. /*
  2327. * Wait polling for a command to complete.
  2328. * The memory mapped FIFO is polled for the completion.
  2329. * Used only at init time, interrupts from the HBA are disabled.
  2330. */
  2331. static unsigned long pollcomplete(int ctlr)
  2332. {
  2333. unsigned long done;
  2334. int i;
  2335. /* Wait (up to 20 seconds) for a command to complete */
  2336. for (i = 20 * HZ; i > 0; i--) {
  2337. done = hba[ctlr]->access.command_completed(hba[ctlr]);
  2338. if (done == FIFO_EMPTY)
  2339. schedule_timeout_uninterruptible(1);
  2340. else
  2341. return done;
  2342. }
  2343. /* Invalid address to tell caller we ran out of time */
  2344. return 1;
  2345. }
  2346. /* Send command c to controller h and poll for it to complete.
  2347. * Turns interrupts off on the board. Used at driver init time
  2348. * and during SCSI error recovery.
  2349. */
  2350. static int sendcmd_core(ctlr_info_t *h, CommandList_struct *c)
  2351. {
  2352. int i;
  2353. unsigned long complete;
  2354. int status = IO_ERROR;
  2355. u64bit buff_dma_handle;
  2356. resend_cmd1:
  2357. /* Disable interrupt on the board. */
  2358. h->access.set_intr_mask(h, CCISS_INTR_OFF);
  2359. /* Make sure there is room in the command FIFO */
  2360. /* Actually it should be completely empty at this time */
  2361. /* unless we are in here doing error handling for the scsi */
  2362. /* tape side of the driver. */
  2363. for (i = 200000; i > 0; i--) {
  2364. /* if fifo isn't full go */
  2365. if (!(h->access.fifo_full(h)))
  2366. break;
  2367. udelay(10);
  2368. printk(KERN_WARNING "cciss cciss%d: SendCmd FIFO full,"
  2369. " waiting!\n", h->ctlr);
  2370. }
  2371. h->access.submit_command(h, c); /* Send the cmd */
  2372. do {
  2373. complete = pollcomplete(h->ctlr);
  2374. #ifdef CCISS_DEBUG
  2375. printk(KERN_DEBUG "cciss: command completed\n");
  2376. #endif /* CCISS_DEBUG */
  2377. if (complete == 1) {
  2378. printk(KERN_WARNING
  2379. "cciss cciss%d: SendCmd Timeout out, "
  2380. "No command list address returned!\n", h->ctlr);
  2381. status = IO_ERROR;
  2382. break;
  2383. }
  2384. /* Make sure it's the command we're expecting. */
  2385. if ((complete & ~CISS_ERROR_BIT) != c->busaddr) {
  2386. printk(KERN_WARNING "cciss%d: Unexpected command "
  2387. "completion.\n", h->ctlr);
  2388. continue;
  2389. }
  2390. /* It is our command. If no error, we're done. */
  2391. if (!(complete & CISS_ERROR_BIT)) {
  2392. status = IO_OK;
  2393. break;
  2394. }
  2395. /* There is an error... */
  2396. /* if data overrun or underun on Report command ignore it */
  2397. if (((c->Request.CDB[0] == CISS_REPORT_LOG) ||
  2398. (c->Request.CDB[0] == CISS_REPORT_PHYS) ||
  2399. (c->Request.CDB[0] == CISS_INQUIRY)) &&
  2400. ((c->err_info->CommandStatus == CMD_DATA_OVERRUN) ||
  2401. (c->err_info->CommandStatus == CMD_DATA_UNDERRUN))) {
  2402. complete = c->busaddr;
  2403. status = IO_OK;
  2404. break;
  2405. }
  2406. if (c->err_info->CommandStatus == CMD_UNSOLICITED_ABORT) {
  2407. printk(KERN_WARNING "cciss%d: unsolicited abort %p\n",
  2408. h->ctlr, c);
  2409. if (c->retry_count < MAX_CMD_RETRIES) {
  2410. printk(KERN_WARNING "cciss%d: retrying %p\n",
  2411. h->ctlr, c);
  2412. c->retry_count++;
  2413. /* erase the old error information */
  2414. memset(c->err_info, 0, sizeof(c->err_info));
  2415. goto resend_cmd1;
  2416. }
  2417. printk(KERN_WARNING "cciss%d: retried %p too many "
  2418. "times\n", h->ctlr, c);
  2419. status = IO_ERROR;
  2420. break;
  2421. }
  2422. if (c->err_info->CommandStatus == CMD_UNABORTABLE) {
  2423. printk(KERN_WARNING "cciss%d: command could not be "
  2424. "aborted.\n", h->ctlr);
  2425. status = IO_ERROR;
  2426. break;
  2427. }
  2428. if (c->err_info->CommandStatus == CMD_TARGET_STATUS) {
  2429. status = check_target_status(h, c);
  2430. break;
  2431. }
  2432. printk(KERN_WARNING "cciss%d: sendcmd error\n", h->ctlr);
  2433. printk(KERN_WARNING "cmd = 0x%02x, CommandStatus = 0x%02x\n",
  2434. c->Request.CDB[0], c->err_info->CommandStatus);
  2435. status = IO_ERROR;
  2436. break;
  2437. } while (1);
  2438. /* unlock the data buffer from DMA */
  2439. buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
  2440. buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
  2441. pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
  2442. c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
  2443. return status;
  2444. }
  2445. /*
  2446. * Send a command to the controller, and wait for it to complete.
  2447. * Used at init time, and during SCSI error recovery.
  2448. */
  2449. static int sendcmd(__u8 cmd, int ctlr, void *buff, size_t size,
  2450. __u8 page_code, unsigned char *scsi3addr, int cmd_type)
  2451. {
  2452. CommandList_struct *c;
  2453. int status;
  2454. c = cmd_alloc(hba[ctlr], 1);
  2455. if (!c) {
  2456. printk(KERN_WARNING "cciss: unable to get memory");
  2457. return IO_ERROR;
  2458. }
  2459. status = fill_cmd(c, cmd, ctlr, buff, size, page_code,
  2460. scsi3addr, cmd_type);
  2461. if (status == IO_OK)
  2462. status = sendcmd_core(hba[ctlr], c);
  2463. cmd_free(hba[ctlr], c, 1);
  2464. return status;
  2465. }
  2466. /*
  2467. * Map (physical) PCI mem into (virtual) kernel space
  2468. */
  2469. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2470. {
  2471. ulong page_base = ((ulong) base) & PAGE_MASK;
  2472. ulong page_offs = ((ulong) base) - page_base;
  2473. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2474. return page_remapped ? (page_remapped + page_offs) : NULL;
  2475. }
  2476. /*
  2477. * Takes jobs of the Q and sends them to the hardware, then puts it on
  2478. * the Q to wait for completion.
  2479. */
  2480. static void start_io(ctlr_info_t *h)
  2481. {
  2482. CommandList_struct *c;
  2483. while (!hlist_empty(&h->reqQ)) {
  2484. c = hlist_entry(h->reqQ.first, CommandList_struct, list);
  2485. /* can't do anything if fifo is full */
  2486. if ((h->access.fifo_full(h))) {
  2487. printk(KERN_WARNING "cciss: fifo full\n");
  2488. break;
  2489. }
  2490. /* Get the first entry from the Request Q */
  2491. removeQ(c);
  2492. h->Qdepth--;
  2493. /* Tell the controller execute command */
  2494. h->access.submit_command(h, c);
  2495. /* Put job onto the completed Q */
  2496. addQ(&h->cmpQ, c);
  2497. }
  2498. }
  2499. /* Assumes that CCISS_LOCK(h->ctlr) is held. */
  2500. /* Zeros out the error record and then resends the command back */
  2501. /* to the controller */
  2502. static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
  2503. {
  2504. /* erase the old error information */
  2505. memset(c->err_info, 0, sizeof(ErrorInfo_struct));
  2506. /* add it to software queue and then send it to the controller */
  2507. addQ(&h->reqQ, c);
  2508. h->Qdepth++;
  2509. if (h->Qdepth > h->maxQsinceinit)
  2510. h->maxQsinceinit = h->Qdepth;
  2511. start_io(h);
  2512. }
  2513. static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
  2514. unsigned int msg_byte, unsigned int host_byte,
  2515. unsigned int driver_byte)
  2516. {
  2517. /* inverse of macros in scsi.h */
  2518. return (scsi_status_byte & 0xff) |
  2519. ((msg_byte & 0xff) << 8) |
  2520. ((host_byte & 0xff) << 16) |
  2521. ((driver_byte & 0xff) << 24);
  2522. }
  2523. static inline int evaluate_target_status(ctlr_info_t *h,
  2524. CommandList_struct *cmd, int *retry_cmd)
  2525. {
  2526. unsigned char sense_key;
  2527. unsigned char status_byte, msg_byte, host_byte, driver_byte;
  2528. int error_value;
  2529. *retry_cmd = 0;
  2530. /* If we get in here, it means we got "target status", that is, scsi status */
  2531. status_byte = cmd->err_info->ScsiStatus;
  2532. driver_byte = DRIVER_OK;
  2533. msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */
  2534. if (blk_pc_request(cmd->rq))
  2535. host_byte = DID_PASSTHROUGH;
  2536. else
  2537. host_byte = DID_OK;
  2538. error_value = make_status_bytes(status_byte, msg_byte,
  2539. host_byte, driver_byte);
  2540. if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
  2541. if (!blk_pc_request(cmd->rq))
  2542. printk(KERN_WARNING "cciss: cmd %p "
  2543. "has SCSI Status 0x%x\n",
  2544. cmd, cmd->err_info->ScsiStatus);
  2545. return error_value;
  2546. }
  2547. /* check the sense key */
  2548. sense_key = 0xf & cmd->err_info->SenseInfo[2];
  2549. /* no status or recovered error */
  2550. if (((sense_key == 0x0) || (sense_key == 0x1)) && !blk_pc_request(cmd->rq))
  2551. error_value = 0;
  2552. if (check_for_unit_attention(h, cmd)) {
  2553. *retry_cmd = !blk_pc_request(cmd->rq);
  2554. return 0;
  2555. }
  2556. if (!blk_pc_request(cmd->rq)) { /* Not SG_IO or similar? */
  2557. if (error_value != 0)
  2558. printk(KERN_WARNING "cciss: cmd %p has CHECK CONDITION"
  2559. " sense key = 0x%x\n", cmd, sense_key);
  2560. return error_value;
  2561. }
  2562. /* SG_IO or similar, copy sense data back */
  2563. if (cmd->rq->sense) {
  2564. if (cmd->rq->sense_len > cmd->err_info->SenseLen)
  2565. cmd->rq->sense_len = cmd->err_info->SenseLen;
  2566. memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
  2567. cmd->rq->sense_len);
  2568. } else
  2569. cmd->rq->sense_len = 0;
  2570. return error_value;
  2571. }
  2572. /* checks the status of the job and calls complete buffers to mark all
  2573. * buffers for the completed job. Note that this function does not need
  2574. * to hold the hba/queue lock.
  2575. */
  2576. static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
  2577. int timeout)
  2578. {
  2579. int retry_cmd = 0;
  2580. struct request *rq = cmd->rq;
  2581. rq->errors = 0;
  2582. if (timeout)
  2583. rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
  2584. if (cmd->err_info->CommandStatus == 0) /* no error has occurred */
  2585. goto after_error_processing;
  2586. switch (cmd->err_info->CommandStatus) {
  2587. case CMD_TARGET_STATUS:
  2588. rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
  2589. break;
  2590. case CMD_DATA_UNDERRUN:
  2591. if (blk_fs_request(cmd->rq)) {
  2592. printk(KERN_WARNING "cciss: cmd %p has"
  2593. " completed with data underrun "
  2594. "reported\n", cmd);
  2595. cmd->rq->resid_len = cmd->err_info->ResidualCnt;
  2596. }
  2597. break;
  2598. case CMD_DATA_OVERRUN:
  2599. if (blk_fs_request(cmd->rq))
  2600. printk(KERN_WARNING "cciss: cmd %p has"
  2601. " completed with data overrun "
  2602. "reported\n", cmd);
  2603. break;
  2604. case CMD_INVALID:
  2605. printk(KERN_WARNING "cciss: cmd %p is "
  2606. "reported invalid\n", cmd);
  2607. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2608. cmd->err_info->CommandStatus, DRIVER_OK,
  2609. blk_pc_request(cmd->rq) ? DID_PASSTHROUGH : DID_ERROR);
  2610. break;
  2611. case CMD_PROTOCOL_ERR:
  2612. printk(KERN_WARNING "cciss: cmd %p has "
  2613. "protocol error \n", cmd);
  2614. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2615. cmd->err_info->CommandStatus, DRIVER_OK,
  2616. blk_pc_request(cmd->rq) ? DID_PASSTHROUGH : DID_ERROR);
  2617. break;
  2618. case CMD_HARDWARE_ERR:
  2619. printk(KERN_WARNING "cciss: cmd %p had "
  2620. " hardware error\n", cmd);
  2621. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2622. cmd->err_info->CommandStatus, DRIVER_OK,
  2623. blk_pc_request(cmd->rq) ? DID_PASSTHROUGH : DID_ERROR);
  2624. break;
  2625. case CMD_CONNECTION_LOST:
  2626. printk(KERN_WARNING "cciss: cmd %p had "
  2627. "connection lost\n", cmd);
  2628. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2629. cmd->err_info->CommandStatus, DRIVER_OK,
  2630. blk_pc_request(cmd->rq) ? DID_PASSTHROUGH : DID_ERROR);
  2631. break;
  2632. case CMD_ABORTED:
  2633. printk(KERN_WARNING "cciss: cmd %p was "
  2634. "aborted\n", cmd);
  2635. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2636. cmd->err_info->CommandStatus, DRIVER_OK,
  2637. blk_pc_request(cmd->rq) ? DID_PASSTHROUGH : DID_ABORT);
  2638. break;
  2639. case CMD_ABORT_FAILED:
  2640. printk(KERN_WARNING "cciss: cmd %p reports "
  2641. "abort failed\n", cmd);
  2642. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2643. cmd->err_info->CommandStatus, DRIVER_OK,
  2644. blk_pc_request(cmd->rq) ? DID_PASSTHROUGH : DID_ERROR);
  2645. break;
  2646. case CMD_UNSOLICITED_ABORT:
  2647. printk(KERN_WARNING "cciss%d: unsolicited "
  2648. "abort %p\n", h->ctlr, cmd);
  2649. if (cmd->retry_count < MAX_CMD_RETRIES) {
  2650. retry_cmd = 1;
  2651. printk(KERN_WARNING
  2652. "cciss%d: retrying %p\n", h->ctlr, cmd);
  2653. cmd->retry_count++;
  2654. } else
  2655. printk(KERN_WARNING
  2656. "cciss%d: %p retried too "
  2657. "many times\n", h->ctlr, cmd);
  2658. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2659. cmd->err_info->CommandStatus, DRIVER_OK,
  2660. blk_pc_request(cmd->rq) ? DID_PASSTHROUGH : DID_ABORT);
  2661. break;
  2662. case CMD_TIMEOUT:
  2663. printk(KERN_WARNING "cciss: cmd %p timedout\n", cmd);
  2664. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2665. cmd->err_info->CommandStatus, DRIVER_OK,
  2666. blk_pc_request(cmd->rq) ? DID_PASSTHROUGH : DID_ERROR);
  2667. break;
  2668. default:
  2669. printk(KERN_WARNING "cciss: cmd %p returned "
  2670. "unknown status %x\n", cmd,
  2671. cmd->err_info->CommandStatus);
  2672. rq->errors = make_status_bytes(SAM_STAT_GOOD,
  2673. cmd->err_info->CommandStatus, DRIVER_OK,
  2674. blk_pc_request(cmd->rq) ? DID_PASSTHROUGH : DID_ERROR);
  2675. }
  2676. after_error_processing:
  2677. /* We need to return this command */
  2678. if (retry_cmd) {
  2679. resend_cciss_cmd(h, cmd);
  2680. return;
  2681. }
  2682. cmd->rq->completion_data = cmd;
  2683. blk_complete_request(cmd->rq);
  2684. }
  2685. /*
  2686. * Get a request and submit it to the controller.
  2687. */
  2688. static void do_cciss_request(struct request_queue *q)
  2689. {
  2690. ctlr_info_t *h = q->queuedata;
  2691. CommandList_struct *c;
  2692. sector_t start_blk;
  2693. int seg;
  2694. struct request *creq;
  2695. u64bit temp64;
  2696. struct scatterlist tmp_sg[MAXSGENTRIES];
  2697. drive_info_struct *drv;
  2698. int i, dir;
  2699. /* We call start_io here in case there is a command waiting on the
  2700. * queue that has not been sent.
  2701. */
  2702. if (blk_queue_plugged(q))
  2703. goto startio;
  2704. queue:
  2705. creq = blk_peek_request(q);
  2706. if (!creq)
  2707. goto startio;
  2708. BUG_ON(creq->nr_phys_segments > MAXSGENTRIES);
  2709. if ((c = cmd_alloc(h, 1)) == NULL)
  2710. goto full;
  2711. blk_start_request(creq);
  2712. spin_unlock_irq(q->queue_lock);
  2713. c->cmd_type = CMD_RWREQ;
  2714. c->rq = creq;
  2715. /* fill in the request */
  2716. drv = creq->rq_disk->private_data;
  2717. c->Header.ReplyQueue = 0; // unused in simple mode
  2718. /* got command from pool, so use the command block index instead */
  2719. /* for direct lookups. */
  2720. /* The first 2 bits are reserved for controller error reporting. */
  2721. c->Header.Tag.lower = (c->cmdindex << 3);
  2722. c->Header.Tag.lower |= 0x04; /* flag for direct lookup. */
  2723. c->Header.LUN.LogDev.VolId = drv->LunID;
  2724. c->Header.LUN.LogDev.Mode = 1;
  2725. c->Request.CDBLen = 10; // 12 byte commands not in FW yet;
  2726. c->Request.Type.Type = TYPE_CMD; // It is a command.
  2727. c->Request.Type.Attribute = ATTR_SIMPLE;
  2728. c->Request.Type.Direction =
  2729. (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
  2730. c->Request.Timeout = 0; // Don't time out
  2731. c->Request.CDB[0] =
  2732. (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
  2733. start_blk = blk_rq_pos(creq);
  2734. #ifdef CCISS_DEBUG
  2735. printk(KERN_DEBUG "ciss: sector =%d nr_sectors=%d\n",
  2736. (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
  2737. #endif /* CCISS_DEBUG */
  2738. sg_init_table(tmp_sg, MAXSGENTRIES);
  2739. seg = blk_rq_map_sg(q, creq, tmp_sg);
  2740. /* get the DMA records for the setup */
  2741. if (c->Request.Type.Direction == XFER_READ)
  2742. dir = PCI_DMA_FROMDEVICE;
  2743. else
  2744. dir = PCI_DMA_TODEVICE;
  2745. for (i = 0; i < seg; i++) {
  2746. c->SG[i].Len = tmp_sg[i].length;
  2747. temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
  2748. tmp_sg[i].offset,
  2749. tmp_sg[i].length, dir);
  2750. c->SG[i].Addr.lower = temp64.val32.lower;
  2751. c->SG[i].Addr.upper = temp64.val32.upper;
  2752. c->SG[i].Ext = 0; // we are not chaining
  2753. }
  2754. /* track how many SG entries we are using */
  2755. if (seg > h->maxSG)
  2756. h->maxSG = seg;
  2757. #ifdef CCISS_DEBUG
  2758. printk(KERN_DEBUG "cciss: Submitting %u sectors in %d segments\n",
  2759. blk_rq_sectors(creq), seg);
  2760. #endif /* CCISS_DEBUG */
  2761. c->Header.SGList = c->Header.SGTotal = seg;
  2762. if (likely(blk_fs_request(creq))) {
  2763. if(h->cciss_read == CCISS_READ_10) {
  2764. c->Request.CDB[1] = 0;
  2765. c->Request.CDB[2] = (start_blk >> 24) & 0xff; //MSB
  2766. c->Request.CDB[3] = (start_blk >> 16) & 0xff;
  2767. c->Request.CDB[4] = (start_blk >> 8) & 0xff;
  2768. c->Request.CDB[5] = start_blk & 0xff;
  2769. c->Request.CDB[6] = 0; // (sect >> 24) & 0xff; MSB
  2770. c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
  2771. c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
  2772. c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
  2773. } else {
  2774. u32 upper32 = upper_32_bits(start_blk);
  2775. c->Request.CDBLen = 16;
  2776. c->Request.CDB[1]= 0;
  2777. c->Request.CDB[2]= (upper32 >> 24) & 0xff; //MSB
  2778. c->Request.CDB[3]= (upper32 >> 16) & 0xff;
  2779. c->Request.CDB[4]= (upper32 >> 8) & 0xff;
  2780. c->Request.CDB[5]= upper32 & 0xff;
  2781. c->Request.CDB[6]= (start_blk >> 24) & 0xff;
  2782. c->Request.CDB[7]= (start_blk >> 16) & 0xff;
  2783. c->Request.CDB[8]= (start_blk >> 8) & 0xff;
  2784. c->Request.CDB[9]= start_blk & 0xff;
  2785. c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
  2786. c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
  2787. c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff;
  2788. c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
  2789. c->Request.CDB[14] = c->Request.CDB[15] = 0;
  2790. }
  2791. } else if (blk_pc_request(creq)) {
  2792. c->Request.CDBLen = creq->cmd_len;
  2793. memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
  2794. } else {
  2795. printk(KERN_WARNING "cciss%d: bad request type %d\n", h->ctlr, creq->cmd_type);
  2796. BUG();
  2797. }
  2798. spin_lock_irq(q->queue_lock);
  2799. addQ(&h->reqQ, c);
  2800. h->Qdepth++;
  2801. if (h->Qdepth > h->maxQsinceinit)
  2802. h->maxQsinceinit = h->Qdepth;
  2803. goto queue;
  2804. full:
  2805. blk_stop_queue(q);
  2806. startio:
  2807. /* We will already have the driver lock here so not need
  2808. * to lock it.
  2809. */
  2810. start_io(h);
  2811. }
  2812. static inline unsigned long get_next_completion(ctlr_info_t *h)
  2813. {
  2814. return h->access.command_completed(h);
  2815. }
  2816. static inline int interrupt_pending(ctlr_info_t *h)
  2817. {
  2818. return h->access.intr_pending(h);
  2819. }
  2820. static inline long interrupt_not_for_us(ctlr_info_t *h)
  2821. {
  2822. return (((h->access.intr_pending(h) == 0) ||
  2823. (h->interrupts_enabled == 0)));
  2824. }
  2825. static irqreturn_t do_cciss_intr(int irq, void *dev_id)
  2826. {
  2827. ctlr_info_t *h = dev_id;
  2828. CommandList_struct *c;
  2829. unsigned long flags;
  2830. __u32 a, a1, a2;
  2831. if (interrupt_not_for_us(h))
  2832. return IRQ_NONE;
  2833. /*
  2834. * If there are completed commands in the completion queue,
  2835. * we had better do something about it.
  2836. */
  2837. spin_lock_irqsave(CCISS_LOCK(h->ctlr), flags);
  2838. while (interrupt_pending(h)) {
  2839. while ((a = get_next_completion(h)) != FIFO_EMPTY) {
  2840. a1 = a;
  2841. if ((a & 0x04)) {
  2842. a2 = (a >> 3);
  2843. if (a2 >= h->nr_cmds) {
  2844. printk(KERN_WARNING
  2845. "cciss: controller cciss%d failed, stopping.\n",
  2846. h->ctlr);
  2847. fail_all_cmds(h->ctlr);
  2848. return IRQ_HANDLED;
  2849. }
  2850. c = h->cmd_pool + a2;
  2851. a = c->busaddr;
  2852. } else {
  2853. struct hlist_node *tmp;
  2854. a &= ~3;
  2855. c = NULL;
  2856. hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
  2857. if (c->busaddr == a)
  2858. break;
  2859. }
  2860. }
  2861. /*
  2862. * If we've found the command, take it off the
  2863. * completion Q and free it
  2864. */
  2865. if (c && c->busaddr == a) {
  2866. removeQ(c);
  2867. if (c->cmd_type == CMD_RWREQ) {
  2868. complete_command(h, c, 0);
  2869. } else if (c->cmd_type == CMD_IOCTL_PEND) {
  2870. complete(c->waiting);
  2871. }
  2872. # ifdef CONFIG_CISS_SCSI_TAPE
  2873. else if (c->cmd_type == CMD_SCSI)
  2874. complete_scsi_command(c, 0, a1);
  2875. # endif
  2876. continue;
  2877. }
  2878. }
  2879. }
  2880. spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
  2881. return IRQ_HANDLED;
  2882. }
  2883. static int scan_thread(void *data)
  2884. {
  2885. ctlr_info_t *h = data;
  2886. int rc;
  2887. DECLARE_COMPLETION_ONSTACK(wait);
  2888. h->rescan_wait = &wait;
  2889. for (;;) {
  2890. rc = wait_for_completion_interruptible(&wait);
  2891. if (kthread_should_stop())
  2892. break;
  2893. if (!rc)
  2894. rebuild_lun_table(h, 0);
  2895. }
  2896. return 0;
  2897. }
  2898. static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
  2899. {
  2900. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  2901. return 0;
  2902. switch (c->err_info->SenseInfo[12]) {
  2903. case STATE_CHANGED:
  2904. printk(KERN_WARNING "cciss%d: a state change "
  2905. "detected, command retried\n", h->ctlr);
  2906. return 1;
  2907. break;
  2908. case LUN_FAILED:
  2909. printk(KERN_WARNING "cciss%d: LUN failure "
  2910. "detected, action required\n", h->ctlr);
  2911. return 1;
  2912. break;
  2913. case REPORT_LUNS_CHANGED:
  2914. printk(KERN_WARNING "cciss%d: report LUN data "
  2915. "changed\n", h->ctlr);
  2916. if (h->rescan_wait)
  2917. complete(h->rescan_wait);
  2918. return 1;
  2919. break;
  2920. case POWER_OR_RESET:
  2921. printk(KERN_WARNING "cciss%d: a power on "
  2922. "or device reset detected\n", h->ctlr);
  2923. return 1;
  2924. break;
  2925. case UNIT_ATTENTION_CLEARED:
  2926. printk(KERN_WARNING "cciss%d: unit attention "
  2927. "cleared by another initiator\n", h->ctlr);
  2928. return 1;
  2929. break;
  2930. default:
  2931. printk(KERN_WARNING "cciss%d: unknown "
  2932. "unit attention detected\n", h->ctlr);
  2933. return 1;
  2934. }
  2935. }
  2936. /*
  2937. * We cannot read the structure directly, for portability we must use
  2938. * the io functions.
  2939. * This is for debug only.
  2940. */
  2941. #ifdef CCISS_DEBUG
  2942. static void print_cfg_table(CfgTable_struct *tb)
  2943. {
  2944. int i;
  2945. char temp_name[17];
  2946. printk("Controller Configuration information\n");
  2947. printk("------------------------------------\n");
  2948. for (i = 0; i < 4; i++)
  2949. temp_name[i] = readb(&(tb->Signature[i]));
  2950. temp_name[4] = '\0';
  2951. printk(" Signature = %s\n", temp_name);
  2952. printk(" Spec Number = %d\n", readl(&(tb->SpecValence)));
  2953. printk(" Transport methods supported = 0x%x\n",
  2954. readl(&(tb->TransportSupport)));
  2955. printk(" Transport methods active = 0x%x\n",
  2956. readl(&(tb->TransportActive)));
  2957. printk(" Requested transport Method = 0x%x\n",
  2958. readl(&(tb->HostWrite.TransportRequest)));
  2959. printk(" Coalesce Interrupt Delay = 0x%x\n",
  2960. readl(&(tb->HostWrite.CoalIntDelay)));
  2961. printk(" Coalesce Interrupt Count = 0x%x\n",
  2962. readl(&(tb->HostWrite.CoalIntCount)));
  2963. printk(" Max outstanding commands = 0x%d\n",
  2964. readl(&(tb->CmdsOutMax)));
  2965. printk(" Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
  2966. for (i = 0; i < 16; i++)
  2967. temp_name[i] = readb(&(tb->ServerName[i]));
  2968. temp_name[16] = '\0';
  2969. printk(" Server Name = %s\n", temp_name);
  2970. printk(" Heartbeat Counter = 0x%x\n\n\n", readl(&(tb->HeartBeat)));
  2971. }
  2972. #endif /* CCISS_DEBUG */
  2973. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  2974. {
  2975. int i, offset, mem_type, bar_type;
  2976. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  2977. return 0;
  2978. offset = 0;
  2979. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  2980. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  2981. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  2982. offset += 4;
  2983. else {
  2984. mem_type = pci_resource_flags(pdev, i) &
  2985. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  2986. switch (mem_type) {
  2987. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  2988. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  2989. offset += 4; /* 32 bit */
  2990. break;
  2991. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  2992. offset += 8;
  2993. break;
  2994. default: /* reserved in PCI 2.2 */
  2995. printk(KERN_WARNING
  2996. "Base address is invalid\n");
  2997. return -1;
  2998. break;
  2999. }
  3000. }
  3001. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  3002. return i + 1;
  3003. }
  3004. return -1;
  3005. }
  3006. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  3007. * controllers that are capable. If not, we use IO-APIC mode.
  3008. */
  3009. static void __devinit cciss_interrupt_mode(ctlr_info_t *c,
  3010. struct pci_dev *pdev, __u32 board_id)
  3011. {
  3012. #ifdef CONFIG_PCI_MSI
  3013. int err;
  3014. struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
  3015. {0, 2}, {0, 3}
  3016. };
  3017. /* Some boards advertise MSI but don't really support it */
  3018. if ((board_id == 0x40700E11) ||
  3019. (board_id == 0x40800E11) ||
  3020. (board_id == 0x40820E11) || (board_id == 0x40830E11))
  3021. goto default_int_mode;
  3022. if (pci_find_capability(pdev, PCI_CAP_ID_MSIX)) {
  3023. err = pci_enable_msix(pdev, cciss_msix_entries, 4);
  3024. if (!err) {
  3025. c->intr[0] = cciss_msix_entries[0].vector;
  3026. c->intr[1] = cciss_msix_entries[1].vector;
  3027. c->intr[2] = cciss_msix_entries[2].vector;
  3028. c->intr[3] = cciss_msix_entries[3].vector;
  3029. c->msix_vector = 1;
  3030. return;
  3031. }
  3032. if (err > 0) {
  3033. printk(KERN_WARNING "cciss: only %d MSI-X vectors "
  3034. "available\n", err);
  3035. goto default_int_mode;
  3036. } else {
  3037. printk(KERN_WARNING "cciss: MSI-X init failed %d\n",
  3038. err);
  3039. goto default_int_mode;
  3040. }
  3041. }
  3042. if (pci_find_capability(pdev, PCI_CAP_ID_MSI)) {
  3043. if (!pci_enable_msi(pdev)) {
  3044. c->msi_vector = 1;
  3045. } else {
  3046. printk(KERN_WARNING "cciss: MSI init failed\n");
  3047. }
  3048. }
  3049. default_int_mode:
  3050. #endif /* CONFIG_PCI_MSI */
  3051. /* if we get here we're going to use the default interrupt mode */
  3052. c->intr[SIMPLE_MODE_INT] = pdev->irq;
  3053. return;
  3054. }
  3055. static int __devinit cciss_pci_init(ctlr_info_t *c, struct pci_dev *pdev)
  3056. {
  3057. ushort subsystem_vendor_id, subsystem_device_id, command;
  3058. __u32 board_id, scratchpad = 0;
  3059. __u64 cfg_offset;
  3060. __u32 cfg_base_addr;
  3061. __u64 cfg_base_addr_index;
  3062. int i, err;
  3063. /* check to see if controller has been disabled */
  3064. /* BEFORE trying to enable it */
  3065. (void)pci_read_config_word(pdev, PCI_COMMAND, &command);
  3066. if (!(command & 0x02)) {
  3067. printk(KERN_WARNING
  3068. "cciss: controller appears to be disabled\n");
  3069. return -ENODEV;
  3070. }
  3071. err = pci_enable_device(pdev);
  3072. if (err) {
  3073. printk(KERN_ERR "cciss: Unable to Enable PCI device\n");
  3074. return err;
  3075. }
  3076. err = pci_request_regions(pdev, "cciss");
  3077. if (err) {
  3078. printk(KERN_ERR "cciss: Cannot obtain PCI resources, "
  3079. "aborting\n");
  3080. return err;
  3081. }
  3082. subsystem_vendor_id = pdev->subsystem_vendor;
  3083. subsystem_device_id = pdev->subsystem_device;
  3084. board_id = (((__u32) (subsystem_device_id << 16) & 0xffff0000) |
  3085. subsystem_vendor_id);
  3086. #ifdef CCISS_DEBUG
  3087. printk("command = %x\n", command);
  3088. printk("irq = %x\n", pdev->irq);
  3089. printk("board_id = %x\n", board_id);
  3090. #endif /* CCISS_DEBUG */
  3091. /* If the kernel supports MSI/MSI-X we will try to enable that functionality,
  3092. * else we use the IO-APIC interrupt assigned to us by system ROM.
  3093. */
  3094. cciss_interrupt_mode(c, pdev, board_id);
  3095. /* find the memory BAR */
  3096. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  3097. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM)
  3098. break;
  3099. }
  3100. if (i == DEVICE_COUNT_RESOURCE) {
  3101. printk(KERN_WARNING "cciss: No memory BAR found\n");
  3102. err = -ENODEV;
  3103. goto err_out_free_res;
  3104. }
  3105. c->paddr = pci_resource_start(pdev, i); /* addressing mode bits
  3106. * already removed
  3107. */
  3108. #ifdef CCISS_DEBUG
  3109. printk("address 0 = %lx\n", c->paddr);
  3110. #endif /* CCISS_DEBUG */
  3111. c->vaddr = remap_pci_mem(c->paddr, 0x250);
  3112. /* Wait for the board to become ready. (PCI hotplug needs this.)
  3113. * We poll for up to 120 secs, once per 100ms. */
  3114. for (i = 0; i < 1200; i++) {
  3115. scratchpad = readl(c->vaddr + SA5_SCRATCHPAD_OFFSET);
  3116. if (scratchpad == CCISS_FIRMWARE_READY)
  3117. break;
  3118. set_current_state(TASK_INTERRUPTIBLE);
  3119. schedule_timeout(HZ / 10); /* wait 100ms */
  3120. }
  3121. if (scratchpad != CCISS_FIRMWARE_READY) {
  3122. printk(KERN_WARNING "cciss: Board not ready. Timed out.\n");
  3123. err = -ENODEV;
  3124. goto err_out_free_res;
  3125. }
  3126. /* get the address index number */
  3127. cfg_base_addr = readl(c->vaddr + SA5_CTCFG_OFFSET);
  3128. cfg_base_addr &= (__u32) 0x0000ffff;
  3129. #ifdef CCISS_DEBUG
  3130. printk("cfg base address = %x\n", cfg_base_addr);
  3131. #endif /* CCISS_DEBUG */
  3132. cfg_base_addr_index = find_PCI_BAR_index(pdev, cfg_base_addr);
  3133. #ifdef CCISS_DEBUG
  3134. printk("cfg base address index = %llx\n",
  3135. (unsigned long long)cfg_base_addr_index);
  3136. #endif /* CCISS_DEBUG */
  3137. if (cfg_base_addr_index == -1) {
  3138. printk(KERN_WARNING "cciss: Cannot find cfg_base_addr_index\n");
  3139. err = -ENODEV;
  3140. goto err_out_free_res;
  3141. }
  3142. cfg_offset = readl(c->vaddr + SA5_CTMEM_OFFSET);
  3143. #ifdef CCISS_DEBUG
  3144. printk("cfg offset = %llx\n", (unsigned long long)cfg_offset);
  3145. #endif /* CCISS_DEBUG */
  3146. c->cfgtable = remap_pci_mem(pci_resource_start(pdev,
  3147. cfg_base_addr_index) +
  3148. cfg_offset, sizeof(CfgTable_struct));
  3149. c->board_id = board_id;
  3150. #ifdef CCISS_DEBUG
  3151. print_cfg_table(c->cfgtable);
  3152. #endif /* CCISS_DEBUG */
  3153. /* Some controllers support Zero Memory Raid (ZMR).
  3154. * When configured in ZMR mode the number of supported
  3155. * commands drops to 64. So instead of just setting an
  3156. * arbitrary value we make the driver a little smarter.
  3157. * We read the config table to tell us how many commands
  3158. * are supported on the controller then subtract 4 to
  3159. * leave a little room for ioctl calls.
  3160. */
  3161. c->max_commands = readl(&(c->cfgtable->CmdsOutMax));
  3162. for (i = 0; i < ARRAY_SIZE(products); i++) {
  3163. if (board_id == products[i].board_id) {
  3164. c->product_name = products[i].product_name;
  3165. c->access = *(products[i].access);
  3166. c->nr_cmds = c->max_commands - 4;
  3167. break;
  3168. }
  3169. }
  3170. if ((readb(&c->cfgtable->Signature[0]) != 'C') ||
  3171. (readb(&c->cfgtable->Signature[1]) != 'I') ||
  3172. (readb(&c->cfgtable->Signature[2]) != 'S') ||
  3173. (readb(&c->cfgtable->Signature[3]) != 'S')) {
  3174. printk("Does not appear to be a valid CISS config table\n");
  3175. err = -ENODEV;
  3176. goto err_out_free_res;
  3177. }
  3178. /* We didn't find the controller in our list. We know the
  3179. * signature is valid. If it's an HP device let's try to
  3180. * bind to the device and fire it up. Otherwise we bail.
  3181. */
  3182. if (i == ARRAY_SIZE(products)) {
  3183. if (subsystem_vendor_id == PCI_VENDOR_ID_HP) {
  3184. c->product_name = products[i-1].product_name;
  3185. c->access = *(products[i-1].access);
  3186. c->nr_cmds = c->max_commands - 4;
  3187. printk(KERN_WARNING "cciss: This is an unknown "
  3188. "Smart Array controller.\n"
  3189. "cciss: Please update to the latest driver "
  3190. "available from www.hp.com.\n");
  3191. } else {
  3192. printk(KERN_WARNING "cciss: Sorry, I don't know how"
  3193. " to access the Smart Array controller %08lx\n"
  3194. , (unsigned long)board_id);
  3195. err = -ENODEV;
  3196. goto err_out_free_res;
  3197. }
  3198. }
  3199. #ifdef CONFIG_X86
  3200. {
  3201. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3202. __u32 prefetch;
  3203. prefetch = readl(&(c->cfgtable->SCSI_Prefetch));
  3204. prefetch |= 0x100;
  3205. writel(prefetch, &(c->cfgtable->SCSI_Prefetch));
  3206. }
  3207. #endif
  3208. /* Disabling DMA prefetch and refetch for the P600.
  3209. * An ASIC bug may result in accesses to invalid memory addresses.
  3210. * We've disabled prefetch for some time now. Testing with XEN
  3211. * kernels revealed a bug in the refetch if dom0 resides on a P600.
  3212. */
  3213. if(board_id == 0x3225103C) {
  3214. __u32 dma_prefetch;
  3215. __u32 dma_refetch;
  3216. dma_prefetch = readl(c->vaddr + I2O_DMA1_CFG);
  3217. dma_prefetch |= 0x8000;
  3218. writel(dma_prefetch, c->vaddr + I2O_DMA1_CFG);
  3219. pci_read_config_dword(pdev, PCI_COMMAND_PARITY, &dma_refetch);
  3220. dma_refetch |= 0x1;
  3221. pci_write_config_dword(pdev, PCI_COMMAND_PARITY, dma_refetch);
  3222. }
  3223. #ifdef CCISS_DEBUG
  3224. printk("Trying to put board into Simple mode\n");
  3225. #endif /* CCISS_DEBUG */
  3226. c->max_commands = readl(&(c->cfgtable->CmdsOutMax));
  3227. /* Update the field, and then ring the doorbell */
  3228. writel(CFGTBL_Trans_Simple, &(c->cfgtable->HostWrite.TransportRequest));
  3229. writel(CFGTBL_ChangeReq, c->vaddr + SA5_DOORBELL);
  3230. /* under certain very rare conditions, this can take awhile.
  3231. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3232. * as we enter this code.) */
  3233. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3234. if (!(readl(c->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
  3235. break;
  3236. /* delay and try again */
  3237. set_current_state(TASK_INTERRUPTIBLE);
  3238. schedule_timeout(10);
  3239. }
  3240. #ifdef CCISS_DEBUG
  3241. printk(KERN_DEBUG "I counter got to %d %x\n", i,
  3242. readl(c->vaddr + SA5_DOORBELL));
  3243. #endif /* CCISS_DEBUG */
  3244. #ifdef CCISS_DEBUG
  3245. print_cfg_table(c->cfgtable);
  3246. #endif /* CCISS_DEBUG */
  3247. if (!(readl(&(c->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
  3248. printk(KERN_WARNING "cciss: unable to get board into"
  3249. " simple mode\n");
  3250. err = -ENODEV;
  3251. goto err_out_free_res;
  3252. }
  3253. return 0;
  3254. err_out_free_res:
  3255. /*
  3256. * Deliberately omit pci_disable_device(): it does something nasty to
  3257. * Smart Array controllers that pci_enable_device does not undo
  3258. */
  3259. pci_release_regions(pdev);
  3260. return err;
  3261. }
  3262. /* Function to find the first free pointer into our hba[] array
  3263. * Returns -1 if no free entries are left.
  3264. */
  3265. static int alloc_cciss_hba(void)
  3266. {
  3267. int i;
  3268. for (i = 0; i < MAX_CTLR; i++) {
  3269. if (!hba[i]) {
  3270. ctlr_info_t *p;
  3271. p = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
  3272. if (!p)
  3273. goto Enomem;
  3274. hba[i] = p;
  3275. return i;
  3276. }
  3277. }
  3278. printk(KERN_WARNING "cciss: This driver supports a maximum"
  3279. " of %d controllers.\n", MAX_CTLR);
  3280. return -1;
  3281. Enomem:
  3282. printk(KERN_ERR "cciss: out of memory.\n");
  3283. return -1;
  3284. }
  3285. static void free_hba(int i)
  3286. {
  3287. ctlr_info_t *p = hba[i];
  3288. int n;
  3289. hba[i] = NULL;
  3290. for (n = 0; n < CISS_MAX_LUN; n++)
  3291. put_disk(p->gendisk[n]);
  3292. kfree(p);
  3293. }
  3294. /* Send a message CDB to the firmware. */
  3295. static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type)
  3296. {
  3297. typedef struct {
  3298. CommandListHeader_struct CommandHeader;
  3299. RequestBlock_struct Request;
  3300. ErrDescriptor_struct ErrorDescriptor;
  3301. } Command;
  3302. static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
  3303. Command *cmd;
  3304. dma_addr_t paddr64;
  3305. uint32_t paddr32, tag;
  3306. void __iomem *vaddr;
  3307. int i, err;
  3308. vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
  3309. if (vaddr == NULL)
  3310. return -ENOMEM;
  3311. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  3312. CCISS commands, so they must be allocated from the lower 4GiB of
  3313. memory. */
  3314. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3315. if (err) {
  3316. iounmap(vaddr);
  3317. return -ENOMEM;
  3318. }
  3319. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  3320. if (cmd == NULL) {
  3321. iounmap(vaddr);
  3322. return -ENOMEM;
  3323. }
  3324. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  3325. although there's no guarantee, we assume that the address is at
  3326. least 4-byte aligned (most likely, it's page-aligned). */
  3327. paddr32 = paddr64;
  3328. cmd->CommandHeader.ReplyQueue = 0;
  3329. cmd->CommandHeader.SGList = 0;
  3330. cmd->CommandHeader.SGTotal = 0;
  3331. cmd->CommandHeader.Tag.lower = paddr32;
  3332. cmd->CommandHeader.Tag.upper = 0;
  3333. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  3334. cmd->Request.CDBLen = 16;
  3335. cmd->Request.Type.Type = TYPE_MSG;
  3336. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  3337. cmd->Request.Type.Direction = XFER_NONE;
  3338. cmd->Request.Timeout = 0; /* Don't time out */
  3339. cmd->Request.CDB[0] = opcode;
  3340. cmd->Request.CDB[1] = type;
  3341. memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
  3342. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
  3343. cmd->ErrorDescriptor.Addr.upper = 0;
  3344. cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
  3345. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  3346. for (i = 0; i < 10; i++) {
  3347. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  3348. if ((tag & ~3) == paddr32)
  3349. break;
  3350. schedule_timeout_uninterruptible(HZ);
  3351. }
  3352. iounmap(vaddr);
  3353. /* we leak the DMA buffer here ... no choice since the controller could
  3354. still complete the command. */
  3355. if (i == 10) {
  3356. printk(KERN_ERR "cciss: controller message %02x:%02x timed out\n",
  3357. opcode, type);
  3358. return -ETIMEDOUT;
  3359. }
  3360. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  3361. if (tag & 2) {
  3362. printk(KERN_ERR "cciss: controller message %02x:%02x failed\n",
  3363. opcode, type);
  3364. return -EIO;
  3365. }
  3366. printk(KERN_INFO "cciss: controller message %02x:%02x succeeded\n",
  3367. opcode, type);
  3368. return 0;
  3369. }
  3370. #define cciss_soft_reset_controller(p) cciss_message(p, 1, 0)
  3371. #define cciss_noop(p) cciss_message(p, 3, 0)
  3372. static __devinit int cciss_reset_msi(struct pci_dev *pdev)
  3373. {
  3374. /* the #defines are stolen from drivers/pci/msi.h. */
  3375. #define msi_control_reg(base) (base + PCI_MSI_FLAGS)
  3376. #define PCI_MSIX_FLAGS_ENABLE (1 << 15)
  3377. int pos;
  3378. u16 control = 0;
  3379. pos = pci_find_capability(pdev, PCI_CAP_ID_MSI);
  3380. if (pos) {
  3381. pci_read_config_word(pdev, msi_control_reg(pos), &control);
  3382. if (control & PCI_MSI_FLAGS_ENABLE) {
  3383. printk(KERN_INFO "cciss: resetting MSI\n");
  3384. pci_write_config_word(pdev, msi_control_reg(pos), control & ~PCI_MSI_FLAGS_ENABLE);
  3385. }
  3386. }
  3387. pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
  3388. if (pos) {
  3389. pci_read_config_word(pdev, msi_control_reg(pos), &control);
  3390. if (control & PCI_MSIX_FLAGS_ENABLE) {
  3391. printk(KERN_INFO "cciss: resetting MSI-X\n");
  3392. pci_write_config_word(pdev, msi_control_reg(pos), control & ~PCI_MSIX_FLAGS_ENABLE);
  3393. }
  3394. }
  3395. return 0;
  3396. }
  3397. /* This does a hard reset of the controller using PCI power management
  3398. * states. */
  3399. static __devinit int cciss_hard_reset_controller(struct pci_dev *pdev)
  3400. {
  3401. u16 pmcsr, saved_config_space[32];
  3402. int i, pos;
  3403. printk(KERN_INFO "cciss: using PCI PM to reset controller\n");
  3404. /* This is very nearly the same thing as
  3405. pci_save_state(pci_dev);
  3406. pci_set_power_state(pci_dev, PCI_D3hot);
  3407. pci_set_power_state(pci_dev, PCI_D0);
  3408. pci_restore_state(pci_dev);
  3409. but we can't use these nice canned kernel routines on
  3410. kexec, because they also check the MSI/MSI-X state in PCI
  3411. configuration space and do the wrong thing when it is
  3412. set/cleared. Also, the pci_save/restore_state functions
  3413. violate the ordering requirements for restoring the
  3414. configuration space from the CCISS document (see the
  3415. comment below). So we roll our own .... */
  3416. for (i = 0; i < 32; i++)
  3417. pci_read_config_word(pdev, 2*i, &saved_config_space[i]);
  3418. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  3419. if (pos == 0) {
  3420. printk(KERN_ERR "cciss_reset_controller: PCI PM not supported\n");
  3421. return -ENODEV;
  3422. }
  3423. /* Quoting from the Open CISS Specification: "The Power
  3424. * Management Control/Status Register (CSR) controls the power
  3425. * state of the device. The normal operating state is D0,
  3426. * CSR=00h. The software off state is D3, CSR=03h. To reset
  3427. * the controller, place the interface device in D3 then to
  3428. * D0, this causes a secondary PCI reset which will reset the
  3429. * controller." */
  3430. /* enter the D3hot power management state */
  3431. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  3432. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3433. pmcsr |= PCI_D3hot;
  3434. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3435. schedule_timeout_uninterruptible(HZ >> 1);
  3436. /* enter the D0 power management state */
  3437. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3438. pmcsr |= PCI_D0;
  3439. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3440. schedule_timeout_uninterruptible(HZ >> 1);
  3441. /* Restore the PCI configuration space. The Open CISS
  3442. * Specification says, "Restore the PCI Configuration
  3443. * Registers, offsets 00h through 60h. It is important to
  3444. * restore the command register, 16-bits at offset 04h,
  3445. * last. Do not restore the configuration status register,
  3446. * 16-bits at offset 06h." Note that the offset is 2*i. */
  3447. for (i = 0; i < 32; i++) {
  3448. if (i == 2 || i == 3)
  3449. continue;
  3450. pci_write_config_word(pdev, 2*i, saved_config_space[i]);
  3451. }
  3452. wmb();
  3453. pci_write_config_word(pdev, 4, saved_config_space[2]);
  3454. return 0;
  3455. }
  3456. /*
  3457. * This is it. Find all the controllers and register them. I really hate
  3458. * stealing all these major device numbers.
  3459. * returns the number of block devices registered.
  3460. */
  3461. static int __devinit cciss_init_one(struct pci_dev *pdev,
  3462. const struct pci_device_id *ent)
  3463. {
  3464. int i;
  3465. int j = 0;
  3466. int rc;
  3467. int dac, return_code;
  3468. InquiryData_struct *inq_buff = NULL;
  3469. if (reset_devices) {
  3470. /* Reset the controller with a PCI power-cycle */
  3471. if (cciss_hard_reset_controller(pdev) || cciss_reset_msi(pdev))
  3472. return -ENODEV;
  3473. /* Now try to get the controller to respond to a no-op. Some
  3474. devices (notably the HP Smart Array 5i Controller) need
  3475. up to 30 seconds to respond. */
  3476. for (i=0; i<30; i++) {
  3477. if (cciss_noop(pdev) == 0)
  3478. break;
  3479. schedule_timeout_uninterruptible(HZ);
  3480. }
  3481. if (i == 30) {
  3482. printk(KERN_ERR "cciss: controller seems dead\n");
  3483. return -EBUSY;
  3484. }
  3485. }
  3486. i = alloc_cciss_hba();
  3487. if (i < 0)
  3488. return -1;
  3489. hba[i]->busy_initializing = 1;
  3490. INIT_HLIST_HEAD(&hba[i]->cmpQ);
  3491. INIT_HLIST_HEAD(&hba[i]->reqQ);
  3492. if (cciss_pci_init(hba[i], pdev) != 0)
  3493. goto clean0;
  3494. sprintf(hba[i]->devname, "cciss%d", i);
  3495. hba[i]->ctlr = i;
  3496. hba[i]->pdev = pdev;
  3497. if (cciss_create_hba_sysfs_entry(hba[i]))
  3498. goto clean0;
  3499. /* configure PCI DMA stuff */
  3500. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
  3501. dac = 1;
  3502. else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
  3503. dac = 0;
  3504. else {
  3505. printk(KERN_ERR "cciss: no suitable DMA available\n");
  3506. goto clean1;
  3507. }
  3508. /*
  3509. * register with the major number, or get a dynamic major number
  3510. * by passing 0 as argument. This is done for greater than
  3511. * 8 controller support.
  3512. */
  3513. if (i < MAX_CTLR_ORIG)
  3514. hba[i]->major = COMPAQ_CISS_MAJOR + i;
  3515. rc = register_blkdev(hba[i]->major, hba[i]->devname);
  3516. if (rc == -EBUSY || rc == -EINVAL) {
  3517. printk(KERN_ERR
  3518. "cciss: Unable to get major number %d for %s "
  3519. "on hba %d\n", hba[i]->major, hba[i]->devname, i);
  3520. goto clean1;
  3521. } else {
  3522. if (i >= MAX_CTLR_ORIG)
  3523. hba[i]->major = rc;
  3524. }
  3525. /* make sure the board interrupts are off */
  3526. hba[i]->access.set_intr_mask(hba[i], CCISS_INTR_OFF);
  3527. if (request_irq(hba[i]->intr[SIMPLE_MODE_INT], do_cciss_intr,
  3528. IRQF_DISABLED | IRQF_SHARED, hba[i]->devname, hba[i])) {
  3529. printk(KERN_ERR "cciss: Unable to get irq %d for %s\n",
  3530. hba[i]->intr[SIMPLE_MODE_INT], hba[i]->devname);
  3531. goto clean2;
  3532. }
  3533. printk(KERN_INFO "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
  3534. hba[i]->devname, pdev->device, pci_name(pdev),
  3535. hba[i]->intr[SIMPLE_MODE_INT], dac ? "" : " not");
  3536. hba[i]->cmd_pool_bits =
  3537. kmalloc(DIV_ROUND_UP(hba[i]->nr_cmds, BITS_PER_LONG)
  3538. * sizeof(unsigned long), GFP_KERNEL);
  3539. hba[i]->cmd_pool = (CommandList_struct *)
  3540. pci_alloc_consistent(hba[i]->pdev,
  3541. hba[i]->nr_cmds * sizeof(CommandList_struct),
  3542. &(hba[i]->cmd_pool_dhandle));
  3543. hba[i]->errinfo_pool = (ErrorInfo_struct *)
  3544. pci_alloc_consistent(hba[i]->pdev,
  3545. hba[i]->nr_cmds * sizeof(ErrorInfo_struct),
  3546. &(hba[i]->errinfo_pool_dhandle));
  3547. if ((hba[i]->cmd_pool_bits == NULL)
  3548. || (hba[i]->cmd_pool == NULL)
  3549. || (hba[i]->errinfo_pool == NULL)) {
  3550. printk(KERN_ERR "cciss: out of memory");
  3551. goto clean4;
  3552. }
  3553. spin_lock_init(&hba[i]->lock);
  3554. /* Initialize the pdev driver private data.
  3555. have it point to hba[i]. */
  3556. pci_set_drvdata(pdev, hba[i]);
  3557. /* command and error info recs zeroed out before
  3558. they are used */
  3559. memset(hba[i]->cmd_pool_bits, 0,
  3560. DIV_ROUND_UP(hba[i]->nr_cmds, BITS_PER_LONG)
  3561. * sizeof(unsigned long));
  3562. hba[i]->num_luns = 0;
  3563. hba[i]->highest_lun = -1;
  3564. for (j = 0; j < CISS_MAX_LUN; j++) {
  3565. hba[i]->drv[j].raid_level = -1;
  3566. hba[i]->drv[j].queue = NULL;
  3567. hba[i]->gendisk[j] = NULL;
  3568. }
  3569. cciss_scsi_setup(i);
  3570. /* Turn the interrupts on so we can service requests */
  3571. hba[i]->access.set_intr_mask(hba[i], CCISS_INTR_ON);
  3572. /* Get the firmware version */
  3573. inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
  3574. if (inq_buff == NULL) {
  3575. printk(KERN_ERR "cciss: out of memory\n");
  3576. goto clean4;
  3577. }
  3578. return_code = sendcmd_withirq(CISS_INQUIRY, i, inq_buff,
  3579. sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
  3580. if (return_code == IO_OK) {
  3581. hba[i]->firm_ver[0] = inq_buff->data_byte[32];
  3582. hba[i]->firm_ver[1] = inq_buff->data_byte[33];
  3583. hba[i]->firm_ver[2] = inq_buff->data_byte[34];
  3584. hba[i]->firm_ver[3] = inq_buff->data_byte[35];
  3585. } else { /* send command failed */
  3586. printk(KERN_WARNING "cciss: unable to determine firmware"
  3587. " version of controller\n");
  3588. }
  3589. cciss_procinit(i);
  3590. hba[i]->cciss_max_sectors = 2048;
  3591. hba[i]->busy_initializing = 0;
  3592. rebuild_lun_table(hba[i], 1);
  3593. hba[i]->cciss_scan_thread = kthread_run(scan_thread, hba[i],
  3594. "cciss_scan%02d", i);
  3595. if (IS_ERR(hba[i]->cciss_scan_thread))
  3596. return PTR_ERR(hba[i]->cciss_scan_thread);
  3597. return 1;
  3598. clean4:
  3599. kfree(inq_buff);
  3600. kfree(hba[i]->cmd_pool_bits);
  3601. if (hba[i]->cmd_pool)
  3602. pci_free_consistent(hba[i]->pdev,
  3603. hba[i]->nr_cmds * sizeof(CommandList_struct),
  3604. hba[i]->cmd_pool, hba[i]->cmd_pool_dhandle);
  3605. if (hba[i]->errinfo_pool)
  3606. pci_free_consistent(hba[i]->pdev,
  3607. hba[i]->nr_cmds * sizeof(ErrorInfo_struct),
  3608. hba[i]->errinfo_pool,
  3609. hba[i]->errinfo_pool_dhandle);
  3610. free_irq(hba[i]->intr[SIMPLE_MODE_INT], hba[i]);
  3611. clean2:
  3612. unregister_blkdev(hba[i]->major, hba[i]->devname);
  3613. clean1:
  3614. cciss_destroy_hba_sysfs_entry(hba[i]);
  3615. clean0:
  3616. hba[i]->busy_initializing = 0;
  3617. /* cleanup any queues that may have been initialized */
  3618. for (j=0; j <= hba[i]->highest_lun; j++){
  3619. drive_info_struct *drv = &(hba[i]->drv[j]);
  3620. if (drv->queue)
  3621. blk_cleanup_queue(drv->queue);
  3622. }
  3623. /*
  3624. * Deliberately omit pci_disable_device(): it does something nasty to
  3625. * Smart Array controllers that pci_enable_device does not undo
  3626. */
  3627. pci_release_regions(pdev);
  3628. pci_set_drvdata(pdev, NULL);
  3629. free_hba(i);
  3630. return -1;
  3631. }
  3632. static void cciss_shutdown(struct pci_dev *pdev)
  3633. {
  3634. ctlr_info_t *tmp_ptr;
  3635. int i;
  3636. char flush_buf[4];
  3637. int return_code;
  3638. tmp_ptr = pci_get_drvdata(pdev);
  3639. if (tmp_ptr == NULL)
  3640. return;
  3641. i = tmp_ptr->ctlr;
  3642. if (hba[i] == NULL)
  3643. return;
  3644. /* Turn board interrupts off and send the flush cache command */
  3645. /* sendcmd will turn off interrupt, and send the flush...
  3646. * To write all data in the battery backed cache to disks */
  3647. memset(flush_buf, 0, 4);
  3648. return_code = sendcmd(CCISS_CACHE_FLUSH, i, flush_buf, 4, 0,
  3649. CTLR_LUNID, TYPE_CMD);
  3650. if (return_code == IO_OK) {
  3651. printk(KERN_INFO "Completed flushing cache on controller %d\n", i);
  3652. } else {
  3653. printk(KERN_WARNING "Error flushing cache on controller %d\n", i);
  3654. }
  3655. free_irq(hba[i]->intr[2], hba[i]);
  3656. }
  3657. static void __devexit cciss_remove_one(struct pci_dev *pdev)
  3658. {
  3659. ctlr_info_t *tmp_ptr;
  3660. int i, j;
  3661. if (pci_get_drvdata(pdev) == NULL) {
  3662. printk(KERN_ERR "cciss: Unable to remove device \n");
  3663. return;
  3664. }
  3665. tmp_ptr = pci_get_drvdata(pdev);
  3666. i = tmp_ptr->ctlr;
  3667. if (hba[i] == NULL) {
  3668. printk(KERN_ERR "cciss: device appears to "
  3669. "already be removed \n");
  3670. return;
  3671. }
  3672. kthread_stop(hba[i]->cciss_scan_thread);
  3673. remove_proc_entry(hba[i]->devname, proc_cciss);
  3674. unregister_blkdev(hba[i]->major, hba[i]->devname);
  3675. /* remove it from the disk list */
  3676. for (j = 0; j < CISS_MAX_LUN; j++) {
  3677. struct gendisk *disk = hba[i]->gendisk[j];
  3678. if (disk) {
  3679. struct request_queue *q = disk->queue;
  3680. if (disk->flags & GENHD_FL_UP)
  3681. del_gendisk(disk);
  3682. if (q)
  3683. blk_cleanup_queue(q);
  3684. }
  3685. }
  3686. #ifdef CONFIG_CISS_SCSI_TAPE
  3687. cciss_unregister_scsi(i); /* unhook from SCSI subsystem */
  3688. #endif
  3689. cciss_shutdown(pdev);
  3690. #ifdef CONFIG_PCI_MSI
  3691. if (hba[i]->msix_vector)
  3692. pci_disable_msix(hba[i]->pdev);
  3693. else if (hba[i]->msi_vector)
  3694. pci_disable_msi(hba[i]->pdev);
  3695. #endif /* CONFIG_PCI_MSI */
  3696. iounmap(hba[i]->vaddr);
  3697. pci_free_consistent(hba[i]->pdev, hba[i]->nr_cmds * sizeof(CommandList_struct),
  3698. hba[i]->cmd_pool, hba[i]->cmd_pool_dhandle);
  3699. pci_free_consistent(hba[i]->pdev, hba[i]->nr_cmds * sizeof(ErrorInfo_struct),
  3700. hba[i]->errinfo_pool, hba[i]->errinfo_pool_dhandle);
  3701. kfree(hba[i]->cmd_pool_bits);
  3702. /*
  3703. * Deliberately omit pci_disable_device(): it does something nasty to
  3704. * Smart Array controllers that pci_enable_device does not undo
  3705. */
  3706. pci_release_regions(pdev);
  3707. pci_set_drvdata(pdev, NULL);
  3708. cciss_destroy_hba_sysfs_entry(hba[i]);
  3709. free_hba(i);
  3710. }
  3711. static struct pci_driver cciss_pci_driver = {
  3712. .name = "cciss",
  3713. .probe = cciss_init_one,
  3714. .remove = __devexit_p(cciss_remove_one),
  3715. .id_table = cciss_pci_device_id, /* id_table */
  3716. .shutdown = cciss_shutdown,
  3717. };
  3718. /*
  3719. * This is it. Register the PCI driver information for the cards we control
  3720. * the OS will call our registered routines when it finds one of our cards.
  3721. */
  3722. static int __init cciss_init(void)
  3723. {
  3724. int err;
  3725. /*
  3726. * The hardware requires that commands are aligned on a 64-bit
  3727. * boundary. Given that we use pci_alloc_consistent() to allocate an
  3728. * array of them, the size must be a multiple of 8 bytes.
  3729. */
  3730. BUILD_BUG_ON(sizeof(CommandList_struct) % 8);
  3731. printk(KERN_INFO DRIVER_NAME "\n");
  3732. err = bus_register(&cciss_bus_type);
  3733. if (err)
  3734. return err;
  3735. /* Register for our PCI devices */
  3736. err = pci_register_driver(&cciss_pci_driver);
  3737. if (err)
  3738. goto err_bus_register;
  3739. return 0;
  3740. err_bus_register:
  3741. bus_unregister(&cciss_bus_type);
  3742. return err;
  3743. }
  3744. static void __exit cciss_cleanup(void)
  3745. {
  3746. int i;
  3747. pci_unregister_driver(&cciss_pci_driver);
  3748. /* double check that all controller entrys have been removed */
  3749. for (i = 0; i < MAX_CTLR; i++) {
  3750. if (hba[i] != NULL) {
  3751. printk(KERN_WARNING "cciss: had to remove"
  3752. " controller %d\n", i);
  3753. cciss_remove_one(hba[i]->pdev);
  3754. }
  3755. }
  3756. remove_proc_entry("driver/cciss", NULL);
  3757. bus_unregister(&cciss_bus_type);
  3758. }
  3759. static void fail_all_cmds(unsigned long ctlr)
  3760. {
  3761. /* If we get here, the board is apparently dead. */
  3762. ctlr_info_t *h = hba[ctlr];
  3763. CommandList_struct *c;
  3764. unsigned long flags;
  3765. printk(KERN_WARNING "cciss%d: controller not responding.\n", h->ctlr);
  3766. h->alive = 0; /* the controller apparently died... */
  3767. spin_lock_irqsave(CCISS_LOCK(ctlr), flags);
  3768. pci_disable_device(h->pdev); /* Make sure it is really dead. */
  3769. /* move everything off the request queue onto the completed queue */
  3770. while (!hlist_empty(&h->reqQ)) {
  3771. c = hlist_entry(h->reqQ.first, CommandList_struct, list);
  3772. removeQ(c);
  3773. h->Qdepth--;
  3774. addQ(&h->cmpQ, c);
  3775. }
  3776. /* Now, fail everything on the completed queue with a HW error */
  3777. while (!hlist_empty(&h->cmpQ)) {
  3778. c = hlist_entry(h->cmpQ.first, CommandList_struct, list);
  3779. removeQ(c);
  3780. if (c->cmd_type != CMD_MSG_STALE)
  3781. c->err_info->CommandStatus = CMD_HARDWARE_ERR;
  3782. if (c->cmd_type == CMD_RWREQ) {
  3783. complete_command(h, c, 0);
  3784. } else if (c->cmd_type == CMD_IOCTL_PEND)
  3785. complete(c->waiting);
  3786. #ifdef CONFIG_CISS_SCSI_TAPE
  3787. else if (c->cmd_type == CMD_SCSI)
  3788. complete_scsi_command(c, 0, 0);
  3789. #endif
  3790. }
  3791. spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
  3792. return;
  3793. }
  3794. module_init(cciss_init);
  3795. module_exit(cciss_cleanup);