bfin_gpio.c 20 KB

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  1. /*
  2. * File: arch/blackfin/kernel/bfin_gpio.c
  3. * Based on:
  4. * Author: Michael Hennerich (hennerich@blackfin.uclinux.org)
  5. *
  6. * Created:
  7. * Description: GPIO Abstraction Layer
  8. *
  9. * Modified:
  10. * Copyright 2006 Analog Devices Inc.
  11. *
  12. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, see the file COPYING, or write
  26. * to the Free Software Foundation, Inc.,
  27. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  28. */
  29. /*
  30. * Number BF537/6/4 BF561 BF533/2/1
  31. *
  32. * GPIO_0 PF0 PF0 PF0
  33. * GPIO_1 PF1 PF1 PF1
  34. * GPIO_2 PF2 PF2 PF2
  35. * GPIO_3 PF3 PF3 PF3
  36. * GPIO_4 PF4 PF4 PF4
  37. * GPIO_5 PF5 PF5 PF5
  38. * GPIO_6 PF6 PF6 PF6
  39. * GPIO_7 PF7 PF7 PF7
  40. * GPIO_8 PF8 PF8 PF8
  41. * GPIO_9 PF9 PF9 PF9
  42. * GPIO_10 PF10 PF10 PF10
  43. * GPIO_11 PF11 PF11 PF11
  44. * GPIO_12 PF12 PF12 PF12
  45. * GPIO_13 PF13 PF13 PF13
  46. * GPIO_14 PF14 PF14 PF14
  47. * GPIO_15 PF15 PF15 PF15
  48. * GPIO_16 PG0 PF16
  49. * GPIO_17 PG1 PF17
  50. * GPIO_18 PG2 PF18
  51. * GPIO_19 PG3 PF19
  52. * GPIO_20 PG4 PF20
  53. * GPIO_21 PG5 PF21
  54. * GPIO_22 PG6 PF22
  55. * GPIO_23 PG7 PF23
  56. * GPIO_24 PG8 PF24
  57. * GPIO_25 PG9 PF25
  58. * GPIO_26 PG10 PF26
  59. * GPIO_27 PG11 PF27
  60. * GPIO_28 PG12 PF28
  61. * GPIO_29 PG13 PF29
  62. * GPIO_30 PG14 PF30
  63. * GPIO_31 PG15 PF31
  64. * GPIO_32 PH0 PF32
  65. * GPIO_33 PH1 PF33
  66. * GPIO_34 PH2 PF34
  67. * GPIO_35 PH3 PF35
  68. * GPIO_36 PH4 PF36
  69. * GPIO_37 PH5 PF37
  70. * GPIO_38 PH6 PF38
  71. * GPIO_39 PH7 PF39
  72. * GPIO_40 PH8 PF40
  73. * GPIO_41 PH9 PF41
  74. * GPIO_42 PH10 PF42
  75. * GPIO_43 PH11 PF43
  76. * GPIO_44 PH12 PF44
  77. * GPIO_45 PH13 PF45
  78. * GPIO_46 PH14 PF46
  79. * GPIO_47 PH15 PF47
  80. */
  81. #include <linux/module.h>
  82. #include <linux/err.h>
  83. #include <asm/blackfin.h>
  84. #include <asm/gpio.h>
  85. #include <asm/portmux.h>
  86. #include <linux/irq.h>
  87. #ifdef BF533_FAMILY
  88. static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
  89. (struct gpio_port_t *) FIO_FLAG_D,
  90. };
  91. #endif
  92. #ifdef BF537_FAMILY
  93. static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
  94. (struct gpio_port_t *) PORTFIO,
  95. (struct gpio_port_t *) PORTGIO,
  96. (struct gpio_port_t *) PORTHIO,
  97. };
  98. static unsigned short *port_fer[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
  99. (unsigned short *) PORTF_FER,
  100. (unsigned short *) PORTG_FER,
  101. (unsigned short *) PORTH_FER,
  102. };
  103. #endif
  104. #ifdef BF561_FAMILY
  105. static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
  106. (struct gpio_port_t *) FIO0_FLAG_D,
  107. (struct gpio_port_t *) FIO1_FLAG_D,
  108. (struct gpio_port_t *) FIO2_FLAG_D,
  109. };
  110. #endif
  111. static unsigned short reserved_gpio_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
  112. static unsigned short reserved_peri_map[gpio_bank(MAX_BLACKFIN_GPIOS + 16)];
  113. char *str_ident = NULL;
  114. #define RESOURCE_LABEL_SIZE 16
  115. #ifdef CONFIG_PM
  116. static unsigned short wakeup_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
  117. static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS];
  118. static struct gpio_port_s gpio_bank_saved[gpio_bank(MAX_BLACKFIN_GPIOS)];
  119. #ifdef BF533_FAMILY
  120. static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB};
  121. #endif
  122. #ifdef BF537_FAMILY
  123. static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX};
  124. #endif
  125. #ifdef BF561_FAMILY
  126. static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB};
  127. #endif
  128. #endif /* CONFIG_PM */
  129. inline int check_gpio(unsigned short gpio)
  130. {
  131. if (gpio >= MAX_BLACKFIN_GPIOS)
  132. return -EINVAL;
  133. return 0;
  134. }
  135. static void set_label(unsigned short ident, const char *label)
  136. {
  137. if (label && str_ident) {
  138. strncpy(str_ident + ident * RESOURCE_LABEL_SIZE, label,
  139. RESOURCE_LABEL_SIZE);
  140. str_ident[ident * RESOURCE_LABEL_SIZE +
  141. RESOURCE_LABEL_SIZE - 1] = 0;
  142. }
  143. }
  144. static char *get_label(unsigned short ident)
  145. {
  146. if (!str_ident)
  147. return "UNKNOWN";
  148. return (str_ident[ident * RESOURCE_LABEL_SIZE] ?
  149. (str_ident + ident * RESOURCE_LABEL_SIZE) : "UNKNOWN");
  150. }
  151. static int cmp_label(unsigned short ident, const char *label)
  152. {
  153. if (label && str_ident)
  154. return strncmp(str_ident + ident * RESOURCE_LABEL_SIZE,
  155. label, strlen(label));
  156. else
  157. return -EINVAL;
  158. }
  159. #ifdef BF537_FAMILY
  160. static void port_setup(unsigned short gpio, unsigned short usage)
  161. {
  162. if (usage == GPIO_USAGE) {
  163. *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  164. } else
  165. *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
  166. SSYNC();
  167. }
  168. #else
  169. # define port_setup(...) do { } while (0)
  170. #endif
  171. #ifdef BF537_FAMILY
  172. #define PMUX_LUT_RES 0
  173. #define PMUX_LUT_OFFSET 1
  174. #define PMUX_LUT_ENTRIES 41
  175. #define PMUX_LUT_SIZE 2
  176. static unsigned short port_mux_lut[PMUX_LUT_ENTRIES][PMUX_LUT_SIZE] = {
  177. {P_PPI0_D13, 11}, {P_PPI0_D14, 11}, {P_PPI0_D15, 11},
  178. {P_SPORT1_TFS, 11}, {P_SPORT1_TSCLK, 11}, {P_SPORT1_DTPRI, 11},
  179. {P_PPI0_D10, 10}, {P_PPI0_D11, 10}, {P_PPI0_D12, 10},
  180. {P_SPORT1_RSCLK, 10}, {P_SPORT1_RFS, 10}, {P_SPORT1_DRPRI, 10},
  181. {P_PPI0_D8, 9}, {P_PPI0_D9, 9}, {P_SPORT1_DRSEC, 9},
  182. {P_SPORT1_DTSEC, 9}, {P_TMR2, 8}, {P_PPI0_FS3, 8}, {P_TMR3, 7},
  183. {P_SPI0_SSEL4, 7}, {P_TMR4, 6}, {P_SPI0_SSEL5, 6}, {P_TMR5, 5},
  184. {P_SPI0_SSEL6, 5}, {P_UART1_RX, 4}, {P_UART1_TX, 4}, {P_TMR6, 4},
  185. {P_TMR7, 4}, {P_UART0_RX, 3}, {P_UART0_TX, 3}, {P_DMAR0, 3},
  186. {P_DMAR1, 3}, {P_SPORT0_DTSEC, 1}, {P_SPORT0_DRSEC, 1},
  187. {P_CAN0_RX, 1}, {P_CAN0_TX, 1}, {P_SPI0_SSEL7, 1},
  188. {P_SPORT0_TFS, 0}, {P_SPORT0_DTPRI, 0}, {P_SPI0_SSEL2, 0},
  189. {P_SPI0_SSEL3, 0}
  190. };
  191. static void portmux_setup(unsigned short per, unsigned short function)
  192. {
  193. u16 y, muxreg, offset;
  194. for (y = 0; y < PMUX_LUT_ENTRIES; y++) {
  195. if (port_mux_lut[y][PMUX_LUT_RES] == per) {
  196. /* SET PORTMUX REG */
  197. offset = port_mux_lut[y][PMUX_LUT_OFFSET];
  198. muxreg = bfin_read_PORT_MUX();
  199. if (offset != 1) {
  200. muxreg &= ~(1 << offset);
  201. } else {
  202. muxreg &= ~(3 << 1);
  203. }
  204. muxreg |= (function << offset);
  205. bfin_write_PORT_MUX(muxreg);
  206. }
  207. }
  208. }
  209. #else
  210. # define portmux_setup(...) do { } while (0)
  211. #endif
  212. static void default_gpio(unsigned short gpio)
  213. {
  214. unsigned short bank, bitmask;
  215. bank = gpio_bank(gpio);
  216. bitmask = gpio_bit(gpio);
  217. gpio_bankb[bank]->maska_clear = bitmask;
  218. gpio_bankb[bank]->maskb_clear = bitmask;
  219. SSYNC();
  220. gpio_bankb[bank]->inen &= ~bitmask;
  221. gpio_bankb[bank]->dir &= ~bitmask;
  222. gpio_bankb[bank]->polar &= ~bitmask;
  223. gpio_bankb[bank]->both &= ~bitmask;
  224. gpio_bankb[bank]->edge &= ~bitmask;
  225. }
  226. static int __init bfin_gpio_init(void)
  227. {
  228. str_ident = kzalloc(RESOURCE_LABEL_SIZE * 256, GFP_KERNEL);
  229. if (!str_ident)
  230. return -ENOMEM;
  231. printk(KERN_INFO "Blackfin GPIO Controller\n");
  232. return 0;
  233. }
  234. arch_initcall(bfin_gpio_init);
  235. /***********************************************************
  236. *
  237. * FUNCTIONS: Blackfin General Purpose Ports Access Functions
  238. *
  239. * INPUTS/OUTPUTS:
  240. * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
  241. *
  242. *
  243. * DESCRIPTION: These functions abstract direct register access
  244. * to Blackfin processor General Purpose
  245. * Ports Regsiters
  246. *
  247. * CAUTION: These functions do not belong to the GPIO Driver API
  248. *************************************************************
  249. * MODIFICATION HISTORY :
  250. **************************************************************/
  251. /* Set a specific bit */
  252. #define SET_GPIO(name) \
  253. void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \
  254. { \
  255. unsigned long flags; \
  256. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); \
  257. local_irq_save(flags); \
  258. if (arg) \
  259. gpio_bankb[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
  260. else \
  261. gpio_bankb[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
  262. local_irq_restore(flags); \
  263. } \
  264. EXPORT_SYMBOL(set_gpio_ ## name);
  265. SET_GPIO(dir)
  266. SET_GPIO(inen)
  267. SET_GPIO(polar)
  268. SET_GPIO(edge)
  269. SET_GPIO(both)
  270. #define SET_GPIO_SC(name) \
  271. void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \
  272. { \
  273. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); \
  274. if (arg) \
  275. gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
  276. else \
  277. gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
  278. } \
  279. EXPORT_SYMBOL(set_gpio_ ## name);
  280. SET_GPIO_SC(maska)
  281. SET_GPIO_SC(maskb)
  282. #if defined(ANOMALY_05000311)
  283. void set_gpio_data(unsigned short gpio, unsigned short arg)
  284. {
  285. unsigned long flags;
  286. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
  287. local_irq_save(flags);
  288. if (arg)
  289. gpio_bankb[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
  290. else
  291. gpio_bankb[gpio_bank(gpio)]->data_clear = gpio_bit(gpio);
  292. bfin_read_CHIPID();
  293. local_irq_restore(flags);
  294. }
  295. EXPORT_SYMBOL(set_gpio_data);
  296. #else
  297. SET_GPIO_SC(data)
  298. #endif
  299. #if defined(ANOMALY_05000311)
  300. void set_gpio_toggle(unsigned short gpio)
  301. {
  302. unsigned long flags;
  303. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
  304. local_irq_save(flags);
  305. gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
  306. bfin_read_CHIPID();
  307. local_irq_restore(flags);
  308. }
  309. #else
  310. void set_gpio_toggle(unsigned short gpio)
  311. {
  312. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
  313. gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
  314. }
  315. #endif
  316. EXPORT_SYMBOL(set_gpio_toggle);
  317. /*Set current PORT date (16-bit word)*/
  318. #define SET_GPIO_P(name) \
  319. void set_gpiop_ ## name(unsigned short gpio, unsigned short arg) \
  320. { \
  321. gpio_bankb[gpio_bank(gpio)]->name = arg; \
  322. } \
  323. EXPORT_SYMBOL(set_gpiop_ ## name);
  324. SET_GPIO_P(dir)
  325. SET_GPIO_P(inen)
  326. SET_GPIO_P(polar)
  327. SET_GPIO_P(edge)
  328. SET_GPIO_P(both)
  329. SET_GPIO_P(maska)
  330. SET_GPIO_P(maskb)
  331. #if defined(ANOMALY_05000311)
  332. void set_gpiop_data(unsigned short gpio, unsigned short arg)
  333. {
  334. unsigned long flags;
  335. local_irq_save(flags);
  336. gpio_bankb[gpio_bank(gpio)]->data = arg;
  337. bfin_read_CHIPID();
  338. local_irq_restore(flags);
  339. }
  340. EXPORT_SYMBOL(set_gpiop_data);
  341. #else
  342. SET_GPIO_P(data)
  343. #endif
  344. /* Get a specific bit */
  345. #define GET_GPIO(name) \
  346. unsigned short get_gpio_ ## name(unsigned short gpio) \
  347. { \
  348. return (0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio))); \
  349. } \
  350. EXPORT_SYMBOL(get_gpio_ ## name);
  351. GET_GPIO(dir)
  352. GET_GPIO(inen)
  353. GET_GPIO(polar)
  354. GET_GPIO(edge)
  355. GET_GPIO(both)
  356. GET_GPIO(maska)
  357. GET_GPIO(maskb)
  358. #if defined(ANOMALY_05000311)
  359. unsigned short get_gpio_data(unsigned short gpio)
  360. {
  361. unsigned long flags;
  362. unsigned short ret;
  363. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
  364. local_irq_save(flags);
  365. ret = 0x01 & (gpio_bankb[gpio_bank(gpio)]->data >> gpio_sub_n(gpio));
  366. bfin_read_CHIPID();
  367. local_irq_restore(flags);
  368. return ret;
  369. }
  370. EXPORT_SYMBOL(get_gpio_data);
  371. #else
  372. GET_GPIO(data)
  373. #endif
  374. /*Get current PORT date (16-bit word)*/
  375. #define GET_GPIO_P(name) \
  376. unsigned short get_gpiop_ ## name(unsigned short gpio) \
  377. { \
  378. return (gpio_bankb[gpio_bank(gpio)]->name);\
  379. } \
  380. EXPORT_SYMBOL(get_gpiop_ ## name);
  381. GET_GPIO_P(dir)
  382. GET_GPIO_P(inen)
  383. GET_GPIO_P(polar)
  384. GET_GPIO_P(edge)
  385. GET_GPIO_P(both)
  386. GET_GPIO_P(maska)
  387. GET_GPIO_P(maskb)
  388. #if defined(ANOMALY_05000311)
  389. unsigned short get_gpiop_data(unsigned short gpio)
  390. {
  391. unsigned long flags;
  392. unsigned short ret;
  393. local_irq_save(flags);
  394. ret = gpio_bankb[gpio_bank(gpio)]->data;
  395. bfin_read_CHIPID();
  396. local_irq_restore(flags);
  397. return ret;
  398. }
  399. EXPORT_SYMBOL(get_gpiop_data);
  400. #else
  401. GET_GPIO_P(data)
  402. #endif
  403. #ifdef CONFIG_PM
  404. /***********************************************************
  405. *
  406. * FUNCTIONS: Blackfin PM Setup API
  407. *
  408. * INPUTS/OUTPUTS:
  409. * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
  410. * type -
  411. * PM_WAKE_RISING
  412. * PM_WAKE_FALLING
  413. * PM_WAKE_HIGH
  414. * PM_WAKE_LOW
  415. * PM_WAKE_BOTH_EDGES
  416. *
  417. * DESCRIPTION: Blackfin PM Driver API
  418. *
  419. * CAUTION:
  420. *************************************************************
  421. * MODIFICATION HISTORY :
  422. **************************************************************/
  423. int gpio_pm_wakeup_request(unsigned short gpio, unsigned char type)
  424. {
  425. unsigned long flags;
  426. if ((check_gpio(gpio) < 0) || !type)
  427. return -EINVAL;
  428. local_irq_save(flags);
  429. wakeup_map[gpio_bank(gpio)] |= gpio_bit(gpio);
  430. wakeup_flags_map[gpio] = type;
  431. local_irq_restore(flags);
  432. return 0;
  433. }
  434. EXPORT_SYMBOL(gpio_pm_wakeup_request);
  435. void gpio_pm_wakeup_free(unsigned short gpio)
  436. {
  437. unsigned long flags;
  438. if (check_gpio(gpio) < 0)
  439. return;
  440. local_irq_save(flags);
  441. wakeup_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  442. local_irq_restore(flags);
  443. }
  444. EXPORT_SYMBOL(gpio_pm_wakeup_free);
  445. static int bfin_gpio_wakeup_type(unsigned short gpio, unsigned char type)
  446. {
  447. port_setup(gpio, GPIO_USAGE);
  448. set_gpio_dir(gpio, 0);
  449. set_gpio_inen(gpio, 1);
  450. if (type & (PM_WAKE_RISING | PM_WAKE_FALLING))
  451. set_gpio_edge(gpio, 1);
  452. else
  453. set_gpio_edge(gpio, 0);
  454. if ((type & (PM_WAKE_BOTH_EDGES)) == (PM_WAKE_BOTH_EDGES))
  455. set_gpio_both(gpio, 1);
  456. else
  457. set_gpio_both(gpio, 0);
  458. if ((type & (PM_WAKE_FALLING | PM_WAKE_LOW)))
  459. set_gpio_polar(gpio, 1);
  460. else
  461. set_gpio_polar(gpio, 0);
  462. SSYNC();
  463. return 0;
  464. }
  465. u32 gpio_pm_setup(void)
  466. {
  467. u32 sic_iwr = 0;
  468. u16 bank, mask, i, gpio;
  469. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  470. mask = wakeup_map[gpio_bank(i)];
  471. bank = gpio_bank(i);
  472. gpio_bank_saved[bank].maskb = gpio_bankb[bank]->maskb;
  473. gpio_bankb[bank]->maskb = 0;
  474. if (mask) {
  475. #ifdef BF537_FAMILY
  476. gpio_bank_saved[bank].fer = *port_fer[bank];
  477. #endif
  478. gpio_bank_saved[bank].inen = gpio_bankb[bank]->inen;
  479. gpio_bank_saved[bank].polar = gpio_bankb[bank]->polar;
  480. gpio_bank_saved[bank].dir = gpio_bankb[bank]->dir;
  481. gpio_bank_saved[bank].edge = gpio_bankb[bank]->edge;
  482. gpio_bank_saved[bank].both = gpio_bankb[bank]->both;
  483. gpio_bank_saved[bank].reserved =
  484. reserved_gpio_map[bank];
  485. gpio = i;
  486. while (mask) {
  487. if (mask & 1) {
  488. reserved_gpio_map[gpio_bank(gpio)] |=
  489. gpio_bit(gpio);
  490. bfin_gpio_wakeup_type(gpio,
  491. wakeup_flags_map[gpio]);
  492. set_gpio_data(gpio, 0); /*Clear*/
  493. }
  494. gpio++;
  495. mask >>= 1;
  496. }
  497. sic_iwr |= 1 <<
  498. (sic_iwr_irqs[bank] - (IRQ_CORETMR + 1));
  499. gpio_bankb[bank]->maskb_set = wakeup_map[gpio_bank(i)];
  500. }
  501. }
  502. if (sic_iwr)
  503. return sic_iwr;
  504. else
  505. return IWR_ENABLE_ALL;
  506. }
  507. void gpio_pm_restore(void)
  508. {
  509. u16 bank, mask, i;
  510. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  511. mask = wakeup_map[gpio_bank(i)];
  512. bank = gpio_bank(i);
  513. if (mask) {
  514. #ifdef BF537_FAMILY
  515. *port_fer[bank] = gpio_bank_saved[bank].fer;
  516. #endif
  517. gpio_bankb[bank]->inen = gpio_bank_saved[bank].inen;
  518. gpio_bankb[bank]->dir = gpio_bank_saved[bank].dir;
  519. gpio_bankb[bank]->polar = gpio_bank_saved[bank].polar;
  520. gpio_bankb[bank]->edge = gpio_bank_saved[bank].edge;
  521. gpio_bankb[bank]->both = gpio_bank_saved[bank].both;
  522. reserved_gpio_map[bank] =
  523. gpio_bank_saved[bank].reserved;
  524. }
  525. gpio_bankb[bank]->maskb = gpio_bank_saved[bank].maskb;
  526. }
  527. }
  528. #endif
  529. int peripheral_request(unsigned short per, const char *label)
  530. {
  531. unsigned long flags;
  532. unsigned short ident = P_IDENT(per);
  533. /*
  534. * Don't cares are pins with only one dedicated function
  535. */
  536. if (per & P_DONTCARE)
  537. return 0;
  538. if (!(per & P_DEFINED))
  539. return -ENODEV;
  540. if (check_gpio(ident) < 0)
  541. return -EINVAL;
  542. local_irq_save(flags);
  543. if (unlikely(reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
  544. printk(KERN_ERR
  545. "%s: Peripheral %d is already reserved as GPIO by %s !\n",
  546. __FUNCTION__, ident, get_label(ident));
  547. dump_stack();
  548. local_irq_restore(flags);
  549. return -EBUSY;
  550. }
  551. if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
  552. /*
  553. * Pin functions like AMC address strobes my
  554. * be requested and used by several drivers
  555. */
  556. if (!(per & P_MAYSHARE)) {
  557. /*
  558. * Allow that the identical pin function can
  559. * be requested from the same driver twice
  560. */
  561. if (cmp_label(ident, label) == 0)
  562. goto anyway;
  563. printk(KERN_ERR
  564. "%s: Peripheral %d function %d is already"
  565. "reserved by %s !\n",
  566. __FUNCTION__, ident, P_FUNCT2MUX(per),
  567. get_label(ident));
  568. dump_stack();
  569. local_irq_restore(flags);
  570. return -EBUSY;
  571. }
  572. }
  573. anyway:
  574. portmux_setup(per, P_FUNCT2MUX(per));
  575. port_setup(ident, PERIPHERAL_USAGE);
  576. reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
  577. local_irq_restore(flags);
  578. set_label(ident, label);
  579. return 0;
  580. }
  581. EXPORT_SYMBOL(peripheral_request);
  582. int peripheral_request_list(unsigned short per[], const char *label)
  583. {
  584. u16 cnt;
  585. int ret;
  586. for (cnt = 0; per[cnt] != 0; cnt++) {
  587. ret = peripheral_request(per[cnt], label);
  588. if (ret < 0)
  589. return ret;
  590. }
  591. return 0;
  592. }
  593. EXPORT_SYMBOL(peripheral_request_list);
  594. void peripheral_free(unsigned short per)
  595. {
  596. unsigned long flags;
  597. unsigned short ident = P_IDENT(per);
  598. if (per & P_DONTCARE)
  599. return;
  600. if (!(per & P_DEFINED))
  601. return;
  602. if (check_gpio(ident) < 0)
  603. return;
  604. local_irq_save(flags);
  605. if (unlikely(!(reserved_peri_map[gpio_bank(ident)]
  606. & gpio_bit(ident)))) {
  607. local_irq_restore(flags);
  608. return;
  609. }
  610. if (!(per & P_MAYSHARE)) {
  611. port_setup(ident, GPIO_USAGE);
  612. }
  613. reserved_peri_map[gpio_bank(ident)] &= ~gpio_bit(ident);
  614. local_irq_restore(flags);
  615. }
  616. EXPORT_SYMBOL(peripheral_free);
  617. void peripheral_free_list(unsigned short per[])
  618. {
  619. u16 cnt;
  620. for (cnt = 0; per[cnt] != 0; cnt++) {
  621. peripheral_free(per[cnt]);
  622. }
  623. }
  624. EXPORT_SYMBOL(peripheral_free_list);
  625. /***********************************************************
  626. *
  627. * FUNCTIONS: Blackfin GPIO Driver
  628. *
  629. * INPUTS/OUTPUTS:
  630. * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
  631. *
  632. *
  633. * DESCRIPTION: Blackfin GPIO Driver API
  634. *
  635. * CAUTION:
  636. *************************************************************
  637. * MODIFICATION HISTORY :
  638. **************************************************************/
  639. int gpio_request(unsigned short gpio, const char *label)
  640. {
  641. unsigned long flags;
  642. if (check_gpio(gpio) < 0)
  643. return -EINVAL;
  644. local_irq_save(flags);
  645. if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  646. printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved!\n", gpio);
  647. dump_stack();
  648. local_irq_restore(flags);
  649. return -EBUSY;
  650. }
  651. reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
  652. local_irq_restore(flags);
  653. port_setup(gpio, GPIO_USAGE);
  654. return 0;
  655. }
  656. EXPORT_SYMBOL(gpio_request);
  657. void gpio_free(unsigned short gpio)
  658. {
  659. unsigned long flags;
  660. if (check_gpio(gpio) < 0)
  661. return;
  662. local_irq_save(flags);
  663. if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
  664. printk(KERN_ERR "bfin-gpio: GPIO %d wasn't reserved!\n", gpio);
  665. dump_stack();
  666. local_irq_restore(flags);
  667. return;
  668. }
  669. default_gpio(gpio);
  670. reserved_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  671. local_irq_restore(flags);
  672. }
  673. EXPORT_SYMBOL(gpio_free);
  674. void gpio_direction_input(unsigned short gpio)
  675. {
  676. unsigned long flags;
  677. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
  678. local_irq_save(flags);
  679. gpio_bankb[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
  680. gpio_bankb[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
  681. local_irq_restore(flags);
  682. }
  683. EXPORT_SYMBOL(gpio_direction_input);
  684. void gpio_direction_output(unsigned short gpio)
  685. {
  686. unsigned long flags;
  687. BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
  688. local_irq_save(flags);
  689. gpio_bankb[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
  690. gpio_bankb[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
  691. local_irq_restore(flags);
  692. }
  693. EXPORT_SYMBOL(gpio_direction_output);