iwl3945-base.c 121 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/pci.h>
  33. #include <linux/dma-mapping.h>
  34. #include <linux/delay.h>
  35. #include <linux/skbuff.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/wireless.h>
  38. #include <linux/firmware.h>
  39. #include <linux/etherdevice.h>
  40. #include <linux/if_arp.h>
  41. #include <net/ieee80211_radiotap.h>
  42. #include <net/lib80211.h>
  43. #include <net/mac80211.h>
  44. #include <asm/div64.h>
  45. #define DRV_NAME "iwl3945"
  46. #include "iwl-fh.h"
  47. #include "iwl-3945-fh.h"
  48. #include "iwl-commands.h"
  49. #include "iwl-sta.h"
  50. #include "iwl-3945.h"
  51. #include "iwl-helpers.h"
  52. #include "iwl-core.h"
  53. #include "iwl-dev.h"
  54. /*
  55. * module name, copyright, version, etc.
  56. */
  57. #define DRV_DESCRIPTION \
  58. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  59. #ifdef CONFIG_IWLWIFI_DEBUG
  60. #define VD "d"
  61. #else
  62. #define VD
  63. #endif
  64. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  65. #define VS "s"
  66. #else
  67. #define VS
  68. #endif
  69. #define IWL39_VERSION "1.2.26k" VD VS
  70. #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
  71. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  72. #define DRV_VERSION IWL39_VERSION
  73. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  74. MODULE_VERSION(DRV_VERSION);
  75. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  76. MODULE_LICENSE("GPL");
  77. /* module parameters */
  78. struct iwl_mod_params iwl3945_mod_params = {
  79. .num_of_queues = IWL39_MAX_NUM_QUEUES,
  80. .sw_crypto = 1,
  81. .restart_fw = 1,
  82. /* the rest are 0 by default */
  83. };
  84. /**
  85. * iwl3945_get_antenna_flags - Get antenna flags for RXON command
  86. * @priv: eeprom and antenna fields are used to determine antenna flags
  87. *
  88. * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  89. * iwl3945_mod_params.antenna specifies the antenna diversity mode:
  90. *
  91. * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  92. * IWL_ANTENNA_MAIN - Force MAIN antenna
  93. * IWL_ANTENNA_AUX - Force AUX antenna
  94. */
  95. __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
  96. {
  97. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  98. switch (iwl3945_mod_params.antenna) {
  99. case IWL_ANTENNA_DIVERSITY:
  100. return 0;
  101. case IWL_ANTENNA_MAIN:
  102. if (eeprom->antenna_switch_type)
  103. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  104. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  105. case IWL_ANTENNA_AUX:
  106. if (eeprom->antenna_switch_type)
  107. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  108. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  109. }
  110. /* bad antenna selector value */
  111. IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
  112. iwl3945_mod_params.antenna);
  113. return 0; /* "diversity" is default if error */
  114. }
  115. static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
  116. struct ieee80211_key_conf *keyconf,
  117. u8 sta_id)
  118. {
  119. unsigned long flags;
  120. __le16 key_flags = 0;
  121. int ret;
  122. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  123. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  124. if (sta_id == priv->hw_params.bcast_sta_id)
  125. key_flags |= STA_KEY_MULTICAST_MSK;
  126. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  127. keyconf->hw_key_idx = keyconf->keyidx;
  128. key_flags &= ~STA_KEY_FLG_INVALID;
  129. spin_lock_irqsave(&priv->sta_lock, flags);
  130. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  131. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  132. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  133. keyconf->keylen);
  134. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  135. keyconf->keylen);
  136. if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
  137. == STA_KEY_FLG_NO_ENC)
  138. priv->stations[sta_id].sta.key.key_offset =
  139. iwl_get_free_ucode_key_index(priv);
  140. /* else, we are overriding an existing key => no need to allocated room
  141. * in uCode. */
  142. WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  143. "no space for a new key");
  144. priv->stations[sta_id].sta.key.key_flags = key_flags;
  145. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  146. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  147. IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
  148. ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  149. spin_unlock_irqrestore(&priv->sta_lock, flags);
  150. return ret;
  151. }
  152. static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
  153. struct ieee80211_key_conf *keyconf,
  154. u8 sta_id)
  155. {
  156. return -EOPNOTSUPP;
  157. }
  158. static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
  159. struct ieee80211_key_conf *keyconf,
  160. u8 sta_id)
  161. {
  162. return -EOPNOTSUPP;
  163. }
  164. static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  165. {
  166. unsigned long flags;
  167. spin_lock_irqsave(&priv->sta_lock, flags);
  168. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
  169. memset(&priv->stations[sta_id].sta.key, 0,
  170. sizeof(struct iwl4965_keyinfo));
  171. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  172. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  173. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  174. spin_unlock_irqrestore(&priv->sta_lock, flags);
  175. IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
  176. iwl_send_add_sta(priv, &priv->stations[sta_id].sta, 0);
  177. return 0;
  178. }
  179. static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
  180. struct ieee80211_key_conf *keyconf, u8 sta_id)
  181. {
  182. int ret = 0;
  183. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  184. switch (keyconf->alg) {
  185. case ALG_CCMP:
  186. ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
  187. break;
  188. case ALG_TKIP:
  189. ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
  190. break;
  191. case ALG_WEP:
  192. ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
  193. break;
  194. default:
  195. IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
  196. ret = -EINVAL;
  197. }
  198. IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
  199. keyconf->alg, keyconf->keylen, keyconf->keyidx,
  200. sta_id, ret);
  201. return ret;
  202. }
  203. static int iwl3945_remove_static_key(struct iwl_priv *priv)
  204. {
  205. int ret = -EOPNOTSUPP;
  206. return ret;
  207. }
  208. static int iwl3945_set_static_key(struct iwl_priv *priv,
  209. struct ieee80211_key_conf *key)
  210. {
  211. if (key->alg == ALG_WEP)
  212. return -EOPNOTSUPP;
  213. IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
  214. return -EINVAL;
  215. }
  216. static void iwl3945_clear_free_frames(struct iwl_priv *priv)
  217. {
  218. struct list_head *element;
  219. IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
  220. priv->frames_count);
  221. while (!list_empty(&priv->free_frames)) {
  222. element = priv->free_frames.next;
  223. list_del(element);
  224. kfree(list_entry(element, struct iwl3945_frame, list));
  225. priv->frames_count--;
  226. }
  227. if (priv->frames_count) {
  228. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  229. priv->frames_count);
  230. priv->frames_count = 0;
  231. }
  232. }
  233. static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
  234. {
  235. struct iwl3945_frame *frame;
  236. struct list_head *element;
  237. if (list_empty(&priv->free_frames)) {
  238. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  239. if (!frame) {
  240. IWL_ERR(priv, "Could not allocate frame!\n");
  241. return NULL;
  242. }
  243. priv->frames_count++;
  244. return frame;
  245. }
  246. element = priv->free_frames.next;
  247. list_del(element);
  248. return list_entry(element, struct iwl3945_frame, list);
  249. }
  250. static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
  251. {
  252. memset(frame, 0, sizeof(*frame));
  253. list_add(&frame->list, &priv->free_frames);
  254. }
  255. unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
  256. struct ieee80211_hdr *hdr,
  257. int left)
  258. {
  259. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  260. ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
  261. (priv->iw_mode != NL80211_IFTYPE_AP)))
  262. return 0;
  263. if (priv->ibss_beacon->len > left)
  264. return 0;
  265. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  266. return priv->ibss_beacon->len;
  267. }
  268. static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
  269. {
  270. struct iwl3945_frame *frame;
  271. unsigned int frame_size;
  272. int rc;
  273. u8 rate;
  274. frame = iwl3945_get_free_frame(priv);
  275. if (!frame) {
  276. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  277. "command.\n");
  278. return -ENOMEM;
  279. }
  280. rate = iwl_rate_get_lowest_plcp(priv);
  281. frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
  282. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  283. &frame->u.cmd[0]);
  284. iwl3945_free_frame(priv, frame);
  285. return rc;
  286. }
  287. static void iwl3945_unset_hw_params(struct iwl_priv *priv)
  288. {
  289. if (priv->shared_virt)
  290. pci_free_consistent(priv->pci_dev,
  291. sizeof(struct iwl3945_shared),
  292. priv->shared_virt,
  293. priv->shared_phys);
  294. }
  295. #define MAX_UCODE_BEACON_INTERVAL 1024
  296. #define INTEL_CONN_LISTEN_INTERVAL cpu_to_le16(0xA)
  297. static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
  298. {
  299. u16 new_val = 0;
  300. u16 beacon_factor = 0;
  301. beacon_factor =
  302. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  303. / MAX_UCODE_BEACON_INTERVAL;
  304. new_val = beacon_val / beacon_factor;
  305. return cpu_to_le16(new_val);
  306. }
  307. static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
  308. {
  309. u64 interval_tm_unit;
  310. u64 tsf, result;
  311. unsigned long flags;
  312. struct ieee80211_conf *conf = NULL;
  313. u16 beacon_int = 0;
  314. conf = ieee80211_get_hw_conf(priv->hw);
  315. spin_lock_irqsave(&priv->lock, flags);
  316. priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
  317. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  318. tsf = priv->timestamp;
  319. beacon_int = priv->beacon_int;
  320. spin_unlock_irqrestore(&priv->lock, flags);
  321. if (priv->iw_mode == NL80211_IFTYPE_STATION) {
  322. if (beacon_int == 0) {
  323. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  324. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  325. } else {
  326. priv->rxon_timing.beacon_interval =
  327. cpu_to_le16(beacon_int);
  328. priv->rxon_timing.beacon_interval =
  329. iwl3945_adjust_beacon_interval(
  330. le16_to_cpu(priv->rxon_timing.beacon_interval));
  331. }
  332. priv->rxon_timing.atim_window = 0;
  333. } else {
  334. priv->rxon_timing.beacon_interval =
  335. iwl3945_adjust_beacon_interval(
  336. priv->vif->bss_conf.beacon_int);
  337. /* TODO: we need to get atim_window from upper stack
  338. * for now we set to 0 */
  339. priv->rxon_timing.atim_window = 0;
  340. }
  341. interval_tm_unit =
  342. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  343. result = do_div(tsf, interval_tm_unit);
  344. priv->rxon_timing.beacon_init_val =
  345. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  346. IWL_DEBUG_ASSOC(priv,
  347. "beacon interval %d beacon timer %d beacon tim %d\n",
  348. le16_to_cpu(priv->rxon_timing.beacon_interval),
  349. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  350. le16_to_cpu(priv->rxon_timing.atim_window));
  351. }
  352. static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  353. struct ieee80211_tx_info *info,
  354. struct iwl_cmd *cmd,
  355. struct sk_buff *skb_frag,
  356. int sta_id)
  357. {
  358. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  359. struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
  360. switch (keyinfo->alg) {
  361. case ALG_CCMP:
  362. tx->sec_ctl = TX_CMD_SEC_CCM;
  363. memcpy(tx->key, keyinfo->key, keyinfo->keylen);
  364. IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
  365. break;
  366. case ALG_TKIP:
  367. break;
  368. case ALG_WEP:
  369. tx->sec_ctl = TX_CMD_SEC_WEP |
  370. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  371. if (keyinfo->keylen == 13)
  372. tx->sec_ctl |= TX_CMD_SEC_KEY128;
  373. memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
  374. IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
  375. "with key %d\n", info->control.hw_key->hw_key_idx);
  376. break;
  377. default:
  378. IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
  379. break;
  380. }
  381. }
  382. /*
  383. * handle build REPLY_TX command notification.
  384. */
  385. static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
  386. struct iwl_cmd *cmd,
  387. struct ieee80211_tx_info *info,
  388. struct ieee80211_hdr *hdr, u8 std_id)
  389. {
  390. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  391. __le32 tx_flags = tx->tx_flags;
  392. __le16 fc = hdr->frame_control;
  393. u8 rc_flags = info->control.rates[0].flags;
  394. tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  395. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  396. tx_flags |= TX_CMD_FLG_ACK_MSK;
  397. if (ieee80211_is_mgmt(fc))
  398. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  399. if (ieee80211_is_probe_resp(fc) &&
  400. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  401. tx_flags |= TX_CMD_FLG_TSF_MSK;
  402. } else {
  403. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  404. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  405. }
  406. tx->sta_id = std_id;
  407. if (ieee80211_has_morefrags(fc))
  408. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  409. if (ieee80211_is_data_qos(fc)) {
  410. u8 *qc = ieee80211_get_qos_ctl(hdr);
  411. tx->tid_tspec = qc[0] & 0xf;
  412. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  413. } else {
  414. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  415. }
  416. if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  417. tx_flags |= TX_CMD_FLG_RTS_MSK;
  418. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  419. } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
  420. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  421. tx_flags |= TX_CMD_FLG_CTS_MSK;
  422. }
  423. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  424. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  425. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  426. if (ieee80211_is_mgmt(fc)) {
  427. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  428. tx->timeout.pm_frame_timeout = cpu_to_le16(3);
  429. else
  430. tx->timeout.pm_frame_timeout = cpu_to_le16(2);
  431. } else {
  432. tx->timeout.pm_frame_timeout = 0;
  433. #ifdef CONFIG_IWLWIFI_LEDS
  434. priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
  435. #endif
  436. }
  437. tx->driver_txop = 0;
  438. tx->tx_flags = tx_flags;
  439. tx->next_frame_len = 0;
  440. }
  441. /*
  442. * start REPLY_TX command process
  443. */
  444. static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  445. {
  446. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  447. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  448. struct iwl3945_tx_cmd *tx;
  449. struct iwl_tx_queue *txq = NULL;
  450. struct iwl_queue *q = NULL;
  451. struct iwl_cmd *out_cmd = NULL;
  452. dma_addr_t phys_addr;
  453. dma_addr_t txcmd_phys;
  454. int txq_id = skb_get_queue_mapping(skb);
  455. u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
  456. u8 id;
  457. u8 unicast;
  458. u8 sta_id;
  459. u8 tid = 0;
  460. u16 seq_number = 0;
  461. __le16 fc;
  462. u8 wait_write_ptr = 0;
  463. u8 *qc = NULL;
  464. unsigned long flags;
  465. int rc;
  466. spin_lock_irqsave(&priv->lock, flags);
  467. if (iwl_is_rfkill(priv)) {
  468. IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
  469. goto drop_unlock;
  470. }
  471. if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
  472. IWL_ERR(priv, "ERROR: No TX rate available.\n");
  473. goto drop_unlock;
  474. }
  475. unicast = !is_multicast_ether_addr(hdr->addr1);
  476. id = 0;
  477. fc = hdr->frame_control;
  478. #ifdef CONFIG_IWLWIFI_DEBUG
  479. if (ieee80211_is_auth(fc))
  480. IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
  481. else if (ieee80211_is_assoc_req(fc))
  482. IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
  483. else if (ieee80211_is_reassoc_req(fc))
  484. IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
  485. #endif
  486. /* drop all data frame if we are not associated */
  487. if (ieee80211_is_data(fc) &&
  488. (!iwl_is_monitor_mode(priv)) && /* packet injection */
  489. (!iwl_is_associated(priv) ||
  490. ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
  491. IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
  492. goto drop_unlock;
  493. }
  494. spin_unlock_irqrestore(&priv->lock, flags);
  495. hdr_len = ieee80211_hdrlen(fc);
  496. /* Find (or create) index into station table for destination station */
  497. sta_id = iwl_get_sta_id(priv, hdr);
  498. if (sta_id == IWL_INVALID_STATION) {
  499. IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
  500. hdr->addr1);
  501. goto drop;
  502. }
  503. IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
  504. if (ieee80211_is_data_qos(fc)) {
  505. qc = ieee80211_get_qos_ctl(hdr);
  506. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  507. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  508. IEEE80211_SCTL_SEQ;
  509. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  510. (hdr->seq_ctrl &
  511. cpu_to_le16(IEEE80211_SCTL_FRAG));
  512. seq_number += 0x10;
  513. }
  514. /* Descriptor for chosen Tx queue */
  515. txq = &priv->txq[txq_id];
  516. q = &txq->q;
  517. spin_lock_irqsave(&priv->lock, flags);
  518. idx = get_cmd_index(q, q->write_ptr, 0);
  519. /* Set up driver data for this TFD */
  520. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  521. txq->txb[q->write_ptr].skb[0] = skb;
  522. /* Init first empty entry in queue's array of Tx/cmd buffers */
  523. out_cmd = txq->cmd[idx];
  524. tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
  525. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  526. memset(tx, 0, sizeof(*tx));
  527. /*
  528. * Set up the Tx-command (not MAC!) header.
  529. * Store the chosen Tx queue and TFD index within the sequence field;
  530. * after Tx, uCode's Tx response will return this value so driver can
  531. * locate the frame within the tx queue and do post-tx processing.
  532. */
  533. out_cmd->hdr.cmd = REPLY_TX;
  534. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  535. INDEX_TO_SEQ(q->write_ptr)));
  536. /* Copy MAC header from skb into command buffer */
  537. memcpy(tx->hdr, hdr, hdr_len);
  538. if (info->control.hw_key)
  539. iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
  540. /* TODO need this for burst mode later on */
  541. iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
  542. /* set is_hcca to 0; it probably will never be implemented */
  543. iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
  544. /* Total # bytes to be transmitted */
  545. len = (u16)skb->len;
  546. tx->len = cpu_to_le16(len);
  547. tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  548. tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  549. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  550. txq->need_update = 1;
  551. if (qc)
  552. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  553. } else {
  554. wait_write_ptr = 1;
  555. txq->need_update = 0;
  556. }
  557. IWL_DEBUG_TX(priv, "sequence nr = 0X%x \n",
  558. le16_to_cpu(out_cmd->hdr.sequence));
  559. IWL_DEBUG_TX(priv, "tx_flags = 0X%x \n", le32_to_cpu(tx->tx_flags));
  560. iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
  561. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
  562. ieee80211_hdrlen(fc));
  563. /*
  564. * Use the first empty entry in this queue's command buffer array
  565. * to contain the Tx command and MAC header concatenated together
  566. * (payload data will be in another buffer).
  567. * Size of this varies, due to varying MAC header length.
  568. * If end is not dword aligned, we'll have 2 extra bytes at the end
  569. * of the MAC header (device reads on dword boundaries).
  570. * We'll tell device about this padding later.
  571. */
  572. len = sizeof(struct iwl3945_tx_cmd) +
  573. sizeof(struct iwl_cmd_header) + hdr_len;
  574. len_org = len;
  575. len = (len + 3) & ~3;
  576. if (len_org != len)
  577. len_org = 1;
  578. else
  579. len_org = 0;
  580. /* Physical address of this Tx command's header (not MAC header!),
  581. * within command buffer array. */
  582. txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
  583. len, PCI_DMA_TODEVICE);
  584. /* we do not map meta data ... so we can safely access address to
  585. * provide to unmap command*/
  586. pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys);
  587. pci_unmap_len_set(&out_cmd->meta, len, len);
  588. /* Add buffer containing Tx command and MAC(!) header to TFD's
  589. * first entry */
  590. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  591. txcmd_phys, len, 1, 0);
  592. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  593. * if any (802.11 null frames have no payload). */
  594. len = skb->len - hdr_len;
  595. if (len) {
  596. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  597. len, PCI_DMA_TODEVICE);
  598. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  599. phys_addr, len,
  600. 0, U32_PAD(len));
  601. }
  602. /* Tell device the write index *just past* this latest filled TFD */
  603. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  604. rc = iwl_txq_update_write_ptr(priv, txq);
  605. spin_unlock_irqrestore(&priv->lock, flags);
  606. if (rc)
  607. return rc;
  608. if ((iwl_queue_space(q) < q->high_mark)
  609. && priv->mac80211_registered) {
  610. if (wait_write_ptr) {
  611. spin_lock_irqsave(&priv->lock, flags);
  612. txq->need_update = 1;
  613. iwl_txq_update_write_ptr(priv, txq);
  614. spin_unlock_irqrestore(&priv->lock, flags);
  615. }
  616. iwl_stop_queue(priv, skb_get_queue_mapping(skb));
  617. }
  618. return 0;
  619. drop_unlock:
  620. spin_unlock_irqrestore(&priv->lock, flags);
  621. drop:
  622. return -1;
  623. }
  624. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  625. #include "iwl-spectrum.h"
  626. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  627. #define BEACON_TIME_MASK_HIGH 0xFF000000
  628. #define TIME_UNIT 1024
  629. /*
  630. * extended beacon time format
  631. * time in usec will be changed into a 32-bit value in 8:24 format
  632. * the high 1 byte is the beacon counts
  633. * the lower 3 bytes is the time in usec within one beacon interval
  634. */
  635. static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
  636. {
  637. u32 quot;
  638. u32 rem;
  639. u32 interval = beacon_interval * 1024;
  640. if (!interval || !usec)
  641. return 0;
  642. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  643. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  644. return (quot << 24) + rem;
  645. }
  646. /* base is usually what we get from ucode with each received frame,
  647. * the same as HW timer counter counting down
  648. */
  649. static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  650. {
  651. u32 base_low = base & BEACON_TIME_MASK_LOW;
  652. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  653. u32 interval = beacon_interval * TIME_UNIT;
  654. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  655. (addon & BEACON_TIME_MASK_HIGH);
  656. if (base_low > addon_low)
  657. res += base_low - addon_low;
  658. else if (base_low < addon_low) {
  659. res += interval + base_low - addon_low;
  660. res += (1 << 24);
  661. } else
  662. res += (1 << 24);
  663. return cpu_to_le32(res);
  664. }
  665. static int iwl3945_get_measurement(struct iwl_priv *priv,
  666. struct ieee80211_measurement_params *params,
  667. u8 type)
  668. {
  669. struct iwl_spectrum_cmd spectrum;
  670. struct iwl_rx_packet *res;
  671. struct iwl_host_cmd cmd = {
  672. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  673. .data = (void *)&spectrum,
  674. .meta.flags = CMD_WANT_SKB,
  675. };
  676. u32 add_time = le64_to_cpu(params->start_time);
  677. int rc;
  678. int spectrum_resp_status;
  679. int duration = le16_to_cpu(params->duration);
  680. if (iwl_is_associated(priv))
  681. add_time =
  682. iwl3945_usecs_to_beacons(
  683. le64_to_cpu(params->start_time) - priv->last_tsf,
  684. le16_to_cpu(priv->rxon_timing.beacon_interval));
  685. memset(&spectrum, 0, sizeof(spectrum));
  686. spectrum.channel_count = cpu_to_le16(1);
  687. spectrum.flags =
  688. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  689. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  690. cmd.len = sizeof(spectrum);
  691. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  692. if (iwl_is_associated(priv))
  693. spectrum.start_time =
  694. iwl3945_add_beacon_time(priv->last_beacon_time,
  695. add_time,
  696. le16_to_cpu(priv->rxon_timing.beacon_interval));
  697. else
  698. spectrum.start_time = 0;
  699. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  700. spectrum.channels[0].channel = params->channel;
  701. spectrum.channels[0].type = type;
  702. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  703. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  704. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  705. rc = iwl_send_cmd_sync(priv, &cmd);
  706. if (rc)
  707. return rc;
  708. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  709. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  710. IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
  711. rc = -EIO;
  712. }
  713. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  714. switch (spectrum_resp_status) {
  715. case 0: /* Command will be handled */
  716. if (res->u.spectrum.id != 0xff) {
  717. IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
  718. res->u.spectrum.id);
  719. priv->measurement_status &= ~MEASUREMENT_READY;
  720. }
  721. priv->measurement_status |= MEASUREMENT_ACTIVE;
  722. rc = 0;
  723. break;
  724. case 1: /* Command will not be handled */
  725. rc = -EAGAIN;
  726. break;
  727. }
  728. dev_kfree_skb_any(cmd.meta.u.skb);
  729. return rc;
  730. }
  731. #endif
  732. static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
  733. struct iwl_rx_mem_buffer *rxb)
  734. {
  735. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  736. struct iwl_alive_resp *palive;
  737. struct delayed_work *pwork;
  738. palive = &pkt->u.alive_frame;
  739. IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
  740. "0x%01X 0x%01X\n",
  741. palive->is_valid, palive->ver_type,
  742. palive->ver_subtype);
  743. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  744. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  745. memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
  746. sizeof(struct iwl_alive_resp));
  747. pwork = &priv->init_alive_start;
  748. } else {
  749. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  750. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  751. sizeof(struct iwl_alive_resp));
  752. pwork = &priv->alive_start;
  753. iwl3945_disable_events(priv);
  754. }
  755. /* We delay the ALIVE response by 5ms to
  756. * give the HW RF Kill time to activate... */
  757. if (palive->is_valid == UCODE_VALID_OK)
  758. queue_delayed_work(priv->workqueue, pwork,
  759. msecs_to_jiffies(5));
  760. else
  761. IWL_WARN(priv, "uCode did not respond OK.\n");
  762. }
  763. static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
  764. struct iwl_rx_mem_buffer *rxb)
  765. {
  766. #ifdef CONFIG_IWLWIFI_DEBUG
  767. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  768. #endif
  769. IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  770. return;
  771. }
  772. static void iwl3945_bg_beacon_update(struct work_struct *work)
  773. {
  774. struct iwl_priv *priv =
  775. container_of(work, struct iwl_priv, beacon_update);
  776. struct sk_buff *beacon;
  777. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  778. beacon = ieee80211_beacon_get(priv->hw, priv->vif);
  779. if (!beacon) {
  780. IWL_ERR(priv, "update beacon failed\n");
  781. return;
  782. }
  783. mutex_lock(&priv->mutex);
  784. /* new beacon skb is allocated every time; dispose previous.*/
  785. if (priv->ibss_beacon)
  786. dev_kfree_skb(priv->ibss_beacon);
  787. priv->ibss_beacon = beacon;
  788. mutex_unlock(&priv->mutex);
  789. iwl3945_send_beacon_cmd(priv);
  790. }
  791. static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
  792. struct iwl_rx_mem_buffer *rxb)
  793. {
  794. #ifdef CONFIG_IWLWIFI_DEBUG
  795. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  796. struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  797. u8 rate = beacon->beacon_notify_hdr.rate;
  798. IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
  799. "tsf %d %d rate %d\n",
  800. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  801. beacon->beacon_notify_hdr.failure_frame,
  802. le32_to_cpu(beacon->ibss_mgr_status),
  803. le32_to_cpu(beacon->high_tsf),
  804. le32_to_cpu(beacon->low_tsf), rate);
  805. #endif
  806. if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
  807. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  808. queue_work(priv->workqueue, &priv->beacon_update);
  809. }
  810. /* Handle notification from uCode that card's power state is changing
  811. * due to software, hardware, or critical temperature RFKILL */
  812. static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
  813. struct iwl_rx_mem_buffer *rxb)
  814. {
  815. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  816. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  817. unsigned long status = priv->status;
  818. IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
  819. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  820. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  821. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  822. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  823. if (flags & HW_CARD_DISABLED)
  824. set_bit(STATUS_RF_KILL_HW, &priv->status);
  825. else
  826. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  827. if (flags & SW_CARD_DISABLED)
  828. set_bit(STATUS_RF_KILL_SW, &priv->status);
  829. else
  830. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  831. iwl_scan_cancel(priv);
  832. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  833. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  834. (test_bit(STATUS_RF_KILL_SW, &status) !=
  835. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  836. queue_work(priv->workqueue, &priv->rf_kill);
  837. else
  838. wake_up_interruptible(&priv->wait_command_queue);
  839. }
  840. /**
  841. * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
  842. *
  843. * Setup the RX handlers for each of the reply types sent from the uCode
  844. * to the host.
  845. *
  846. * This function chains into the hardware specific files for them to setup
  847. * any hardware specific handlers as well.
  848. */
  849. static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
  850. {
  851. priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
  852. priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
  853. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  854. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  855. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  856. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  857. iwl_rx_pm_debug_statistics_notif;
  858. priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
  859. /*
  860. * The same handler is used for both the REPLY to a discrete
  861. * statistics request from the host as well as for the periodic
  862. * statistics notifications (after received beacons) from the uCode.
  863. */
  864. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
  865. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
  866. iwl_setup_spectrum_handlers(priv);
  867. iwl_setup_rx_scan_handlers(priv);
  868. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
  869. /* Set up hardware specific Rx handlers */
  870. iwl3945_hw_rx_handler_setup(priv);
  871. }
  872. /************************** RX-FUNCTIONS ****************************/
  873. /*
  874. * Rx theory of operation
  875. *
  876. * The host allocates 32 DMA target addresses and passes the host address
  877. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  878. * 0 to 31
  879. *
  880. * Rx Queue Indexes
  881. * The host/firmware share two index registers for managing the Rx buffers.
  882. *
  883. * The READ index maps to the first position that the firmware may be writing
  884. * to -- the driver can read up to (but not including) this position and get
  885. * good data.
  886. * The READ index is managed by the firmware once the card is enabled.
  887. *
  888. * The WRITE index maps to the last position the driver has read from -- the
  889. * position preceding WRITE is the last slot the firmware can place a packet.
  890. *
  891. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  892. * WRITE = READ.
  893. *
  894. * During initialization, the host sets up the READ queue position to the first
  895. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  896. *
  897. * When the firmware places a packet in a buffer, it will advance the READ index
  898. * and fire the RX interrupt. The driver can then query the READ index and
  899. * process as many packets as possible, moving the WRITE index forward as it
  900. * resets the Rx queue buffers with new memory.
  901. *
  902. * The management in the driver is as follows:
  903. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  904. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  905. * to replenish the iwl->rxq->rx_free.
  906. * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  907. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  908. * 'processed' and 'read' driver indexes as well)
  909. * + A received packet is processed and handed to the kernel network stack,
  910. * detached from the iwl->rxq. The driver 'processed' index is updated.
  911. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  912. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  913. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  914. * were enough free buffers and RX_STALLED is set it is cleared.
  915. *
  916. *
  917. * Driver sequence:
  918. *
  919. * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  920. * iwl3945_rx_queue_restock
  921. * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  922. * queue, updates firmware pointers, and updates
  923. * the WRITE index. If insufficient rx_free buffers
  924. * are available, schedules iwl3945_rx_replenish
  925. *
  926. * -- enable interrupts --
  927. * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
  928. * READ INDEX, detaching the SKB from the pool.
  929. * Moves the packet buffer from queue to rx_used.
  930. * Calls iwl3945_rx_queue_restock to refill any empty
  931. * slots.
  932. * ...
  933. *
  934. */
  935. /**
  936. * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  937. */
  938. static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
  939. dma_addr_t dma_addr)
  940. {
  941. return cpu_to_le32((u32)dma_addr);
  942. }
  943. /**
  944. * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
  945. *
  946. * If there are slots in the RX queue that need to be restocked,
  947. * and we have free pre-allocated buffers, fill the ranks as much
  948. * as we can, pulling from rx_free.
  949. *
  950. * This moves the 'write' index forward to catch up with 'processed', and
  951. * also updates the memory address in the firmware to reference the new
  952. * target buffer.
  953. */
  954. static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
  955. {
  956. struct iwl_rx_queue *rxq = &priv->rxq;
  957. struct list_head *element;
  958. struct iwl_rx_mem_buffer *rxb;
  959. unsigned long flags;
  960. int write, rc;
  961. spin_lock_irqsave(&rxq->lock, flags);
  962. write = rxq->write & ~0x7;
  963. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  964. /* Get next free Rx buffer, remove from free list */
  965. element = rxq->rx_free.next;
  966. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  967. list_del(element);
  968. /* Point to Rx buffer via next RBD in circular buffer */
  969. rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
  970. rxq->queue[rxq->write] = rxb;
  971. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  972. rxq->free_count--;
  973. }
  974. spin_unlock_irqrestore(&rxq->lock, flags);
  975. /* If the pre-allocated buffer pool is dropping low, schedule to
  976. * refill it */
  977. if (rxq->free_count <= RX_LOW_WATERMARK)
  978. queue_work(priv->workqueue, &priv->rx_replenish);
  979. /* If we've added more space for the firmware to place data, tell it.
  980. * Increment device's write pointer in multiples of 8. */
  981. if ((write != (rxq->write & ~0x7))
  982. || (abs(rxq->write - rxq->read) > 7)) {
  983. spin_lock_irqsave(&rxq->lock, flags);
  984. rxq->need_update = 1;
  985. spin_unlock_irqrestore(&rxq->lock, flags);
  986. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  987. if (rc)
  988. return rc;
  989. }
  990. return 0;
  991. }
  992. /**
  993. * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
  994. *
  995. * When moving to rx_free an SKB is allocated for the slot.
  996. *
  997. * Also restock the Rx queue via iwl3945_rx_queue_restock.
  998. * This is called as a scheduled work item (except for during initialization)
  999. */
  1000. static void iwl3945_rx_allocate(struct iwl_priv *priv)
  1001. {
  1002. struct iwl_rx_queue *rxq = &priv->rxq;
  1003. struct list_head *element;
  1004. struct iwl_rx_mem_buffer *rxb;
  1005. unsigned long flags;
  1006. while (1) {
  1007. spin_lock_irqsave(&rxq->lock, flags);
  1008. if (list_empty(&rxq->rx_used)) {
  1009. spin_unlock_irqrestore(&rxq->lock, flags);
  1010. return;
  1011. }
  1012. element = rxq->rx_used.next;
  1013. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  1014. list_del(element);
  1015. spin_unlock_irqrestore(&rxq->lock, flags);
  1016. /* Alloc a new receive buffer */
  1017. rxb->skb =
  1018. alloc_skb(priv->hw_params.rx_buf_size,
  1019. GFP_KERNEL);
  1020. if (!rxb->skb) {
  1021. if (net_ratelimit())
  1022. IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
  1023. /* We don't reschedule replenish work here -- we will
  1024. * call the restock method and if it still needs
  1025. * more buffers it will schedule replenish */
  1026. break;
  1027. }
  1028. /* If radiotap head is required, reserve some headroom here.
  1029. * The physical head count is a variable rx_stats->phy_count.
  1030. * We reserve 4 bytes here. Plus these extra bytes, the
  1031. * headroom of the physical head should be enough for the
  1032. * radiotap head that iwl3945 supported. See iwl3945_rt.
  1033. */
  1034. skb_reserve(rxb->skb, 4);
  1035. /* Get physical address of RB/SKB */
  1036. rxb->real_dma_addr = pci_map_single(priv->pci_dev,
  1037. rxb->skb->data,
  1038. priv->hw_params.rx_buf_size,
  1039. PCI_DMA_FROMDEVICE);
  1040. spin_lock_irqsave(&rxq->lock, flags);
  1041. list_add_tail(&rxb->list, &rxq->rx_free);
  1042. priv->alloc_rxb_skb++;
  1043. rxq->free_count++;
  1044. spin_unlock_irqrestore(&rxq->lock, flags);
  1045. }
  1046. }
  1047. void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  1048. {
  1049. unsigned long flags;
  1050. int i;
  1051. spin_lock_irqsave(&rxq->lock, flags);
  1052. INIT_LIST_HEAD(&rxq->rx_free);
  1053. INIT_LIST_HEAD(&rxq->rx_used);
  1054. /* Fill the rx_used queue with _all_ of the Rx buffers */
  1055. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  1056. /* In the reset function, these buffers may have been allocated
  1057. * to an SKB, so we need to unmap and free potential storage */
  1058. if (rxq->pool[i].skb != NULL) {
  1059. pci_unmap_single(priv->pci_dev,
  1060. rxq->pool[i].real_dma_addr,
  1061. priv->hw_params.rx_buf_size,
  1062. PCI_DMA_FROMDEVICE);
  1063. priv->alloc_rxb_skb--;
  1064. dev_kfree_skb(rxq->pool[i].skb);
  1065. rxq->pool[i].skb = NULL;
  1066. }
  1067. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  1068. }
  1069. /* Set us so that we have processed and used all buffers, but have
  1070. * not restocked the Rx queue with fresh buffers */
  1071. rxq->read = rxq->write = 0;
  1072. rxq->free_count = 0;
  1073. spin_unlock_irqrestore(&rxq->lock, flags);
  1074. }
  1075. void iwl3945_rx_replenish(void *data)
  1076. {
  1077. struct iwl_priv *priv = data;
  1078. unsigned long flags;
  1079. iwl3945_rx_allocate(priv);
  1080. spin_lock_irqsave(&priv->lock, flags);
  1081. iwl3945_rx_queue_restock(priv);
  1082. spin_unlock_irqrestore(&priv->lock, flags);
  1083. }
  1084. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  1085. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  1086. * This free routine walks the list of POOL entries and if SKB is set to
  1087. * non NULL it is unmapped and freed
  1088. */
  1089. static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  1090. {
  1091. int i;
  1092. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  1093. if (rxq->pool[i].skb != NULL) {
  1094. pci_unmap_single(priv->pci_dev,
  1095. rxq->pool[i].real_dma_addr,
  1096. priv->hw_params.rx_buf_size,
  1097. PCI_DMA_FROMDEVICE);
  1098. dev_kfree_skb(rxq->pool[i].skb);
  1099. }
  1100. }
  1101. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  1102. rxq->dma_addr);
  1103. pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
  1104. rxq->rb_stts, rxq->rb_stts_dma);
  1105. rxq->bd = NULL;
  1106. rxq->rb_stts = NULL;
  1107. }
  1108. /* Convert linear signal-to-noise ratio into dB */
  1109. static u8 ratio2dB[100] = {
  1110. /* 0 1 2 3 4 5 6 7 8 9 */
  1111. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  1112. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  1113. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  1114. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  1115. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  1116. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  1117. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  1118. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  1119. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  1120. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  1121. };
  1122. /* Calculates a relative dB value from a ratio of linear
  1123. * (i.e. not dB) signal levels.
  1124. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  1125. int iwl3945_calc_db_from_ratio(int sig_ratio)
  1126. {
  1127. /* 1000:1 or higher just report as 60 dB */
  1128. if (sig_ratio >= 1000)
  1129. return 60;
  1130. /* 100:1 or higher, divide by 10 and use table,
  1131. * add 20 dB to make up for divide by 10 */
  1132. if (sig_ratio >= 100)
  1133. return 20 + (int)ratio2dB[sig_ratio/10];
  1134. /* We shouldn't see this */
  1135. if (sig_ratio < 1)
  1136. return 0;
  1137. /* Use table for ratios 1:1 - 99:1 */
  1138. return (int)ratio2dB[sig_ratio];
  1139. }
  1140. #define PERFECT_RSSI (-20) /* dBm */
  1141. #define WORST_RSSI (-95) /* dBm */
  1142. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  1143. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  1144. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  1145. * about formulas used below. */
  1146. int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
  1147. {
  1148. int sig_qual;
  1149. int degradation = PERFECT_RSSI - rssi_dbm;
  1150. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  1151. * as indicator; formula is (signal dbm - noise dbm).
  1152. * SNR at or above 40 is a great signal (100%).
  1153. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  1154. * Weakest usable signal is usually 10 - 15 dB SNR. */
  1155. if (noise_dbm) {
  1156. if (rssi_dbm - noise_dbm >= 40)
  1157. return 100;
  1158. else if (rssi_dbm < noise_dbm)
  1159. return 0;
  1160. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  1161. /* Else use just the signal level.
  1162. * This formula is a least squares fit of data points collected and
  1163. * compared with a reference system that had a percentage (%) display
  1164. * for signal quality. */
  1165. } else
  1166. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  1167. (15 * RSSI_RANGE + 62 * degradation)) /
  1168. (RSSI_RANGE * RSSI_RANGE);
  1169. if (sig_qual > 100)
  1170. sig_qual = 100;
  1171. else if (sig_qual < 1)
  1172. sig_qual = 0;
  1173. return sig_qual;
  1174. }
  1175. /**
  1176. * iwl3945_rx_handle - Main entry function for receiving responses from uCode
  1177. *
  1178. * Uses the priv->rx_handlers callback function array to invoke
  1179. * the appropriate handlers, including command responses,
  1180. * frame-received notifications, and other notifications.
  1181. */
  1182. static void iwl3945_rx_handle(struct iwl_priv *priv)
  1183. {
  1184. struct iwl_rx_mem_buffer *rxb;
  1185. struct iwl_rx_packet *pkt;
  1186. struct iwl_rx_queue *rxq = &priv->rxq;
  1187. u32 r, i;
  1188. int reclaim;
  1189. unsigned long flags;
  1190. u8 fill_rx = 0;
  1191. u32 count = 8;
  1192. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  1193. * buffer that the driver may process (last buffer filled by ucode). */
  1194. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1195. i = rxq->read;
  1196. if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  1197. fill_rx = 1;
  1198. /* Rx interrupt, but nothing sent from uCode */
  1199. if (i == r)
  1200. IWL_DEBUG(priv, IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  1201. while (i != r) {
  1202. rxb = rxq->queue[i];
  1203. /* If an RXB doesn't have a Rx queue slot associated with it,
  1204. * then a bug has been introduced in the queue refilling
  1205. * routines -- catch it here */
  1206. BUG_ON(rxb == NULL);
  1207. rxq->queue[i] = NULL;
  1208. pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
  1209. priv->hw_params.rx_buf_size,
  1210. PCI_DMA_FROMDEVICE);
  1211. pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1212. /* Reclaim a command buffer only if this packet is a response
  1213. * to a (driver-originated) command.
  1214. * If the packet (e.g. Rx frame) originated from uCode,
  1215. * there is no command buffer to reclaim.
  1216. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1217. * but apparently a few don't get set; catch them here. */
  1218. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1219. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  1220. (pkt->hdr.cmd != REPLY_TX);
  1221. /* Based on type of command response or notification,
  1222. * handle those that need handling via function in
  1223. * rx_handlers table. See iwl3945_setup_rx_handlers() */
  1224. if (priv->rx_handlers[pkt->hdr.cmd]) {
  1225. IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
  1226. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  1227. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1228. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  1229. priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
  1230. } else {
  1231. /* No handling needed */
  1232. IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
  1233. "r %d i %d No handler needed for %s, 0x%02x\n",
  1234. r, i, get_cmd_string(pkt->hdr.cmd),
  1235. pkt->hdr.cmd);
  1236. }
  1237. if (reclaim) {
  1238. /* Invoke any callbacks, transfer the skb to caller, and
  1239. * fire off the (possibly) blocking iwl_send_cmd()
  1240. * as we reclaim the driver command queue */
  1241. if (rxb && rxb->skb)
  1242. iwl_tx_cmd_complete(priv, rxb);
  1243. else
  1244. IWL_WARN(priv, "Claim null rxb?\n");
  1245. }
  1246. /* For now we just don't re-use anything. We can tweak this
  1247. * later to try and re-use notification packets and SKBs that
  1248. * fail to Rx correctly */
  1249. if (rxb->skb != NULL) {
  1250. priv->alloc_rxb_skb--;
  1251. dev_kfree_skb_any(rxb->skb);
  1252. rxb->skb = NULL;
  1253. }
  1254. spin_lock_irqsave(&rxq->lock, flags);
  1255. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  1256. spin_unlock_irqrestore(&rxq->lock, flags);
  1257. i = (i + 1) & RX_QUEUE_MASK;
  1258. /* If there are a lot of unused frames,
  1259. * restock the Rx queue so ucode won't assert. */
  1260. if (fill_rx) {
  1261. count++;
  1262. if (count >= 8) {
  1263. priv->rxq.read = i;
  1264. iwl3945_rx_queue_restock(priv);
  1265. count = 0;
  1266. }
  1267. }
  1268. }
  1269. /* Backtrack one entry */
  1270. priv->rxq.read = i;
  1271. iwl3945_rx_queue_restock(priv);
  1272. }
  1273. /* call this function to flush any scheduled tasklet */
  1274. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  1275. {
  1276. /* wait to make sure we flush pending tasklet*/
  1277. synchronize_irq(priv->pci_dev->irq);
  1278. tasklet_kill(&priv->irq_tasklet);
  1279. }
  1280. static const char *desc_lookup(int i)
  1281. {
  1282. switch (i) {
  1283. case 1:
  1284. return "FAIL";
  1285. case 2:
  1286. return "BAD_PARAM";
  1287. case 3:
  1288. return "BAD_CHECKSUM";
  1289. case 4:
  1290. return "NMI_INTERRUPT";
  1291. case 5:
  1292. return "SYSASSERT";
  1293. case 6:
  1294. return "FATAL_ERROR";
  1295. }
  1296. return "UNKNOWN";
  1297. }
  1298. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1299. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1300. static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  1301. {
  1302. u32 i;
  1303. u32 desc, time, count, base, data1;
  1304. u32 blink1, blink2, ilink1, ilink2;
  1305. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  1306. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1307. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  1308. return;
  1309. }
  1310. count = iwl_read_targ_mem(priv, base);
  1311. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1312. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  1313. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  1314. priv->status, count);
  1315. }
  1316. IWL_ERR(priv, "Desc Time asrtPC blink2 "
  1317. "ilink1 nmiPC Line\n");
  1318. for (i = ERROR_START_OFFSET;
  1319. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1320. i += ERROR_ELEM_SIZE) {
  1321. desc = iwl_read_targ_mem(priv, base + i);
  1322. time =
  1323. iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
  1324. blink1 =
  1325. iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
  1326. blink2 =
  1327. iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
  1328. ilink1 =
  1329. iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
  1330. ilink2 =
  1331. iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
  1332. data1 =
  1333. iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
  1334. IWL_ERR(priv,
  1335. "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1336. desc_lookup(desc), desc, time, blink1, blink2,
  1337. ilink1, ilink2, data1);
  1338. }
  1339. }
  1340. #define EVENT_START_OFFSET (6 * sizeof(u32))
  1341. /**
  1342. * iwl3945_print_event_log - Dump error event log to syslog
  1343. *
  1344. */
  1345. static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
  1346. u32 num_events, u32 mode)
  1347. {
  1348. u32 i;
  1349. u32 base; /* SRAM byte address of event log header */
  1350. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  1351. u32 ptr; /* SRAM byte address of log data */
  1352. u32 ev, time, data; /* event log data */
  1353. if (num_events == 0)
  1354. return;
  1355. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1356. if (mode == 0)
  1357. event_size = 2 * sizeof(u32);
  1358. else
  1359. event_size = 3 * sizeof(u32);
  1360. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  1361. /* "time" is actually "data" for mode 0 (no timestamp).
  1362. * place event id # at far right for easier visual parsing. */
  1363. for (i = 0; i < num_events; i++) {
  1364. ev = iwl_read_targ_mem(priv, ptr);
  1365. ptr += sizeof(u32);
  1366. time = iwl_read_targ_mem(priv, ptr);
  1367. ptr += sizeof(u32);
  1368. if (mode == 0) {
  1369. /* data, ev */
  1370. IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
  1371. } else {
  1372. data = iwl_read_targ_mem(priv, ptr);
  1373. ptr += sizeof(u32);
  1374. IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
  1375. }
  1376. }
  1377. }
  1378. static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
  1379. {
  1380. u32 base; /* SRAM byte address of event log header */
  1381. u32 capacity; /* event log capacity in # entries */
  1382. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  1383. u32 num_wraps; /* # times uCode wrapped to top of log */
  1384. u32 next_entry; /* index of next entry to be written by uCode */
  1385. u32 size; /* # entries that we'll print */
  1386. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1387. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1388. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  1389. return;
  1390. }
  1391. /* event log header */
  1392. capacity = iwl_read_targ_mem(priv, base);
  1393. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  1394. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  1395. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  1396. size = num_wraps ? capacity : next_entry;
  1397. /* bail out if nothing in log */
  1398. if (size == 0) {
  1399. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  1400. return;
  1401. }
  1402. IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
  1403. size, num_wraps);
  1404. /* if uCode has wrapped back to top of log, start at the oldest entry,
  1405. * i.e the next one that uCode would fill. */
  1406. if (num_wraps)
  1407. iwl3945_print_event_log(priv, next_entry,
  1408. capacity - next_entry, mode);
  1409. /* (then/else) start at top of log */
  1410. iwl3945_print_event_log(priv, 0, next_entry, mode);
  1411. }
  1412. static void iwl3945_irq_tasklet(struct iwl_priv *priv)
  1413. {
  1414. u32 inta, handled = 0;
  1415. u32 inta_fh;
  1416. unsigned long flags;
  1417. #ifdef CONFIG_IWLWIFI_DEBUG
  1418. u32 inta_mask;
  1419. #endif
  1420. spin_lock_irqsave(&priv->lock, flags);
  1421. /* Ack/clear/reset pending uCode interrupts.
  1422. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1423. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1424. inta = iwl_read32(priv, CSR_INT);
  1425. iwl_write32(priv, CSR_INT, inta);
  1426. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1427. * Any new interrupts that happen after this, either while we're
  1428. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1429. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1430. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  1431. #ifdef CONFIG_IWLWIFI_DEBUG
  1432. if (priv->debug_level & IWL_DL_ISR) {
  1433. /* just for debug */
  1434. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1435. IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1436. inta, inta_mask, inta_fh);
  1437. }
  1438. #endif
  1439. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1440. * atomic, make sure that inta covers all the interrupts that
  1441. * we've discovered, even if FH interrupt came in just after
  1442. * reading CSR_INT. */
  1443. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1444. inta |= CSR_INT_BIT_FH_RX;
  1445. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1446. inta |= CSR_INT_BIT_FH_TX;
  1447. /* Now service all interrupt bits discovered above. */
  1448. if (inta & CSR_INT_BIT_HW_ERR) {
  1449. IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
  1450. /* Tell the device to stop sending interrupts */
  1451. iwl_disable_interrupts(priv);
  1452. priv->isr_stats.hw++;
  1453. iwl_irq_handle_error(priv);
  1454. handled |= CSR_INT_BIT_HW_ERR;
  1455. spin_unlock_irqrestore(&priv->lock, flags);
  1456. return;
  1457. }
  1458. #ifdef CONFIG_IWLWIFI_DEBUG
  1459. if (priv->debug_level & (IWL_DL_ISR)) {
  1460. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1461. if (inta & CSR_INT_BIT_SCD) {
  1462. IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
  1463. "the frame/frames.\n");
  1464. priv->isr_stats.sch++;
  1465. }
  1466. /* Alive notification via Rx interrupt will do the real work */
  1467. if (inta & CSR_INT_BIT_ALIVE) {
  1468. IWL_DEBUG_ISR(priv, "Alive interrupt\n");
  1469. priv->isr_stats.alive++;
  1470. }
  1471. }
  1472. #endif
  1473. /* Safely ignore these bits for debug checks below */
  1474. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1475. /* Error detected by uCode */
  1476. if (inta & CSR_INT_BIT_SW_ERR) {
  1477. IWL_ERR(priv, "Microcode SW error detected. "
  1478. "Restarting 0x%X.\n", inta);
  1479. priv->isr_stats.sw++;
  1480. priv->isr_stats.sw_err = inta;
  1481. iwl_irq_handle_error(priv);
  1482. handled |= CSR_INT_BIT_SW_ERR;
  1483. }
  1484. /* uCode wakes up after power-down sleep */
  1485. if (inta & CSR_INT_BIT_WAKEUP) {
  1486. IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
  1487. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  1488. iwl_txq_update_write_ptr(priv, &priv->txq[0]);
  1489. iwl_txq_update_write_ptr(priv, &priv->txq[1]);
  1490. iwl_txq_update_write_ptr(priv, &priv->txq[2]);
  1491. iwl_txq_update_write_ptr(priv, &priv->txq[3]);
  1492. iwl_txq_update_write_ptr(priv, &priv->txq[4]);
  1493. iwl_txq_update_write_ptr(priv, &priv->txq[5]);
  1494. priv->isr_stats.wakeup++;
  1495. handled |= CSR_INT_BIT_WAKEUP;
  1496. }
  1497. /* All uCode command responses, including Tx command responses,
  1498. * Rx "responses" (frame-received notification), and other
  1499. * notifications from uCode come through here*/
  1500. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1501. iwl3945_rx_handle(priv);
  1502. priv->isr_stats.rx++;
  1503. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1504. }
  1505. if (inta & CSR_INT_BIT_FH_TX) {
  1506. IWL_DEBUG_ISR(priv, "Tx interrupt\n");
  1507. priv->isr_stats.tx++;
  1508. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  1509. iwl_write_direct32(priv, FH39_TCSR_CREDIT
  1510. (FH39_SRVC_CHNL), 0x0);
  1511. handled |= CSR_INT_BIT_FH_TX;
  1512. }
  1513. if (inta & ~handled) {
  1514. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1515. priv->isr_stats.unhandled++;
  1516. }
  1517. if (inta & ~priv->inta_mask) {
  1518. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  1519. inta & ~priv->inta_mask);
  1520. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  1521. }
  1522. /* Re-enable all interrupts */
  1523. /* only Re-enable if disabled by irq */
  1524. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1525. iwl_enable_interrupts(priv);
  1526. #ifdef CONFIG_IWLWIFI_DEBUG
  1527. if (priv->debug_level & (IWL_DL_ISR)) {
  1528. inta = iwl_read32(priv, CSR_INT);
  1529. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1530. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1531. IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1532. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1533. }
  1534. #endif
  1535. spin_unlock_irqrestore(&priv->lock, flags);
  1536. }
  1537. static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
  1538. enum ieee80211_band band,
  1539. u8 is_active, u8 n_probes,
  1540. struct iwl3945_scan_channel *scan_ch)
  1541. {
  1542. const struct ieee80211_channel *channels = NULL;
  1543. const struct ieee80211_supported_band *sband;
  1544. const struct iwl_channel_info *ch_info;
  1545. u16 passive_dwell = 0;
  1546. u16 active_dwell = 0;
  1547. int added, i;
  1548. sband = iwl_get_hw_mode(priv, band);
  1549. if (!sband)
  1550. return 0;
  1551. channels = sband->channels;
  1552. active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
  1553. passive_dwell = iwl_get_passive_dwell_time(priv, band);
  1554. if (passive_dwell <= active_dwell)
  1555. passive_dwell = active_dwell + 1;
  1556. for (i = 0, added = 0; i < sband->n_channels; i++) {
  1557. if (channels[i].flags & IEEE80211_CHAN_DISABLED)
  1558. continue;
  1559. scan_ch->channel = channels[i].hw_value;
  1560. ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
  1561. if (!is_channel_valid(ch_info)) {
  1562. IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
  1563. scan_ch->channel);
  1564. continue;
  1565. }
  1566. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1567. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1568. /* If passive , set up for auto-switch
  1569. * and use long active_dwell time.
  1570. */
  1571. if (!is_active || is_channel_passive(ch_info) ||
  1572. (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1573. scan_ch->type = 0; /* passive */
  1574. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  1575. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  1576. } else {
  1577. scan_ch->type = 1; /* active */
  1578. }
  1579. /* Set direct probe bits. These may be used both for active
  1580. * scan channels (probes gets sent right away),
  1581. * or for passive channels (probes get se sent only after
  1582. * hearing clear Rx packet).*/
  1583. if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
  1584. if (n_probes)
  1585. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1586. } else {
  1587. /* uCode v1 does not allow setting direct probe bits on
  1588. * passive channel. */
  1589. if ((scan_ch->type & 1) && n_probes)
  1590. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1591. }
  1592. /* Set txpower levels to defaults */
  1593. scan_ch->tpc.dsp_atten = 110;
  1594. /* scan_pwr_info->tpc.dsp_atten; */
  1595. /*scan_pwr_info->tpc.tx_gain; */
  1596. if (band == IEEE80211_BAND_5GHZ)
  1597. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1598. else {
  1599. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1600. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1601. * power level:
  1602. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1603. */
  1604. }
  1605. IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
  1606. scan_ch->channel,
  1607. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1608. (scan_ch->type & 1) ?
  1609. active_dwell : passive_dwell);
  1610. scan_ch++;
  1611. added++;
  1612. }
  1613. IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
  1614. return added;
  1615. }
  1616. static void iwl3945_init_hw_rates(struct iwl_priv *priv,
  1617. struct ieee80211_rate *rates)
  1618. {
  1619. int i;
  1620. for (i = 0; i < IWL_RATE_COUNT; i++) {
  1621. rates[i].bitrate = iwl3945_rates[i].ieee * 5;
  1622. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  1623. rates[i].hw_value_short = i;
  1624. rates[i].flags = 0;
  1625. if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  1626. /*
  1627. * If CCK != 1M then set short preamble rate flag.
  1628. */
  1629. rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
  1630. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1631. }
  1632. }
  1633. }
  1634. /******************************************************************************
  1635. *
  1636. * uCode download functions
  1637. *
  1638. ******************************************************************************/
  1639. static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
  1640. {
  1641. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  1642. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  1643. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1644. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  1645. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1646. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1647. }
  1648. /**
  1649. * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1650. * looking at all data.
  1651. */
  1652. static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
  1653. {
  1654. u32 val;
  1655. u32 save_len = len;
  1656. int rc = 0;
  1657. u32 errcnt;
  1658. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1659. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1660. IWL39_RTC_INST_LOWER_BOUND);
  1661. errcnt = 0;
  1662. for (; len > 0; len -= sizeof(u32), image++) {
  1663. /* read data comes through single port, auto-incr addr */
  1664. /* NOTE: Use the debugless read so we don't flood kernel log
  1665. * if IWL_DL_IO is set */
  1666. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1667. if (val != le32_to_cpu(*image)) {
  1668. IWL_ERR(priv, "uCode INST section is invalid at "
  1669. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1670. save_len - len, val, le32_to_cpu(*image));
  1671. rc = -EIO;
  1672. errcnt++;
  1673. if (errcnt >= 20)
  1674. break;
  1675. }
  1676. }
  1677. if (!errcnt)
  1678. IWL_DEBUG_INFO(priv,
  1679. "ucode image in INSTRUCTION memory is good\n");
  1680. return rc;
  1681. }
  1682. /**
  1683. * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1684. * using sample data 100 bytes apart. If these sample points are good,
  1685. * it's a pretty good bet that everything between them is good, too.
  1686. */
  1687. static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1688. {
  1689. u32 val;
  1690. int rc = 0;
  1691. u32 errcnt = 0;
  1692. u32 i;
  1693. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1694. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1695. /* read data comes through single port, auto-incr addr */
  1696. /* NOTE: Use the debugless read so we don't flood kernel log
  1697. * if IWL_DL_IO is set */
  1698. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1699. i + IWL39_RTC_INST_LOWER_BOUND);
  1700. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1701. if (val != le32_to_cpu(*image)) {
  1702. #if 0 /* Enable this if you want to see details */
  1703. IWL_ERR(priv, "uCode INST section is invalid at "
  1704. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1705. i, val, *image);
  1706. #endif
  1707. rc = -EIO;
  1708. errcnt++;
  1709. if (errcnt >= 3)
  1710. break;
  1711. }
  1712. }
  1713. return rc;
  1714. }
  1715. /**
  1716. * iwl3945_verify_ucode - determine which instruction image is in SRAM,
  1717. * and verify its contents
  1718. */
  1719. static int iwl3945_verify_ucode(struct iwl_priv *priv)
  1720. {
  1721. __le32 *image;
  1722. u32 len;
  1723. int rc = 0;
  1724. /* Try bootstrap */
  1725. image = (__le32 *)priv->ucode_boot.v_addr;
  1726. len = priv->ucode_boot.len;
  1727. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1728. if (rc == 0) {
  1729. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1730. return 0;
  1731. }
  1732. /* Try initialize */
  1733. image = (__le32 *)priv->ucode_init.v_addr;
  1734. len = priv->ucode_init.len;
  1735. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1736. if (rc == 0) {
  1737. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1738. return 0;
  1739. }
  1740. /* Try runtime/protocol */
  1741. image = (__le32 *)priv->ucode_code.v_addr;
  1742. len = priv->ucode_code.len;
  1743. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1744. if (rc == 0) {
  1745. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1746. return 0;
  1747. }
  1748. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1749. /* Since nothing seems to match, show first several data entries in
  1750. * instruction SRAM, so maybe visual inspection will give a clue.
  1751. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1752. image = (__le32 *)priv->ucode_boot.v_addr;
  1753. len = priv->ucode_boot.len;
  1754. rc = iwl3945_verify_inst_full(priv, image, len);
  1755. return rc;
  1756. }
  1757. static void iwl3945_nic_start(struct iwl_priv *priv)
  1758. {
  1759. /* Remove all resets to allow NIC to operate */
  1760. iwl_write32(priv, CSR_RESET, 0);
  1761. }
  1762. /**
  1763. * iwl3945_read_ucode - Read uCode images from disk file.
  1764. *
  1765. * Copy into buffers for card to fetch via bus-mastering
  1766. */
  1767. static int iwl3945_read_ucode(struct iwl_priv *priv)
  1768. {
  1769. struct iwl_ucode *ucode;
  1770. int ret = -EINVAL, index;
  1771. const struct firmware *ucode_raw;
  1772. /* firmware file name contains uCode/driver compatibility version */
  1773. const char *name_pre = priv->cfg->fw_name_pre;
  1774. const unsigned int api_max = priv->cfg->ucode_api_max;
  1775. const unsigned int api_min = priv->cfg->ucode_api_min;
  1776. char buf[25];
  1777. u8 *src;
  1778. size_t len;
  1779. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1780. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1781. * request_firmware() is synchronous, file is in memory on return. */
  1782. for (index = api_max; index >= api_min; index--) {
  1783. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  1784. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  1785. if (ret < 0) {
  1786. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  1787. buf, ret);
  1788. if (ret == -ENOENT)
  1789. continue;
  1790. else
  1791. goto error;
  1792. } else {
  1793. if (index < api_max)
  1794. IWL_ERR(priv, "Loaded firmware %s, "
  1795. "which is deprecated. "
  1796. " Please use API v%u instead.\n",
  1797. buf, api_max);
  1798. IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
  1799. "(%zd bytes) from disk\n",
  1800. buf, ucode_raw->size);
  1801. break;
  1802. }
  1803. }
  1804. if (ret < 0)
  1805. goto error;
  1806. /* Make sure that we got at least our header! */
  1807. if (ucode_raw->size < sizeof(*ucode)) {
  1808. IWL_ERR(priv, "File size way too small!\n");
  1809. ret = -EINVAL;
  1810. goto err_release;
  1811. }
  1812. /* Data from ucode file: header followed by uCode images */
  1813. ucode = (void *)ucode_raw->data;
  1814. priv->ucode_ver = le32_to_cpu(ucode->ver);
  1815. api_ver = IWL_UCODE_API(priv->ucode_ver);
  1816. inst_size = le32_to_cpu(ucode->inst_size);
  1817. data_size = le32_to_cpu(ucode->data_size);
  1818. init_size = le32_to_cpu(ucode->init_size);
  1819. init_data_size = le32_to_cpu(ucode->init_data_size);
  1820. boot_size = le32_to_cpu(ucode->boot_size);
  1821. /* api_ver should match the api version forming part of the
  1822. * firmware filename ... but we don't check for that and only rely
  1823. * on the API version read from firmware header from here on forward */
  1824. if (api_ver < api_min || api_ver > api_max) {
  1825. IWL_ERR(priv, "Driver unable to support your firmware API. "
  1826. "Driver supports v%u, firmware is v%u.\n",
  1827. api_max, api_ver);
  1828. priv->ucode_ver = 0;
  1829. ret = -EINVAL;
  1830. goto err_release;
  1831. }
  1832. if (api_ver != api_max)
  1833. IWL_ERR(priv, "Firmware has old API version. Expected %u, "
  1834. "got %u. New firmware can be obtained "
  1835. "from http://www.intellinuxwireless.org.\n",
  1836. api_max, api_ver);
  1837. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  1838. IWL_UCODE_MAJOR(priv->ucode_ver),
  1839. IWL_UCODE_MINOR(priv->ucode_ver),
  1840. IWL_UCODE_API(priv->ucode_ver),
  1841. IWL_UCODE_SERIAL(priv->ucode_ver));
  1842. IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
  1843. priv->ucode_ver);
  1844. IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
  1845. inst_size);
  1846. IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
  1847. data_size);
  1848. IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
  1849. init_size);
  1850. IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
  1851. init_data_size);
  1852. IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
  1853. boot_size);
  1854. /* Verify size of file vs. image size info in file's header */
  1855. if (ucode_raw->size < sizeof(*ucode) +
  1856. inst_size + data_size + init_size +
  1857. init_data_size + boot_size) {
  1858. IWL_DEBUG_INFO(priv, "uCode file size %zd too small\n",
  1859. ucode_raw->size);
  1860. ret = -EINVAL;
  1861. goto err_release;
  1862. }
  1863. /* Verify that uCode images will fit in card's SRAM */
  1864. if (inst_size > IWL39_MAX_INST_SIZE) {
  1865. IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
  1866. inst_size);
  1867. ret = -EINVAL;
  1868. goto err_release;
  1869. }
  1870. if (data_size > IWL39_MAX_DATA_SIZE) {
  1871. IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
  1872. data_size);
  1873. ret = -EINVAL;
  1874. goto err_release;
  1875. }
  1876. if (init_size > IWL39_MAX_INST_SIZE) {
  1877. IWL_DEBUG_INFO(priv,
  1878. "uCode init instr len %d too large to fit in\n",
  1879. init_size);
  1880. ret = -EINVAL;
  1881. goto err_release;
  1882. }
  1883. if (init_data_size > IWL39_MAX_DATA_SIZE) {
  1884. IWL_DEBUG_INFO(priv,
  1885. "uCode init data len %d too large to fit in\n",
  1886. init_data_size);
  1887. ret = -EINVAL;
  1888. goto err_release;
  1889. }
  1890. if (boot_size > IWL39_MAX_BSM_SIZE) {
  1891. IWL_DEBUG_INFO(priv,
  1892. "uCode boot instr len %d too large to fit in\n",
  1893. boot_size);
  1894. ret = -EINVAL;
  1895. goto err_release;
  1896. }
  1897. /* Allocate ucode buffers for card's bus-master loading ... */
  1898. /* Runtime instructions and 2 copies of data:
  1899. * 1) unmodified from disk
  1900. * 2) backup cache for save/restore during power-downs */
  1901. priv->ucode_code.len = inst_size;
  1902. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  1903. priv->ucode_data.len = data_size;
  1904. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  1905. priv->ucode_data_backup.len = data_size;
  1906. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1907. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  1908. !priv->ucode_data_backup.v_addr)
  1909. goto err_pci_alloc;
  1910. /* Initialization instructions and data */
  1911. if (init_size && init_data_size) {
  1912. priv->ucode_init.len = init_size;
  1913. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  1914. priv->ucode_init_data.len = init_data_size;
  1915. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1916. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  1917. goto err_pci_alloc;
  1918. }
  1919. /* Bootstrap (instructions only, no data) */
  1920. if (boot_size) {
  1921. priv->ucode_boot.len = boot_size;
  1922. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1923. if (!priv->ucode_boot.v_addr)
  1924. goto err_pci_alloc;
  1925. }
  1926. /* Copy images into buffers for card's bus-master reads ... */
  1927. /* Runtime instructions (first block of data in file) */
  1928. src = &ucode->data[0];
  1929. len = priv->ucode_code.len;
  1930. IWL_DEBUG_INFO(priv,
  1931. "Copying (but not loading) uCode instr len %zd\n", len);
  1932. memcpy(priv->ucode_code.v_addr, src, len);
  1933. IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1934. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  1935. /* Runtime data (2nd block)
  1936. * NOTE: Copy into backup buffer will be done in iwl3945_up() */
  1937. src = &ucode->data[inst_size];
  1938. len = priv->ucode_data.len;
  1939. IWL_DEBUG_INFO(priv,
  1940. "Copying (but not loading) uCode data len %zd\n", len);
  1941. memcpy(priv->ucode_data.v_addr, src, len);
  1942. memcpy(priv->ucode_data_backup.v_addr, src, len);
  1943. /* Initialization instructions (3rd block) */
  1944. if (init_size) {
  1945. src = &ucode->data[inst_size + data_size];
  1946. len = priv->ucode_init.len;
  1947. IWL_DEBUG_INFO(priv,
  1948. "Copying (but not loading) init instr len %zd\n", len);
  1949. memcpy(priv->ucode_init.v_addr, src, len);
  1950. }
  1951. /* Initialization data (4th block) */
  1952. if (init_data_size) {
  1953. src = &ucode->data[inst_size + data_size + init_size];
  1954. len = priv->ucode_init_data.len;
  1955. IWL_DEBUG_INFO(priv,
  1956. "Copying (but not loading) init data len %zd\n", len);
  1957. memcpy(priv->ucode_init_data.v_addr, src, len);
  1958. }
  1959. /* Bootstrap instructions (5th block) */
  1960. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  1961. len = priv->ucode_boot.len;
  1962. IWL_DEBUG_INFO(priv,
  1963. "Copying (but not loading) boot instr len %zd\n", len);
  1964. memcpy(priv->ucode_boot.v_addr, src, len);
  1965. /* We have our copies now, allow OS release its copies */
  1966. release_firmware(ucode_raw);
  1967. return 0;
  1968. err_pci_alloc:
  1969. IWL_ERR(priv, "failed to allocate pci memory\n");
  1970. ret = -ENOMEM;
  1971. iwl3945_dealloc_ucode_pci(priv);
  1972. err_release:
  1973. release_firmware(ucode_raw);
  1974. error:
  1975. return ret;
  1976. }
  1977. /**
  1978. * iwl3945_set_ucode_ptrs - Set uCode address location
  1979. *
  1980. * Tell initialization uCode where to find runtime uCode.
  1981. *
  1982. * BSM registers initially contain pointers to initialization uCode.
  1983. * We need to replace them to load runtime uCode inst and data,
  1984. * and to save runtime data when powering down.
  1985. */
  1986. static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
  1987. {
  1988. dma_addr_t pinst;
  1989. dma_addr_t pdata;
  1990. /* bits 31:0 for 3945 */
  1991. pinst = priv->ucode_code.p_addr;
  1992. pdata = priv->ucode_data_backup.p_addr;
  1993. /* Tell bootstrap uCode where to find image to load */
  1994. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  1995. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  1996. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  1997. priv->ucode_data.len);
  1998. /* Inst byte count must be last to set up, bit 31 signals uCode
  1999. * that all new ptr/size info is in place */
  2000. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  2001. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  2002. IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
  2003. return 0;
  2004. }
  2005. /**
  2006. * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
  2007. *
  2008. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  2009. *
  2010. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  2011. */
  2012. static void iwl3945_init_alive_start(struct iwl_priv *priv)
  2013. {
  2014. /* Check alive response for "valid" sign from uCode */
  2015. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  2016. /* We had an error bringing up the hardware, so take it
  2017. * all the way back down so we can try again */
  2018. IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
  2019. goto restart;
  2020. }
  2021. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  2022. * This is a paranoid check, because we would not have gotten the
  2023. * "initialize" alive if code weren't properly loaded. */
  2024. if (iwl3945_verify_ucode(priv)) {
  2025. /* Runtime instruction load was bad;
  2026. * take it all the way back down so we can try again */
  2027. IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
  2028. goto restart;
  2029. }
  2030. /* Send pointers to protocol/runtime uCode image ... init code will
  2031. * load and launch runtime uCode, which will send us another "Alive"
  2032. * notification. */
  2033. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  2034. if (iwl3945_set_ucode_ptrs(priv)) {
  2035. /* Runtime instruction load won't happen;
  2036. * take it all the way back down so we can try again */
  2037. IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
  2038. goto restart;
  2039. }
  2040. return;
  2041. restart:
  2042. queue_work(priv->workqueue, &priv->restart);
  2043. }
  2044. /**
  2045. * iwl3945_alive_start - called after REPLY_ALIVE notification received
  2046. * from protocol/runtime uCode (initialization uCode's
  2047. * Alive gets handled by iwl3945_init_alive_start()).
  2048. */
  2049. static void iwl3945_alive_start(struct iwl_priv *priv)
  2050. {
  2051. int thermal_spin = 0;
  2052. u32 rfkill;
  2053. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  2054. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  2055. /* We had an error bringing up the hardware, so take it
  2056. * all the way back down so we can try again */
  2057. IWL_DEBUG_INFO(priv, "Alive failed.\n");
  2058. goto restart;
  2059. }
  2060. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  2061. * This is a paranoid check, because we would not have gotten the
  2062. * "runtime" alive if code weren't properly loaded. */
  2063. if (iwl3945_verify_ucode(priv)) {
  2064. /* Runtime instruction load was bad;
  2065. * take it all the way back down so we can try again */
  2066. IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
  2067. goto restart;
  2068. }
  2069. iwl_clear_stations_table(priv);
  2070. rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
  2071. IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
  2072. if (rfkill & 0x1) {
  2073. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2074. /* if RFKILL is not on, then wait for thermal
  2075. * sensor in adapter to kick in */
  2076. while (iwl3945_hw_get_temperature(priv) == 0) {
  2077. thermal_spin++;
  2078. udelay(10);
  2079. }
  2080. if (thermal_spin)
  2081. IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
  2082. thermal_spin * 10);
  2083. } else
  2084. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2085. /* After the ALIVE response, we can send commands to 3945 uCode */
  2086. set_bit(STATUS_ALIVE, &priv->status);
  2087. if (iwl_is_rfkill(priv))
  2088. return;
  2089. ieee80211_wake_queues(priv->hw);
  2090. priv->active_rate = priv->rates_mask;
  2091. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  2092. iwl_power_update_mode(priv, false);
  2093. if (iwl_is_associated(priv)) {
  2094. struct iwl3945_rxon_cmd *active_rxon =
  2095. (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
  2096. memcpy(&priv->staging_rxon, &priv->active_rxon,
  2097. sizeof(priv->staging_rxon));
  2098. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2099. } else {
  2100. /* Initialize our rx_config data */
  2101. iwl_connection_init_rx_config(priv, priv->iw_mode);
  2102. }
  2103. /* Configure Bluetooth device coexistence support */
  2104. iwl_send_bt_config(priv);
  2105. /* Configure the adapter for unassociated operation */
  2106. iwlcore_commit_rxon(priv);
  2107. iwl3945_reg_txpower_periodic(priv);
  2108. iwl3945_led_register(priv);
  2109. IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
  2110. set_bit(STATUS_READY, &priv->status);
  2111. wake_up_interruptible(&priv->wait_command_queue);
  2112. /* reassociate for ADHOC mode */
  2113. if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
  2114. struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
  2115. priv->vif);
  2116. if (beacon)
  2117. iwl_mac_beacon_update(priv->hw, beacon);
  2118. }
  2119. if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
  2120. iwl_set_mode(priv, priv->iw_mode);
  2121. return;
  2122. restart:
  2123. queue_work(priv->workqueue, &priv->restart);
  2124. }
  2125. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
  2126. static void __iwl3945_down(struct iwl_priv *priv)
  2127. {
  2128. unsigned long flags;
  2129. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  2130. struct ieee80211_conf *conf = NULL;
  2131. IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
  2132. conf = ieee80211_get_hw_conf(priv->hw);
  2133. if (!exit_pending)
  2134. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2135. iwl3945_led_unregister(priv);
  2136. iwl_clear_stations_table(priv);
  2137. /* Unblock any waiting calls */
  2138. wake_up_interruptible_all(&priv->wait_command_queue);
  2139. /* Wipe out the EXIT_PENDING status bit if we are not actually
  2140. * exiting the module */
  2141. if (!exit_pending)
  2142. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2143. /* stop and reset the on-board processor */
  2144. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  2145. /* tell the device to stop sending interrupts */
  2146. spin_lock_irqsave(&priv->lock, flags);
  2147. iwl_disable_interrupts(priv);
  2148. spin_unlock_irqrestore(&priv->lock, flags);
  2149. iwl_synchronize_irq(priv);
  2150. if (priv->mac80211_registered)
  2151. ieee80211_stop_queues(priv->hw);
  2152. /* If we have not previously called iwl3945_init() then
  2153. * clear all bits but the RF Kill bits and return */
  2154. if (!iwl_is_init(priv)) {
  2155. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2156. STATUS_RF_KILL_HW |
  2157. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  2158. STATUS_RF_KILL_SW |
  2159. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2160. STATUS_GEO_CONFIGURED |
  2161. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2162. STATUS_EXIT_PENDING;
  2163. goto exit;
  2164. }
  2165. /* ...otherwise clear out all the status bits but the RF Kill
  2166. * bits and continue taking the NIC down. */
  2167. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2168. STATUS_RF_KILL_HW |
  2169. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  2170. STATUS_RF_KILL_SW |
  2171. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2172. STATUS_GEO_CONFIGURED |
  2173. test_bit(STATUS_FW_ERROR, &priv->status) <<
  2174. STATUS_FW_ERROR |
  2175. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2176. STATUS_EXIT_PENDING;
  2177. priv->cfg->ops->lib->apm_ops.reset(priv);
  2178. spin_lock_irqsave(&priv->lock, flags);
  2179. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  2180. spin_unlock_irqrestore(&priv->lock, flags);
  2181. iwl3945_hw_txq_ctx_stop(priv);
  2182. iwl3945_hw_rxq_stop(priv);
  2183. iwl_write_prph(priv, APMG_CLK_DIS_REG,
  2184. APMG_CLK_VAL_DMA_CLK_RQT);
  2185. udelay(5);
  2186. if (exit_pending)
  2187. priv->cfg->ops->lib->apm_ops.stop(priv);
  2188. else
  2189. priv->cfg->ops->lib->apm_ops.reset(priv);
  2190. exit:
  2191. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  2192. if (priv->ibss_beacon)
  2193. dev_kfree_skb(priv->ibss_beacon);
  2194. priv->ibss_beacon = NULL;
  2195. /* clear out any free frames */
  2196. iwl3945_clear_free_frames(priv);
  2197. }
  2198. static void iwl3945_down(struct iwl_priv *priv)
  2199. {
  2200. mutex_lock(&priv->mutex);
  2201. __iwl3945_down(priv);
  2202. mutex_unlock(&priv->mutex);
  2203. iwl3945_cancel_deferred_work(priv);
  2204. }
  2205. #define MAX_HW_RESTARTS 5
  2206. static int __iwl3945_up(struct iwl_priv *priv)
  2207. {
  2208. int rc, i;
  2209. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2210. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  2211. return -EIO;
  2212. }
  2213. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  2214. IWL_WARN(priv, "Radio disabled by SW RF kill (module "
  2215. "parameter)\n");
  2216. return -ENODEV;
  2217. }
  2218. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  2219. IWL_ERR(priv, "ucode not available for device bring up\n");
  2220. return -EIO;
  2221. }
  2222. /* If platform's RF_KILL switch is NOT set to KILL */
  2223. if (iwl_read32(priv, CSR_GP_CNTRL) &
  2224. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2225. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2226. else {
  2227. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2228. IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
  2229. return -ENODEV;
  2230. }
  2231. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2232. rc = iwl3945_hw_nic_init(priv);
  2233. if (rc) {
  2234. IWL_ERR(priv, "Unable to int nic\n");
  2235. return rc;
  2236. }
  2237. /* make sure rfkill handshake bits are cleared */
  2238. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2239. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2240. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2241. /* clear (again), then enable host interrupts */
  2242. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2243. iwl_enable_interrupts(priv);
  2244. /* really make sure rfkill handshake bits are cleared */
  2245. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2246. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2247. /* Copy original ucode data image from disk into backup cache.
  2248. * This will be used to initialize the on-board processor's
  2249. * data SRAM for a clean start when the runtime program first loads. */
  2250. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  2251. priv->ucode_data.len);
  2252. /* We return success when we resume from suspend and rf_kill is on. */
  2253. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  2254. return 0;
  2255. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2256. iwl_clear_stations_table(priv);
  2257. /* load bootstrap state machine,
  2258. * load bootstrap program into processor's memory,
  2259. * prepare to load the "initialize" uCode */
  2260. priv->cfg->ops->lib->load_ucode(priv);
  2261. if (rc) {
  2262. IWL_ERR(priv,
  2263. "Unable to set up bootstrap uCode: %d\n", rc);
  2264. continue;
  2265. }
  2266. /* start card; "initialize" will load runtime ucode */
  2267. iwl3945_nic_start(priv);
  2268. IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
  2269. return 0;
  2270. }
  2271. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2272. __iwl3945_down(priv);
  2273. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2274. /* tried to restart and config the device for as long as our
  2275. * patience could withstand */
  2276. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  2277. return -EIO;
  2278. }
  2279. /*****************************************************************************
  2280. *
  2281. * Workqueue callbacks
  2282. *
  2283. *****************************************************************************/
  2284. static void iwl3945_bg_init_alive_start(struct work_struct *data)
  2285. {
  2286. struct iwl_priv *priv =
  2287. container_of(data, struct iwl_priv, init_alive_start.work);
  2288. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2289. return;
  2290. mutex_lock(&priv->mutex);
  2291. iwl3945_init_alive_start(priv);
  2292. mutex_unlock(&priv->mutex);
  2293. }
  2294. static void iwl3945_bg_alive_start(struct work_struct *data)
  2295. {
  2296. struct iwl_priv *priv =
  2297. container_of(data, struct iwl_priv, alive_start.work);
  2298. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2299. return;
  2300. mutex_lock(&priv->mutex);
  2301. iwl3945_alive_start(priv);
  2302. mutex_unlock(&priv->mutex);
  2303. }
  2304. static void iwl3945_rfkill_poll(struct work_struct *data)
  2305. {
  2306. struct iwl_priv *priv =
  2307. container_of(data, struct iwl_priv, rfkill_poll.work);
  2308. unsigned long status = priv->status;
  2309. if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2310. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2311. else
  2312. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2313. if (test_bit(STATUS_RF_KILL_HW, &status) != test_bit(STATUS_RF_KILL_HW, &priv->status))
  2314. queue_work(priv->workqueue, &priv->rf_kill);
  2315. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2316. round_jiffies_relative(2 * HZ));
  2317. }
  2318. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  2319. static void iwl3945_bg_request_scan(struct work_struct *data)
  2320. {
  2321. struct iwl_priv *priv =
  2322. container_of(data, struct iwl_priv, request_scan);
  2323. struct iwl_host_cmd cmd = {
  2324. .id = REPLY_SCAN_CMD,
  2325. .len = sizeof(struct iwl3945_scan_cmd),
  2326. .meta.flags = CMD_SIZE_HUGE,
  2327. };
  2328. int rc = 0;
  2329. struct iwl3945_scan_cmd *scan;
  2330. struct ieee80211_conf *conf = NULL;
  2331. u8 n_probes = 0;
  2332. enum ieee80211_band band;
  2333. bool is_active = false;
  2334. conf = ieee80211_get_hw_conf(priv->hw);
  2335. mutex_lock(&priv->mutex);
  2336. cancel_delayed_work(&priv->scan_check);
  2337. if (!iwl_is_ready(priv)) {
  2338. IWL_WARN(priv, "request scan called when driver not ready.\n");
  2339. goto done;
  2340. }
  2341. /* Make sure the scan wasn't canceled before this queued work
  2342. * was given the chance to run... */
  2343. if (!test_bit(STATUS_SCANNING, &priv->status))
  2344. goto done;
  2345. /* This should never be called or scheduled if there is currently
  2346. * a scan active in the hardware. */
  2347. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  2348. IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
  2349. "Ignoring second request.\n");
  2350. rc = -EIO;
  2351. goto done;
  2352. }
  2353. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2354. IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
  2355. goto done;
  2356. }
  2357. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2358. IWL_DEBUG_HC(priv,
  2359. "Scan request while abort pending. Queuing.\n");
  2360. goto done;
  2361. }
  2362. if (iwl_is_rfkill(priv)) {
  2363. IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
  2364. goto done;
  2365. }
  2366. if (!test_bit(STATUS_READY, &priv->status)) {
  2367. IWL_DEBUG_HC(priv,
  2368. "Scan request while uninitialized. Queuing.\n");
  2369. goto done;
  2370. }
  2371. if (!priv->scan_bands) {
  2372. IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
  2373. goto done;
  2374. }
  2375. if (!priv->scan) {
  2376. priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
  2377. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  2378. if (!priv->scan) {
  2379. rc = -ENOMEM;
  2380. goto done;
  2381. }
  2382. }
  2383. scan = priv->scan;
  2384. memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
  2385. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  2386. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  2387. if (iwl_is_associated(priv)) {
  2388. u16 interval = 0;
  2389. u32 extra;
  2390. u32 suspend_time = 100;
  2391. u32 scan_suspend_time = 100;
  2392. unsigned long flags;
  2393. IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
  2394. spin_lock_irqsave(&priv->lock, flags);
  2395. interval = priv->beacon_int;
  2396. spin_unlock_irqrestore(&priv->lock, flags);
  2397. scan->suspend_time = 0;
  2398. scan->max_out_time = cpu_to_le32(200 * 1024);
  2399. if (!interval)
  2400. interval = suspend_time;
  2401. /*
  2402. * suspend time format:
  2403. * 0-19: beacon interval in usec (time before exec.)
  2404. * 20-23: 0
  2405. * 24-31: number of beacons (suspend between channels)
  2406. */
  2407. extra = (suspend_time / interval) << 24;
  2408. scan_suspend_time = 0xFF0FFFFF &
  2409. (extra | ((suspend_time % interval) * 1024));
  2410. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2411. IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
  2412. scan_suspend_time, interval);
  2413. }
  2414. if (priv->scan_request->n_ssids) {
  2415. int i, p = 0;
  2416. IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
  2417. for (i = 0; i < priv->scan_request->n_ssids; i++) {
  2418. /* always does wildcard anyway */
  2419. if (!priv->scan_request->ssids[i].ssid_len)
  2420. continue;
  2421. scan->direct_scan[p].id = WLAN_EID_SSID;
  2422. scan->direct_scan[p].len =
  2423. priv->scan_request->ssids[i].ssid_len;
  2424. memcpy(scan->direct_scan[p].ssid,
  2425. priv->scan_request->ssids[i].ssid,
  2426. priv->scan_request->ssids[i].ssid_len);
  2427. n_probes++;
  2428. p++;
  2429. }
  2430. is_active = true;
  2431. } else
  2432. IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
  2433. /* We don't build a direct scan probe request; the uCode will do
  2434. * that based on the direct_mask added to each channel entry */
  2435. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2436. scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
  2437. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2438. /* flags + rate selection */
  2439. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
  2440. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2441. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  2442. scan->good_CRC_th = 0;
  2443. band = IEEE80211_BAND_2GHZ;
  2444. } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
  2445. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  2446. /*
  2447. * If active scaning is requested but a certain channel
  2448. * is marked passive, we can do active scanning if we
  2449. * detect transmissions.
  2450. */
  2451. scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH : 0;
  2452. band = IEEE80211_BAND_5GHZ;
  2453. } else {
  2454. IWL_WARN(priv, "Invalid scan band count\n");
  2455. goto done;
  2456. }
  2457. scan->tx_cmd.len = cpu_to_le16(
  2458. iwl_fill_probe_req(priv,
  2459. (struct ieee80211_mgmt *)scan->data,
  2460. priv->scan_request->ie,
  2461. priv->scan_request->ie_len,
  2462. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  2463. /* select Rx antennas */
  2464. scan->flags |= iwl3945_get_antenna_flags(priv);
  2465. if (iwl_is_monitor_mode(priv))
  2466. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  2467. scan->channel_count =
  2468. iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
  2469. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  2470. if (scan->channel_count == 0) {
  2471. IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
  2472. goto done;
  2473. }
  2474. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  2475. scan->channel_count * sizeof(struct iwl3945_scan_channel);
  2476. cmd.data = scan;
  2477. scan->len = cpu_to_le16(cmd.len);
  2478. set_bit(STATUS_SCAN_HW, &priv->status);
  2479. rc = iwl_send_cmd_sync(priv, &cmd);
  2480. if (rc)
  2481. goto done;
  2482. queue_delayed_work(priv->workqueue, &priv->scan_check,
  2483. IWL_SCAN_CHECK_WATCHDOG);
  2484. mutex_unlock(&priv->mutex);
  2485. return;
  2486. done:
  2487. /* can not perform scan make sure we clear scanning
  2488. * bits from status so next scan request can be performed.
  2489. * if we dont clear scanning status bit here all next scan
  2490. * will fail
  2491. */
  2492. clear_bit(STATUS_SCAN_HW, &priv->status);
  2493. clear_bit(STATUS_SCANNING, &priv->status);
  2494. /* inform mac80211 scan aborted */
  2495. queue_work(priv->workqueue, &priv->scan_completed);
  2496. mutex_unlock(&priv->mutex);
  2497. }
  2498. static void iwl3945_bg_up(struct work_struct *data)
  2499. {
  2500. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  2501. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2502. return;
  2503. mutex_lock(&priv->mutex);
  2504. __iwl3945_up(priv);
  2505. mutex_unlock(&priv->mutex);
  2506. iwl_rfkill_set_hw_state(priv);
  2507. }
  2508. static void iwl3945_bg_restart(struct work_struct *data)
  2509. {
  2510. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  2511. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2512. return;
  2513. if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
  2514. mutex_lock(&priv->mutex);
  2515. priv->vif = NULL;
  2516. priv->is_open = 0;
  2517. mutex_unlock(&priv->mutex);
  2518. iwl3945_down(priv);
  2519. ieee80211_restart_hw(priv->hw);
  2520. } else {
  2521. iwl3945_down(priv);
  2522. queue_work(priv->workqueue, &priv->up);
  2523. }
  2524. }
  2525. static void iwl3945_bg_rx_replenish(struct work_struct *data)
  2526. {
  2527. struct iwl_priv *priv =
  2528. container_of(data, struct iwl_priv, rx_replenish);
  2529. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2530. return;
  2531. mutex_lock(&priv->mutex);
  2532. iwl3945_rx_replenish(priv);
  2533. mutex_unlock(&priv->mutex);
  2534. }
  2535. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  2536. void iwl3945_post_associate(struct iwl_priv *priv)
  2537. {
  2538. int rc = 0;
  2539. struct ieee80211_conf *conf = NULL;
  2540. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  2541. IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
  2542. return;
  2543. }
  2544. IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
  2545. priv->assoc_id, priv->active_rxon.bssid_addr);
  2546. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2547. return;
  2548. if (!priv->vif || !priv->is_open)
  2549. return;
  2550. iwl_scan_cancel_timeout(priv, 200);
  2551. conf = ieee80211_get_hw_conf(priv->hw);
  2552. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2553. iwlcore_commit_rxon(priv);
  2554. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2555. iwl3945_setup_rxon_timing(priv);
  2556. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2557. sizeof(priv->rxon_timing), &priv->rxon_timing);
  2558. if (rc)
  2559. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2560. "Attempting to continue.\n");
  2561. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2562. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2563. IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
  2564. priv->assoc_id, priv->beacon_int);
  2565. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2566. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2567. else
  2568. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2569. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2570. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2571. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2572. else
  2573. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2574. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2575. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2576. }
  2577. iwlcore_commit_rxon(priv);
  2578. switch (priv->iw_mode) {
  2579. case NL80211_IFTYPE_STATION:
  2580. iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
  2581. break;
  2582. case NL80211_IFTYPE_ADHOC:
  2583. priv->assoc_id = 1;
  2584. iwl_add_station(priv, priv->bssid, 0, CMD_SYNC, NULL);
  2585. iwl3945_sync_sta(priv, IWL_STA_ID,
  2586. (priv->band == IEEE80211_BAND_5GHZ) ?
  2587. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  2588. CMD_ASYNC);
  2589. iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
  2590. iwl3945_send_beacon_cmd(priv);
  2591. break;
  2592. default:
  2593. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  2594. __func__, priv->iw_mode);
  2595. break;
  2596. }
  2597. iwl_activate_qos(priv, 0);
  2598. /* we have just associated, don't start scan too early */
  2599. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  2600. }
  2601. /*****************************************************************************
  2602. *
  2603. * mac80211 entry point functions
  2604. *
  2605. *****************************************************************************/
  2606. #define UCODE_READY_TIMEOUT (2 * HZ)
  2607. static int iwl3945_mac_start(struct ieee80211_hw *hw)
  2608. {
  2609. struct iwl_priv *priv = hw->priv;
  2610. int ret;
  2611. IWL_DEBUG_MAC80211(priv, "enter\n");
  2612. /* we should be verifying the device is ready to be opened */
  2613. mutex_lock(&priv->mutex);
  2614. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  2615. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2616. * ucode filename and max sizes are card-specific. */
  2617. if (!priv->ucode_code.len) {
  2618. ret = iwl3945_read_ucode(priv);
  2619. if (ret) {
  2620. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  2621. mutex_unlock(&priv->mutex);
  2622. goto out_release_irq;
  2623. }
  2624. }
  2625. ret = __iwl3945_up(priv);
  2626. mutex_unlock(&priv->mutex);
  2627. iwl_rfkill_set_hw_state(priv);
  2628. if (ret)
  2629. goto out_release_irq;
  2630. IWL_DEBUG_INFO(priv, "Start UP work.\n");
  2631. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2632. * mac80211 will not be run successfully. */
  2633. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  2634. test_bit(STATUS_READY, &priv->status),
  2635. UCODE_READY_TIMEOUT);
  2636. if (!ret) {
  2637. if (!test_bit(STATUS_READY, &priv->status)) {
  2638. IWL_ERR(priv,
  2639. "Wait for START_ALIVE timeout after %dms.\n",
  2640. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2641. ret = -ETIMEDOUT;
  2642. goto out_release_irq;
  2643. }
  2644. }
  2645. /* ucode is running and will send rfkill notifications,
  2646. * no need to poll the killswitch state anymore */
  2647. cancel_delayed_work(&priv->rfkill_poll);
  2648. priv->is_open = 1;
  2649. IWL_DEBUG_MAC80211(priv, "leave\n");
  2650. return 0;
  2651. out_release_irq:
  2652. priv->is_open = 0;
  2653. IWL_DEBUG_MAC80211(priv, "leave - failed\n");
  2654. return ret;
  2655. }
  2656. static void iwl3945_mac_stop(struct ieee80211_hw *hw)
  2657. {
  2658. struct iwl_priv *priv = hw->priv;
  2659. IWL_DEBUG_MAC80211(priv, "enter\n");
  2660. if (!priv->is_open) {
  2661. IWL_DEBUG_MAC80211(priv, "leave - skip\n");
  2662. return;
  2663. }
  2664. priv->is_open = 0;
  2665. if (iwl_is_ready_rf(priv)) {
  2666. /* stop mac, cancel any scan request and clear
  2667. * RXON_FILTER_ASSOC_MSK BIT
  2668. */
  2669. mutex_lock(&priv->mutex);
  2670. iwl_scan_cancel_timeout(priv, 100);
  2671. mutex_unlock(&priv->mutex);
  2672. }
  2673. iwl3945_down(priv);
  2674. flush_workqueue(priv->workqueue);
  2675. /* start polling the killswitch state again */
  2676. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2677. round_jiffies_relative(2 * HZ));
  2678. IWL_DEBUG_MAC80211(priv, "leave\n");
  2679. }
  2680. static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2681. {
  2682. struct iwl_priv *priv = hw->priv;
  2683. IWL_DEBUG_MAC80211(priv, "enter\n");
  2684. IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2685. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2686. if (iwl3945_tx_skb(priv, skb))
  2687. dev_kfree_skb_any(skb);
  2688. IWL_DEBUG_MAC80211(priv, "leave\n");
  2689. return NETDEV_TX_OK;
  2690. }
  2691. void iwl3945_config_ap(struct iwl_priv *priv)
  2692. {
  2693. int rc = 0;
  2694. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2695. return;
  2696. /* The following should be done only at AP bring up */
  2697. if (!(iwl_is_associated(priv))) {
  2698. /* RXON - unassoc (to set timing command) */
  2699. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2700. iwlcore_commit_rxon(priv);
  2701. /* RXON Timing */
  2702. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2703. iwl3945_setup_rxon_timing(priv);
  2704. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2705. sizeof(priv->rxon_timing),
  2706. &priv->rxon_timing);
  2707. if (rc)
  2708. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2709. "Attempting to continue.\n");
  2710. /* FIXME: what should be the assoc_id for AP? */
  2711. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2712. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2713. priv->staging_rxon.flags |=
  2714. RXON_FLG_SHORT_PREAMBLE_MSK;
  2715. else
  2716. priv->staging_rxon.flags &=
  2717. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2718. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2719. if (priv->assoc_capability &
  2720. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2721. priv->staging_rxon.flags |=
  2722. RXON_FLG_SHORT_SLOT_MSK;
  2723. else
  2724. priv->staging_rxon.flags &=
  2725. ~RXON_FLG_SHORT_SLOT_MSK;
  2726. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2727. priv->staging_rxon.flags &=
  2728. ~RXON_FLG_SHORT_SLOT_MSK;
  2729. }
  2730. /* restore RXON assoc */
  2731. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2732. iwlcore_commit_rxon(priv);
  2733. iwl_add_station(priv, iwl_bcast_addr, 0, CMD_SYNC, NULL);
  2734. }
  2735. iwl3945_send_beacon_cmd(priv);
  2736. /* FIXME - we need to add code here to detect a totally new
  2737. * configuration, reset the AP, unassoc, rxon timing, assoc,
  2738. * clear sta table, add BCAST sta... */
  2739. }
  2740. static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2741. struct ieee80211_vif *vif,
  2742. struct ieee80211_sta *sta,
  2743. struct ieee80211_key_conf *key)
  2744. {
  2745. struct iwl_priv *priv = hw->priv;
  2746. const u8 *addr;
  2747. int ret = 0;
  2748. u8 sta_id = IWL_INVALID_STATION;
  2749. u8 static_key;
  2750. IWL_DEBUG_MAC80211(priv, "enter\n");
  2751. if (iwl3945_mod_params.sw_crypto) {
  2752. IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
  2753. return -EOPNOTSUPP;
  2754. }
  2755. addr = sta ? sta->addr : iwl_bcast_addr;
  2756. static_key = !iwl_is_associated(priv);
  2757. if (!static_key) {
  2758. sta_id = iwl_find_station(priv, addr);
  2759. if (sta_id == IWL_INVALID_STATION) {
  2760. IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
  2761. addr);
  2762. return -EINVAL;
  2763. }
  2764. }
  2765. mutex_lock(&priv->mutex);
  2766. iwl_scan_cancel_timeout(priv, 100);
  2767. mutex_unlock(&priv->mutex);
  2768. switch (cmd) {
  2769. case SET_KEY:
  2770. if (static_key)
  2771. ret = iwl3945_set_static_key(priv, key);
  2772. else
  2773. ret = iwl3945_set_dynamic_key(priv, key, sta_id);
  2774. IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
  2775. break;
  2776. case DISABLE_KEY:
  2777. if (static_key)
  2778. ret = iwl3945_remove_static_key(priv);
  2779. else
  2780. ret = iwl3945_clear_sta_key_info(priv, sta_id);
  2781. IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
  2782. break;
  2783. default:
  2784. ret = -EINVAL;
  2785. }
  2786. IWL_DEBUG_MAC80211(priv, "leave\n");
  2787. return ret;
  2788. }
  2789. /*****************************************************************************
  2790. *
  2791. * sysfs attributes
  2792. *
  2793. *****************************************************************************/
  2794. #ifdef CONFIG_IWLWIFI_DEBUG
  2795. /*
  2796. * The following adds a new attribute to the sysfs representation
  2797. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2798. * used for controlling the debug level.
  2799. *
  2800. * See the level definitions in iwl for details.
  2801. */
  2802. static ssize_t show_debug_level(struct device *d,
  2803. struct device_attribute *attr, char *buf)
  2804. {
  2805. struct iwl_priv *priv = dev_get_drvdata(d);
  2806. return sprintf(buf, "0x%08X\n", priv->debug_level);
  2807. }
  2808. static ssize_t store_debug_level(struct device *d,
  2809. struct device_attribute *attr,
  2810. const char *buf, size_t count)
  2811. {
  2812. struct iwl_priv *priv = dev_get_drvdata(d);
  2813. unsigned long val;
  2814. int ret;
  2815. ret = strict_strtoul(buf, 0, &val);
  2816. if (ret)
  2817. IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
  2818. else
  2819. priv->debug_level = val;
  2820. return strnlen(buf, count);
  2821. }
  2822. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  2823. show_debug_level, store_debug_level);
  2824. #endif /* CONFIG_IWLWIFI_DEBUG */
  2825. static ssize_t show_temperature(struct device *d,
  2826. struct device_attribute *attr, char *buf)
  2827. {
  2828. struct iwl_priv *priv = dev_get_drvdata(d);
  2829. if (!iwl_is_alive(priv))
  2830. return -EAGAIN;
  2831. return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
  2832. }
  2833. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  2834. static ssize_t show_tx_power(struct device *d,
  2835. struct device_attribute *attr, char *buf)
  2836. {
  2837. struct iwl_priv *priv = dev_get_drvdata(d);
  2838. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  2839. }
  2840. static ssize_t store_tx_power(struct device *d,
  2841. struct device_attribute *attr,
  2842. const char *buf, size_t count)
  2843. {
  2844. struct iwl_priv *priv = dev_get_drvdata(d);
  2845. char *p = (char *)buf;
  2846. u32 val;
  2847. val = simple_strtoul(p, &p, 10);
  2848. if (p == buf)
  2849. IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
  2850. else
  2851. iwl3945_hw_reg_set_txpower(priv, val);
  2852. return count;
  2853. }
  2854. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  2855. static ssize_t show_flags(struct device *d,
  2856. struct device_attribute *attr, char *buf)
  2857. {
  2858. struct iwl_priv *priv = dev_get_drvdata(d);
  2859. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  2860. }
  2861. static ssize_t store_flags(struct device *d,
  2862. struct device_attribute *attr,
  2863. const char *buf, size_t count)
  2864. {
  2865. struct iwl_priv *priv = dev_get_drvdata(d);
  2866. u32 flags = simple_strtoul(buf, NULL, 0);
  2867. mutex_lock(&priv->mutex);
  2868. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  2869. /* Cancel any currently running scans... */
  2870. if (iwl_scan_cancel_timeout(priv, 100))
  2871. IWL_WARN(priv, "Could not cancel scan.\n");
  2872. else {
  2873. IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
  2874. flags);
  2875. priv->staging_rxon.flags = cpu_to_le32(flags);
  2876. iwlcore_commit_rxon(priv);
  2877. }
  2878. }
  2879. mutex_unlock(&priv->mutex);
  2880. return count;
  2881. }
  2882. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  2883. static ssize_t show_filter_flags(struct device *d,
  2884. struct device_attribute *attr, char *buf)
  2885. {
  2886. struct iwl_priv *priv = dev_get_drvdata(d);
  2887. return sprintf(buf, "0x%04X\n",
  2888. le32_to_cpu(priv->active_rxon.filter_flags));
  2889. }
  2890. static ssize_t store_filter_flags(struct device *d,
  2891. struct device_attribute *attr,
  2892. const char *buf, size_t count)
  2893. {
  2894. struct iwl_priv *priv = dev_get_drvdata(d);
  2895. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  2896. mutex_lock(&priv->mutex);
  2897. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  2898. /* Cancel any currently running scans... */
  2899. if (iwl_scan_cancel_timeout(priv, 100))
  2900. IWL_WARN(priv, "Could not cancel scan.\n");
  2901. else {
  2902. IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
  2903. "0x%04X\n", filter_flags);
  2904. priv->staging_rxon.filter_flags =
  2905. cpu_to_le32(filter_flags);
  2906. iwlcore_commit_rxon(priv);
  2907. }
  2908. }
  2909. mutex_unlock(&priv->mutex);
  2910. return count;
  2911. }
  2912. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  2913. store_filter_flags);
  2914. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  2915. static ssize_t show_measurement(struct device *d,
  2916. struct device_attribute *attr, char *buf)
  2917. {
  2918. struct iwl_priv *priv = dev_get_drvdata(d);
  2919. struct iwl_spectrum_notification measure_report;
  2920. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  2921. u8 *data = (u8 *)&measure_report;
  2922. unsigned long flags;
  2923. spin_lock_irqsave(&priv->lock, flags);
  2924. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  2925. spin_unlock_irqrestore(&priv->lock, flags);
  2926. return 0;
  2927. }
  2928. memcpy(&measure_report, &priv->measure_report, size);
  2929. priv->measurement_status = 0;
  2930. spin_unlock_irqrestore(&priv->lock, flags);
  2931. while (size && (PAGE_SIZE - len)) {
  2932. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2933. PAGE_SIZE - len, 1);
  2934. len = strlen(buf);
  2935. if (PAGE_SIZE - len)
  2936. buf[len++] = '\n';
  2937. ofs += 16;
  2938. size -= min(size, 16U);
  2939. }
  2940. return len;
  2941. }
  2942. static ssize_t store_measurement(struct device *d,
  2943. struct device_attribute *attr,
  2944. const char *buf, size_t count)
  2945. {
  2946. struct iwl_priv *priv = dev_get_drvdata(d);
  2947. struct ieee80211_measurement_params params = {
  2948. .channel = le16_to_cpu(priv->active_rxon.channel),
  2949. .start_time = cpu_to_le64(priv->last_tsf),
  2950. .duration = cpu_to_le16(1),
  2951. };
  2952. u8 type = IWL_MEASURE_BASIC;
  2953. u8 buffer[32];
  2954. u8 channel;
  2955. if (count) {
  2956. char *p = buffer;
  2957. strncpy(buffer, buf, min(sizeof(buffer), count));
  2958. channel = simple_strtoul(p, NULL, 0);
  2959. if (channel)
  2960. params.channel = channel;
  2961. p = buffer;
  2962. while (*p && *p != ' ')
  2963. p++;
  2964. if (*p)
  2965. type = simple_strtoul(p + 1, NULL, 0);
  2966. }
  2967. IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
  2968. "channel %d (for '%s')\n", type, params.channel, buf);
  2969. iwl3945_get_measurement(priv, &params, type);
  2970. return count;
  2971. }
  2972. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  2973. show_measurement, store_measurement);
  2974. #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
  2975. static ssize_t store_retry_rate(struct device *d,
  2976. struct device_attribute *attr,
  2977. const char *buf, size_t count)
  2978. {
  2979. struct iwl_priv *priv = dev_get_drvdata(d);
  2980. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  2981. if (priv->retry_rate <= 0)
  2982. priv->retry_rate = 1;
  2983. return count;
  2984. }
  2985. static ssize_t show_retry_rate(struct device *d,
  2986. struct device_attribute *attr, char *buf)
  2987. {
  2988. struct iwl_priv *priv = dev_get_drvdata(d);
  2989. return sprintf(buf, "%d", priv->retry_rate);
  2990. }
  2991. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  2992. store_retry_rate);
  2993. static ssize_t store_power_level(struct device *d,
  2994. struct device_attribute *attr,
  2995. const char *buf, size_t count)
  2996. {
  2997. struct iwl_priv *priv = dev_get_drvdata(d);
  2998. int ret;
  2999. unsigned long mode;
  3000. mutex_lock(&priv->mutex);
  3001. ret = strict_strtoul(buf, 10, &mode);
  3002. if (ret)
  3003. goto out;
  3004. ret = iwl_power_set_user_mode(priv, mode);
  3005. if (ret) {
  3006. IWL_DEBUG_MAC80211(priv, "failed setting power mode.\n");
  3007. goto out;
  3008. }
  3009. ret = count;
  3010. out:
  3011. mutex_unlock(&priv->mutex);
  3012. return ret;
  3013. }
  3014. static ssize_t show_power_level(struct device *d,
  3015. struct device_attribute *attr, char *buf)
  3016. {
  3017. struct iwl_priv *priv = dev_get_drvdata(d);
  3018. int mode = priv->power_data.user_power_setting;
  3019. int level = priv->power_data.power_mode;
  3020. char *p = buf;
  3021. p += sprintf(p, "INDEX:%d\t", level);
  3022. p += sprintf(p, "USER:%d\n", mode);
  3023. return p - buf + 1;
  3024. }
  3025. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR,
  3026. show_power_level, store_power_level);
  3027. #define MAX_WX_STRING 80
  3028. /* Values are in microsecond */
  3029. static const s32 timeout_duration[] = {
  3030. 350000,
  3031. 250000,
  3032. 75000,
  3033. 37000,
  3034. 25000,
  3035. };
  3036. static const s32 period_duration[] = {
  3037. 400000,
  3038. 700000,
  3039. 1000000,
  3040. 1000000,
  3041. 1000000
  3042. };
  3043. static ssize_t show_channels(struct device *d,
  3044. struct device_attribute *attr, char *buf)
  3045. {
  3046. /* all this shit doesn't belong into sysfs anyway */
  3047. return 0;
  3048. }
  3049. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  3050. static ssize_t show_statistics(struct device *d,
  3051. struct device_attribute *attr, char *buf)
  3052. {
  3053. struct iwl_priv *priv = dev_get_drvdata(d);
  3054. u32 size = sizeof(struct iwl3945_notif_statistics);
  3055. u32 len = 0, ofs = 0;
  3056. u8 *data = (u8 *)&priv->statistics_39;
  3057. int rc = 0;
  3058. if (!iwl_is_alive(priv))
  3059. return -EAGAIN;
  3060. mutex_lock(&priv->mutex);
  3061. rc = iwl_send_statistics_request(priv, 0);
  3062. mutex_unlock(&priv->mutex);
  3063. if (rc) {
  3064. len = sprintf(buf,
  3065. "Error sending statistics request: 0x%08X\n", rc);
  3066. return len;
  3067. }
  3068. while (size && (PAGE_SIZE - len)) {
  3069. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  3070. PAGE_SIZE - len, 1);
  3071. len = strlen(buf);
  3072. if (PAGE_SIZE - len)
  3073. buf[len++] = '\n';
  3074. ofs += 16;
  3075. size -= min(size, 16U);
  3076. }
  3077. return len;
  3078. }
  3079. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  3080. static ssize_t show_antenna(struct device *d,
  3081. struct device_attribute *attr, char *buf)
  3082. {
  3083. struct iwl_priv *priv = dev_get_drvdata(d);
  3084. if (!iwl_is_alive(priv))
  3085. return -EAGAIN;
  3086. return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
  3087. }
  3088. static ssize_t store_antenna(struct device *d,
  3089. struct device_attribute *attr,
  3090. const char *buf, size_t count)
  3091. {
  3092. struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
  3093. int ant;
  3094. if (count == 0)
  3095. return 0;
  3096. if (sscanf(buf, "%1i", &ant) != 1) {
  3097. IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
  3098. return count;
  3099. }
  3100. if ((ant >= 0) && (ant <= 2)) {
  3101. IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
  3102. iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
  3103. } else
  3104. IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
  3105. return count;
  3106. }
  3107. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  3108. static ssize_t show_status(struct device *d,
  3109. struct device_attribute *attr, char *buf)
  3110. {
  3111. struct iwl_priv *priv = dev_get_drvdata(d);
  3112. if (!iwl_is_alive(priv))
  3113. return -EAGAIN;
  3114. return sprintf(buf, "0x%08x\n", (int)priv->status);
  3115. }
  3116. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  3117. static ssize_t dump_error_log(struct device *d,
  3118. struct device_attribute *attr,
  3119. const char *buf, size_t count)
  3120. {
  3121. struct iwl_priv *priv = dev_get_drvdata(d);
  3122. char *p = (char *)buf;
  3123. if (p[0] == '1')
  3124. iwl3945_dump_nic_error_log(priv);
  3125. return strnlen(buf, count);
  3126. }
  3127. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  3128. static ssize_t dump_event_log(struct device *d,
  3129. struct device_attribute *attr,
  3130. const char *buf, size_t count)
  3131. {
  3132. struct iwl_priv *priv = dev_get_drvdata(d);
  3133. char *p = (char *)buf;
  3134. if (p[0] == '1')
  3135. iwl3945_dump_nic_event_log(priv);
  3136. return strnlen(buf, count);
  3137. }
  3138. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  3139. /*****************************************************************************
  3140. *
  3141. * driver setup and tear down
  3142. *
  3143. *****************************************************************************/
  3144. static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
  3145. {
  3146. priv->workqueue = create_singlethread_workqueue(DRV_NAME);
  3147. init_waitqueue_head(&priv->wait_command_queue);
  3148. INIT_WORK(&priv->up, iwl3945_bg_up);
  3149. INIT_WORK(&priv->restart, iwl3945_bg_restart);
  3150. INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
  3151. INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
  3152. INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
  3153. INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
  3154. INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
  3155. INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
  3156. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  3157. INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
  3158. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  3159. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  3160. iwl3945_hw_setup_deferred_work(priv);
  3161. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  3162. iwl3945_irq_tasklet, (unsigned long)priv);
  3163. }
  3164. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
  3165. {
  3166. iwl3945_hw_cancel_deferred_work(priv);
  3167. cancel_delayed_work_sync(&priv->init_alive_start);
  3168. cancel_delayed_work(&priv->scan_check);
  3169. cancel_delayed_work(&priv->alive_start);
  3170. cancel_work_sync(&priv->beacon_update);
  3171. }
  3172. static struct attribute *iwl3945_sysfs_entries[] = {
  3173. &dev_attr_antenna.attr,
  3174. &dev_attr_channels.attr,
  3175. &dev_attr_dump_errors.attr,
  3176. &dev_attr_dump_events.attr,
  3177. &dev_attr_flags.attr,
  3178. &dev_attr_filter_flags.attr,
  3179. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  3180. &dev_attr_measurement.attr,
  3181. #endif
  3182. &dev_attr_power_level.attr,
  3183. &dev_attr_retry_rate.attr,
  3184. &dev_attr_statistics.attr,
  3185. &dev_attr_status.attr,
  3186. &dev_attr_temperature.attr,
  3187. &dev_attr_tx_power.attr,
  3188. #ifdef CONFIG_IWLWIFI_DEBUG
  3189. &dev_attr_debug_level.attr,
  3190. #endif
  3191. NULL
  3192. };
  3193. static struct attribute_group iwl3945_attribute_group = {
  3194. .name = NULL, /* put in device directory */
  3195. .attrs = iwl3945_sysfs_entries,
  3196. };
  3197. static struct ieee80211_ops iwl3945_hw_ops = {
  3198. .tx = iwl3945_mac_tx,
  3199. .start = iwl3945_mac_start,
  3200. .stop = iwl3945_mac_stop,
  3201. .add_interface = iwl_mac_add_interface,
  3202. .remove_interface = iwl_mac_remove_interface,
  3203. .config = iwl_mac_config,
  3204. .configure_filter = iwl_configure_filter,
  3205. .set_key = iwl3945_mac_set_key,
  3206. .get_tx_stats = iwl_mac_get_tx_stats,
  3207. .conf_tx = iwl_mac_conf_tx,
  3208. .reset_tsf = iwl_mac_reset_tsf,
  3209. .bss_info_changed = iwl_bss_info_changed,
  3210. .hw_scan = iwl_mac_hw_scan
  3211. };
  3212. static int iwl3945_init_drv(struct iwl_priv *priv)
  3213. {
  3214. int ret;
  3215. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3216. priv->retry_rate = 1;
  3217. priv->ibss_beacon = NULL;
  3218. spin_lock_init(&priv->lock);
  3219. spin_lock_init(&priv->sta_lock);
  3220. spin_lock_init(&priv->hcmd_lock);
  3221. INIT_LIST_HEAD(&priv->free_frames);
  3222. mutex_init(&priv->mutex);
  3223. /* Clear the driver's (not device's) station table */
  3224. iwl_clear_stations_table(priv);
  3225. priv->data_retry_limit = -1;
  3226. priv->ieee_channels = NULL;
  3227. priv->ieee_rates = NULL;
  3228. priv->band = IEEE80211_BAND_2GHZ;
  3229. priv->iw_mode = NL80211_IFTYPE_STATION;
  3230. iwl_reset_qos(priv);
  3231. priv->qos_data.qos_active = 0;
  3232. priv->qos_data.qos_cap.val = 0;
  3233. priv->rates_mask = IWL_RATES_MASK;
  3234. /* If power management is turned on, default to CAM mode */
  3235. priv->power_mode = IWL_POWER_MODE_CAM;
  3236. priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
  3237. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  3238. IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
  3239. eeprom->version);
  3240. ret = -EINVAL;
  3241. goto err;
  3242. }
  3243. ret = iwl_init_channel_map(priv);
  3244. if (ret) {
  3245. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  3246. goto err;
  3247. }
  3248. /* Set up txpower settings in driver for all channels */
  3249. if (iwl3945_txpower_set_from_eeprom(priv)) {
  3250. ret = -EIO;
  3251. goto err_free_channel_map;
  3252. }
  3253. ret = iwlcore_init_geos(priv);
  3254. if (ret) {
  3255. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  3256. goto err_free_channel_map;
  3257. }
  3258. iwl3945_init_hw_rates(priv, priv->ieee_rates);
  3259. return 0;
  3260. err_free_channel_map:
  3261. iwl_free_channel_map(priv);
  3262. err:
  3263. return ret;
  3264. }
  3265. static int iwl3945_setup_mac(struct iwl_priv *priv)
  3266. {
  3267. int ret;
  3268. struct ieee80211_hw *hw = priv->hw;
  3269. hw->rate_control_algorithm = "iwl-3945-rs";
  3270. hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
  3271. /* Tell mac80211 our characteristics */
  3272. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  3273. IEEE80211_HW_NOISE_DBM |
  3274. IEEE80211_HW_SPECTRUM_MGMT;
  3275. hw->wiphy->interface_modes =
  3276. BIT(NL80211_IFTYPE_STATION) |
  3277. BIT(NL80211_IFTYPE_ADHOC);
  3278. hw->wiphy->custom_regulatory = true;
  3279. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  3280. /* we create the 802.11 header and a zero-length SSID element */
  3281. hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
  3282. /* Default value; 4 EDCA QOS priorities */
  3283. hw->queues = 4;
  3284. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  3285. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  3286. &priv->bands[IEEE80211_BAND_2GHZ];
  3287. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  3288. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  3289. &priv->bands[IEEE80211_BAND_5GHZ];
  3290. ret = ieee80211_register_hw(priv->hw);
  3291. if (ret) {
  3292. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  3293. return ret;
  3294. }
  3295. priv->mac80211_registered = 1;
  3296. return 0;
  3297. }
  3298. static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  3299. {
  3300. int err = 0;
  3301. struct iwl_priv *priv;
  3302. struct ieee80211_hw *hw;
  3303. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  3304. struct iwl3945_eeprom *eeprom;
  3305. unsigned long flags;
  3306. /***********************
  3307. * 1. Allocating HW data
  3308. * ********************/
  3309. /* mac80211 allocates memory for this device instance, including
  3310. * space for this driver's private structure */
  3311. hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
  3312. if (hw == NULL) {
  3313. printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
  3314. err = -ENOMEM;
  3315. goto out;
  3316. }
  3317. priv = hw->priv;
  3318. SET_IEEE80211_DEV(hw, &pdev->dev);
  3319. if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) ||
  3320. (iwl3945_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) {
  3321. IWL_ERR(priv,
  3322. "invalid queues_num, should be between %d and %d\n",
  3323. IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
  3324. err = -EINVAL;
  3325. goto out_ieee80211_free_hw;
  3326. }
  3327. /*
  3328. * Disabling hardware scan means that mac80211 will perform scans
  3329. * "the hard way", rather than using device's scan.
  3330. */
  3331. if (iwl3945_mod_params.disable_hw_scan) {
  3332. IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
  3333. iwl3945_hw_ops.hw_scan = NULL;
  3334. }
  3335. IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
  3336. priv->cfg = cfg;
  3337. priv->pci_dev = pdev;
  3338. priv->inta_mask = CSR_INI_SET_MASK;
  3339. #ifdef CONFIG_IWLWIFI_DEBUG
  3340. priv->debug_level = iwl3945_mod_params.debug;
  3341. atomic_set(&priv->restrict_refcnt, 0);
  3342. #endif
  3343. /***************************
  3344. * 2. Initializing PCI bus
  3345. * *************************/
  3346. if (pci_enable_device(pdev)) {
  3347. err = -ENODEV;
  3348. goto out_ieee80211_free_hw;
  3349. }
  3350. pci_set_master(pdev);
  3351. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3352. if (!err)
  3353. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3354. if (err) {
  3355. IWL_WARN(priv, "No suitable DMA available.\n");
  3356. goto out_pci_disable_device;
  3357. }
  3358. pci_set_drvdata(pdev, priv);
  3359. err = pci_request_regions(pdev, DRV_NAME);
  3360. if (err)
  3361. goto out_pci_disable_device;
  3362. /***********************
  3363. * 3. Read REV Register
  3364. * ********************/
  3365. priv->hw_base = pci_iomap(pdev, 0, 0);
  3366. if (!priv->hw_base) {
  3367. err = -ENODEV;
  3368. goto out_pci_release_regions;
  3369. }
  3370. IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
  3371. (unsigned long long) pci_resource_len(pdev, 0));
  3372. IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
  3373. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3374. * PCI Tx retries from interfering with C3 CPU state */
  3375. pci_write_config_byte(pdev, 0x41, 0x00);
  3376. /* this spin lock will be used in apm_ops.init and EEPROM access
  3377. * we should init now
  3378. */
  3379. spin_lock_init(&priv->reg_lock);
  3380. /* amp init */
  3381. err = priv->cfg->ops->lib->apm_ops.init(priv);
  3382. if (err < 0) {
  3383. IWL_DEBUG_INFO(priv, "Failed to init the card\n");
  3384. goto out_iounmap;
  3385. }
  3386. /***********************
  3387. * 4. Read EEPROM
  3388. * ********************/
  3389. /* Read the EEPROM */
  3390. err = iwl_eeprom_init(priv);
  3391. if (err) {
  3392. IWL_ERR(priv, "Unable to init EEPROM\n");
  3393. goto out_iounmap;
  3394. }
  3395. /* MAC Address location in EEPROM same for 3945/4965 */
  3396. eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3397. memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
  3398. IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
  3399. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  3400. /***********************
  3401. * 5. Setup HW Constants
  3402. * ********************/
  3403. /* Device-specific setup */
  3404. if (iwl3945_hw_set_hw_params(priv)) {
  3405. IWL_ERR(priv, "failed to set hw settings\n");
  3406. goto out_eeprom_free;
  3407. }
  3408. /***********************
  3409. * 6. Setup priv
  3410. * ********************/
  3411. err = iwl3945_init_drv(priv);
  3412. if (err) {
  3413. IWL_ERR(priv, "initializing driver failed\n");
  3414. goto out_unset_hw_params;
  3415. }
  3416. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
  3417. priv->cfg->name);
  3418. /***********************
  3419. * 7. Setup Services
  3420. * ********************/
  3421. spin_lock_irqsave(&priv->lock, flags);
  3422. iwl_disable_interrupts(priv);
  3423. spin_unlock_irqrestore(&priv->lock, flags);
  3424. pci_enable_msi(priv->pci_dev);
  3425. err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
  3426. IRQF_SHARED, DRV_NAME, priv);
  3427. if (err) {
  3428. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  3429. goto out_disable_msi;
  3430. }
  3431. err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3432. if (err) {
  3433. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  3434. goto out_release_irq;
  3435. }
  3436. iwl_set_rxon_channel(priv,
  3437. &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
  3438. iwl3945_setup_deferred_work(priv);
  3439. iwl3945_setup_rx_handlers(priv);
  3440. /*********************************
  3441. * 8. Setup and Register mac80211
  3442. * *******************************/
  3443. iwl_enable_interrupts(priv);
  3444. err = iwl3945_setup_mac(priv);
  3445. if (err)
  3446. goto out_remove_sysfs;
  3447. err = iwl_dbgfs_register(priv, DRV_NAME);
  3448. if (err)
  3449. IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
  3450. err = iwl_rfkill_init(priv);
  3451. if (err)
  3452. IWL_ERR(priv, "Unable to initialize RFKILL system. "
  3453. "Ignoring error: %d\n", err);
  3454. else
  3455. iwl_rfkill_set_hw_state(priv);
  3456. /* Start monitoring the killswitch */
  3457. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  3458. 2 * HZ);
  3459. return 0;
  3460. out_remove_sysfs:
  3461. destroy_workqueue(priv->workqueue);
  3462. priv->workqueue = NULL;
  3463. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3464. out_release_irq:
  3465. free_irq(priv->pci_dev->irq, priv);
  3466. out_disable_msi:
  3467. pci_disable_msi(priv->pci_dev);
  3468. iwlcore_free_geos(priv);
  3469. iwl_free_channel_map(priv);
  3470. out_unset_hw_params:
  3471. iwl3945_unset_hw_params(priv);
  3472. out_eeprom_free:
  3473. iwl_eeprom_free(priv);
  3474. out_iounmap:
  3475. pci_iounmap(pdev, priv->hw_base);
  3476. out_pci_release_regions:
  3477. pci_release_regions(pdev);
  3478. out_pci_disable_device:
  3479. pci_set_drvdata(pdev, NULL);
  3480. pci_disable_device(pdev);
  3481. out_ieee80211_free_hw:
  3482. ieee80211_free_hw(priv->hw);
  3483. out:
  3484. return err;
  3485. }
  3486. static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
  3487. {
  3488. struct iwl_priv *priv = pci_get_drvdata(pdev);
  3489. unsigned long flags;
  3490. if (!priv)
  3491. return;
  3492. IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
  3493. iwl_dbgfs_unregister(priv);
  3494. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3495. if (priv->mac80211_registered) {
  3496. ieee80211_unregister_hw(priv->hw);
  3497. priv->mac80211_registered = 0;
  3498. } else {
  3499. iwl3945_down(priv);
  3500. }
  3501. /* make sure we flush any pending irq or
  3502. * tasklet for the driver
  3503. */
  3504. spin_lock_irqsave(&priv->lock, flags);
  3505. iwl_disable_interrupts(priv);
  3506. spin_unlock_irqrestore(&priv->lock, flags);
  3507. iwl_synchronize_irq(priv);
  3508. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3509. iwl_rfkill_unregister(priv);
  3510. cancel_delayed_work_sync(&priv->rfkill_poll);
  3511. iwl3945_dealloc_ucode_pci(priv);
  3512. if (priv->rxq.bd)
  3513. iwl3945_rx_queue_free(priv, &priv->rxq);
  3514. iwl3945_hw_txq_ctx_free(priv);
  3515. iwl3945_unset_hw_params(priv);
  3516. iwl_clear_stations_table(priv);
  3517. /*netif_stop_queue(dev); */
  3518. flush_workqueue(priv->workqueue);
  3519. /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
  3520. * priv->workqueue... so we can't take down the workqueue
  3521. * until now... */
  3522. destroy_workqueue(priv->workqueue);
  3523. priv->workqueue = NULL;
  3524. free_irq(pdev->irq, priv);
  3525. pci_disable_msi(pdev);
  3526. pci_iounmap(pdev, priv->hw_base);
  3527. pci_release_regions(pdev);
  3528. pci_disable_device(pdev);
  3529. pci_set_drvdata(pdev, NULL);
  3530. iwl_free_channel_map(priv);
  3531. iwlcore_free_geos(priv);
  3532. kfree(priv->scan);
  3533. if (priv->ibss_beacon)
  3534. dev_kfree_skb(priv->ibss_beacon);
  3535. ieee80211_free_hw(priv->hw);
  3536. }
  3537. /*****************************************************************************
  3538. *
  3539. * driver and module entry point
  3540. *
  3541. *****************************************************************************/
  3542. static struct pci_driver iwl3945_driver = {
  3543. .name = DRV_NAME,
  3544. .id_table = iwl3945_hw_card_ids,
  3545. .probe = iwl3945_pci_probe,
  3546. .remove = __devexit_p(iwl3945_pci_remove),
  3547. #ifdef CONFIG_PM
  3548. .suspend = iwl_pci_suspend,
  3549. .resume = iwl_pci_resume,
  3550. #endif
  3551. };
  3552. static int __init iwl3945_init(void)
  3553. {
  3554. int ret;
  3555. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3556. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  3557. ret = iwl3945_rate_control_register();
  3558. if (ret) {
  3559. printk(KERN_ERR DRV_NAME
  3560. "Unable to register rate control algorithm: %d\n", ret);
  3561. return ret;
  3562. }
  3563. ret = pci_register_driver(&iwl3945_driver);
  3564. if (ret) {
  3565. printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
  3566. goto error_register;
  3567. }
  3568. return ret;
  3569. error_register:
  3570. iwl3945_rate_control_unregister();
  3571. return ret;
  3572. }
  3573. static void __exit iwl3945_exit(void)
  3574. {
  3575. pci_unregister_driver(&iwl3945_driver);
  3576. iwl3945_rate_control_unregister();
  3577. }
  3578. MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
  3579. module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
  3580. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3581. module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
  3582. MODULE_PARM_DESC(swcrypto,
  3583. "using software crypto (default 1 [software])\n");
  3584. module_param_named(debug, iwl3945_mod_params.debug, uint, 0444);
  3585. MODULE_PARM_DESC(debug, "debug output mask");
  3586. module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
  3587. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  3588. module_param_named(queues_num, iwl3945_mod_params.num_of_queues, int, 0444);
  3589. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  3590. module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, 0444);
  3591. MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
  3592. module_exit(iwl3945_exit);
  3593. module_init(iwl3945_init);