processor.h 6.2 KB

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  1. /*
  2. * include/asm-sh/processor.h
  3. *
  4. * Copyright (C) 1999, 2000 Niibe Yutaka
  5. * Copyright (C) 2002, 2003 Paul Mundt
  6. */
  7. #ifndef __ASM_SH_PROCESSOR_H
  8. #define __ASM_SH_PROCESSOR_H
  9. #ifdef __KERNEL__
  10. #include <linux/compiler.h>
  11. #include <asm/page.h>
  12. #include <asm/types.h>
  13. #include <asm/cache.h>
  14. #include <asm/ptrace.h>
  15. /*
  16. * Default implementation of macro that returns current
  17. * instruction pointer ("program counter").
  18. */
  19. #define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n1:":"=z" (pc)); pc; })
  20. /* Core Processor Version Register */
  21. #define CCN_PVR 0xff000030
  22. #define CCN_CVR 0xff000040
  23. #define CCN_PRR 0xff000044
  24. /*
  25. * CPU type and hardware bug flags. Kept separately for each CPU.
  26. *
  27. * Each one of these also needs a CONFIG_CPU_SUBTYPE_xxx entry
  28. * in arch/sh/mm/Kconfig, as well as an entry in arch/sh/kernel/setup.c
  29. * for parsing the subtype in get_cpu_subtype().
  30. */
  31. enum cpu_type {
  32. /* SH-2 types */
  33. CPU_SH7604,
  34. /* SH-3 types */
  35. CPU_SH7705, CPU_SH7707, CPU_SH7708, CPU_SH7708S, CPU_SH7708R,
  36. CPU_SH7709, CPU_SH7709A, CPU_SH7729, CPU_SH7300,
  37. /* SH-4 types */
  38. CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R,
  39. CPU_SH7760, CPU_ST40RA, CPU_ST40GX1, CPU_SH4_202, CPU_SH4_501,
  40. CPU_SH73180, CPU_SH7770, CPU_SH7780, CPU_SH7781,
  41. /* Unknown subtype */
  42. CPU_SH_NONE
  43. };
  44. struct sh_cpuinfo {
  45. enum cpu_type type;
  46. unsigned long loops_per_jiffy;
  47. struct cache_info icache;
  48. struct cache_info dcache;
  49. unsigned long flags;
  50. };
  51. extern struct sh_cpuinfo boot_cpu_data;
  52. #ifdef CONFIG_SMP
  53. extern struct sh_cpuinfo cpu_data[];
  54. #define current_cpu_data cpu_data[smp_processor_id()]
  55. #else
  56. #define cpu_data (&boot_cpu_data)
  57. #define current_cpu_data boot_cpu_data
  58. #endif
  59. /*
  60. * User space process size: 2GB.
  61. *
  62. * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff
  63. */
  64. #define TASK_SIZE 0x7c000000UL
  65. /* This decides where the kernel will search for a free chunk of vm
  66. * space during mmap's.
  67. */
  68. #define TASK_UNMAPPED_BASE (TASK_SIZE / 3)
  69. /*
  70. * Bit of SR register
  71. *
  72. * FD-bit:
  73. * When it's set, it means the processor doesn't have right to use FPU,
  74. * and it results exception when the floating operation is executed.
  75. *
  76. * IMASK-bit:
  77. * Interrupt level mask
  78. */
  79. #define SR_FD 0x00008000
  80. #define SR_DSP 0x00001000
  81. #define SR_IMASK 0x000000f0
  82. /*
  83. * FPU structure and data
  84. */
  85. struct sh_fpu_hard_struct {
  86. unsigned long fp_regs[16];
  87. unsigned long xfp_regs[16];
  88. unsigned long fpscr;
  89. unsigned long fpul;
  90. long status; /* software status information */
  91. };
  92. /* Dummy fpu emulator */
  93. struct sh_fpu_soft_struct {
  94. unsigned long fp_regs[16];
  95. unsigned long xfp_regs[16];
  96. unsigned long fpscr;
  97. unsigned long fpul;
  98. unsigned char lookahead;
  99. unsigned long entry_pc;
  100. };
  101. union sh_fpu_union {
  102. struct sh_fpu_hard_struct hard;
  103. struct sh_fpu_soft_struct soft;
  104. };
  105. /*
  106. * Processor flags
  107. */
  108. #define CPU_HAS_FPU 0x0001 /* Hardware FPU support */
  109. #define CPU_HAS_P2_FLUSH_BUG 0x0002 /* Need to flush the cache in P2 area */
  110. #define CPU_HAS_MMU_PAGE_ASSOC 0x0004 /* SH3: TLB way selection bit support */
  111. #define CPU_HAS_DSP 0x0008 /* SH-DSP: DSP support */
  112. #define CPU_HAS_PERF_COUNTER 0x0010 /* Hardware performance counters */
  113. #define CPU_HAS_PTEA 0x0020 /* PTEA register */
  114. struct thread_struct {
  115. unsigned long sp;
  116. unsigned long pc;
  117. unsigned long trap_no, error_code;
  118. unsigned long address;
  119. /* Hardware debugging registers may come here */
  120. unsigned long ubc_pc;
  121. /* floating point info */
  122. union sh_fpu_union fpu;
  123. };
  124. /* Count of active tasks with UBC settings */
  125. extern int ubc_usercnt;
  126. #define INIT_THREAD { \
  127. sizeof(init_stack) + (long) &init_stack, /* sp */ \
  128. 0, /* pc */ \
  129. 0, 0, \
  130. 0, \
  131. 0, \
  132. {{{0,}},} /* fpu state */ \
  133. }
  134. /*
  135. * Do necessary setup to start up a newly executed thread.
  136. */
  137. #define start_thread(regs, new_pc, new_sp) \
  138. set_fs(USER_DS); \
  139. regs->pr = 0; \
  140. regs->sr = SR_FD; /* User mode. */ \
  141. regs->pc = new_pc; \
  142. regs->regs[15] = new_sp
  143. /* Forward declaration, a strange C thing */
  144. struct task_struct;
  145. struct mm_struct;
  146. /* Free all resources held by a thread. */
  147. extern void release_thread(struct task_struct *);
  148. /* Prepare to copy thread state - unlazy all lazy status */
  149. #define prepare_to_copy(tsk) do { } while (0)
  150. /*
  151. * create a kernel thread without removing it from tasklists
  152. */
  153. extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
  154. /* Copy and release all segment info associated with a VM */
  155. #define copy_segments(p, mm) do { } while(0)
  156. #define release_segments(mm) do { } while(0)
  157. /*
  158. * FPU lazy state save handling.
  159. */
  160. static __inline__ void disable_fpu(void)
  161. {
  162. unsigned long __dummy;
  163. /* Set FD flag in SR */
  164. __asm__ __volatile__("stc sr, %0\n\t"
  165. "or %1, %0\n\t"
  166. "ldc %0, sr"
  167. : "=&r" (__dummy)
  168. : "r" (SR_FD));
  169. }
  170. static __inline__ void enable_fpu(void)
  171. {
  172. unsigned long __dummy;
  173. /* Clear out FD flag in SR */
  174. __asm__ __volatile__("stc sr, %0\n\t"
  175. "and %1, %0\n\t"
  176. "ldc %0, sr"
  177. : "=&r" (__dummy)
  178. : "r" (~SR_FD));
  179. }
  180. static __inline__ void release_fpu(struct pt_regs *regs)
  181. {
  182. regs->sr |= SR_FD;
  183. }
  184. static __inline__ void grab_fpu(struct pt_regs *regs)
  185. {
  186. regs->sr &= ~SR_FD;
  187. }
  188. #ifdef CONFIG_CPU_SH4
  189. extern void save_fpu(struct task_struct *__tsk, struct pt_regs *regs);
  190. #else
  191. #define save_fpu(tsk) do { } while (0)
  192. #endif
  193. #define unlazy_fpu(tsk, regs) do { \
  194. if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \
  195. save_fpu(tsk, regs); \
  196. } \
  197. } while (0)
  198. #define clear_fpu(tsk, regs) do { \
  199. if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \
  200. clear_tsk_thread_flag(tsk, TIF_USEDFPU); \
  201. release_fpu(regs); \
  202. } \
  203. } while (0)
  204. /* Double presision, NANS as NANS, rounding to nearest, no exceptions */
  205. #define FPSCR_INIT 0x00080000
  206. #define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */
  207. #define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */
  208. /*
  209. * Return saved PC of a blocked thread.
  210. */
  211. #define thread_saved_pc(tsk) (tsk->thread.pc)
  212. extern unsigned long get_wchan(struct task_struct *p);
  213. #define KSTK_EIP(tsk) ((tsk)->thread.pc)
  214. #define KSTK_ESP(tsk) ((tsk)->thread.sp)
  215. #define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory")
  216. #define cpu_relax() barrier()
  217. #endif /* __KERNEL__ */
  218. #endif /* __ASM_SH_PROCESSOR_H */