pmc551.c 29 KB

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  1. /*
  2. * $Id: pmc551.c,v 1.32 2005/11/07 11:14:25 gleixner Exp $
  3. *
  4. * PMC551 PCI Mezzanine Ram Device
  5. *
  6. * Author:
  7. * Mark Ferrell <mferrell@mvista.com>
  8. * Copyright 1999,2000 Nortel Networks
  9. *
  10. * License:
  11. * As part of this driver was derived from the slram.c driver it
  12. * falls under the same license, which is GNU General Public
  13. * License v2
  14. *
  15. * Description:
  16. * This driver is intended to support the PMC551 PCI Ram device
  17. * from Ramix Inc. The PMC551 is a PMC Mezzanine module for
  18. * cPCI embedded systems. The device contains a single SROM
  19. * that initially programs the V370PDC chipset onboard the
  20. * device, and various banks of DRAM/SDRAM onboard. This driver
  21. * implements this PCI Ram device as an MTD (Memory Technology
  22. * Device) so that it can be used to hold a file system, or for
  23. * added swap space in embedded systems. Since the memory on
  24. * this board isn't as fast as main memory we do not try to hook
  25. * it into main memory as that would simply reduce performance
  26. * on the system. Using it as a block device allows us to use
  27. * it as high speed swap or for a high speed disk device of some
  28. * sort. Which becomes very useful on diskless systems in the
  29. * embedded market I might add.
  30. *
  31. * Notes:
  32. * Due to what I assume is more buggy SROM, the 64M PMC551 I
  33. * have available claims that all 4 of it's DRAM banks have 64M
  34. * of ram configured (making a grand total of 256M onboard).
  35. * This is slightly annoying since the BAR0 size reflects the
  36. * aperture size, not the dram size, and the V370PDC supplies no
  37. * other method for memory size discovery. This problem is
  38. * mostly only relevant when compiled as a module, as the
  39. * unloading of the module with an aperture size smaller then
  40. * the ram will cause the driver to detect the onboard memory
  41. * size to be equal to the aperture size when the module is
  42. * reloaded. Soooo, to help, the module supports an msize
  43. * option to allow the specification of the onboard memory, and
  44. * an asize option, to allow the specification of the aperture
  45. * size. The aperture must be equal to or less then the memory
  46. * size, the driver will correct this if you screw it up. This
  47. * problem is not relevant for compiled in drivers as compiled
  48. * in drivers only init once.
  49. *
  50. * Credits:
  51. * Saeed Karamooz <saeed@ramix.com> of Ramix INC. for the
  52. * initial example code of how to initialize this device and for
  53. * help with questions I had concerning operation of the device.
  54. *
  55. * Most of the MTD code for this driver was originally written
  56. * for the slram.o module in the MTD drivers package which
  57. * allows the mapping of system memory into an MTD device.
  58. * Since the PMC551 memory module is accessed in the same
  59. * fashion as system memory, the slram.c code became a very nice
  60. * fit to the needs of this driver. All we added was PCI
  61. * detection/initialization to the driver and automatically figure
  62. * out the size via the PCI detection.o, later changes by Corey
  63. * Minyard set up the card to utilize a 1M sliding apature.
  64. *
  65. * Corey Minyard <minyard@nortelnetworks.com>
  66. * * Modified driver to utilize a sliding aperture instead of
  67. * mapping all memory into kernel space which turned out to
  68. * be very wasteful.
  69. * * Located a bug in the SROM's initialization sequence that
  70. * made the memory unusable, added a fix to code to touch up
  71. * the DRAM some.
  72. *
  73. * Bugs/FIXME's:
  74. * * MUST fix the init function to not spin on a register
  75. * waiting for it to set .. this does not safely handle busted
  76. * devices that never reset the register correctly which will
  77. * cause the system to hang w/ a reboot being the only chance at
  78. * recover. [sort of fixed, could be better]
  79. * * Add I2C handling of the SROM so we can read the SROM's information
  80. * about the aperture size. This should always accurately reflect the
  81. * onboard memory size.
  82. * * Comb the init routine. It's still a bit cludgy on a few things.
  83. */
  84. #include <linux/kernel.h>
  85. #include <linux/module.h>
  86. #include <asm/uaccess.h>
  87. #include <linux/types.h>
  88. #include <linux/sched.h>
  89. #include <linux/init.h>
  90. #include <linux/ptrace.h>
  91. #include <linux/slab.h>
  92. #include <linux/string.h>
  93. #include <linux/timer.h>
  94. #include <linux/major.h>
  95. #include <linux/fs.h>
  96. #include <linux/ioctl.h>
  97. #include <asm/io.h>
  98. #include <asm/system.h>
  99. #include <linux/pci.h>
  100. #ifndef CONFIG_PCI
  101. #error Enable PCI in your kernel config
  102. #endif
  103. #include <linux/mtd/mtd.h>
  104. #include <linux/mtd/pmc551.h>
  105. #include <linux/mtd/compatmac.h>
  106. static struct mtd_info *pmc551list;
  107. static int pmc551_erase (struct mtd_info *mtd, struct erase_info *instr)
  108. {
  109. struct mypriv *priv = mtd->priv;
  110. u32 soff_hi, soff_lo; /* start address offset hi/lo */
  111. u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
  112. unsigned long end;
  113. u_char *ptr;
  114. size_t retlen;
  115. #ifdef CONFIG_MTD_PMC551_DEBUG
  116. printk(KERN_DEBUG "pmc551_erase(pos:%ld, len:%ld)\n", (long)instr->addr, (long)instr->len);
  117. #endif
  118. end = instr->addr + instr->len - 1;
  119. /* Is it past the end? */
  120. if ( end > mtd->size ) {
  121. #ifdef CONFIG_MTD_PMC551_DEBUG
  122. printk(KERN_DEBUG "pmc551_erase() out of bounds (%ld > %ld)\n", (long)end, (long)mtd->size);
  123. #endif
  124. return -EINVAL;
  125. }
  126. eoff_hi = end & ~(priv->asize - 1);
  127. soff_hi = instr->addr & ~(priv->asize - 1);
  128. eoff_lo = end & (priv->asize - 1);
  129. soff_lo = instr->addr & (priv->asize - 1);
  130. pmc551_point (mtd, instr->addr, instr->len, &retlen, &ptr);
  131. if ( soff_hi == eoff_hi || mtd->size == priv->asize) {
  132. /* The whole thing fits within one access, so just one shot
  133. will do it. */
  134. memset(ptr, 0xff, instr->len);
  135. } else {
  136. /* We have to do multiple writes to get all the data
  137. written. */
  138. while (soff_hi != eoff_hi) {
  139. #ifdef CONFIG_MTD_PMC551_DEBUG
  140. printk( KERN_DEBUG "pmc551_erase() soff_hi: %ld, eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
  141. #endif
  142. memset(ptr, 0xff, priv->asize);
  143. if (soff_hi + priv->asize >= mtd->size) {
  144. goto out;
  145. }
  146. soff_hi += priv->asize;
  147. pmc551_point (mtd,(priv->base_map0|soff_hi),
  148. priv->asize, &retlen, &ptr);
  149. }
  150. memset (ptr, 0xff, eoff_lo);
  151. }
  152. out:
  153. instr->state = MTD_ERASE_DONE;
  154. #ifdef CONFIG_MTD_PMC551_DEBUG
  155. printk(KERN_DEBUG "pmc551_erase() done\n");
  156. #endif
  157. mtd_erase_callback(instr);
  158. return 0;
  159. }
  160. static int pmc551_point (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char **mtdbuf)
  161. {
  162. struct mypriv *priv = mtd->priv;
  163. u32 soff_hi;
  164. u32 soff_lo;
  165. #ifdef CONFIG_MTD_PMC551_DEBUG
  166. printk(KERN_DEBUG "pmc551_point(%ld, %ld)\n", (long)from, (long)len);
  167. #endif
  168. if (from + len > mtd->size) {
  169. #ifdef CONFIG_MTD_PMC551_DEBUG
  170. printk(KERN_DEBUG "pmc551_point() out of bounds (%ld > %ld)\n", (long)from+len, (long)mtd->size);
  171. #endif
  172. return -EINVAL;
  173. }
  174. soff_hi = from & ~(priv->asize - 1);
  175. soff_lo = from & (priv->asize - 1);
  176. /* Cheap hack optimization */
  177. if( priv->curr_map0 != from ) {
  178. pci_write_config_dword ( priv->dev, PMC551_PCI_MEM_MAP0,
  179. (priv->base_map0 | soff_hi) );
  180. priv->curr_map0 = soff_hi;
  181. }
  182. *mtdbuf = priv->start + soff_lo;
  183. *retlen = len;
  184. return 0;
  185. }
  186. static void pmc551_unpoint (struct mtd_info *mtd, u_char *addr, loff_t from, size_t len)
  187. {
  188. #ifdef CONFIG_MTD_PMC551_DEBUG
  189. printk(KERN_DEBUG "pmc551_unpoint()\n");
  190. #endif
  191. }
  192. static int pmc551_read (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
  193. {
  194. struct mypriv *priv = mtd->priv;
  195. u32 soff_hi, soff_lo; /* start address offset hi/lo */
  196. u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
  197. unsigned long end;
  198. u_char *ptr;
  199. u_char *copyto = buf;
  200. #ifdef CONFIG_MTD_PMC551_DEBUG
  201. printk(KERN_DEBUG "pmc551_read(pos:%ld, len:%ld) asize: %ld\n", (long)from, (long)len, (long)priv->asize);
  202. #endif
  203. end = from + len - 1;
  204. /* Is it past the end? */
  205. if (end > mtd->size) {
  206. #ifdef CONFIG_MTD_PMC551_DEBUG
  207. printk(KERN_DEBUG "pmc551_read() out of bounds (%ld > %ld)\n", (long) end, (long)mtd->size);
  208. #endif
  209. return -EINVAL;
  210. }
  211. soff_hi = from & ~(priv->asize - 1);
  212. eoff_hi = end & ~(priv->asize - 1);
  213. soff_lo = from & (priv->asize - 1);
  214. eoff_lo = end & (priv->asize - 1);
  215. pmc551_point (mtd, from, len, retlen, &ptr);
  216. if (soff_hi == eoff_hi) {
  217. /* The whole thing fits within one access, so just one shot
  218. will do it. */
  219. memcpy(copyto, ptr, len);
  220. copyto += len;
  221. } else {
  222. /* We have to do multiple writes to get all the data
  223. written. */
  224. while (soff_hi != eoff_hi) {
  225. #ifdef CONFIG_MTD_PMC551_DEBUG
  226. printk( KERN_DEBUG "pmc551_read() soff_hi: %ld, eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
  227. #endif
  228. memcpy(copyto, ptr, priv->asize);
  229. copyto += priv->asize;
  230. if (soff_hi + priv->asize >= mtd->size) {
  231. goto out;
  232. }
  233. soff_hi += priv->asize;
  234. pmc551_point (mtd, soff_hi, priv->asize, retlen, &ptr);
  235. }
  236. memcpy(copyto, ptr, eoff_lo);
  237. copyto += eoff_lo;
  238. }
  239. out:
  240. #ifdef CONFIG_MTD_PMC551_DEBUG
  241. printk(KERN_DEBUG "pmc551_read() done\n");
  242. #endif
  243. *retlen = copyto - buf;
  244. return 0;
  245. }
  246. static int pmc551_write (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf)
  247. {
  248. struct mypriv *priv = mtd->priv;
  249. u32 soff_hi, soff_lo; /* start address offset hi/lo */
  250. u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
  251. unsigned long end;
  252. u_char *ptr;
  253. const u_char *copyfrom = buf;
  254. #ifdef CONFIG_MTD_PMC551_DEBUG
  255. printk(KERN_DEBUG "pmc551_write(pos:%ld, len:%ld) asize:%ld\n", (long)to, (long)len, (long)priv->asize);
  256. #endif
  257. end = to + len - 1;
  258. /* Is it past the end? or did the u32 wrap? */
  259. if (end > mtd->size ) {
  260. #ifdef CONFIG_MTD_PMC551_DEBUG
  261. printk(KERN_DEBUG "pmc551_write() out of bounds (end: %ld, size: %ld, to: %ld)\n", (long) end, (long)mtd->size, (long)to);
  262. #endif
  263. return -EINVAL;
  264. }
  265. soff_hi = to & ~(priv->asize - 1);
  266. eoff_hi = end & ~(priv->asize - 1);
  267. soff_lo = to & (priv->asize - 1);
  268. eoff_lo = end & (priv->asize - 1);
  269. pmc551_point (mtd, to, len, retlen, &ptr);
  270. if (soff_hi == eoff_hi) {
  271. /* The whole thing fits within one access, so just one shot
  272. will do it. */
  273. memcpy(ptr, copyfrom, len);
  274. copyfrom += len;
  275. } else {
  276. /* We have to do multiple writes to get all the data
  277. written. */
  278. while (soff_hi != eoff_hi) {
  279. #ifdef CONFIG_MTD_PMC551_DEBUG
  280. printk( KERN_DEBUG "pmc551_write() soff_hi: %ld, eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
  281. #endif
  282. memcpy(ptr, copyfrom, priv->asize);
  283. copyfrom += priv->asize;
  284. if (soff_hi >= mtd->size) {
  285. goto out;
  286. }
  287. soff_hi += priv->asize;
  288. pmc551_point (mtd, soff_hi, priv->asize, retlen, &ptr);
  289. }
  290. memcpy(ptr, copyfrom, eoff_lo);
  291. copyfrom += eoff_lo;
  292. }
  293. out:
  294. #ifdef CONFIG_MTD_PMC551_DEBUG
  295. printk(KERN_DEBUG "pmc551_write() done\n");
  296. #endif
  297. *retlen = copyfrom - buf;
  298. return 0;
  299. }
  300. /*
  301. * Fixup routines for the V370PDC
  302. * PCI device ID 0x020011b0
  303. *
  304. * This function basicly kick starts the DRAM oboard the card and gets it
  305. * ready to be used. Before this is done the device reads VERY erratic, so
  306. * much that it can crash the Linux 2.2.x series kernels when a user cat's
  307. * /proc/pci .. though that is mainly a kernel bug in handling the PCI DEVSEL
  308. * register. FIXME: stop spinning on registers .. must implement a timeout
  309. * mechanism
  310. * returns the size of the memory region found.
  311. */
  312. static u32 fixup_pmc551 (struct pci_dev *dev)
  313. {
  314. #ifdef CONFIG_MTD_PMC551_BUGFIX
  315. u32 dram_data;
  316. #endif
  317. u32 size, dcmd, cfg, dtmp;
  318. u16 cmd, tmp, i;
  319. u8 bcmd, counter;
  320. /* Sanity Check */
  321. if(!dev) {
  322. return -ENODEV;
  323. }
  324. /*
  325. * Attempt to reset the card
  326. * FIXME: Stop Spinning registers
  327. */
  328. counter=0;
  329. /* unlock registers */
  330. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, 0xA5 );
  331. /* read in old data */
  332. pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd );
  333. /* bang the reset line up and down for a few */
  334. for(i=0;i<10;i++) {
  335. counter=0;
  336. bcmd &= ~0x80;
  337. while(counter++ < 100) {
  338. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
  339. }
  340. counter=0;
  341. bcmd |= 0x80;
  342. while(counter++ < 100) {
  343. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
  344. }
  345. }
  346. bcmd |= (0x40|0x20);
  347. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
  348. /*
  349. * Take care and turn off the memory on the device while we
  350. * tweak the configurations
  351. */
  352. pci_read_config_word(dev, PCI_COMMAND, &cmd);
  353. tmp = cmd & ~(PCI_COMMAND_IO|PCI_COMMAND_MEMORY);
  354. pci_write_config_word(dev, PCI_COMMAND, tmp);
  355. /*
  356. * Disable existing aperture before probing memory size
  357. */
  358. pci_read_config_dword(dev, PMC551_PCI_MEM_MAP0, &dcmd);
  359. dtmp=(dcmd|PMC551_PCI_MEM_MAP_ENABLE|PMC551_PCI_MEM_MAP_REG_EN);
  360. pci_write_config_dword(dev, PMC551_PCI_MEM_MAP0, dtmp);
  361. /*
  362. * Grab old BAR0 config so that we can figure out memory size
  363. * This is another bit of kludge going on. The reason for the
  364. * redundancy is I am hoping to retain the original configuration
  365. * previously assigned to the card by the BIOS or some previous
  366. * fixup routine in the kernel. So we read the old config into cfg,
  367. * then write all 1's to the memory space, read back the result into
  368. * "size", and then write back all the old config.
  369. */
  370. pci_read_config_dword( dev, PCI_BASE_ADDRESS_0, &cfg );
  371. #ifndef CONFIG_MTD_PMC551_BUGFIX
  372. pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, ~0 );
  373. pci_read_config_dword( dev, PCI_BASE_ADDRESS_0, &size );
  374. size = (size&PCI_BASE_ADDRESS_MEM_MASK);
  375. size &= ~(size-1);
  376. pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, cfg );
  377. #else
  378. /*
  379. * Get the size of the memory by reading all the DRAM size values
  380. * and adding them up.
  381. *
  382. * KLUDGE ALERT: the boards we are using have invalid column and
  383. * row mux values. We fix them here, but this will break other
  384. * memory configurations.
  385. */
  386. pci_read_config_dword(dev, PMC551_DRAM_BLK0, &dram_data);
  387. size = PMC551_DRAM_BLK_GET_SIZE(dram_data);
  388. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  389. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  390. pci_write_config_dword(dev, PMC551_DRAM_BLK0, dram_data);
  391. pci_read_config_dword(dev, PMC551_DRAM_BLK1, &dram_data);
  392. size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
  393. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  394. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  395. pci_write_config_dword(dev, PMC551_DRAM_BLK1, dram_data);
  396. pci_read_config_dword(dev, PMC551_DRAM_BLK2, &dram_data);
  397. size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
  398. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  399. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  400. pci_write_config_dword(dev, PMC551_DRAM_BLK2, dram_data);
  401. pci_read_config_dword(dev, PMC551_DRAM_BLK3, &dram_data);
  402. size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
  403. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  404. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  405. pci_write_config_dword(dev, PMC551_DRAM_BLK3, dram_data);
  406. /*
  407. * Oops .. something went wrong
  408. */
  409. if( (size &= PCI_BASE_ADDRESS_MEM_MASK) == 0) {
  410. return -ENODEV;
  411. }
  412. #endif /* CONFIG_MTD_PMC551_BUGFIX */
  413. if ((cfg&PCI_BASE_ADDRESS_SPACE) != PCI_BASE_ADDRESS_SPACE_MEMORY) {
  414. return -ENODEV;
  415. }
  416. /*
  417. * Precharge Dram
  418. */
  419. pci_write_config_word( dev, PMC551_SDRAM_MA, 0x0400 );
  420. pci_write_config_word( dev, PMC551_SDRAM_CMD, 0x00bf );
  421. /*
  422. * Wait until command has gone through
  423. * FIXME: register spinning issue
  424. */
  425. do { pci_read_config_word( dev, PMC551_SDRAM_CMD, &cmd );
  426. if(counter++ > 100)break;
  427. } while ( (PCI_COMMAND_IO) & cmd );
  428. /*
  429. * Turn on auto refresh
  430. * The loop is taken directly from Ramix's example code. I assume that
  431. * this must be held high for some duration of time, but I can find no
  432. * documentation refrencing the reasons why.
  433. */
  434. for ( i = 1; i<=8 ; i++) {
  435. pci_write_config_word (dev, PMC551_SDRAM_CMD, 0x0df);
  436. /*
  437. * Make certain command has gone through
  438. * FIXME: register spinning issue
  439. */
  440. counter=0;
  441. do { pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
  442. if(counter++ > 100)break;
  443. } while ( (PCI_COMMAND_IO) & cmd );
  444. }
  445. pci_write_config_word ( dev, PMC551_SDRAM_MA, 0x0020);
  446. pci_write_config_word ( dev, PMC551_SDRAM_CMD, 0x0ff);
  447. /*
  448. * Wait until command completes
  449. * FIXME: register spinning issue
  450. */
  451. counter=0;
  452. do { pci_read_config_word ( dev, PMC551_SDRAM_CMD, &cmd);
  453. if(counter++ > 100)break;
  454. } while ( (PCI_COMMAND_IO) & cmd );
  455. pci_read_config_dword ( dev, PMC551_DRAM_CFG, &dcmd);
  456. dcmd |= 0x02000000;
  457. pci_write_config_dword ( dev, PMC551_DRAM_CFG, dcmd);
  458. /*
  459. * Check to make certain fast back-to-back, if not
  460. * then set it so
  461. */
  462. pci_read_config_word( dev, PCI_STATUS, &cmd);
  463. if((cmd&PCI_COMMAND_FAST_BACK) == 0) {
  464. cmd |= PCI_COMMAND_FAST_BACK;
  465. pci_write_config_word( dev, PCI_STATUS, cmd);
  466. }
  467. /*
  468. * Check to make certain the DEVSEL is set correctly, this device
  469. * has a tendancy to assert DEVSEL and TRDY when a write is performed
  470. * to the memory when memory is read-only
  471. */
  472. if((cmd&PCI_STATUS_DEVSEL_MASK) != 0x0) {
  473. cmd &= ~PCI_STATUS_DEVSEL_MASK;
  474. pci_write_config_word( dev, PCI_STATUS, cmd );
  475. }
  476. /*
  477. * Set to be prefetchable and put everything back based on old cfg.
  478. * it's possible that the reset of the V370PDC nuked the original
  479. * setup
  480. */
  481. /*
  482. cfg |= PCI_BASE_ADDRESS_MEM_PREFETCH;
  483. pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, cfg );
  484. */
  485. /*
  486. * Turn PCI memory and I/O bus access back on
  487. */
  488. pci_write_config_word( dev, PCI_COMMAND,
  489. PCI_COMMAND_MEMORY | PCI_COMMAND_IO );
  490. #ifdef CONFIG_MTD_PMC551_DEBUG
  491. /*
  492. * Some screen fun
  493. */
  494. printk(KERN_DEBUG "pmc551: %d%c (0x%x) of %sprefetchable memory at 0x%llx\n",
  495. (size<1024)?size:(size<1048576)?size>>10:size>>20,
  496. (size<1024)?'B':(size<1048576)?'K':'M',
  497. size, ((dcmd&(0x1<<3)) == 0)?"non-":"",
  498. (unsigned long long)((dev->resource[0].start)&PCI_BASE_ADDRESS_MEM_MASK));
  499. /*
  500. * Check to see the state of the memory
  501. */
  502. pci_read_config_dword( dev, PMC551_DRAM_BLK0, &dcmd );
  503. printk(KERN_DEBUG "pmc551: DRAM_BLK0 Flags: %s,%s\n"
  504. "pmc551: DRAM_BLK0 Size: %d at %d\n"
  505. "pmc551: DRAM_BLK0 Row MUX: %d, Col MUX: %d\n",
  506. (((0x1<<1)&dcmd) == 0)?"RW":"RO",
  507. (((0x1<<0)&dcmd) == 0)?"Off":"On",
  508. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  509. ((dcmd>>20)&0x7FF), ((dcmd>>13)&0x7), ((dcmd>>9)&0xF) );
  510. pci_read_config_dword( dev, PMC551_DRAM_BLK1, &dcmd );
  511. printk(KERN_DEBUG "pmc551: DRAM_BLK1 Flags: %s,%s\n"
  512. "pmc551: DRAM_BLK1 Size: %d at %d\n"
  513. "pmc551: DRAM_BLK1 Row MUX: %d, Col MUX: %d\n",
  514. (((0x1<<1)&dcmd) == 0)?"RW":"RO",
  515. (((0x1<<0)&dcmd) == 0)?"Off":"On",
  516. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  517. ((dcmd>>20)&0x7FF), ((dcmd>>13)&0x7), ((dcmd>>9)&0xF) );
  518. pci_read_config_dword( dev, PMC551_DRAM_BLK2, &dcmd );
  519. printk(KERN_DEBUG "pmc551: DRAM_BLK2 Flags: %s,%s\n"
  520. "pmc551: DRAM_BLK2 Size: %d at %d\n"
  521. "pmc551: DRAM_BLK2 Row MUX: %d, Col MUX: %d\n",
  522. (((0x1<<1)&dcmd) == 0)?"RW":"RO",
  523. (((0x1<<0)&dcmd) == 0)?"Off":"On",
  524. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  525. ((dcmd>>20)&0x7FF), ((dcmd>>13)&0x7), ((dcmd>>9)&0xF) );
  526. pci_read_config_dword( dev, PMC551_DRAM_BLK3, &dcmd );
  527. printk(KERN_DEBUG "pmc551: DRAM_BLK3 Flags: %s,%s\n"
  528. "pmc551: DRAM_BLK3 Size: %d at %d\n"
  529. "pmc551: DRAM_BLK3 Row MUX: %d, Col MUX: %d\n",
  530. (((0x1<<1)&dcmd) == 0)?"RW":"RO",
  531. (((0x1<<0)&dcmd) == 0)?"Off":"On",
  532. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  533. ((dcmd>>20)&0x7FF), ((dcmd>>13)&0x7), ((dcmd>>9)&0xF) );
  534. pci_read_config_word( dev, PCI_COMMAND, &cmd );
  535. printk( KERN_DEBUG "pmc551: Memory Access %s\n",
  536. (((0x1<<1)&cmd) == 0)?"off":"on" );
  537. printk( KERN_DEBUG "pmc551: I/O Access %s\n",
  538. (((0x1<<0)&cmd) == 0)?"off":"on" );
  539. pci_read_config_word( dev, PCI_STATUS, &cmd );
  540. printk( KERN_DEBUG "pmc551: Devsel %s\n",
  541. ((PCI_STATUS_DEVSEL_MASK&cmd)==0x000)?"Fast":
  542. ((PCI_STATUS_DEVSEL_MASK&cmd)==0x200)?"Medium":
  543. ((PCI_STATUS_DEVSEL_MASK&cmd)==0x400)?"Slow":"Invalid" );
  544. printk( KERN_DEBUG "pmc551: %sFast Back-to-Back\n",
  545. ((PCI_COMMAND_FAST_BACK&cmd) == 0)?"Not ":"" );
  546. pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd );
  547. printk( KERN_DEBUG "pmc551: EEPROM is under %s control\n"
  548. "pmc551: System Control Register is %slocked to PCI access\n"
  549. "pmc551: System Control Register is %slocked to EEPROM access\n",
  550. (bcmd&0x1)?"software":"hardware",
  551. (bcmd&0x20)?"":"un", (bcmd&0x40)?"":"un");
  552. #endif
  553. return size;
  554. }
  555. /*
  556. * Kernel version specific module stuffages
  557. */
  558. MODULE_LICENSE("GPL");
  559. MODULE_AUTHOR("Mark Ferrell <mferrell@mvista.com>");
  560. MODULE_DESCRIPTION(PMC551_VERSION);
  561. /*
  562. * Stuff these outside the ifdef so as to not bust compiled in driver support
  563. */
  564. static int msize=0;
  565. #if defined(CONFIG_MTD_PMC551_APERTURE_SIZE)
  566. static int asize=CONFIG_MTD_PMC551_APERTURE_SIZE
  567. #else
  568. static int asize=0;
  569. #endif
  570. module_param(msize, int, 0);
  571. MODULE_PARM_DESC(msize, "memory size in Megabytes [1 - 1024]");
  572. module_param(asize, int, 0);
  573. MODULE_PARM_DESC(asize, "aperture size, must be <= memsize [1-1024]");
  574. /*
  575. * PMC551 Card Initialization
  576. */
  577. static int __init init_pmc551(void)
  578. {
  579. struct pci_dev *PCI_Device = NULL;
  580. struct mypriv *priv;
  581. int count, found=0;
  582. struct mtd_info *mtd;
  583. u32 length = 0;
  584. if(msize) {
  585. msize = (1 << (ffs(msize) - 1))<<20;
  586. if (msize > (1<<30)) {
  587. printk(KERN_NOTICE "pmc551: Invalid memory size [%d]\n", msize);
  588. return -EINVAL;
  589. }
  590. }
  591. if(asize) {
  592. asize = (1 << (ffs(asize) - 1))<<20;
  593. if (asize > (1<<30) ) {
  594. printk(KERN_NOTICE "pmc551: Invalid aperture size [%d]\n", asize);
  595. return -EINVAL;
  596. }
  597. }
  598. printk(KERN_INFO PMC551_VERSION);
  599. /*
  600. * PCU-bus chipset probe.
  601. */
  602. for( count = 0; count < MAX_MTD_DEVICES; count++ ) {
  603. if ((PCI_Device = pci_find_device(PCI_VENDOR_ID_V3_SEMI,
  604. PCI_DEVICE_ID_V3_SEMI_V370PDC,
  605. PCI_Device ) ) == NULL) {
  606. break;
  607. }
  608. printk(KERN_NOTICE "pmc551: Found PCI V370PDC at 0x%llx\n",
  609. (unsigned long long)PCI_Device->resource[0].start);
  610. /*
  611. * The PMC551 device acts VERY weird if you don't init it
  612. * first. i.e. it will not correctly report devsel. If for
  613. * some reason the sdram is in a wrote-protected state the
  614. * device will DEVSEL when it is written to causing problems
  615. * with the oldproc.c driver in
  616. * some kernels (2.2.*)
  617. */
  618. if((length = fixup_pmc551(PCI_Device)) <= 0) {
  619. printk(KERN_NOTICE "pmc551: Cannot init SDRAM\n");
  620. break;
  621. }
  622. /*
  623. * This is needed until the driver is capable of reading the
  624. * onboard I2C SROM to discover the "real" memory size.
  625. */
  626. if(msize) {
  627. length = msize;
  628. printk(KERN_NOTICE "pmc551: Using specified memory size 0x%x\n", length);
  629. } else {
  630. msize = length;
  631. }
  632. mtd = kmalloc(sizeof(struct mtd_info), GFP_KERNEL);
  633. if (!mtd) {
  634. printk(KERN_NOTICE "pmc551: Cannot allocate new MTD device.\n");
  635. break;
  636. }
  637. memset(mtd, 0, sizeof(struct mtd_info));
  638. priv = kmalloc (sizeof(struct mypriv), GFP_KERNEL);
  639. if (!priv) {
  640. printk(KERN_NOTICE "pmc551: Cannot allocate new MTD device.\n");
  641. kfree(mtd);
  642. break;
  643. }
  644. memset(priv, 0, sizeof(*priv));
  645. mtd->priv = priv;
  646. priv->dev = PCI_Device;
  647. if(asize > length) {
  648. printk(KERN_NOTICE "pmc551: reducing aperture size to fit %dM\n",length>>20);
  649. priv->asize = asize = length;
  650. } else if (asize == 0 || asize == length) {
  651. printk(KERN_NOTICE "pmc551: Using existing aperture size %dM\n", length>>20);
  652. priv->asize = asize = length;
  653. } else {
  654. printk(KERN_NOTICE "pmc551: Using specified aperture size %dM\n", asize>>20);
  655. priv->asize = asize;
  656. }
  657. priv->start = ioremap(((PCI_Device->resource[0].start)
  658. & PCI_BASE_ADDRESS_MEM_MASK),
  659. priv->asize);
  660. if (!priv->start) {
  661. printk(KERN_NOTICE "pmc551: Unable to map IO space\n");
  662. kfree(mtd->priv);
  663. kfree(mtd);
  664. break;
  665. }
  666. #ifdef CONFIG_MTD_PMC551_DEBUG
  667. printk( KERN_DEBUG "pmc551: setting aperture to %d\n",
  668. ffs(priv->asize>>20)-1);
  669. #endif
  670. priv->base_map0 = ( PMC551_PCI_MEM_MAP_REG_EN
  671. | PMC551_PCI_MEM_MAP_ENABLE
  672. | (ffs(priv->asize>>20)-1)<<4 );
  673. priv->curr_map0 = priv->base_map0;
  674. pci_write_config_dword ( priv->dev, PMC551_PCI_MEM_MAP0,
  675. priv->curr_map0 );
  676. #ifdef CONFIG_MTD_PMC551_DEBUG
  677. printk( KERN_DEBUG "pmc551: aperture set to %d\n",
  678. (priv->base_map0 & 0xF0)>>4 );
  679. #endif
  680. mtd->size = msize;
  681. mtd->flags = MTD_CAP_RAM;
  682. mtd->erase = pmc551_erase;
  683. mtd->read = pmc551_read;
  684. mtd->write = pmc551_write;
  685. mtd->point = pmc551_point;
  686. mtd->unpoint = pmc551_unpoint;
  687. mtd->type = MTD_RAM;
  688. mtd->name = "PMC551 RAM board";
  689. mtd->erasesize = 0x10000;
  690. mtd->writesize = 1;
  691. mtd->owner = THIS_MODULE;
  692. if (add_mtd_device(mtd)) {
  693. printk(KERN_NOTICE "pmc551: Failed to register new device\n");
  694. iounmap(priv->start);
  695. kfree(mtd->priv);
  696. kfree(mtd);
  697. break;
  698. }
  699. printk(KERN_NOTICE "Registered pmc551 memory device.\n");
  700. printk(KERN_NOTICE "Mapped %dM of memory from 0x%p to 0x%p\n",
  701. priv->asize>>20,
  702. priv->start,
  703. priv->start + priv->asize);
  704. printk(KERN_NOTICE "Total memory is %d%c\n",
  705. (length<1024)?length:
  706. (length<1048576)?length>>10:length>>20,
  707. (length<1024)?'B':(length<1048576)?'K':'M');
  708. priv->nextpmc551 = pmc551list;
  709. pmc551list = mtd;
  710. found++;
  711. }
  712. if( !pmc551list ) {
  713. printk(KERN_NOTICE "pmc551: not detected\n");
  714. return -ENODEV;
  715. } else {
  716. printk(KERN_NOTICE "pmc551: %d pmc551 devices loaded\n", found);
  717. return 0;
  718. }
  719. }
  720. /*
  721. * PMC551 Card Cleanup
  722. */
  723. static void __exit cleanup_pmc551(void)
  724. {
  725. int found=0;
  726. struct mtd_info *mtd;
  727. struct mypriv *priv;
  728. while((mtd=pmc551list)) {
  729. priv = mtd->priv;
  730. pmc551list = priv->nextpmc551;
  731. if(priv->start) {
  732. printk (KERN_DEBUG "pmc551: unmapping %dM starting at 0x%p\n",
  733. priv->asize>>20, priv->start);
  734. iounmap (priv->start);
  735. }
  736. kfree (mtd->priv);
  737. del_mtd_device (mtd);
  738. kfree (mtd);
  739. found++;
  740. }
  741. printk(KERN_NOTICE "pmc551: %d pmc551 devices unloaded\n", found);
  742. }
  743. module_init(init_pmc551);
  744. module_exit(cleanup_pmc551);