head31.S 8.6 KB

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  1. /*
  2. * arch/s390/kernel/head31.S
  3. *
  4. * Copyright (C) IBM Corp. 2005,2006
  5. *
  6. * Author(s): Hartmut Penner <hp@de.ibm.com>
  7. * Martin Schwidefsky <schwidefsky@de.ibm.com>
  8. * Rob van der Heij <rvdhei@iae.nl>
  9. * Heiko Carstens <heiko.carstens@de.ibm.com>
  10. *
  11. */
  12. #
  13. # startup-code at 0x10000, running in absolute addressing mode
  14. # this is called either by the ipl loader or directly by PSW restart
  15. # or linload or SALIPL
  16. #
  17. .org 0x10000
  18. startup:basr %r13,0 # get base
  19. .LPG0: l %r13,0f-.LPG0(%r13)
  20. b 0(%r13)
  21. 0: .long startup_continue
  22. #
  23. # params at 10400 (setup.h)
  24. #
  25. .org PARMAREA
  26. .long 0,0 # IPL_DEVICE
  27. .long 0,RAMDISK_ORIGIN # INITRD_START
  28. .long 0,RAMDISK_SIZE # INITRD_SIZE
  29. .org COMMAND_LINE
  30. .byte "root=/dev/ram0 ro"
  31. .byte 0
  32. .org 0x11000
  33. startup_continue:
  34. basr %r13,0 # get base
  35. .LPG1: GET_IPL_DEVICE
  36. lctl %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
  37. l %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area
  38. # move IPL device to lowcore
  39. mvc __LC_IPLDEV(4),IPL_DEVICE-PARMAREA(%r12)
  40. #
  41. # clear bss memory
  42. #
  43. l %r2,.Lbss_bgn-.LPG1(%r13) # start of bss
  44. l %r3,.Lbss_end-.LPG1(%r13) # end of bss
  45. sr %r3,%r2 # length of bss
  46. sr %r4,%r4
  47. sr %r5,%r5 # set src,length and pad to zero
  48. sr %r0,%r0
  49. mvcle %r2,%r4,0 # clear mem
  50. jo .-4 # branch back, if not finish
  51. l %r2,.Lrcp-.LPG1(%r13) # Read SCP forced command word
  52. .Lservicecall:
  53. stosm .Lpmask-.LPG1(%r13),0x01 # authorize ext interrupts
  54. stctl %r0, %r0,.Lcr-.LPG1(%r13) # get cr0
  55. la %r1,0x200 # set bit 22
  56. o %r1,.Lcr-.LPG1(%r13) # or old cr0 with r1
  57. st %r1,.Lcr-.LPG1(%r13)
  58. lctl %r0, %r0,.Lcr-.LPG1(%r13) # load modified cr0
  59. mvc __LC_EXT_NEW_PSW(8),.Lpcext-.LPG1(%r13) # set postcall psw
  60. la %r1, .Lsclph-.LPG1(%r13)
  61. a %r1,__LC_EXT_NEW_PSW+4 # set handler
  62. st %r1,__LC_EXT_NEW_PSW+4
  63. l %r4,.Lsccbaddr-.LPG1(%r13) # %r4 is our index for sccb stuff
  64. lr %r1,%r4 # our sccb
  65. .insn rre,0xb2200000,%r2,%r1 # service call
  66. ipm %r1
  67. srl %r1,28 # get cc code
  68. xr %r3, %r3
  69. chi %r1,3
  70. be .Lfchunk-.LPG1(%r13) # leave
  71. chi %r1,2
  72. be .Lservicecall-.LPG1(%r13)
  73. lpsw .Lwaitsclp-.LPG1(%r13)
  74. .Lsclph:
  75. lh %r1,.Lsccbr-.Lsccb(%r4)
  76. chi %r1,0x10 # 0x0010 is the sucess code
  77. je .Lprocsccb # let's process the sccb
  78. chi %r1,0x1f0
  79. bne .Lfchunk-.LPG1(%r13) # unhandled error code
  80. c %r2, .Lrcp-.LPG1(%r13) # Did we try Read SCP forced
  81. bne .Lfchunk-.LPG1(%r13) # if no, give up
  82. l %r2, .Lrcp2-.LPG1(%r13) # try with Read SCP
  83. b .Lservicecall-.LPG1(%r13)
  84. .Lprocsccb:
  85. lhi %r1,0
  86. icm %r1,3,.Lscpincr1-.Lsccb(%r4) # use this one if != 0
  87. jnz .Lscnd
  88. lhi %r1,0x800 # otherwise report 2GB
  89. .Lscnd:
  90. lhi %r3,0x800 # limit reported memory size to 2GB
  91. cr %r1,%r3
  92. jl .Lno2gb
  93. lr %r1,%r3
  94. .Lno2gb:
  95. xr %r3,%r3 # same logic
  96. ic %r3,.Lscpa1-.Lsccb(%r4)
  97. chi %r3,0x00
  98. jne .Lcompmem
  99. l %r3,.Lscpa2-.Lsccb(%r4)
  100. .Lcompmem:
  101. mr %r2,%r1 # mem in MB on 128-bit
  102. l %r1,.Lonemb-.LPG1(%r13)
  103. mr %r2,%r1 # mem size in bytes in %r3
  104. b .Lfchunk-.LPG1(%r13)
  105. .align 4
  106. .Lpmask:
  107. .byte 0
  108. .align 8
  109. .Lpcext:.long 0x00080000,0x80000000
  110. .Lcr:
  111. .long 0x00 # place holder for cr0
  112. .Lwaitsclp:
  113. .long 0x010a0000,0x80000000 + .Lsclph
  114. .Lrcp:
  115. .int 0x00120001 # Read SCP forced code
  116. .Lrcp2:
  117. .int 0x00020001 # Read SCP code
  118. .Lonemb:
  119. .int 0x100000
  120. .Lfchunk:
  121. #
  122. # find memory chunks.
  123. #
  124. lr %r9,%r3 # end of mem
  125. mvc __LC_PGM_NEW_PSW(8),.Lpcmem-.LPG1(%r13)
  126. la %r1,1 # test in increments of 128KB
  127. sll %r1,17
  128. l %r3,.Lmchunk-.LPG1(%r13) # get pointer to memory_chunk array
  129. slr %r4,%r4 # set start of chunk to zero
  130. slr %r5,%r5 # set end of chunk to zero
  131. slr %r6,%r6 # set access code to zero
  132. la %r10, MEMORY_CHUNKS # number of chunks
  133. .Lloop:
  134. tprot 0(%r5),0 # test protection of first byte
  135. ipm %r7
  136. srl %r7,28
  137. clr %r6,%r7 # compare cc with last access code
  138. be .Lsame-.LPG1(%r13)
  139. b .Lchkmem-.LPG1(%r13)
  140. .Lsame:
  141. ar %r5,%r1 # add 128KB to end of chunk
  142. bno .Lloop-.LPG1(%r13) # r1 < 0x80000000 -> loop
  143. .Lchkmem: # > 2GB or tprot got a program check
  144. clr %r4,%r5 # chunk size > 0?
  145. be .Lchkloop-.LPG1(%r13)
  146. st %r4,0(%r3) # store start address of chunk
  147. lr %r0,%r5
  148. slr %r0,%r4
  149. st %r0,4(%r3) # store size of chunk
  150. st %r6,8(%r3) # store type of chunk
  151. la %r3,12(%r3)
  152. l %r4,.Lmemsize-.LPG1(%r13) # address of variable memory_size
  153. st %r5,0(%r4) # store last end to memory size
  154. ahi %r10,-1 # update chunk number
  155. .Lchkloop:
  156. lr %r6,%r7 # set access code to last cc
  157. # we got an exception or we're starting a new
  158. # chunk , we must check if we should
  159. # still try to find valid memory (if we detected
  160. # the amount of available storage), and if we
  161. # have chunks left
  162. xr %r0,%r0
  163. clr %r0,%r9 # did we detect memory?
  164. je .Ldonemem # if not, leave
  165. chi %r10,0 # do we have chunks left?
  166. je .Ldonemem
  167. alr %r5,%r1 # add 128KB to end of chunk
  168. lr %r4,%r5 # potential new chunk
  169. clr %r5,%r9 # should we go on?
  170. jl .Lloop
  171. .Ldonemem:
  172. l %r12,.Lmflags-.LPG1(%r13) # get address of machine_flags
  173. #
  174. # find out if we are running under VM
  175. #
  176. stidp __LC_CPUID # store cpuid
  177. tm __LC_CPUID,0xff # running under VM ?
  178. bno .Lnovm-.LPG1(%r13)
  179. oi 3(%r12),1 # set VM flag
  180. .Lnovm:
  181. lh %r0,__LC_CPUID+4 # get cpu version
  182. chi %r0,0x7490 # running on a P/390 ?
  183. bne .Lnop390-.LPG1(%r13)
  184. oi 3(%r12),4 # set P/390 flag
  185. .Lnop390:
  186. #
  187. # find out if we have an IEEE fpu
  188. #
  189. mvc __LC_PGM_NEW_PSW(8),.Lpcfpu-.LPG1(%r13)
  190. efpc %r0,0 # test IEEE extract fpc instruction
  191. oi 3(%r12),2 # set IEEE fpu flag
  192. .Lchkfpu:
  193. #
  194. # find out if we have the CSP instruction
  195. #
  196. mvc __LC_PGM_NEW_PSW(8),.Lpccsp-.LPG1(%r13)
  197. la %r0,0
  198. lr %r1,%r0
  199. la %r2,4
  200. csp %r0,%r2 # Test CSP instruction
  201. oi 3(%r12),8 # set CSP flag
  202. .Lchkcsp:
  203. #
  204. # find out if we have the MVPG instruction
  205. #
  206. mvc __LC_PGM_NEW_PSW(8),.Lpcmvpg-.LPG1(%r13)
  207. sr %r0,%r0
  208. la %r1,0
  209. la %r2,0
  210. mvpg %r1,%r2 # Test CSP instruction
  211. oi 3(%r12),16 # set MVPG flag
  212. .Lchkmvpg:
  213. #
  214. # find out if we have the IDTE instruction
  215. #
  216. mvc __LC_PGM_NEW_PSW(8),.Lpcidte-.LPG1(%r13)
  217. .long 0xb2b10000 # store facility list
  218. tm 0xc8,0x08 # check bit for clearing-by-ASCE
  219. bno .Lchkidte-.LPG1(%r13)
  220. lhi %r1,2094
  221. lhi %r2,0
  222. .long 0xb98e2001
  223. oi 3(%r12),0x80 # set IDTE flag
  224. .Lchkidte:
  225. lpsw .Lentry-.LPG1(13) # jump to _stext in primary-space,
  226. # virtual and never return ...
  227. .align 8
  228. .Lentry:.long 0x00080000,0x80000000 + _stext
  229. .Lctl: .long 0x04b50002 # cr0: various things
  230. .long 0 # cr1: primary space segment table
  231. .long .Lduct # cr2: dispatchable unit control table
  232. .long 0 # cr3: instruction authorization
  233. .long 0 # cr4: instruction authorization
  234. .long 0xffffffff # cr5: primary-aste origin
  235. .long 0 # cr6: I/O interrupts
  236. .long 0 # cr7: secondary space segment table
  237. .long 0 # cr8: access registers translation
  238. .long 0 # cr9: tracing off
  239. .long 0 # cr10: tracing off
  240. .long 0 # cr11: tracing off
  241. .long 0 # cr12: tracing off
  242. .long 0 # cr13: home space segment table
  243. .long 0xc0000000 # cr14: machine check handling off
  244. .long 0 # cr15: linkage stack operations
  245. .Lduct: .long 0,0,0,0,0,0,0,0
  246. .long 0,0,0,0,0,0,0,0
  247. .Lpcmem:.long 0x00080000,0x80000000 + .Lchkmem
  248. .Lpcfpu:.long 0x00080000,0x80000000 + .Lchkfpu
  249. .Lpccsp:.long 0x00080000,0x80000000 + .Lchkcsp
  250. .Lpcmvpg:.long 0x00080000,0x80000000 + .Lchkmvpg
  251. .Lpcidte:.long 0x00080000,0x80000000 + .Lchkidte
  252. .Lmemsize:.long memory_size
  253. .Lmchunk:.long memory_chunk
  254. .Lmflags:.long machine_flags
  255. .Lbss_bgn: .long __bss_start
  256. .Lbss_end: .long _end
  257. .Lparmaddr: .long PARMAREA
  258. .Lsccbaddr: .long .Lsccb
  259. .org 0x12000
  260. .Lsccb:
  261. .hword 0x1000 # length, one page
  262. .byte 0x00,0x00,0x00
  263. .byte 0x80 # variable response bit set
  264. .Lsccbr:
  265. .hword 0x00 # response code
  266. .Lscpincr1:
  267. .hword 0x00
  268. .Lscpa1:
  269. .byte 0x00
  270. .fill 89,1,0
  271. .Lscpa2:
  272. .int 0x00
  273. .Lscpincr2:
  274. .quad 0x00
  275. .fill 3984,1,0
  276. .org 0x13000
  277. #ifdef CONFIG_SHARED_KERNEL
  278. .org 0x100000
  279. #endif
  280. #
  281. # startup-code, running in absolute addressing mode
  282. #
  283. .globl _stext
  284. _stext: basr %r13,0 # get base
  285. .LPG3:
  286. #
  287. # Setup stack
  288. #
  289. l %r15,.Linittu-.LPG3(%r13)
  290. mvc __LC_CURRENT(4),__TI_task(%r15)
  291. ahi %r15,1<<(PAGE_SHIFT+THREAD_ORDER) # init_task_union+THREAD_SIZE
  292. st %r15,__LC_KERNEL_STACK # set end of kernel stack
  293. ahi %r15,-96
  294. xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear backchain
  295. # check control registers
  296. stctl %c0,%c15,0(%r15)
  297. oi 2(%r15),0x40 # enable sigp emergency signal
  298. oi 0(%r15),0x10 # switch on low address protection
  299. lctl %c0,%c15,0(%r15)
  300. #
  301. lam 0,15,.Laregs-.LPG3(%r13) # load access regs needed by uaccess
  302. l %r14,.Lstart-.LPG3(%r13)
  303. basr %r14,%r14 # call start_kernel
  304. #
  305. # We returned from start_kernel ?!? PANIK
  306. #
  307. basr %r13,0
  308. lpsw .Ldw-.(%r13) # load disabled wait psw
  309. #
  310. .align 8
  311. .Ldw: .long 0x000a0000,0x00000000
  312. .Linittu:.long init_thread_union
  313. .Lstart:.long start_kernel
  314. .Laregs:.long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0