grumain.c 25 KB

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  1. /*
  2. * SN Platform GRU Driver
  3. *
  4. * DRIVER TABLE MANAGER + GRU CONTEXT LOAD/UNLOAD
  5. *
  6. * Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. */
  22. #include <linux/kernel.h>
  23. #include <linux/slab.h>
  24. #include <linux/mm.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/sched.h>
  27. #include <linux/device.h>
  28. #include <linux/list.h>
  29. #include <linux/err.h>
  30. #include <asm/uv/uv_hub.h>
  31. #include "gru.h"
  32. #include "grutables.h"
  33. #include "gruhandles.h"
  34. unsigned long gru_options __read_mostly;
  35. static struct device_driver gru_driver = {
  36. .name = "gru"
  37. };
  38. static struct device gru_device = {
  39. .init_name = "",
  40. .driver = &gru_driver,
  41. };
  42. struct device *grudev = &gru_device;
  43. /*
  44. * Select a gru fault map to be used by the current cpu. Note that
  45. * multiple cpus may be using the same map.
  46. * ZZZ should be inline but did not work on emulator
  47. */
  48. int gru_cpu_fault_map_id(void)
  49. {
  50. int cpu = smp_processor_id();
  51. int id, core;
  52. core = uv_cpu_core_number(cpu);
  53. id = core + UV_MAX_INT_CORES * uv_cpu_socket_number(cpu);
  54. return id;
  55. }
  56. /*--------- ASID Management -------------------------------------------
  57. *
  58. * Initially, assign asids sequentially from MIN_ASID .. MAX_ASID.
  59. * Once MAX is reached, flush the TLB & start over. However,
  60. * some asids may still be in use. There won't be many (percentage wise) still
  61. * in use. Search active contexts & determine the value of the first
  62. * asid in use ("x"s below). Set "limit" to this value.
  63. * This defines a block of assignable asids.
  64. *
  65. * When "limit" is reached, search forward from limit+1 and determine the
  66. * next block of assignable asids.
  67. *
  68. * Repeat until MAX_ASID is reached, then start over again.
  69. *
  70. * Each time MAX_ASID is reached, increment the asid generation. Since
  71. * the search for in-use asids only checks contexts with GRUs currently
  72. * assigned, asids in some contexts will be missed. Prior to loading
  73. * a context, the asid generation of the GTS asid is rechecked. If it
  74. * doesn't match the current generation, a new asid will be assigned.
  75. *
  76. * 0---------------x------------x---------------------x----|
  77. * ^-next ^-limit ^-MAX_ASID
  78. *
  79. * All asid manipulation & context loading/unloading is protected by the
  80. * gs_lock.
  81. */
  82. /* Hit the asid limit. Start over */
  83. static int gru_wrap_asid(struct gru_state *gru)
  84. {
  85. gru_dbg(grudev, "gid %d\n", gru->gs_gid);
  86. STAT(asid_wrap);
  87. gru->gs_asid_gen++;
  88. return MIN_ASID;
  89. }
  90. /* Find the next chunk of unused asids */
  91. static int gru_reset_asid_limit(struct gru_state *gru, int asid)
  92. {
  93. int i, gid, inuse_asid, limit;
  94. gru_dbg(grudev, "gid %d, asid 0x%x\n", gru->gs_gid, asid);
  95. STAT(asid_next);
  96. limit = MAX_ASID;
  97. if (asid >= limit)
  98. asid = gru_wrap_asid(gru);
  99. gru_flush_all_tlb(gru);
  100. gid = gru->gs_gid;
  101. again:
  102. for (i = 0; i < GRU_NUM_CCH; i++) {
  103. if (!gru->gs_gts[i] || is_kernel_context(gru->gs_gts[i]))
  104. continue;
  105. inuse_asid = gru->gs_gts[i]->ts_gms->ms_asids[gid].mt_asid;
  106. gru_dbg(grudev, "gid %d, gts %p, gms %p, inuse 0x%x, cxt %d\n",
  107. gru->gs_gid, gru->gs_gts[i], gru->gs_gts[i]->ts_gms,
  108. inuse_asid, i);
  109. if (inuse_asid == asid) {
  110. asid += ASID_INC;
  111. if (asid >= limit) {
  112. /*
  113. * empty range: reset the range limit and
  114. * start over
  115. */
  116. limit = MAX_ASID;
  117. if (asid >= MAX_ASID)
  118. asid = gru_wrap_asid(gru);
  119. goto again;
  120. }
  121. }
  122. if ((inuse_asid > asid) && (inuse_asid < limit))
  123. limit = inuse_asid;
  124. }
  125. gru->gs_asid_limit = limit;
  126. gru->gs_asid = asid;
  127. gru_dbg(grudev, "gid %d, new asid 0x%x, new_limit 0x%x\n", gru->gs_gid,
  128. asid, limit);
  129. return asid;
  130. }
  131. /* Assign a new ASID to a thread context. */
  132. static int gru_assign_asid(struct gru_state *gru)
  133. {
  134. int asid;
  135. gru->gs_asid += ASID_INC;
  136. asid = gru->gs_asid;
  137. if (asid >= gru->gs_asid_limit)
  138. asid = gru_reset_asid_limit(gru, asid);
  139. gru_dbg(grudev, "gid %d, asid 0x%x\n", gru->gs_gid, asid);
  140. return asid;
  141. }
  142. /*
  143. * Clear n bits in a word. Return a word indicating the bits that were cleared.
  144. * Optionally, build an array of chars that contain the bit numbers allocated.
  145. */
  146. static unsigned long reserve_resources(unsigned long *p, int n, int mmax,
  147. char *idx)
  148. {
  149. unsigned long bits = 0;
  150. int i;
  151. while (n--) {
  152. i = find_first_bit(p, mmax);
  153. if (i == mmax)
  154. BUG();
  155. __clear_bit(i, p);
  156. __set_bit(i, &bits);
  157. if (idx)
  158. *idx++ = i;
  159. }
  160. return bits;
  161. }
  162. unsigned long gru_reserve_cb_resources(struct gru_state *gru, int cbr_au_count,
  163. char *cbmap)
  164. {
  165. return reserve_resources(&gru->gs_cbr_map, cbr_au_count, GRU_CBR_AU,
  166. cbmap);
  167. }
  168. unsigned long gru_reserve_ds_resources(struct gru_state *gru, int dsr_au_count,
  169. char *dsmap)
  170. {
  171. return reserve_resources(&gru->gs_dsr_map, dsr_au_count, GRU_DSR_AU,
  172. dsmap);
  173. }
  174. static void reserve_gru_resources(struct gru_state *gru,
  175. struct gru_thread_state *gts)
  176. {
  177. gru->gs_active_contexts++;
  178. gts->ts_cbr_map =
  179. gru_reserve_cb_resources(gru, gts->ts_cbr_au_count,
  180. gts->ts_cbr_idx);
  181. gts->ts_dsr_map =
  182. gru_reserve_ds_resources(gru, gts->ts_dsr_au_count, NULL);
  183. }
  184. static void free_gru_resources(struct gru_state *gru,
  185. struct gru_thread_state *gts)
  186. {
  187. gru->gs_active_contexts--;
  188. gru->gs_cbr_map |= gts->ts_cbr_map;
  189. gru->gs_dsr_map |= gts->ts_dsr_map;
  190. }
  191. /*
  192. * Check if a GRU has sufficient free resources to satisfy an allocation
  193. * request. Note: GRU locks may or may not be held when this is called. If
  194. * not held, recheck after acquiring the appropriate locks.
  195. *
  196. * Returns 1 if sufficient resources, 0 if not
  197. */
  198. static int check_gru_resources(struct gru_state *gru, int cbr_au_count,
  199. int dsr_au_count, int max_active_contexts)
  200. {
  201. return hweight64(gru->gs_cbr_map) >= cbr_au_count
  202. && hweight64(gru->gs_dsr_map) >= dsr_au_count
  203. && gru->gs_active_contexts < max_active_contexts;
  204. }
  205. /*
  206. * TLB manangment requires tracking all GRU chiplets that have loaded a GSEG
  207. * context.
  208. */
  209. static int gru_load_mm_tracker(struct gru_state *gru,
  210. struct gru_thread_state *gts)
  211. {
  212. struct gru_mm_struct *gms = gts->ts_gms;
  213. struct gru_mm_tracker *asids = &gms->ms_asids[gru->gs_gid];
  214. unsigned short ctxbitmap = (1 << gts->ts_ctxnum);
  215. int asid;
  216. spin_lock(&gms->ms_asid_lock);
  217. asid = asids->mt_asid;
  218. spin_lock(&gru->gs_asid_lock);
  219. if (asid == 0 || (asids->mt_ctxbitmap == 0 && asids->mt_asid_gen !=
  220. gru->gs_asid_gen)) {
  221. asid = gru_assign_asid(gru);
  222. asids->mt_asid = asid;
  223. asids->mt_asid_gen = gru->gs_asid_gen;
  224. STAT(asid_new);
  225. } else {
  226. STAT(asid_reuse);
  227. }
  228. spin_unlock(&gru->gs_asid_lock);
  229. BUG_ON(asids->mt_ctxbitmap & ctxbitmap);
  230. asids->mt_ctxbitmap |= ctxbitmap;
  231. if (!test_bit(gru->gs_gid, gms->ms_asidmap))
  232. __set_bit(gru->gs_gid, gms->ms_asidmap);
  233. spin_unlock(&gms->ms_asid_lock);
  234. gru_dbg(grudev,
  235. "gid %d, gts %p, gms %p, ctxnum %d, asid 0x%x, asidmap 0x%lx\n",
  236. gru->gs_gid, gts, gms, gts->ts_ctxnum, asid,
  237. gms->ms_asidmap[0]);
  238. return asid;
  239. }
  240. static void gru_unload_mm_tracker(struct gru_state *gru,
  241. struct gru_thread_state *gts)
  242. {
  243. struct gru_mm_struct *gms = gts->ts_gms;
  244. struct gru_mm_tracker *asids;
  245. unsigned short ctxbitmap;
  246. asids = &gms->ms_asids[gru->gs_gid];
  247. ctxbitmap = (1 << gts->ts_ctxnum);
  248. spin_lock(&gms->ms_asid_lock);
  249. spin_lock(&gru->gs_asid_lock);
  250. BUG_ON((asids->mt_ctxbitmap & ctxbitmap) != ctxbitmap);
  251. asids->mt_ctxbitmap ^= ctxbitmap;
  252. gru_dbg(grudev, "gid %d, gts %p, gms %p, ctxnum 0x%d, asidmap 0x%lx\n",
  253. gru->gs_gid, gts, gms, gts->ts_ctxnum, gms->ms_asidmap[0]);
  254. spin_unlock(&gru->gs_asid_lock);
  255. spin_unlock(&gms->ms_asid_lock);
  256. }
  257. /*
  258. * Decrement the reference count on a GTS structure. Free the structure
  259. * if the reference count goes to zero.
  260. */
  261. void gts_drop(struct gru_thread_state *gts)
  262. {
  263. if (gts && atomic_dec_return(&gts->ts_refcnt) == 0) {
  264. if (gts->ts_gms)
  265. gru_drop_mmu_notifier(gts->ts_gms);
  266. kfree(gts);
  267. STAT(gts_free);
  268. }
  269. }
  270. /*
  271. * Locate the GTS structure for the current thread.
  272. */
  273. static struct gru_thread_state *gru_find_current_gts_nolock(struct gru_vma_data
  274. *vdata, int tsid)
  275. {
  276. struct gru_thread_state *gts;
  277. list_for_each_entry(gts, &vdata->vd_head, ts_next)
  278. if (gts->ts_tsid == tsid)
  279. return gts;
  280. return NULL;
  281. }
  282. /*
  283. * Allocate a thread state structure.
  284. */
  285. struct gru_thread_state *gru_alloc_gts(struct vm_area_struct *vma,
  286. int cbr_au_count, int dsr_au_count,
  287. unsigned char tlb_preload_count, int options, int tsid)
  288. {
  289. struct gru_thread_state *gts;
  290. struct gru_mm_struct *gms;
  291. int bytes;
  292. bytes = DSR_BYTES(dsr_au_count) + CBR_BYTES(cbr_au_count);
  293. bytes += sizeof(struct gru_thread_state);
  294. gts = kmalloc(bytes, GFP_KERNEL);
  295. if (!gts)
  296. return ERR_PTR(-ENOMEM);
  297. STAT(gts_alloc);
  298. memset(gts, 0, sizeof(struct gru_thread_state)); /* zero out header */
  299. atomic_set(&gts->ts_refcnt, 1);
  300. mutex_init(&gts->ts_ctxlock);
  301. gts->ts_cbr_au_count = cbr_au_count;
  302. gts->ts_dsr_au_count = dsr_au_count;
  303. gts->ts_tlb_preload_count = tlb_preload_count;
  304. gts->ts_user_options = options;
  305. gts->ts_user_blade_id = -1;
  306. gts->ts_user_chiplet_id = -1;
  307. gts->ts_tsid = tsid;
  308. gts->ts_ctxnum = NULLCTX;
  309. gts->ts_tlb_int_select = -1;
  310. gts->ts_cch_req_slice = -1;
  311. gts->ts_sizeavail = GRU_SIZEAVAIL(PAGE_SHIFT);
  312. if (vma) {
  313. gts->ts_mm = current->mm;
  314. gts->ts_vma = vma;
  315. gms = gru_register_mmu_notifier();
  316. if (IS_ERR(gms))
  317. goto err;
  318. gts->ts_gms = gms;
  319. }
  320. gru_dbg(grudev, "alloc gts %p\n", gts);
  321. return gts;
  322. err:
  323. gts_drop(gts);
  324. return ERR_CAST(gms);
  325. }
  326. /*
  327. * Allocate a vma private data structure.
  328. */
  329. struct gru_vma_data *gru_alloc_vma_data(struct vm_area_struct *vma, int tsid)
  330. {
  331. struct gru_vma_data *vdata = NULL;
  332. vdata = kmalloc(sizeof(*vdata), GFP_KERNEL);
  333. if (!vdata)
  334. return NULL;
  335. STAT(vdata_alloc);
  336. INIT_LIST_HEAD(&vdata->vd_head);
  337. spin_lock_init(&vdata->vd_lock);
  338. gru_dbg(grudev, "alloc vdata %p\n", vdata);
  339. return vdata;
  340. }
  341. /*
  342. * Find the thread state structure for the current thread.
  343. */
  344. struct gru_thread_state *gru_find_thread_state(struct vm_area_struct *vma,
  345. int tsid)
  346. {
  347. struct gru_vma_data *vdata = vma->vm_private_data;
  348. struct gru_thread_state *gts;
  349. spin_lock(&vdata->vd_lock);
  350. gts = gru_find_current_gts_nolock(vdata, tsid);
  351. spin_unlock(&vdata->vd_lock);
  352. gru_dbg(grudev, "vma %p, gts %p\n", vma, gts);
  353. return gts;
  354. }
  355. /*
  356. * Allocate a new thread state for a GSEG. Note that races may allow
  357. * another thread to race to create a gts.
  358. */
  359. struct gru_thread_state *gru_alloc_thread_state(struct vm_area_struct *vma,
  360. int tsid)
  361. {
  362. struct gru_vma_data *vdata = vma->vm_private_data;
  363. struct gru_thread_state *gts, *ngts;
  364. gts = gru_alloc_gts(vma, vdata->vd_cbr_au_count,
  365. vdata->vd_dsr_au_count,
  366. vdata->vd_tlb_preload_count,
  367. vdata->vd_user_options, tsid);
  368. if (IS_ERR(gts))
  369. return gts;
  370. spin_lock(&vdata->vd_lock);
  371. ngts = gru_find_current_gts_nolock(vdata, tsid);
  372. if (ngts) {
  373. gts_drop(gts);
  374. gts = ngts;
  375. STAT(gts_double_allocate);
  376. } else {
  377. list_add(&gts->ts_next, &vdata->vd_head);
  378. }
  379. spin_unlock(&vdata->vd_lock);
  380. gru_dbg(grudev, "vma %p, gts %p\n", vma, gts);
  381. return gts;
  382. }
  383. /*
  384. * Free the GRU context assigned to the thread state.
  385. */
  386. static void gru_free_gru_context(struct gru_thread_state *gts)
  387. {
  388. struct gru_state *gru;
  389. gru = gts->ts_gru;
  390. gru_dbg(grudev, "gts %p, gid %d\n", gts, gru->gs_gid);
  391. spin_lock(&gru->gs_lock);
  392. gru->gs_gts[gts->ts_ctxnum] = NULL;
  393. free_gru_resources(gru, gts);
  394. BUG_ON(test_bit(gts->ts_ctxnum, &gru->gs_context_map) == 0);
  395. __clear_bit(gts->ts_ctxnum, &gru->gs_context_map);
  396. gts->ts_ctxnum = NULLCTX;
  397. gts->ts_gru = NULL;
  398. gts->ts_blade = -1;
  399. spin_unlock(&gru->gs_lock);
  400. gts_drop(gts);
  401. STAT(free_context);
  402. }
  403. /*
  404. * Prefetching cachelines help hardware performance.
  405. * (Strictly a performance enhancement. Not functionally required).
  406. */
  407. static void prefetch_data(void *p, int num, int stride)
  408. {
  409. while (num-- > 0) {
  410. prefetchw(p);
  411. p += stride;
  412. }
  413. }
  414. static inline long gru_copy_handle(void *d, void *s)
  415. {
  416. memcpy(d, s, GRU_HANDLE_BYTES);
  417. return GRU_HANDLE_BYTES;
  418. }
  419. static void gru_prefetch_context(void *gseg, void *cb, void *cbe,
  420. unsigned long cbrmap, unsigned long length)
  421. {
  422. int i, scr;
  423. prefetch_data(gseg + GRU_DS_BASE, length / GRU_CACHE_LINE_BYTES,
  424. GRU_CACHE_LINE_BYTES);
  425. for_each_cbr_in_allocation_map(i, &cbrmap, scr) {
  426. prefetch_data(cb, 1, GRU_CACHE_LINE_BYTES);
  427. prefetch_data(cbe + i * GRU_HANDLE_STRIDE, 1,
  428. GRU_CACHE_LINE_BYTES);
  429. cb += GRU_HANDLE_STRIDE;
  430. }
  431. }
  432. static void gru_load_context_data(void *save, void *grubase, int ctxnum,
  433. unsigned long cbrmap, unsigned long dsrmap,
  434. int data_valid)
  435. {
  436. void *gseg, *cb, *cbe;
  437. unsigned long length;
  438. int i, scr;
  439. gseg = grubase + ctxnum * GRU_GSEG_STRIDE;
  440. cb = gseg + GRU_CB_BASE;
  441. cbe = grubase + GRU_CBE_BASE;
  442. length = hweight64(dsrmap) * GRU_DSR_AU_BYTES;
  443. gru_prefetch_context(gseg, cb, cbe, cbrmap, length);
  444. for_each_cbr_in_allocation_map(i, &cbrmap, scr) {
  445. if (data_valid) {
  446. save += gru_copy_handle(cb, save);
  447. save += gru_copy_handle(cbe + i * GRU_HANDLE_STRIDE,
  448. save);
  449. } else {
  450. memset(cb, 0, GRU_CACHE_LINE_BYTES);
  451. memset(cbe + i * GRU_HANDLE_STRIDE, 0,
  452. GRU_CACHE_LINE_BYTES);
  453. }
  454. /* Flush CBE to hide race in context restart */
  455. mb();
  456. gru_flush_cache(cbe + i * GRU_HANDLE_STRIDE);
  457. cb += GRU_HANDLE_STRIDE;
  458. }
  459. if (data_valid)
  460. memcpy(gseg + GRU_DS_BASE, save, length);
  461. else
  462. memset(gseg + GRU_DS_BASE, 0, length);
  463. }
  464. static void gru_unload_context_data(void *save, void *grubase, int ctxnum,
  465. unsigned long cbrmap, unsigned long dsrmap)
  466. {
  467. void *gseg, *cb, *cbe;
  468. unsigned long length;
  469. int i, scr;
  470. gseg = grubase + ctxnum * GRU_GSEG_STRIDE;
  471. cb = gseg + GRU_CB_BASE;
  472. cbe = grubase + GRU_CBE_BASE;
  473. length = hweight64(dsrmap) * GRU_DSR_AU_BYTES;
  474. /* CBEs may not be coherent. Flush them from cache */
  475. for_each_cbr_in_allocation_map(i, &cbrmap, scr)
  476. gru_flush_cache(cbe + i * GRU_HANDLE_STRIDE);
  477. mb(); /* Let the CL flush complete */
  478. gru_prefetch_context(gseg, cb, cbe, cbrmap, length);
  479. for_each_cbr_in_allocation_map(i, &cbrmap, scr) {
  480. save += gru_copy_handle(save, cb);
  481. save += gru_copy_handle(save, cbe + i * GRU_HANDLE_STRIDE);
  482. cb += GRU_HANDLE_STRIDE;
  483. }
  484. memcpy(save, gseg + GRU_DS_BASE, length);
  485. }
  486. void gru_unload_context(struct gru_thread_state *gts, int savestate)
  487. {
  488. struct gru_state *gru = gts->ts_gru;
  489. struct gru_context_configuration_handle *cch;
  490. int ctxnum = gts->ts_ctxnum;
  491. if (!is_kernel_context(gts))
  492. zap_vma_ptes(gts->ts_vma, UGRUADDR(gts), GRU_GSEG_PAGESIZE);
  493. cch = get_cch(gru->gs_gru_base_vaddr, ctxnum);
  494. gru_dbg(grudev, "gts %p, cbrmap 0x%lx, dsrmap 0x%lx\n",
  495. gts, gts->ts_cbr_map, gts->ts_dsr_map);
  496. lock_cch_handle(cch);
  497. if (cch_interrupt_sync(cch))
  498. BUG();
  499. if (!is_kernel_context(gts))
  500. gru_unload_mm_tracker(gru, gts);
  501. if (savestate) {
  502. gru_unload_context_data(gts->ts_gdata, gru->gs_gru_base_vaddr,
  503. ctxnum, gts->ts_cbr_map,
  504. gts->ts_dsr_map);
  505. gts->ts_data_valid = 1;
  506. }
  507. if (cch_deallocate(cch))
  508. BUG();
  509. unlock_cch_handle(cch);
  510. gru_free_gru_context(gts);
  511. }
  512. /*
  513. * Load a GRU context by copying it from the thread data structure in memory
  514. * to the GRU.
  515. */
  516. void gru_load_context(struct gru_thread_state *gts)
  517. {
  518. struct gru_state *gru = gts->ts_gru;
  519. struct gru_context_configuration_handle *cch;
  520. int i, err, asid, ctxnum = gts->ts_ctxnum;
  521. cch = get_cch(gru->gs_gru_base_vaddr, ctxnum);
  522. lock_cch_handle(cch);
  523. cch->tfm_fault_bit_enable =
  524. (gts->ts_user_options == GRU_OPT_MISS_FMM_POLL
  525. || gts->ts_user_options == GRU_OPT_MISS_FMM_INTR);
  526. cch->tlb_int_enable = (gts->ts_user_options == GRU_OPT_MISS_FMM_INTR);
  527. if (cch->tlb_int_enable) {
  528. gts->ts_tlb_int_select = gru_cpu_fault_map_id();
  529. cch->tlb_int_select = gts->ts_tlb_int_select;
  530. }
  531. if (gts->ts_cch_req_slice >= 0) {
  532. cch->req_slice_set_enable = 1;
  533. cch->req_slice = gts->ts_cch_req_slice;
  534. } else {
  535. cch->req_slice_set_enable =0;
  536. }
  537. cch->tfm_done_bit_enable = 0;
  538. cch->dsr_allocation_map = gts->ts_dsr_map;
  539. cch->cbr_allocation_map = gts->ts_cbr_map;
  540. if (is_kernel_context(gts)) {
  541. cch->unmap_enable = 1;
  542. cch->tfm_done_bit_enable = 1;
  543. cch->cb_int_enable = 1;
  544. cch->tlb_int_select = 0; /* For now, ints go to cpu 0 */
  545. } else {
  546. cch->unmap_enable = 0;
  547. cch->tfm_done_bit_enable = 0;
  548. cch->cb_int_enable = 0;
  549. asid = gru_load_mm_tracker(gru, gts);
  550. for (i = 0; i < 8; i++) {
  551. cch->asid[i] = asid + i;
  552. cch->sizeavail[i] = gts->ts_sizeavail;
  553. }
  554. }
  555. err = cch_allocate(cch);
  556. if (err) {
  557. gru_dbg(grudev,
  558. "err %d: cch %p, gts %p, cbr 0x%lx, dsr 0x%lx\n",
  559. err, cch, gts, gts->ts_cbr_map, gts->ts_dsr_map);
  560. BUG();
  561. }
  562. gru_load_context_data(gts->ts_gdata, gru->gs_gru_base_vaddr, ctxnum,
  563. gts->ts_cbr_map, gts->ts_dsr_map, gts->ts_data_valid);
  564. if (cch_start(cch))
  565. BUG();
  566. unlock_cch_handle(cch);
  567. gru_dbg(grudev, "gid %d, gts %p, cbrmap 0x%lx, dsrmap 0x%lx, tie %d, tis %d\n",
  568. gts->ts_gru->gs_gid, gts, gts->ts_cbr_map, gts->ts_dsr_map,
  569. (gts->ts_user_options == GRU_OPT_MISS_FMM_INTR), gts->ts_tlb_int_select);
  570. }
  571. /*
  572. * Update fields in an active CCH:
  573. * - retarget interrupts on local blade
  574. * - update sizeavail mask
  575. */
  576. int gru_update_cch(struct gru_thread_state *gts)
  577. {
  578. struct gru_context_configuration_handle *cch;
  579. struct gru_state *gru = gts->ts_gru;
  580. int i, ctxnum = gts->ts_ctxnum, ret = 0;
  581. cch = get_cch(gru->gs_gru_base_vaddr, ctxnum);
  582. lock_cch_handle(cch);
  583. if (cch->state == CCHSTATE_ACTIVE) {
  584. if (gru->gs_gts[gts->ts_ctxnum] != gts)
  585. goto exit;
  586. if (cch_interrupt(cch))
  587. BUG();
  588. for (i = 0; i < 8; i++)
  589. cch->sizeavail[i] = gts->ts_sizeavail;
  590. gts->ts_tlb_int_select = gru_cpu_fault_map_id();
  591. cch->tlb_int_select = gru_cpu_fault_map_id();
  592. cch->tfm_fault_bit_enable =
  593. (gts->ts_user_options == GRU_OPT_MISS_FMM_POLL
  594. || gts->ts_user_options == GRU_OPT_MISS_FMM_INTR);
  595. if (cch_start(cch))
  596. BUG();
  597. ret = 1;
  598. }
  599. exit:
  600. unlock_cch_handle(cch);
  601. return ret;
  602. }
  603. /*
  604. * Update CCH tlb interrupt select. Required when all the following is true:
  605. * - task's GRU context is loaded into a GRU
  606. * - task is using interrupt notification for TLB faults
  607. * - task has migrated to a different cpu on the same blade where
  608. * it was previously running.
  609. */
  610. static int gru_retarget_intr(struct gru_thread_state *gts)
  611. {
  612. if (gts->ts_tlb_int_select < 0
  613. || gts->ts_tlb_int_select == gru_cpu_fault_map_id())
  614. return 0;
  615. gru_dbg(grudev, "retarget from %d to %d\n", gts->ts_tlb_int_select,
  616. gru_cpu_fault_map_id());
  617. return gru_update_cch(gts);
  618. }
  619. /*
  620. * Unload the gru context if it is not assigned to the correct blade or
  621. * chiplet. Misassignment can occur if the process migrates to a different
  622. * blade or if the user changes the selected blade/chiplet.
  623. * Return 0 if context correct placed, otherwise 1
  624. */
  625. void gru_check_context_placement(struct gru_thread_state *gts)
  626. {
  627. struct gru_state *gru;
  628. int blade_id, chiplet_id;
  629. /*
  630. * If the current task is the context owner, verify that the
  631. * context is correctly placed. This test is skipped for non-owner
  632. * references. Pthread apps use non-owner references to the CBRs.
  633. */
  634. gru = gts->ts_gru;
  635. if (!gru || gts->ts_tgid_owner != current->tgid)
  636. return;
  637. blade_id = gts->ts_user_blade_id;
  638. if (blade_id < 0)
  639. blade_id = uv_numa_blade_id();
  640. chiplet_id = gts->ts_user_chiplet_id;
  641. if (gru->gs_blade_id != blade_id ||
  642. (chiplet_id >= 0 && chiplet_id != gru->gs_chiplet_id)) {
  643. STAT(check_context_unload);
  644. gru_unload_context(gts, 1);
  645. } else if (gru_retarget_intr(gts)) {
  646. STAT(check_context_retarget_intr);
  647. }
  648. }
  649. /*
  650. * Insufficient GRU resources available on the local blade. Steal a context from
  651. * a process. This is a hack until a _real_ resource scheduler is written....
  652. */
  653. #define next_ctxnum(n) ((n) < GRU_NUM_CCH - 2 ? (n) + 1 : 0)
  654. #define next_gru(b, g) (((g) < &(b)->bs_grus[GRU_CHIPLETS_PER_BLADE - 1]) ? \
  655. ((g)+1) : &(b)->bs_grus[0])
  656. static int is_gts_stealable(struct gru_thread_state *gts,
  657. struct gru_blade_state *bs)
  658. {
  659. if (is_kernel_context(gts))
  660. return down_write_trylock(&bs->bs_kgts_sema);
  661. else
  662. return mutex_trylock(&gts->ts_ctxlock);
  663. }
  664. static void gts_stolen(struct gru_thread_state *gts,
  665. struct gru_blade_state *bs)
  666. {
  667. if (is_kernel_context(gts)) {
  668. up_write(&bs->bs_kgts_sema);
  669. STAT(steal_kernel_context);
  670. } else {
  671. mutex_unlock(&gts->ts_ctxlock);
  672. STAT(steal_user_context);
  673. }
  674. }
  675. void gru_steal_context(struct gru_thread_state *gts)
  676. {
  677. struct gru_blade_state *blade;
  678. struct gru_state *gru, *gru0;
  679. struct gru_thread_state *ngts = NULL;
  680. int ctxnum, ctxnum0, flag = 0, cbr, dsr;
  681. int blade_id = gts->ts_user_blade_id;
  682. int chiplet_id = gts->ts_user_chiplet_id;
  683. if (blade_id < 0)
  684. blade_id = uv_numa_blade_id();
  685. cbr = gts->ts_cbr_au_count;
  686. dsr = gts->ts_dsr_au_count;
  687. blade = gru_base[blade_id];
  688. spin_lock(&blade->bs_lock);
  689. ctxnum = next_ctxnum(blade->bs_lru_ctxnum);
  690. gru = blade->bs_lru_gru;
  691. if (ctxnum == 0)
  692. gru = next_gru(blade, gru);
  693. blade->bs_lru_gru = gru;
  694. blade->bs_lru_ctxnum = ctxnum;
  695. ctxnum0 = ctxnum;
  696. gru0 = gru;
  697. while (1) {
  698. if (chiplet_id < 0 || chiplet_id == gru->gs_chiplet_id) {
  699. if (check_gru_resources(gru, cbr, dsr, GRU_NUM_CCH))
  700. break;
  701. spin_lock(&gru->gs_lock);
  702. for (; ctxnum < GRU_NUM_CCH; ctxnum++) {
  703. if (flag && gru == gru0 && ctxnum == ctxnum0)
  704. break;
  705. ngts = gru->gs_gts[ctxnum];
  706. /*
  707. * We are grabbing locks out of order, so trylock is
  708. * needed. GTSs are usually not locked, so the odds of
  709. * success are high. If trylock fails, try to steal a
  710. * different GSEG.
  711. */
  712. if (ngts && is_gts_stealable(ngts, blade))
  713. break;
  714. ngts = NULL;
  715. }
  716. spin_unlock(&gru->gs_lock);
  717. if (ngts || (flag && gru == gru0 && ctxnum == ctxnum0))
  718. break;
  719. }
  720. if (flag && gru == gru0)
  721. break;
  722. flag = 1;
  723. ctxnum = 0;
  724. gru = next_gru(blade, gru);
  725. }
  726. spin_unlock(&blade->bs_lock);
  727. if (ngts) {
  728. gts->ustats.context_stolen++;
  729. ngts->ts_steal_jiffies = jiffies;
  730. gru_unload_context(ngts, is_kernel_context(ngts) ? 0 : 1);
  731. gts_stolen(ngts, blade);
  732. } else {
  733. STAT(steal_context_failed);
  734. }
  735. gru_dbg(grudev,
  736. "stole gid %d, ctxnum %d from gts %p. Need cb %d, ds %d;"
  737. " avail cb %ld, ds %ld\n",
  738. gru->gs_gid, ctxnum, ngts, cbr, dsr, hweight64(gru->gs_cbr_map),
  739. hweight64(gru->gs_dsr_map));
  740. }
  741. /*
  742. * Assign a gru context.
  743. */
  744. static int gru_assign_context_number(struct gru_state *gru)
  745. {
  746. int ctxnum;
  747. ctxnum = find_first_zero_bit(&gru->gs_context_map, GRU_NUM_CCH);
  748. __set_bit(ctxnum, &gru->gs_context_map);
  749. return ctxnum;
  750. }
  751. /*
  752. * Scan the GRUs on the local blade & assign a GRU context.
  753. */
  754. struct gru_state *gru_assign_gru_context(struct gru_thread_state *gts)
  755. {
  756. struct gru_state *gru, *grux;
  757. int i, max_active_contexts;
  758. int blade_id = gts->ts_user_blade_id;
  759. int chiplet_id = gts->ts_user_chiplet_id;
  760. if (blade_id < 0)
  761. blade_id = uv_numa_blade_id();
  762. again:
  763. gru = NULL;
  764. max_active_contexts = GRU_NUM_CCH;
  765. for_each_gru_on_blade(grux, blade_id, i) {
  766. if (chiplet_id >= 0 && chiplet_id != grux->gs_chiplet_id)
  767. continue;
  768. if (check_gru_resources(grux, gts->ts_cbr_au_count,
  769. gts->ts_dsr_au_count,
  770. max_active_contexts)) {
  771. gru = grux;
  772. max_active_contexts = grux->gs_active_contexts;
  773. if (max_active_contexts == 0)
  774. break;
  775. }
  776. }
  777. if (gru) {
  778. spin_lock(&gru->gs_lock);
  779. if (!check_gru_resources(gru, gts->ts_cbr_au_count,
  780. gts->ts_dsr_au_count, GRU_NUM_CCH)) {
  781. spin_unlock(&gru->gs_lock);
  782. goto again;
  783. }
  784. reserve_gru_resources(gru, gts);
  785. gts->ts_gru = gru;
  786. gts->ts_blade = gru->gs_blade_id;
  787. gts->ts_ctxnum = gru_assign_context_number(gru);
  788. atomic_inc(&gts->ts_refcnt);
  789. gru->gs_gts[gts->ts_ctxnum] = gts;
  790. spin_unlock(&gru->gs_lock);
  791. STAT(assign_context);
  792. gru_dbg(grudev,
  793. "gseg %p, gts %p, gid %d, ctx %d, cbr %d, dsr %d\n",
  794. gseg_virtual_address(gts->ts_gru, gts->ts_ctxnum), gts,
  795. gts->ts_gru->gs_gid, gts->ts_ctxnum,
  796. gts->ts_cbr_au_count, gts->ts_dsr_au_count);
  797. } else {
  798. gru_dbg(grudev, "failed to allocate a GTS %s\n", "");
  799. STAT(assign_context_failed);
  800. }
  801. return gru;
  802. }
  803. /*
  804. * gru_nopage
  805. *
  806. * Map the user's GRU segment
  807. *
  808. * Note: gru segments alway mmaped on GRU_GSEG_PAGESIZE boundaries.
  809. */
  810. int gru_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
  811. {
  812. struct gru_thread_state *gts;
  813. unsigned long paddr, vaddr;
  814. vaddr = (unsigned long)vmf->virtual_address;
  815. gru_dbg(grudev, "vma %p, vaddr 0x%lx (0x%lx)\n",
  816. vma, vaddr, GSEG_BASE(vaddr));
  817. STAT(nopfn);
  818. /* The following check ensures vaddr is a valid address in the VMA */
  819. gts = gru_find_thread_state(vma, TSID(vaddr, vma));
  820. if (!gts)
  821. return VM_FAULT_SIGBUS;
  822. again:
  823. mutex_lock(&gts->ts_ctxlock);
  824. preempt_disable();
  825. gru_check_context_placement(gts);
  826. if (!gts->ts_gru) {
  827. STAT(load_user_context);
  828. if (!gru_assign_gru_context(gts)) {
  829. preempt_enable();
  830. mutex_unlock(&gts->ts_ctxlock);
  831. set_current_state(TASK_INTERRUPTIBLE);
  832. schedule_timeout(GRU_ASSIGN_DELAY); /* true hack ZZZ */
  833. if (gts->ts_steal_jiffies + GRU_STEAL_DELAY < jiffies)
  834. gru_steal_context(gts);
  835. goto again;
  836. }
  837. gru_load_context(gts);
  838. paddr = gseg_physical_address(gts->ts_gru, gts->ts_ctxnum);
  839. remap_pfn_range(vma, vaddr & ~(GRU_GSEG_PAGESIZE - 1),
  840. paddr >> PAGE_SHIFT, GRU_GSEG_PAGESIZE,
  841. vma->vm_page_prot);
  842. }
  843. preempt_enable();
  844. mutex_unlock(&gts->ts_ctxlock);
  845. return VM_FAULT_NOPAGE;
  846. }