smartreflex.c 28 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055
  1. /*
  2. * OMAP SmartReflex Voltage Control
  3. *
  4. * Author: Thara Gopinath <thara@ti.com>
  5. *
  6. * Copyright (C) 2010 Texas Instruments, Inc.
  7. * Thara Gopinath <thara@ti.com>
  8. *
  9. * Copyright (C) 2008 Nokia Corporation
  10. * Kalle Jokiniemi
  11. *
  12. * Copyright (C) 2007 Texas Instruments, Inc.
  13. * Lesly A M <x0080970@ti.com>
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License version 2 as
  17. * published by the Free Software Foundation.
  18. */
  19. #include <linux/interrupt.h>
  20. #include <linux/clk.h>
  21. #include <linux/io.h>
  22. #include <linux/debugfs.h>
  23. #include <linux/delay.h>
  24. #include <linux/slab.h>
  25. #include <linux/pm_runtime.h>
  26. #include <plat/common.h>
  27. #include "pm.h"
  28. #include "smartreflex.h"
  29. #define SMARTREFLEX_NAME_LEN 16
  30. #define NVALUE_NAME_LEN 40
  31. #define SR_DISABLE_TIMEOUT 200
  32. struct omap_sr {
  33. int srid;
  34. int ip_type;
  35. int nvalue_count;
  36. bool autocomp_active;
  37. u32 clk_length;
  38. u32 err_weight;
  39. u32 err_minlimit;
  40. u32 err_maxlimit;
  41. u32 accum_data;
  42. u32 senn_avgweight;
  43. u32 senp_avgweight;
  44. u32 senp_mod;
  45. u32 senn_mod;
  46. unsigned int irq;
  47. void __iomem *base;
  48. struct platform_device *pdev;
  49. struct list_head node;
  50. struct omap_sr_nvalue_table *nvalue_table;
  51. struct voltagedomain *voltdm;
  52. struct dentry *dbg_dir;
  53. };
  54. /* sr_list contains all the instances of smartreflex module */
  55. static LIST_HEAD(sr_list);
  56. static struct omap_sr_class_data *sr_class;
  57. static struct omap_sr_pmic_data *sr_pmic_data;
  58. static struct dentry *sr_dbg_dir;
  59. static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value)
  60. {
  61. __raw_writel(value, (sr->base + offset));
  62. }
  63. static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask,
  64. u32 value)
  65. {
  66. u32 reg_val;
  67. u32 errconfig_offs = 0, errconfig_mask = 0;
  68. reg_val = __raw_readl(sr->base + offset);
  69. reg_val &= ~mask;
  70. /*
  71. * Smartreflex error config register is special as it contains
  72. * certain status bits which if written a 1 into means a clear
  73. * of those bits. So in order to make sure no accidental write of
  74. * 1 happens to those status bits, do a clear of them in the read
  75. * value. This mean this API doesn't rewrite values in these bits
  76. * if they are currently set, but does allow the caller to write
  77. * those bits.
  78. */
  79. if (sr->ip_type == SR_TYPE_V1) {
  80. errconfig_offs = ERRCONFIG_V1;
  81. errconfig_mask = ERRCONFIG_STATUS_V1_MASK;
  82. } else if (sr->ip_type == SR_TYPE_V2) {
  83. errconfig_offs = ERRCONFIG_V2;
  84. errconfig_mask = ERRCONFIG_VPBOUNDINTST_V2;
  85. }
  86. if (offset == errconfig_offs)
  87. reg_val &= ~errconfig_mask;
  88. reg_val |= value;
  89. __raw_writel(reg_val, (sr->base + offset));
  90. }
  91. static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset)
  92. {
  93. return __raw_readl(sr->base + offset);
  94. }
  95. static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm)
  96. {
  97. struct omap_sr *sr_info;
  98. if (!voltdm) {
  99. pr_err("%s: Null voltage domain passed!\n", __func__);
  100. return ERR_PTR(-EINVAL);
  101. }
  102. list_for_each_entry(sr_info, &sr_list, node) {
  103. if (voltdm == sr_info->voltdm)
  104. return sr_info;
  105. }
  106. return ERR_PTR(-ENODATA);
  107. }
  108. static irqreturn_t sr_interrupt(int irq, void *data)
  109. {
  110. struct omap_sr *sr_info = (struct omap_sr *)data;
  111. u32 status = 0;
  112. if (sr_info->ip_type == SR_TYPE_V1) {
  113. /* Read the status bits */
  114. status = sr_read_reg(sr_info, ERRCONFIG_V1);
  115. /* Clear them by writing back */
  116. sr_write_reg(sr_info, ERRCONFIG_V1, status);
  117. } else if (sr_info->ip_type == SR_TYPE_V2) {
  118. /* Read the status bits */
  119. sr_read_reg(sr_info, IRQSTATUS);
  120. /* Clear them by writing back */
  121. sr_write_reg(sr_info, IRQSTATUS, status);
  122. }
  123. if (sr_class->notify)
  124. sr_class->notify(sr_info->voltdm, status);
  125. return IRQ_HANDLED;
  126. }
  127. static void sr_set_clk_length(struct omap_sr *sr)
  128. {
  129. struct clk *sys_ck;
  130. u32 sys_clk_speed;
  131. if (cpu_is_omap34xx())
  132. sys_ck = clk_get(NULL, "sys_ck");
  133. else
  134. sys_ck = clk_get(NULL, "sys_clkin_ck");
  135. if (IS_ERR(sys_ck)) {
  136. dev_err(&sr->pdev->dev, "%s: unable to get sys clk\n",
  137. __func__);
  138. return;
  139. }
  140. sys_clk_speed = clk_get_rate(sys_ck);
  141. clk_put(sys_ck);
  142. switch (sys_clk_speed) {
  143. case 12000000:
  144. sr->clk_length = SRCLKLENGTH_12MHZ_SYSCLK;
  145. break;
  146. case 13000000:
  147. sr->clk_length = SRCLKLENGTH_13MHZ_SYSCLK;
  148. break;
  149. case 19200000:
  150. sr->clk_length = SRCLKLENGTH_19MHZ_SYSCLK;
  151. break;
  152. case 26000000:
  153. sr->clk_length = SRCLKLENGTH_26MHZ_SYSCLK;
  154. break;
  155. case 38400000:
  156. sr->clk_length = SRCLKLENGTH_38MHZ_SYSCLK;
  157. break;
  158. default:
  159. dev_err(&sr->pdev->dev, "%s: Invalid sysclk value: %d\n",
  160. __func__, sys_clk_speed);
  161. break;
  162. }
  163. }
  164. static void sr_set_regfields(struct omap_sr *sr)
  165. {
  166. /*
  167. * For time being these values are defined in smartreflex.h
  168. * and populated during init. May be they can be moved to board
  169. * file or pmic specific data structure. In that case these structure
  170. * fields will have to be populated using the pdata or pmic structure.
  171. */
  172. if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
  173. sr->err_weight = OMAP3430_SR_ERRWEIGHT;
  174. sr->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
  175. sr->accum_data = OMAP3430_SR_ACCUMDATA;
  176. if (!(strcmp(sr->voltdm->name, "mpu"))) {
  177. sr->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT;
  178. sr->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT;
  179. } else {
  180. sr->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT;
  181. sr->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT;
  182. }
  183. }
  184. }
  185. static void sr_start_vddautocomp(struct omap_sr *sr)
  186. {
  187. if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
  188. dev_warn(&sr->pdev->dev,
  189. "%s: smartreflex class driver not registered\n",
  190. __func__);
  191. return;
  192. }
  193. if (!sr_class->enable(sr->voltdm))
  194. sr->autocomp_active = true;
  195. }
  196. static void sr_stop_vddautocomp(struct omap_sr *sr)
  197. {
  198. if (!sr_class || !(sr_class->disable)) {
  199. dev_warn(&sr->pdev->dev,
  200. "%s: smartreflex class driver not registered\n",
  201. __func__);
  202. return;
  203. }
  204. if (sr->autocomp_active) {
  205. sr_class->disable(sr->voltdm, 1);
  206. sr->autocomp_active = false;
  207. }
  208. }
  209. /*
  210. * This function handles the intializations which have to be done
  211. * only when both sr device and class driver regiter has
  212. * completed. This will be attempted to be called from both sr class
  213. * driver register and sr device intializtion API's. Only one call
  214. * will ultimately succeed.
  215. *
  216. * Currently this function registers interrrupt handler for a particular SR
  217. * if smartreflex class driver is already registered and has
  218. * requested for interrupts and the SR interrupt line in present.
  219. */
  220. static int sr_late_init(struct omap_sr *sr_info)
  221. {
  222. char *name;
  223. struct omap_sr_data *pdata = sr_info->pdev->dev.platform_data;
  224. struct resource *mem;
  225. int ret = 0;
  226. if (sr_class->notify && sr_class->notify_flags && sr_info->irq) {
  227. name = kasprintf(GFP_KERNEL, "sr_%s", sr_info->voltdm->name);
  228. if (name == NULL) {
  229. ret = -ENOMEM;
  230. goto error;
  231. }
  232. ret = request_irq(sr_info->irq, sr_interrupt,
  233. 0, name, (void *)sr_info);
  234. if (ret)
  235. goto error;
  236. disable_irq(sr_info->irq);
  237. }
  238. if (pdata && pdata->enable_on_init)
  239. sr_start_vddautocomp(sr_info);
  240. return ret;
  241. error:
  242. iounmap(sr_info->base);
  243. mem = platform_get_resource(sr_info->pdev, IORESOURCE_MEM, 0);
  244. release_mem_region(mem->start, resource_size(mem));
  245. list_del(&sr_info->node);
  246. dev_err(&sr_info->pdev->dev, "%s: ERROR in registering"
  247. "interrupt handler. Smartreflex will"
  248. "not function as desired\n", __func__);
  249. kfree(name);
  250. kfree(sr_info);
  251. return ret;
  252. }
  253. static void sr_v1_disable(struct omap_sr *sr)
  254. {
  255. int timeout = 0;
  256. /* Enable MCUDisableAcknowledge interrupt */
  257. sr_modify_reg(sr, ERRCONFIG_V1,
  258. ERRCONFIG_MCUDISACKINTEN, ERRCONFIG_MCUDISACKINTEN);
  259. /* SRCONFIG - disable SR */
  260. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
  261. /* Disable all other SR interrupts and clear the status */
  262. sr_modify_reg(sr, ERRCONFIG_V1,
  263. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
  264. ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN_V1),
  265. (ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST |
  266. ERRCONFIG_MCUBOUNDINTST |
  267. ERRCONFIG_VPBOUNDINTST_V1));
  268. /*
  269. * Wait for SR to be disabled.
  270. * wait until ERRCONFIG.MCUDISACKINTST = 1. Typical latency is 1us.
  271. */
  272. omap_test_timeout((sr_read_reg(sr, ERRCONFIG_V1) &
  273. ERRCONFIG_MCUDISACKINTST), SR_DISABLE_TIMEOUT,
  274. timeout);
  275. if (timeout >= SR_DISABLE_TIMEOUT)
  276. dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
  277. __func__);
  278. /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
  279. sr_modify_reg(sr, ERRCONFIG_V1, ERRCONFIG_MCUDISACKINTEN,
  280. ERRCONFIG_MCUDISACKINTST);
  281. }
  282. static void sr_v2_disable(struct omap_sr *sr)
  283. {
  284. int timeout = 0;
  285. /* Enable MCUDisableAcknowledge interrupt */
  286. sr_write_reg(sr, IRQENABLE_SET, IRQENABLE_MCUDISABLEACKINT);
  287. /* SRCONFIG - disable SR */
  288. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
  289. /* Disable all other SR interrupts and clear the status */
  290. sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
  291. ERRCONFIG_VPBOUNDINTST_V2);
  292. sr_write_reg(sr, IRQENABLE_CLR, (IRQENABLE_MCUACCUMINT |
  293. IRQENABLE_MCUVALIDINT |
  294. IRQENABLE_MCUBOUNDSINT));
  295. sr_write_reg(sr, IRQSTATUS, (IRQSTATUS_MCUACCUMINT |
  296. IRQSTATUS_MCVALIDINT |
  297. IRQSTATUS_MCBOUNDSINT));
  298. /*
  299. * Wait for SR to be disabled.
  300. * wait until IRQSTATUS.MCUDISACKINTST = 1. Typical latency is 1us.
  301. */
  302. omap_test_timeout((sr_read_reg(sr, IRQSTATUS) &
  303. IRQSTATUS_MCUDISABLEACKINT), SR_DISABLE_TIMEOUT,
  304. timeout);
  305. if (timeout >= SR_DISABLE_TIMEOUT)
  306. dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
  307. __func__);
  308. /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
  309. sr_write_reg(sr, IRQENABLE_CLR, IRQENABLE_MCUDISABLEACKINT);
  310. sr_write_reg(sr, IRQSTATUS, IRQSTATUS_MCUDISABLEACKINT);
  311. }
  312. static u32 sr_retrieve_nvalue(struct omap_sr *sr, u32 efuse_offs)
  313. {
  314. int i;
  315. if (!sr->nvalue_table) {
  316. dev_warn(&sr->pdev->dev, "%s: Missing ntarget value table\n",
  317. __func__);
  318. return 0;
  319. }
  320. for (i = 0; i < sr->nvalue_count; i++) {
  321. if (sr->nvalue_table[i].efuse_offs == efuse_offs)
  322. return sr->nvalue_table[i].nvalue;
  323. }
  324. return 0;
  325. }
  326. /* Public Functions */
  327. /**
  328. * sr_configure_errgen() - Configures the smrtreflex to perform AVS using the
  329. * error generator module.
  330. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  331. *
  332. * This API is to be called from the smartreflex class driver to
  333. * configure the error generator module inside the smartreflex module.
  334. * SR settings if using the ERROR module inside Smartreflex.
  335. * SR CLASS 3 by default uses only the ERROR module where as
  336. * SR CLASS 2 can choose between ERROR module and MINMAXAVG
  337. * module. Returns 0 on success and error value in case of failure.
  338. */
  339. int sr_configure_errgen(struct voltagedomain *voltdm)
  340. {
  341. u32 sr_config, sr_errconfig, errconfig_offs, vpboundint_en;
  342. u32 vpboundint_st, senp_en = 0, senn_en = 0;
  343. u8 senp_shift, senn_shift;
  344. struct omap_sr *sr = _sr_lookup(voltdm);
  345. if (IS_ERR(sr)) {
  346. pr_warning("%s: omap_sr struct for sr_%s not found\n",
  347. __func__, voltdm->name);
  348. return -EINVAL;
  349. }
  350. if (!sr->clk_length)
  351. sr_set_clk_length(sr);
  352. senp_en = sr->senp_mod;
  353. senn_en = sr->senn_mod;
  354. sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
  355. SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN;
  356. if (sr->ip_type == SR_TYPE_V1) {
  357. sr_config |= SRCONFIG_DELAYCTRL;
  358. senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
  359. senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
  360. errconfig_offs = ERRCONFIG_V1;
  361. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
  362. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
  363. } else if (sr->ip_type == SR_TYPE_V2) {
  364. senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
  365. senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
  366. errconfig_offs = ERRCONFIG_V2;
  367. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
  368. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
  369. } else {
  370. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
  371. "module without specifying the ip\n", __func__);
  372. return -EINVAL;
  373. }
  374. sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
  375. sr_write_reg(sr, SRCONFIG, sr_config);
  376. sr_errconfig = (sr->err_weight << ERRCONFIG_ERRWEIGHT_SHIFT) |
  377. (sr->err_maxlimit << ERRCONFIG_ERRMAXLIMIT_SHIFT) |
  378. (sr->err_minlimit << ERRCONFIG_ERRMINLIMIT_SHIFT);
  379. sr_modify_reg(sr, errconfig_offs, (SR_ERRWEIGHT_MASK |
  380. SR_ERRMAXLIMIT_MASK | SR_ERRMINLIMIT_MASK),
  381. sr_errconfig);
  382. /* Enabling the interrupts if the ERROR module is used */
  383. sr_modify_reg(sr, errconfig_offs,
  384. vpboundint_en, (vpboundint_en | vpboundint_st));
  385. return 0;
  386. }
  387. /**
  388. * sr_configure_minmax() - Configures the smrtreflex to perform AVS using the
  389. * minmaxavg module.
  390. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  391. *
  392. * This API is to be called from the smartreflex class driver to
  393. * configure the minmaxavg module inside the smartreflex module.
  394. * SR settings if using the ERROR module inside Smartreflex.
  395. * SR CLASS 3 by default uses only the ERROR module where as
  396. * SR CLASS 2 can choose between ERROR module and MINMAXAVG
  397. * module. Returns 0 on success and error value in case of failure.
  398. */
  399. int sr_configure_minmax(struct voltagedomain *voltdm)
  400. {
  401. u32 sr_config, sr_avgwt;
  402. u32 senp_en = 0, senn_en = 0;
  403. u8 senp_shift, senn_shift;
  404. struct omap_sr *sr = _sr_lookup(voltdm);
  405. if (IS_ERR(sr)) {
  406. pr_warning("%s: omap_sr struct for sr_%s not found\n",
  407. __func__, voltdm->name);
  408. return -EINVAL;
  409. }
  410. if (!sr->clk_length)
  411. sr_set_clk_length(sr);
  412. senp_en = sr->senp_mod;
  413. senn_en = sr->senn_mod;
  414. sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
  415. SRCONFIG_SENENABLE |
  416. (sr->accum_data << SRCONFIG_ACCUMDATA_SHIFT);
  417. if (sr->ip_type == SR_TYPE_V1) {
  418. sr_config |= SRCONFIG_DELAYCTRL;
  419. senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
  420. senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
  421. } else if (sr->ip_type == SR_TYPE_V2) {
  422. senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
  423. senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
  424. } else {
  425. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
  426. "module without specifying the ip\n", __func__);
  427. return -EINVAL;
  428. }
  429. sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
  430. sr_write_reg(sr, SRCONFIG, sr_config);
  431. sr_avgwt = (sr->senp_avgweight << AVGWEIGHT_SENPAVGWEIGHT_SHIFT) |
  432. (sr->senn_avgweight << AVGWEIGHT_SENNAVGWEIGHT_SHIFT);
  433. sr_write_reg(sr, AVGWEIGHT, sr_avgwt);
  434. /*
  435. * Enabling the interrupts if MINMAXAVG module is used.
  436. * TODO: check if all the interrupts are mandatory
  437. */
  438. if (sr->ip_type == SR_TYPE_V1) {
  439. sr_modify_reg(sr, ERRCONFIG_V1,
  440. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
  441. ERRCONFIG_MCUBOUNDINTEN),
  442. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST |
  443. ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST |
  444. ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST));
  445. } else if (sr->ip_type == SR_TYPE_V2) {
  446. sr_write_reg(sr, IRQSTATUS,
  447. IRQSTATUS_MCUACCUMINT | IRQSTATUS_MCVALIDINT |
  448. IRQSTATUS_MCBOUNDSINT | IRQSTATUS_MCUDISABLEACKINT);
  449. sr_write_reg(sr, IRQENABLE_SET,
  450. IRQENABLE_MCUACCUMINT | IRQENABLE_MCUVALIDINT |
  451. IRQENABLE_MCUBOUNDSINT | IRQENABLE_MCUDISABLEACKINT);
  452. }
  453. return 0;
  454. }
  455. /**
  456. * sr_enable() - Enables the smartreflex module.
  457. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  458. * @volt: The voltage at which the Voltage domain associated with
  459. * the smartreflex module is operating at.
  460. * This is required only to program the correct Ntarget value.
  461. *
  462. * This API is to be called from the smartreflex class driver to
  463. * enable a smartreflex module. Returns 0 on success. Returns error
  464. * value if the voltage passed is wrong or if ntarget value is wrong.
  465. */
  466. int sr_enable(struct voltagedomain *voltdm, unsigned long volt)
  467. {
  468. u32 nvalue_reciprocal;
  469. struct omap_volt_data *volt_data;
  470. struct omap_sr *sr = _sr_lookup(voltdm);
  471. int ret;
  472. if (IS_ERR(sr)) {
  473. pr_warning("%s: omap_sr struct for sr_%s not found\n",
  474. __func__, voltdm->name);
  475. return -EINVAL;
  476. }
  477. volt_data = omap_voltage_get_voltdata(sr->voltdm, volt);
  478. if (IS_ERR(volt_data)) {
  479. dev_warn(&sr->pdev->dev, "%s: Unable to get voltage table"
  480. "for nominal voltage %ld\n", __func__, volt);
  481. return -ENODATA;
  482. }
  483. nvalue_reciprocal = sr_retrieve_nvalue(sr, volt_data->sr_efuse_offs);
  484. if (!nvalue_reciprocal) {
  485. dev_warn(&sr->pdev->dev, "%s: NVALUE = 0 at voltage %ld\n",
  486. __func__, volt);
  487. return -ENODATA;
  488. }
  489. /* errminlimit is opp dependent and hence linked to voltage */
  490. sr->err_minlimit = volt_data->sr_errminlimit;
  491. pm_runtime_get_sync(&sr->pdev->dev);
  492. /* Check if SR is already enabled. If yes do nothing */
  493. if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE)
  494. return 0;
  495. /* Configure SR */
  496. ret = sr_class->configure(voltdm);
  497. if (ret)
  498. return ret;
  499. sr_write_reg(sr, NVALUERECIPROCAL, nvalue_reciprocal);
  500. /* SRCONFIG - enable SR */
  501. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, SRCONFIG_SRENABLE);
  502. return 0;
  503. }
  504. /**
  505. * sr_disable() - Disables the smartreflex module.
  506. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  507. *
  508. * This API is to be called from the smartreflex class driver to
  509. * disable a smartreflex module.
  510. */
  511. void sr_disable(struct voltagedomain *voltdm)
  512. {
  513. struct omap_sr *sr = _sr_lookup(voltdm);
  514. if (IS_ERR(sr)) {
  515. pr_warning("%s: omap_sr struct for sr_%s not found\n",
  516. __func__, voltdm->name);
  517. return;
  518. }
  519. /* Check if SR clocks are already disabled. If yes do nothing */
  520. if (pm_runtime_suspended(&sr->pdev->dev))
  521. return;
  522. /*
  523. * Disable SR if only it is indeed enabled. Else just
  524. * disable the clocks.
  525. */
  526. if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) {
  527. if (sr->ip_type == SR_TYPE_V1)
  528. sr_v1_disable(sr);
  529. else if (sr->ip_type == SR_TYPE_V2)
  530. sr_v2_disable(sr);
  531. }
  532. pm_runtime_put_sync_suspend(&sr->pdev->dev);
  533. }
  534. /**
  535. * sr_register_class() - API to register a smartreflex class parameters.
  536. * @class_data: The structure containing various sr class specific data.
  537. *
  538. * This API is to be called by the smartreflex class driver to register itself
  539. * with the smartreflex driver during init. Returns 0 on success else the
  540. * error value.
  541. */
  542. int sr_register_class(struct omap_sr_class_data *class_data)
  543. {
  544. struct omap_sr *sr_info;
  545. if (!class_data) {
  546. pr_warning("%s:, Smartreflex class data passed is NULL\n",
  547. __func__);
  548. return -EINVAL;
  549. }
  550. if (sr_class) {
  551. pr_warning("%s: Smartreflex class driver already registered\n",
  552. __func__);
  553. return -EBUSY;
  554. }
  555. sr_class = class_data;
  556. /*
  557. * Call into late init to do intializations that require
  558. * both sr driver and sr class driver to be initiallized.
  559. */
  560. list_for_each_entry(sr_info, &sr_list, node)
  561. sr_late_init(sr_info);
  562. return 0;
  563. }
  564. /**
  565. * omap_sr_enable() - API to enable SR clocks and to call into the
  566. * registered smartreflex class enable API.
  567. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  568. *
  569. * This API is to be called from the kernel in order to enable
  570. * a particular smartreflex module. This API will do the initial
  571. * configurations to turn on the smartreflex module and in turn call
  572. * into the registered smartreflex class enable API.
  573. */
  574. void omap_sr_enable(struct voltagedomain *voltdm)
  575. {
  576. struct omap_sr *sr = _sr_lookup(voltdm);
  577. if (IS_ERR(sr)) {
  578. pr_warning("%s: omap_sr struct for sr_%s not found\n",
  579. __func__, voltdm->name);
  580. return;
  581. }
  582. if (!sr->autocomp_active)
  583. return;
  584. if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
  585. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
  586. "registered\n", __func__);
  587. return;
  588. }
  589. sr_class->enable(voltdm);
  590. }
  591. /**
  592. * omap_sr_disable() - API to disable SR without resetting the voltage
  593. * processor voltage
  594. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  595. *
  596. * This API is to be called from the kernel in order to disable
  597. * a particular smartreflex module. This API will in turn call
  598. * into the registered smartreflex class disable API. This API will tell
  599. * the smartreflex class disable not to reset the VP voltage after
  600. * disabling smartreflex.
  601. */
  602. void omap_sr_disable(struct voltagedomain *voltdm)
  603. {
  604. struct omap_sr *sr = _sr_lookup(voltdm);
  605. if (IS_ERR(sr)) {
  606. pr_warning("%s: omap_sr struct for sr_%s not found\n",
  607. __func__, voltdm->name);
  608. return;
  609. }
  610. if (!sr->autocomp_active)
  611. return;
  612. if (!sr_class || !(sr_class->disable)) {
  613. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
  614. "registered\n", __func__);
  615. return;
  616. }
  617. sr_class->disable(voltdm, 0);
  618. }
  619. /**
  620. * omap_sr_disable_reset_volt() - API to disable SR and reset the
  621. * voltage processor voltage
  622. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  623. *
  624. * This API is to be called from the kernel in order to disable
  625. * a particular smartreflex module. This API will in turn call
  626. * into the registered smartreflex class disable API. This API will tell
  627. * the smartreflex class disable to reset the VP voltage after
  628. * disabling smartreflex.
  629. */
  630. void omap_sr_disable_reset_volt(struct voltagedomain *voltdm)
  631. {
  632. struct omap_sr *sr = _sr_lookup(voltdm);
  633. if (IS_ERR(sr)) {
  634. pr_warning("%s: omap_sr struct for sr_%s not found\n",
  635. __func__, voltdm->name);
  636. return;
  637. }
  638. if (!sr->autocomp_active)
  639. return;
  640. if (!sr_class || !(sr_class->disable)) {
  641. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
  642. "registered\n", __func__);
  643. return;
  644. }
  645. sr_class->disable(voltdm, 1);
  646. }
  647. /**
  648. * omap_sr_register_pmic() - API to register pmic specific info.
  649. * @pmic_data: The structure containing pmic specific data.
  650. *
  651. * This API is to be called from the PMIC specific code to register with
  652. * smartreflex driver pmic specific info. Currently the only info required
  653. * is the smartreflex init on the PMIC side.
  654. */
  655. void omap_sr_register_pmic(struct omap_sr_pmic_data *pmic_data)
  656. {
  657. if (!pmic_data) {
  658. pr_warning("%s: Trying to register NULL PMIC data structure"
  659. "with smartreflex\n", __func__);
  660. return;
  661. }
  662. sr_pmic_data = pmic_data;
  663. }
  664. /* PM Debug Fs enteries to enable disable smartreflex. */
  665. static int omap_sr_autocomp_show(void *data, u64 *val)
  666. {
  667. struct omap_sr *sr_info = (struct omap_sr *) data;
  668. if (!sr_info) {
  669. pr_warning("%s: omap_sr struct not found\n", __func__);
  670. return -EINVAL;
  671. }
  672. *val = sr_info->autocomp_active;
  673. return 0;
  674. }
  675. static int omap_sr_autocomp_store(void *data, u64 val)
  676. {
  677. struct omap_sr *sr_info = (struct omap_sr *) data;
  678. if (!sr_info) {
  679. pr_warning("%s: omap_sr struct not found\n", __func__);
  680. return -EINVAL;
  681. }
  682. /* Sanity check */
  683. if (val && (val != 1)) {
  684. pr_warning("%s: Invalid argument %lld\n", __func__, val);
  685. return -EINVAL;
  686. }
  687. /* control enable/disable only if there is a delta in value */
  688. if (sr_info->autocomp_active != val) {
  689. if (!val)
  690. sr_stop_vddautocomp(sr_info);
  691. else
  692. sr_start_vddautocomp(sr_info);
  693. }
  694. return 0;
  695. }
  696. DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show,
  697. omap_sr_autocomp_store, "%llu\n");
  698. static int __init omap_sr_probe(struct platform_device *pdev)
  699. {
  700. struct omap_sr *sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL);
  701. struct omap_sr_data *pdata = pdev->dev.platform_data;
  702. struct resource *mem, *irq;
  703. struct dentry *nvalue_dir;
  704. struct omap_volt_data *volt_data;
  705. int i, ret = 0;
  706. char *name;
  707. if (!sr_info) {
  708. dev_err(&pdev->dev, "%s: unable to allocate sr_info\n",
  709. __func__);
  710. return -ENOMEM;
  711. }
  712. if (!pdata) {
  713. dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
  714. ret = -EINVAL;
  715. goto err_free_devinfo;
  716. }
  717. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  718. if (!mem) {
  719. dev_err(&pdev->dev, "%s: no mem resource\n", __func__);
  720. ret = -ENODEV;
  721. goto err_free_devinfo;
  722. }
  723. mem = request_mem_region(mem->start, resource_size(mem),
  724. dev_name(&pdev->dev));
  725. if (!mem) {
  726. dev_err(&pdev->dev, "%s: no mem region\n", __func__);
  727. ret = -EBUSY;
  728. goto err_free_devinfo;
  729. }
  730. irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  731. pm_runtime_enable(&pdev->dev);
  732. pm_runtime_irq_safe(&pdev->dev);
  733. sr_info->pdev = pdev;
  734. sr_info->srid = pdev->id;
  735. sr_info->voltdm = pdata->voltdm;
  736. sr_info->nvalue_table = pdata->nvalue_table;
  737. sr_info->nvalue_count = pdata->nvalue_count;
  738. sr_info->senn_mod = pdata->senn_mod;
  739. sr_info->senp_mod = pdata->senp_mod;
  740. sr_info->autocomp_active = false;
  741. sr_info->ip_type = pdata->ip_type;
  742. sr_info->base = ioremap(mem->start, resource_size(mem));
  743. if (!sr_info->base) {
  744. dev_err(&pdev->dev, "%s: ioremap fail\n", __func__);
  745. ret = -ENOMEM;
  746. goto err_release_region;
  747. }
  748. if (irq)
  749. sr_info->irq = irq->start;
  750. sr_set_clk_length(sr_info);
  751. sr_set_regfields(sr_info);
  752. list_add(&sr_info->node, &sr_list);
  753. /*
  754. * Call into late init to do intializations that require
  755. * both sr driver and sr class driver to be initiallized.
  756. */
  757. if (sr_class) {
  758. ret = sr_late_init(sr_info);
  759. if (ret) {
  760. pr_warning("%s: Error in SR late init\n", __func__);
  761. return ret;
  762. }
  763. }
  764. dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__);
  765. if (!sr_dbg_dir) {
  766. sr_dbg_dir = debugfs_create_dir("smartreflex", NULL);
  767. if (!sr_dbg_dir) {
  768. ret = PTR_ERR(sr_dbg_dir);
  769. pr_err("%s:sr debugfs dir creation failed(%d)\n",
  770. __func__, ret);
  771. goto err_iounmap;
  772. }
  773. }
  774. name = kasprintf(GFP_KERNEL, "sr_%s", sr_info->voltdm->name);
  775. if (!name) {
  776. dev_err(&pdev->dev, "%s: Unable to alloc debugfs name\n",
  777. __func__);
  778. ret = -ENOMEM;
  779. goto err_iounmap;
  780. }
  781. sr_info->dbg_dir = debugfs_create_dir(name, sr_dbg_dir);
  782. kfree(name);
  783. if (IS_ERR(sr_info->dbg_dir)) {
  784. dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n",
  785. __func__);
  786. ret = PTR_ERR(sr_info->dbg_dir);
  787. goto err_iounmap;
  788. }
  789. (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR,
  790. sr_info->dbg_dir, (void *)sr_info, &pm_sr_fops);
  791. (void) debugfs_create_x32("errweight", S_IRUGO, sr_info->dbg_dir,
  792. &sr_info->err_weight);
  793. (void) debugfs_create_x32("errmaxlimit", S_IRUGO, sr_info->dbg_dir,
  794. &sr_info->err_maxlimit);
  795. (void) debugfs_create_x32("errminlimit", S_IRUGO, sr_info->dbg_dir,
  796. &sr_info->err_minlimit);
  797. nvalue_dir = debugfs_create_dir("nvalue", sr_info->dbg_dir);
  798. if (IS_ERR(nvalue_dir)) {
  799. dev_err(&pdev->dev, "%s: Unable to create debugfs directory"
  800. "for n-values\n", __func__);
  801. ret = PTR_ERR(nvalue_dir);
  802. goto err_debugfs;
  803. }
  804. omap_voltage_get_volttable(sr_info->voltdm, &volt_data);
  805. if (!volt_data) {
  806. dev_warn(&pdev->dev, "%s: No Voltage table for the"
  807. " corresponding vdd vdd_%s. Cannot create debugfs"
  808. "entries for n-values\n",
  809. __func__, sr_info->voltdm->name);
  810. ret = -ENODATA;
  811. goto err_debugfs;
  812. }
  813. for (i = 0; i < sr_info->nvalue_count; i++) {
  814. char name[NVALUE_NAME_LEN + 1];
  815. snprintf(name, sizeof(name), "volt_%d",
  816. volt_data[i].volt_nominal);
  817. (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
  818. &(sr_info->nvalue_table[i].nvalue));
  819. }
  820. return ret;
  821. err_debugfs:
  822. debugfs_remove_recursive(sr_info->dbg_dir);
  823. err_iounmap:
  824. list_del(&sr_info->node);
  825. iounmap(sr_info->base);
  826. err_release_region:
  827. release_mem_region(mem->start, resource_size(mem));
  828. err_free_devinfo:
  829. kfree(sr_info);
  830. return ret;
  831. }
  832. static int __devexit omap_sr_remove(struct platform_device *pdev)
  833. {
  834. struct omap_sr_data *pdata = pdev->dev.platform_data;
  835. struct omap_sr *sr_info;
  836. struct resource *mem;
  837. if (!pdata) {
  838. dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
  839. return -EINVAL;
  840. }
  841. sr_info = _sr_lookup(pdata->voltdm);
  842. if (IS_ERR(sr_info)) {
  843. dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
  844. __func__);
  845. return -EINVAL;
  846. }
  847. if (sr_info->autocomp_active)
  848. sr_stop_vddautocomp(sr_info);
  849. if (sr_info->dbg_dir)
  850. debugfs_remove_recursive(sr_info->dbg_dir);
  851. list_del(&sr_info->node);
  852. iounmap(sr_info->base);
  853. kfree(sr_info);
  854. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  855. release_mem_region(mem->start, resource_size(mem));
  856. return 0;
  857. }
  858. static struct platform_driver smartreflex_driver = {
  859. .remove = omap_sr_remove,
  860. .driver = {
  861. .name = "smartreflex",
  862. },
  863. };
  864. static int __init sr_init(void)
  865. {
  866. int ret = 0;
  867. /*
  868. * sr_init is a late init. If by then a pmic specific API is not
  869. * registered either there is no need for anything to be done on
  870. * the PMIC side or somebody has forgotten to register a PMIC
  871. * handler. Warn for the second condition.
  872. */
  873. if (sr_pmic_data && sr_pmic_data->sr_pmic_init)
  874. sr_pmic_data->sr_pmic_init();
  875. else
  876. pr_warning("%s: No PMIC hook to init smartreflex\n", __func__);
  877. ret = platform_driver_probe(&smartreflex_driver, omap_sr_probe);
  878. if (ret) {
  879. pr_err("%s: platform driver register failed for SR\n",
  880. __func__);
  881. return ret;
  882. }
  883. return 0;
  884. }
  885. static void __exit sr_exit(void)
  886. {
  887. platform_driver_unregister(&smartreflex_driver);
  888. }
  889. late_initcall(sr_init);
  890. module_exit(sr_exit);
  891. MODULE_DESCRIPTION("OMAP Smartreflex Driver");
  892. MODULE_LICENSE("GPL");
  893. MODULE_ALIAS("platform:" DRIVER_NAME);
  894. MODULE_AUTHOR("Texas Instruments Inc");