ixgb_main.c 56 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. #include "ixgb.h"
  21. /* Change Log
  22. * 1.0.96 04/19/05
  23. * - Make needlessly global code static -- bunk@stusta.de
  24. * - ethtool cleanup -- shemminger@osdl.org
  25. * - Support for MODULE_VERSION -- linville@tuxdriver.com
  26. * - add skb_header_cloned check to the tso path -- herbert@apana.org.au
  27. * 1.0.88 01/05/05
  28. * - include fix to the condition that determines when to quit NAPI - Robert Olsson
  29. * - use netif_poll_{disable/enable} to synchronize between NAPI and i/f up/down
  30. * 1.0.84 10/26/04
  31. * - reset buffer_info->dma in Tx resource cleanup logic
  32. * 1.0.83 10/12/04
  33. * - sparse cleanup - shemminger@osdl.org
  34. * - fix tx resource cleanup logic
  35. */
  36. char ixgb_driver_name[] = "ixgb";
  37. char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
  38. #ifndef CONFIG_IXGB_NAPI
  39. #define DRIVERNAPI
  40. #else
  41. #define DRIVERNAPI "-NAPI"
  42. #endif
  43. #define DRV_VERSION "1.0.100-k2"DRIVERNAPI
  44. char ixgb_driver_version[] = DRV_VERSION;
  45. static char ixgb_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
  46. /* ixgb_pci_tbl - PCI Device ID Table
  47. *
  48. * Wildcard entries (PCI_ANY_ID) should come last
  49. * Last entry must be all 0s
  50. *
  51. * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  52. * Class, Class Mask, private data (not used) }
  53. */
  54. static struct pci_device_id ixgb_pci_tbl[] = {
  55. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX,
  56. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  57. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR,
  58. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  59. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR,
  60. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  61. /* required last entry */
  62. {0,}
  63. };
  64. MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl);
  65. /* Local Function Prototypes */
  66. int ixgb_up(struct ixgb_adapter *adapter);
  67. void ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog);
  68. void ixgb_reset(struct ixgb_adapter *adapter);
  69. int ixgb_setup_tx_resources(struct ixgb_adapter *adapter);
  70. int ixgb_setup_rx_resources(struct ixgb_adapter *adapter);
  71. void ixgb_free_tx_resources(struct ixgb_adapter *adapter);
  72. void ixgb_free_rx_resources(struct ixgb_adapter *adapter);
  73. void ixgb_update_stats(struct ixgb_adapter *adapter);
  74. static int ixgb_init_module(void);
  75. static void ixgb_exit_module(void);
  76. static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  77. static void __devexit ixgb_remove(struct pci_dev *pdev);
  78. static int ixgb_sw_init(struct ixgb_adapter *adapter);
  79. static int ixgb_open(struct net_device *netdev);
  80. static int ixgb_close(struct net_device *netdev);
  81. static void ixgb_configure_tx(struct ixgb_adapter *adapter);
  82. static void ixgb_configure_rx(struct ixgb_adapter *adapter);
  83. static void ixgb_setup_rctl(struct ixgb_adapter *adapter);
  84. static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter);
  85. static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter);
  86. static void ixgb_set_multi(struct net_device *netdev);
  87. static void ixgb_watchdog(unsigned long data);
  88. static int ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  89. static struct net_device_stats *ixgb_get_stats(struct net_device *netdev);
  90. static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
  91. static int ixgb_set_mac(struct net_device *netdev, void *p);
  92. static irqreturn_t ixgb_intr(int irq, void *data, struct pt_regs *regs);
  93. static boolean_t ixgb_clean_tx_irq(struct ixgb_adapter *adapter);
  94. #ifdef CONFIG_IXGB_NAPI
  95. static int ixgb_clean(struct net_device *netdev, int *budget);
  96. static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter,
  97. int *work_done, int work_to_do);
  98. #else
  99. static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter);
  100. #endif
  101. static void ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter);
  102. void ixgb_set_ethtool_ops(struct net_device *netdev);
  103. static void ixgb_tx_timeout(struct net_device *dev);
  104. static void ixgb_tx_timeout_task(struct net_device *dev);
  105. static void ixgb_vlan_rx_register(struct net_device *netdev,
  106. struct vlan_group *grp);
  107. static void ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  108. static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  109. static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
  110. #ifdef CONFIG_NET_POLL_CONTROLLER
  111. /* for netdump / net console */
  112. static void ixgb_netpoll(struct net_device *dev);
  113. #endif
  114. /* Exported from other modules */
  115. extern void ixgb_check_options(struct ixgb_adapter *adapter);
  116. static struct pci_driver ixgb_driver = {
  117. .name = ixgb_driver_name,
  118. .id_table = ixgb_pci_tbl,
  119. .probe = ixgb_probe,
  120. .remove = __devexit_p(ixgb_remove),
  121. };
  122. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  123. MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver");
  124. MODULE_LICENSE("GPL");
  125. MODULE_VERSION(DRV_VERSION);
  126. /* some defines for controlling descriptor fetches in h/w */
  127. #define RXDCTL_WTHRESH_DEFAULT 16 /* chip writes back at this many or RXT0 */
  128. #define RXDCTL_PTHRESH_DEFAULT 0 /* chip considers prefech below
  129. * this */
  130. #define RXDCTL_HTHRESH_DEFAULT 0 /* chip will only prefetch if tail
  131. * is pushed this many descriptors
  132. * from head */
  133. /**
  134. * ixgb_init_module - Driver Registration Routine
  135. *
  136. * ixgb_init_module is the first routine called when the driver is
  137. * loaded. All it does is register with the PCI subsystem.
  138. **/
  139. static int __init
  140. ixgb_init_module(void)
  141. {
  142. printk(KERN_INFO "%s - version %s\n",
  143. ixgb_driver_string, ixgb_driver_version);
  144. printk(KERN_INFO "%s\n", ixgb_copyright);
  145. return pci_module_init(&ixgb_driver);
  146. }
  147. module_init(ixgb_init_module);
  148. /**
  149. * ixgb_exit_module - Driver Exit Cleanup Routine
  150. *
  151. * ixgb_exit_module is called just before the driver is removed
  152. * from memory.
  153. **/
  154. static void __exit
  155. ixgb_exit_module(void)
  156. {
  157. pci_unregister_driver(&ixgb_driver);
  158. }
  159. module_exit(ixgb_exit_module);
  160. /**
  161. * ixgb_irq_disable - Mask off interrupt generation on the NIC
  162. * @adapter: board private structure
  163. **/
  164. static inline void
  165. ixgb_irq_disable(struct ixgb_adapter *adapter)
  166. {
  167. atomic_inc(&adapter->irq_sem);
  168. IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
  169. IXGB_WRITE_FLUSH(&adapter->hw);
  170. synchronize_irq(adapter->pdev->irq);
  171. }
  172. /**
  173. * ixgb_irq_enable - Enable default interrupt generation settings
  174. * @adapter: board private structure
  175. **/
  176. static inline void
  177. ixgb_irq_enable(struct ixgb_adapter *adapter)
  178. {
  179. if(atomic_dec_and_test(&adapter->irq_sem)) {
  180. IXGB_WRITE_REG(&adapter->hw, IMS,
  181. IXGB_INT_RXT0 | IXGB_INT_RXDMT0 | IXGB_INT_TXDW |
  182. IXGB_INT_LSC);
  183. IXGB_WRITE_FLUSH(&adapter->hw);
  184. }
  185. }
  186. int
  187. ixgb_up(struct ixgb_adapter *adapter)
  188. {
  189. struct net_device *netdev = adapter->netdev;
  190. int err;
  191. int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  192. struct ixgb_hw *hw = &adapter->hw;
  193. /* hardware has been reset, we need to reload some things */
  194. ixgb_set_multi(netdev);
  195. ixgb_restore_vlan(adapter);
  196. ixgb_configure_tx(adapter);
  197. ixgb_setup_rctl(adapter);
  198. ixgb_configure_rx(adapter);
  199. ixgb_alloc_rx_buffers(adapter);
  200. #ifdef CONFIG_PCI_MSI
  201. {
  202. boolean_t pcix = (IXGB_READ_REG(&adapter->hw, STATUS) &
  203. IXGB_STATUS_PCIX_MODE) ? TRUE : FALSE;
  204. adapter->have_msi = TRUE;
  205. if (!pcix)
  206. adapter->have_msi = FALSE;
  207. else if((err = pci_enable_msi(adapter->pdev))) {
  208. printk (KERN_ERR
  209. "Unable to allocate MSI interrupt Error: %d\n", err);
  210. adapter->have_msi = FALSE;
  211. /* proceed to try to request regular interrupt */
  212. }
  213. }
  214. #endif
  215. if((err = request_irq(adapter->pdev->irq, &ixgb_intr,
  216. SA_SHIRQ | SA_SAMPLE_RANDOM,
  217. netdev->name, netdev)))
  218. return err;
  219. /* disable interrupts and get the hardware into a known state */
  220. IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
  221. if((hw->max_frame_size != max_frame) ||
  222. (hw->max_frame_size !=
  223. (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) {
  224. hw->max_frame_size = max_frame;
  225. IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
  226. if(hw->max_frame_size >
  227. IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
  228. uint32_t ctrl0 = IXGB_READ_REG(hw, CTRL0);
  229. if(!(ctrl0 & IXGB_CTRL0_JFE)) {
  230. ctrl0 |= IXGB_CTRL0_JFE;
  231. IXGB_WRITE_REG(hw, CTRL0, ctrl0);
  232. }
  233. }
  234. }
  235. mod_timer(&adapter->watchdog_timer, jiffies);
  236. ixgb_irq_enable(adapter);
  237. #ifdef CONFIG_IXGB_NAPI
  238. netif_poll_enable(netdev);
  239. #endif
  240. return 0;
  241. }
  242. void
  243. ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog)
  244. {
  245. struct net_device *netdev = adapter->netdev;
  246. ixgb_irq_disable(adapter);
  247. free_irq(adapter->pdev->irq, netdev);
  248. #ifdef CONFIG_PCI_MSI
  249. if(adapter->have_msi == TRUE)
  250. pci_disable_msi(adapter->pdev);
  251. #endif
  252. if(kill_watchdog)
  253. del_timer_sync(&adapter->watchdog_timer);
  254. #ifdef CONFIG_IXGB_NAPI
  255. netif_poll_disable(netdev);
  256. #endif
  257. adapter->link_speed = 0;
  258. adapter->link_duplex = 0;
  259. netif_carrier_off(netdev);
  260. netif_stop_queue(netdev);
  261. ixgb_reset(adapter);
  262. ixgb_clean_tx_ring(adapter);
  263. ixgb_clean_rx_ring(adapter);
  264. }
  265. void
  266. ixgb_reset(struct ixgb_adapter *adapter)
  267. {
  268. ixgb_adapter_stop(&adapter->hw);
  269. if(!ixgb_init_hw(&adapter->hw))
  270. IXGB_DBG("ixgb_init_hw failed.\n");
  271. }
  272. /**
  273. * ixgb_probe - Device Initialization Routine
  274. * @pdev: PCI device information struct
  275. * @ent: entry in ixgb_pci_tbl
  276. *
  277. * Returns 0 on success, negative on failure
  278. *
  279. * ixgb_probe initializes an adapter identified by a pci_dev structure.
  280. * The OS initialization, configuring of the adapter private structure,
  281. * and a hardware reset occur.
  282. **/
  283. static int __devinit
  284. ixgb_probe(struct pci_dev *pdev,
  285. const struct pci_device_id *ent)
  286. {
  287. struct net_device *netdev = NULL;
  288. struct ixgb_adapter *adapter;
  289. static int cards_found = 0;
  290. unsigned long mmio_start;
  291. int mmio_len;
  292. int pci_using_dac;
  293. int i;
  294. int err;
  295. if((err = pci_enable_device(pdev)))
  296. return err;
  297. if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
  298. pci_using_dac = 1;
  299. } else {
  300. if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
  301. IXGB_ERR("No usable DMA configuration, aborting\n");
  302. return err;
  303. }
  304. pci_using_dac = 0;
  305. }
  306. if((err = pci_request_regions(pdev, ixgb_driver_name)))
  307. return err;
  308. pci_set_master(pdev);
  309. netdev = alloc_etherdev(sizeof(struct ixgb_adapter));
  310. if(!netdev) {
  311. err = -ENOMEM;
  312. goto err_alloc_etherdev;
  313. }
  314. SET_MODULE_OWNER(netdev);
  315. SET_NETDEV_DEV(netdev, &pdev->dev);
  316. pci_set_drvdata(pdev, netdev);
  317. adapter = netdev_priv(netdev);
  318. adapter->netdev = netdev;
  319. adapter->pdev = pdev;
  320. adapter->hw.back = adapter;
  321. mmio_start = pci_resource_start(pdev, BAR_0);
  322. mmio_len = pci_resource_len(pdev, BAR_0);
  323. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  324. if(!adapter->hw.hw_addr) {
  325. err = -EIO;
  326. goto err_ioremap;
  327. }
  328. for(i = BAR_1; i <= BAR_5; i++) {
  329. if(pci_resource_len(pdev, i) == 0)
  330. continue;
  331. if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  332. adapter->hw.io_base = pci_resource_start(pdev, i);
  333. break;
  334. }
  335. }
  336. netdev->open = &ixgb_open;
  337. netdev->stop = &ixgb_close;
  338. netdev->hard_start_xmit = &ixgb_xmit_frame;
  339. netdev->get_stats = &ixgb_get_stats;
  340. netdev->set_multicast_list = &ixgb_set_multi;
  341. netdev->set_mac_address = &ixgb_set_mac;
  342. netdev->change_mtu = &ixgb_change_mtu;
  343. ixgb_set_ethtool_ops(netdev);
  344. netdev->tx_timeout = &ixgb_tx_timeout;
  345. netdev->watchdog_timeo = HZ;
  346. #ifdef CONFIG_IXGB_NAPI
  347. netdev->poll = &ixgb_clean;
  348. netdev->weight = 64;
  349. #endif
  350. netdev->vlan_rx_register = ixgb_vlan_rx_register;
  351. netdev->vlan_rx_add_vid = ixgb_vlan_rx_add_vid;
  352. netdev->vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid;
  353. #ifdef CONFIG_NET_POLL_CONTROLLER
  354. netdev->poll_controller = ixgb_netpoll;
  355. #endif
  356. netdev->mem_start = mmio_start;
  357. netdev->mem_end = mmio_start + mmio_len;
  358. netdev->base_addr = adapter->hw.io_base;
  359. adapter->bd_number = cards_found;
  360. adapter->link_speed = 0;
  361. adapter->link_duplex = 0;
  362. /* setup the private structure */
  363. if((err = ixgb_sw_init(adapter)))
  364. goto err_sw_init;
  365. netdev->features = NETIF_F_SG |
  366. NETIF_F_HW_CSUM |
  367. NETIF_F_HW_VLAN_TX |
  368. NETIF_F_HW_VLAN_RX |
  369. NETIF_F_HW_VLAN_FILTER;
  370. #ifdef NETIF_F_TSO
  371. netdev->features |= NETIF_F_TSO;
  372. #endif
  373. if(pci_using_dac)
  374. netdev->features |= NETIF_F_HIGHDMA;
  375. /* make sure the EEPROM is good */
  376. if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
  377. printk(KERN_ERR "The EEPROM Checksum Is Not Valid\n");
  378. err = -EIO;
  379. goto err_eeprom;
  380. }
  381. ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
  382. if(!is_valid_ether_addr(netdev->dev_addr)) {
  383. err = -EIO;
  384. goto err_eeprom;
  385. }
  386. adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw);
  387. init_timer(&adapter->watchdog_timer);
  388. adapter->watchdog_timer.function = &ixgb_watchdog;
  389. adapter->watchdog_timer.data = (unsigned long)adapter;
  390. INIT_WORK(&adapter->tx_timeout_task,
  391. (void (*)(void *))ixgb_tx_timeout_task, netdev);
  392. if((err = register_netdev(netdev)))
  393. goto err_register;
  394. /* we're going to reset, so assume we have no link for now */
  395. netif_carrier_off(netdev);
  396. netif_stop_queue(netdev);
  397. printk(KERN_INFO "%s: Intel(R) PRO/10GbE Network Connection\n",
  398. netdev->name);
  399. ixgb_check_options(adapter);
  400. /* reset the hardware with the new settings */
  401. ixgb_reset(adapter);
  402. cards_found++;
  403. return 0;
  404. err_register:
  405. err_sw_init:
  406. err_eeprom:
  407. iounmap(adapter->hw.hw_addr);
  408. err_ioremap:
  409. free_netdev(netdev);
  410. err_alloc_etherdev:
  411. pci_release_regions(pdev);
  412. return err;
  413. }
  414. /**
  415. * ixgb_remove - Device Removal Routine
  416. * @pdev: PCI device information struct
  417. *
  418. * ixgb_remove is called by the PCI subsystem to alert the driver
  419. * that it should release a PCI device. The could be caused by a
  420. * Hot-Plug event, or because the driver is going to be removed from
  421. * memory.
  422. **/
  423. static void __devexit
  424. ixgb_remove(struct pci_dev *pdev)
  425. {
  426. struct net_device *netdev = pci_get_drvdata(pdev);
  427. struct ixgb_adapter *adapter = netdev_priv(netdev);
  428. unregister_netdev(netdev);
  429. iounmap(adapter->hw.hw_addr);
  430. pci_release_regions(pdev);
  431. free_netdev(netdev);
  432. }
  433. /**
  434. * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter)
  435. * @adapter: board private structure to initialize
  436. *
  437. * ixgb_sw_init initializes the Adapter private data structure.
  438. * Fields are initialized based on PCI device information and
  439. * OS network device settings (MTU size).
  440. **/
  441. static int __devinit
  442. ixgb_sw_init(struct ixgb_adapter *adapter)
  443. {
  444. struct ixgb_hw *hw = &adapter->hw;
  445. struct net_device *netdev = adapter->netdev;
  446. struct pci_dev *pdev = adapter->pdev;
  447. /* PCI config space info */
  448. hw->vendor_id = pdev->vendor;
  449. hw->device_id = pdev->device;
  450. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  451. hw->subsystem_id = pdev->subsystem_device;
  452. adapter->rx_buffer_len = IXGB_RXBUFFER_2048;
  453. hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  454. if((hw->device_id == IXGB_DEVICE_ID_82597EX)
  455. ||(hw->device_id == IXGB_DEVICE_ID_82597EX_LR)
  456. ||(hw->device_id == IXGB_DEVICE_ID_82597EX_SR))
  457. hw->mac_type = ixgb_82597;
  458. else {
  459. /* should never have loaded on this device */
  460. printk(KERN_ERR "ixgb: unsupported device id\n");
  461. }
  462. /* enable flow control to be programmed */
  463. hw->fc.send_xon = 1;
  464. atomic_set(&adapter->irq_sem, 1);
  465. spin_lock_init(&adapter->tx_lock);
  466. return 0;
  467. }
  468. /**
  469. * ixgb_open - Called when a network interface is made active
  470. * @netdev: network interface device structure
  471. *
  472. * Returns 0 on success, negative value on failure
  473. *
  474. * The open entry point is called when a network interface is made
  475. * active by the system (IFF_UP). At this point all resources needed
  476. * for transmit and receive operations are allocated, the interrupt
  477. * handler is registered with the OS, the watchdog timer is started,
  478. * and the stack is notified that the interface is ready.
  479. **/
  480. static int
  481. ixgb_open(struct net_device *netdev)
  482. {
  483. struct ixgb_adapter *adapter = netdev_priv(netdev);
  484. int err;
  485. /* allocate transmit descriptors */
  486. if((err = ixgb_setup_tx_resources(adapter)))
  487. goto err_setup_tx;
  488. /* allocate receive descriptors */
  489. if((err = ixgb_setup_rx_resources(adapter)))
  490. goto err_setup_rx;
  491. if((err = ixgb_up(adapter)))
  492. goto err_up;
  493. return 0;
  494. err_up:
  495. ixgb_free_rx_resources(adapter);
  496. err_setup_rx:
  497. ixgb_free_tx_resources(adapter);
  498. err_setup_tx:
  499. ixgb_reset(adapter);
  500. return err;
  501. }
  502. /**
  503. * ixgb_close - Disables a network interface
  504. * @netdev: network interface device structure
  505. *
  506. * Returns 0, this is not allowed to fail
  507. *
  508. * The close entry point is called when an interface is de-activated
  509. * by the OS. The hardware is still under the drivers control, but
  510. * needs to be disabled. A global MAC reset is issued to stop the
  511. * hardware, and all transmit and receive resources are freed.
  512. **/
  513. static int
  514. ixgb_close(struct net_device *netdev)
  515. {
  516. struct ixgb_adapter *adapter = netdev_priv(netdev);
  517. ixgb_down(adapter, TRUE);
  518. ixgb_free_tx_resources(adapter);
  519. ixgb_free_rx_resources(adapter);
  520. return 0;
  521. }
  522. /**
  523. * ixgb_setup_tx_resources - allocate Tx resources (Descriptors)
  524. * @adapter: board private structure
  525. *
  526. * Return 0 on success, negative on failure
  527. **/
  528. int
  529. ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
  530. {
  531. struct ixgb_desc_ring *txdr = &adapter->tx_ring;
  532. struct pci_dev *pdev = adapter->pdev;
  533. int size;
  534. size = sizeof(struct ixgb_buffer) * txdr->count;
  535. txdr->buffer_info = vmalloc(size);
  536. if(!txdr->buffer_info) {
  537. return -ENOMEM;
  538. }
  539. memset(txdr->buffer_info, 0, size);
  540. /* round up to nearest 4K */
  541. txdr->size = txdr->count * sizeof(struct ixgb_tx_desc);
  542. IXGB_ROUNDUP(txdr->size, 4096);
  543. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  544. if(!txdr->desc) {
  545. vfree(txdr->buffer_info);
  546. return -ENOMEM;
  547. }
  548. memset(txdr->desc, 0, txdr->size);
  549. txdr->next_to_use = 0;
  550. txdr->next_to_clean = 0;
  551. return 0;
  552. }
  553. /**
  554. * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset.
  555. * @adapter: board private structure
  556. *
  557. * Configure the Tx unit of the MAC after a reset.
  558. **/
  559. static void
  560. ixgb_configure_tx(struct ixgb_adapter *adapter)
  561. {
  562. uint64_t tdba = adapter->tx_ring.dma;
  563. uint32_t tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
  564. uint32_t tctl;
  565. struct ixgb_hw *hw = &adapter->hw;
  566. /* Setup the Base and Length of the Tx Descriptor Ring
  567. * tx_ring.dma can be either a 32 or 64 bit value
  568. */
  569. IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  570. IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32));
  571. IXGB_WRITE_REG(hw, TDLEN, tdlen);
  572. /* Setup the HW Tx Head and Tail descriptor pointers */
  573. IXGB_WRITE_REG(hw, TDH, 0);
  574. IXGB_WRITE_REG(hw, TDT, 0);
  575. /* don't set up txdctl, it induces performance problems if configured
  576. * incorrectly */
  577. /* Set the Tx Interrupt Delay register */
  578. IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  579. /* Program the Transmit Control Register */
  580. tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
  581. IXGB_WRITE_REG(hw, TCTL, tctl);
  582. /* Setup Transmit Descriptor Settings for this adapter */
  583. adapter->tx_cmd_type =
  584. IXGB_TX_DESC_TYPE
  585. | (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0);
  586. }
  587. /**
  588. * ixgb_setup_rx_resources - allocate Rx resources (Descriptors)
  589. * @adapter: board private structure
  590. *
  591. * Returns 0 on success, negative on failure
  592. **/
  593. int
  594. ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
  595. {
  596. struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
  597. struct pci_dev *pdev = adapter->pdev;
  598. int size;
  599. size = sizeof(struct ixgb_buffer) * rxdr->count;
  600. rxdr->buffer_info = vmalloc(size);
  601. if(!rxdr->buffer_info) {
  602. return -ENOMEM;
  603. }
  604. memset(rxdr->buffer_info, 0, size);
  605. /* Round up to nearest 4K */
  606. rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc);
  607. IXGB_ROUNDUP(rxdr->size, 4096);
  608. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  609. if(!rxdr->desc) {
  610. vfree(rxdr->buffer_info);
  611. return -ENOMEM;
  612. }
  613. memset(rxdr->desc, 0, rxdr->size);
  614. rxdr->next_to_clean = 0;
  615. rxdr->next_to_use = 0;
  616. return 0;
  617. }
  618. /**
  619. * ixgb_setup_rctl - configure the receive control register
  620. * @adapter: Board private structure
  621. **/
  622. static void
  623. ixgb_setup_rctl(struct ixgb_adapter *adapter)
  624. {
  625. uint32_t rctl;
  626. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  627. rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
  628. rctl |=
  629. IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 |
  630. IXGB_RCTL_RXEN | IXGB_RCTL_CFF |
  631. (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
  632. rctl |= IXGB_RCTL_SECRC;
  633. switch (adapter->rx_buffer_len) {
  634. case IXGB_RXBUFFER_2048:
  635. default:
  636. rctl |= IXGB_RCTL_BSIZE_2048;
  637. break;
  638. case IXGB_RXBUFFER_4096:
  639. rctl |= IXGB_RCTL_BSIZE_4096;
  640. break;
  641. case IXGB_RXBUFFER_8192:
  642. rctl |= IXGB_RCTL_BSIZE_8192;
  643. break;
  644. case IXGB_RXBUFFER_16384:
  645. rctl |= IXGB_RCTL_BSIZE_16384;
  646. break;
  647. }
  648. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  649. }
  650. /**
  651. * ixgb_configure_rx - Configure 82597 Receive Unit after Reset.
  652. * @adapter: board private structure
  653. *
  654. * Configure the Rx unit of the MAC after a reset.
  655. **/
  656. static void
  657. ixgb_configure_rx(struct ixgb_adapter *adapter)
  658. {
  659. uint64_t rdba = adapter->rx_ring.dma;
  660. uint32_t rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
  661. struct ixgb_hw *hw = &adapter->hw;
  662. uint32_t rctl;
  663. uint32_t rxcsum;
  664. uint32_t rxdctl;
  665. /* make sure receives are disabled while setting up the descriptors */
  666. rctl = IXGB_READ_REG(hw, RCTL);
  667. IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN);
  668. /* set the Receive Delay Timer Register */
  669. IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  670. /* Setup the Base and Length of the Rx Descriptor Ring */
  671. IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  672. IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32));
  673. IXGB_WRITE_REG(hw, RDLEN, rdlen);
  674. /* Setup the HW Rx Head and Tail Descriptor Pointers */
  675. IXGB_WRITE_REG(hw, RDH, 0);
  676. IXGB_WRITE_REG(hw, RDT, 0);
  677. /* set up pre-fetching of receive buffers so we get some before we
  678. * run out (default hardware behavior is to run out before fetching
  679. * more). This sets up to fetch if HTHRESH rx descriptors are avail
  680. * and the descriptors in hw cache are below PTHRESH. This avoids
  681. * the hardware behavior of fetching <=512 descriptors in a single
  682. * burst that pre-empts all other activity, usually causing fifo
  683. * overflows. */
  684. /* use WTHRESH to burst write 16 descriptors or burst when RXT0 */
  685. rxdctl = RXDCTL_WTHRESH_DEFAULT << IXGB_RXDCTL_WTHRESH_SHIFT |
  686. RXDCTL_HTHRESH_DEFAULT << IXGB_RXDCTL_HTHRESH_SHIFT |
  687. RXDCTL_PTHRESH_DEFAULT << IXGB_RXDCTL_PTHRESH_SHIFT;
  688. IXGB_WRITE_REG(hw, RXDCTL, rxdctl);
  689. /* Enable Receive Checksum Offload for TCP and UDP */
  690. if(adapter->rx_csum == TRUE) {
  691. rxcsum = IXGB_READ_REG(hw, RXCSUM);
  692. rxcsum |= IXGB_RXCSUM_TUOFL;
  693. IXGB_WRITE_REG(hw, RXCSUM, rxcsum);
  694. }
  695. /* Enable Receives */
  696. IXGB_WRITE_REG(hw, RCTL, rctl);
  697. }
  698. /**
  699. * ixgb_free_tx_resources - Free Tx Resources
  700. * @adapter: board private structure
  701. *
  702. * Free all transmit software resources
  703. **/
  704. void
  705. ixgb_free_tx_resources(struct ixgb_adapter *adapter)
  706. {
  707. struct pci_dev *pdev = adapter->pdev;
  708. ixgb_clean_tx_ring(adapter);
  709. vfree(adapter->tx_ring.buffer_info);
  710. adapter->tx_ring.buffer_info = NULL;
  711. pci_free_consistent(pdev, adapter->tx_ring.size,
  712. adapter->tx_ring.desc, adapter->tx_ring.dma);
  713. adapter->tx_ring.desc = NULL;
  714. }
  715. static inline void
  716. ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter,
  717. struct ixgb_buffer *buffer_info)
  718. {
  719. struct pci_dev *pdev = adapter->pdev;
  720. if(buffer_info->dma) {
  721. pci_unmap_page(pdev,
  722. buffer_info->dma,
  723. buffer_info->length,
  724. PCI_DMA_TODEVICE);
  725. buffer_info->dma = 0;
  726. }
  727. if(buffer_info->skb) {
  728. dev_kfree_skb_any(buffer_info->skb);
  729. buffer_info->skb = NULL;
  730. }
  731. }
  732. /**
  733. * ixgb_clean_tx_ring - Free Tx Buffers
  734. * @adapter: board private structure
  735. **/
  736. static void
  737. ixgb_clean_tx_ring(struct ixgb_adapter *adapter)
  738. {
  739. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  740. struct ixgb_buffer *buffer_info;
  741. unsigned long size;
  742. unsigned int i;
  743. /* Free all the Tx ring sk_buffs */
  744. for(i = 0; i < tx_ring->count; i++) {
  745. buffer_info = &tx_ring->buffer_info[i];
  746. ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
  747. }
  748. size = sizeof(struct ixgb_buffer) * tx_ring->count;
  749. memset(tx_ring->buffer_info, 0, size);
  750. /* Zero out the descriptor ring */
  751. memset(tx_ring->desc, 0, tx_ring->size);
  752. tx_ring->next_to_use = 0;
  753. tx_ring->next_to_clean = 0;
  754. IXGB_WRITE_REG(&adapter->hw, TDH, 0);
  755. IXGB_WRITE_REG(&adapter->hw, TDT, 0);
  756. }
  757. /**
  758. * ixgb_free_rx_resources - Free Rx Resources
  759. * @adapter: board private structure
  760. *
  761. * Free all receive software resources
  762. **/
  763. void
  764. ixgb_free_rx_resources(struct ixgb_adapter *adapter)
  765. {
  766. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  767. struct pci_dev *pdev = adapter->pdev;
  768. ixgb_clean_rx_ring(adapter);
  769. vfree(rx_ring->buffer_info);
  770. rx_ring->buffer_info = NULL;
  771. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  772. rx_ring->desc = NULL;
  773. }
  774. /**
  775. * ixgb_clean_rx_ring - Free Rx Buffers
  776. * @adapter: board private structure
  777. **/
  778. static void
  779. ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
  780. {
  781. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  782. struct ixgb_buffer *buffer_info;
  783. struct pci_dev *pdev = adapter->pdev;
  784. unsigned long size;
  785. unsigned int i;
  786. /* Free all the Rx ring sk_buffs */
  787. for(i = 0; i < rx_ring->count; i++) {
  788. buffer_info = &rx_ring->buffer_info[i];
  789. if(buffer_info->skb) {
  790. pci_unmap_single(pdev,
  791. buffer_info->dma,
  792. buffer_info->length,
  793. PCI_DMA_FROMDEVICE);
  794. dev_kfree_skb(buffer_info->skb);
  795. buffer_info->skb = NULL;
  796. }
  797. }
  798. size = sizeof(struct ixgb_buffer) * rx_ring->count;
  799. memset(rx_ring->buffer_info, 0, size);
  800. /* Zero out the descriptor ring */
  801. memset(rx_ring->desc, 0, rx_ring->size);
  802. rx_ring->next_to_clean = 0;
  803. rx_ring->next_to_use = 0;
  804. IXGB_WRITE_REG(&adapter->hw, RDH, 0);
  805. IXGB_WRITE_REG(&adapter->hw, RDT, 0);
  806. }
  807. /**
  808. * ixgb_set_mac - Change the Ethernet Address of the NIC
  809. * @netdev: network interface device structure
  810. * @p: pointer to an address structure
  811. *
  812. * Returns 0 on success, negative on failure
  813. **/
  814. static int
  815. ixgb_set_mac(struct net_device *netdev, void *p)
  816. {
  817. struct ixgb_adapter *adapter = netdev_priv(netdev);
  818. struct sockaddr *addr = p;
  819. if(!is_valid_ether_addr(addr->sa_data))
  820. return -EADDRNOTAVAIL;
  821. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  822. ixgb_rar_set(&adapter->hw, addr->sa_data, 0);
  823. return 0;
  824. }
  825. /**
  826. * ixgb_set_multi - Multicast and Promiscuous mode set
  827. * @netdev: network interface device structure
  828. *
  829. * The set_multi entry point is called whenever the multicast address
  830. * list or the network interface flags are updated. This routine is
  831. * responsible for configuring the hardware for proper multicast,
  832. * promiscuous mode, and all-multi behavior.
  833. **/
  834. static void
  835. ixgb_set_multi(struct net_device *netdev)
  836. {
  837. struct ixgb_adapter *adapter = netdev_priv(netdev);
  838. struct ixgb_hw *hw = &adapter->hw;
  839. struct dev_mc_list *mc_ptr;
  840. uint32_t rctl;
  841. int i;
  842. /* Check for Promiscuous and All Multicast modes */
  843. rctl = IXGB_READ_REG(hw, RCTL);
  844. if(netdev->flags & IFF_PROMISC) {
  845. rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
  846. } else if(netdev->flags & IFF_ALLMULTI) {
  847. rctl |= IXGB_RCTL_MPE;
  848. rctl &= ~IXGB_RCTL_UPE;
  849. } else {
  850. rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE);
  851. }
  852. if(netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES) {
  853. rctl |= IXGB_RCTL_MPE;
  854. IXGB_WRITE_REG(hw, RCTL, rctl);
  855. } else {
  856. uint8_t mta[netdev->mc_count * IXGB_ETH_LENGTH_OF_ADDRESS];
  857. IXGB_WRITE_REG(hw, RCTL, rctl);
  858. for(i = 0, mc_ptr = netdev->mc_list; mc_ptr;
  859. i++, mc_ptr = mc_ptr->next)
  860. memcpy(&mta[i * IXGB_ETH_LENGTH_OF_ADDRESS],
  861. mc_ptr->dmi_addr, IXGB_ETH_LENGTH_OF_ADDRESS);
  862. ixgb_mc_addr_list_update(hw, mta, netdev->mc_count, 0);
  863. }
  864. }
  865. /**
  866. * ixgb_watchdog - Timer Call-back
  867. * @data: pointer to netdev cast into an unsigned long
  868. **/
  869. static void
  870. ixgb_watchdog(unsigned long data)
  871. {
  872. struct ixgb_adapter *adapter = (struct ixgb_adapter *)data;
  873. struct net_device *netdev = adapter->netdev;
  874. struct ixgb_desc_ring *txdr = &adapter->tx_ring;
  875. ixgb_check_for_link(&adapter->hw);
  876. if (ixgb_check_for_bad_link(&adapter->hw)) {
  877. /* force the reset path */
  878. netif_stop_queue(netdev);
  879. }
  880. if(adapter->hw.link_up) {
  881. if(!netif_carrier_ok(netdev)) {
  882. printk(KERN_INFO "ixgb: %s NIC Link is Up %d Mbps %s\n",
  883. netdev->name, 10000, "Full Duplex");
  884. adapter->link_speed = 10000;
  885. adapter->link_duplex = FULL_DUPLEX;
  886. netif_carrier_on(netdev);
  887. netif_wake_queue(netdev);
  888. }
  889. } else {
  890. if(netif_carrier_ok(netdev)) {
  891. adapter->link_speed = 0;
  892. adapter->link_duplex = 0;
  893. printk(KERN_INFO
  894. "ixgb: %s NIC Link is Down\n",
  895. netdev->name);
  896. netif_carrier_off(netdev);
  897. netif_stop_queue(netdev);
  898. }
  899. }
  900. ixgb_update_stats(adapter);
  901. if(!netif_carrier_ok(netdev)) {
  902. if(IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) {
  903. /* We've lost link, so the controller stops DMA,
  904. * but we've got queued Tx work that's never going
  905. * to get done, so reset controller to flush Tx.
  906. * (Do the reset outside of interrupt context). */
  907. schedule_work(&adapter->tx_timeout_task);
  908. }
  909. }
  910. /* Force detection of hung controller every watchdog period */
  911. adapter->detect_tx_hung = TRUE;
  912. /* generate an interrupt to force clean up of any stragglers */
  913. IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW);
  914. /* Reset the timer */
  915. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  916. }
  917. #define IXGB_TX_FLAGS_CSUM 0x00000001
  918. #define IXGB_TX_FLAGS_VLAN 0x00000002
  919. #define IXGB_TX_FLAGS_TSO 0x00000004
  920. static inline int
  921. ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
  922. {
  923. #ifdef NETIF_F_TSO
  924. struct ixgb_context_desc *context_desc;
  925. unsigned int i;
  926. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  927. uint16_t ipcse, tucse, mss;
  928. int err;
  929. if(likely(skb_shinfo(skb)->tso_size)) {
  930. if (skb_header_cloned(skb)) {
  931. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  932. if (err)
  933. return err;
  934. }
  935. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  936. mss = skb_shinfo(skb)->tso_size;
  937. skb->nh.iph->tot_len = 0;
  938. skb->nh.iph->check = 0;
  939. skb->h.th->check = ~csum_tcpudp_magic(skb->nh.iph->saddr,
  940. skb->nh.iph->daddr,
  941. 0, IPPROTO_TCP, 0);
  942. ipcss = skb->nh.raw - skb->data;
  943. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  944. ipcse = skb->h.raw - skb->data - 1;
  945. tucss = skb->h.raw - skb->data;
  946. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  947. tucse = 0;
  948. i = adapter->tx_ring.next_to_use;
  949. context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
  950. context_desc->ipcss = ipcss;
  951. context_desc->ipcso = ipcso;
  952. context_desc->ipcse = cpu_to_le16(ipcse);
  953. context_desc->tucss = tucss;
  954. context_desc->tucso = tucso;
  955. context_desc->tucse = cpu_to_le16(tucse);
  956. context_desc->mss = cpu_to_le16(mss);
  957. context_desc->hdr_len = hdr_len;
  958. context_desc->status = 0;
  959. context_desc->cmd_type_len = cpu_to_le32(
  960. IXGB_CONTEXT_DESC_TYPE
  961. | IXGB_CONTEXT_DESC_CMD_TSE
  962. | IXGB_CONTEXT_DESC_CMD_IP
  963. | IXGB_CONTEXT_DESC_CMD_TCP
  964. | IXGB_CONTEXT_DESC_CMD_IDE
  965. | (skb->len - (hdr_len)));
  966. if(++i == adapter->tx_ring.count) i = 0;
  967. adapter->tx_ring.next_to_use = i;
  968. return 1;
  969. }
  970. #endif
  971. return 0;
  972. }
  973. static inline boolean_t
  974. ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
  975. {
  976. struct ixgb_context_desc *context_desc;
  977. unsigned int i;
  978. uint8_t css, cso;
  979. if(likely(skb->ip_summed == CHECKSUM_HW)) {
  980. css = skb->h.raw - skb->data;
  981. cso = (skb->h.raw + skb->csum) - skb->data;
  982. i = adapter->tx_ring.next_to_use;
  983. context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
  984. context_desc->tucss = css;
  985. context_desc->tucso = cso;
  986. context_desc->tucse = 0;
  987. /* zero out any previously existing data in one instruction */
  988. *(uint32_t *)&(context_desc->ipcss) = 0;
  989. context_desc->status = 0;
  990. context_desc->hdr_len = 0;
  991. context_desc->mss = 0;
  992. context_desc->cmd_type_len =
  993. cpu_to_le32(IXGB_CONTEXT_DESC_TYPE
  994. | IXGB_TX_DESC_CMD_IDE);
  995. if(++i == adapter->tx_ring.count) i = 0;
  996. adapter->tx_ring.next_to_use = i;
  997. return TRUE;
  998. }
  999. return FALSE;
  1000. }
  1001. #define IXGB_MAX_TXD_PWR 14
  1002. #define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR)
  1003. static inline int
  1004. ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
  1005. unsigned int first)
  1006. {
  1007. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1008. struct ixgb_buffer *buffer_info;
  1009. int len = skb->len;
  1010. unsigned int offset = 0, size, count = 0, i;
  1011. unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
  1012. unsigned int f;
  1013. len -= skb->data_len;
  1014. i = tx_ring->next_to_use;
  1015. while(len) {
  1016. buffer_info = &tx_ring->buffer_info[i];
  1017. size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
  1018. buffer_info->length = size;
  1019. buffer_info->dma =
  1020. pci_map_single(adapter->pdev,
  1021. skb->data + offset,
  1022. size,
  1023. PCI_DMA_TODEVICE);
  1024. buffer_info->time_stamp = jiffies;
  1025. len -= size;
  1026. offset += size;
  1027. count++;
  1028. if(++i == tx_ring->count) i = 0;
  1029. }
  1030. for(f = 0; f < nr_frags; f++) {
  1031. struct skb_frag_struct *frag;
  1032. frag = &skb_shinfo(skb)->frags[f];
  1033. len = frag->size;
  1034. offset = 0;
  1035. while(len) {
  1036. buffer_info = &tx_ring->buffer_info[i];
  1037. size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
  1038. buffer_info->length = size;
  1039. buffer_info->dma =
  1040. pci_map_page(adapter->pdev,
  1041. frag->page,
  1042. frag->page_offset + offset,
  1043. size,
  1044. PCI_DMA_TODEVICE);
  1045. buffer_info->time_stamp = jiffies;
  1046. len -= size;
  1047. offset += size;
  1048. count++;
  1049. if(++i == tx_ring->count) i = 0;
  1050. }
  1051. }
  1052. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  1053. tx_ring->buffer_info[i].skb = skb;
  1054. tx_ring->buffer_info[first].next_to_watch = i;
  1055. return count;
  1056. }
  1057. static inline void
  1058. ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
  1059. {
  1060. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1061. struct ixgb_tx_desc *tx_desc = NULL;
  1062. struct ixgb_buffer *buffer_info;
  1063. uint32_t cmd_type_len = adapter->tx_cmd_type;
  1064. uint8_t status = 0;
  1065. uint8_t popts = 0;
  1066. unsigned int i;
  1067. if(tx_flags & IXGB_TX_FLAGS_TSO) {
  1068. cmd_type_len |= IXGB_TX_DESC_CMD_TSE;
  1069. popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM);
  1070. }
  1071. if(tx_flags & IXGB_TX_FLAGS_CSUM)
  1072. popts |= IXGB_TX_DESC_POPTS_TXSM;
  1073. if(tx_flags & IXGB_TX_FLAGS_VLAN) {
  1074. cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
  1075. }
  1076. i = tx_ring->next_to_use;
  1077. while(count--) {
  1078. buffer_info = &tx_ring->buffer_info[i];
  1079. tx_desc = IXGB_TX_DESC(*tx_ring, i);
  1080. tx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
  1081. tx_desc->cmd_type_len =
  1082. cpu_to_le32(cmd_type_len | buffer_info->length);
  1083. tx_desc->status = status;
  1084. tx_desc->popts = popts;
  1085. tx_desc->vlan = cpu_to_le16(vlan_id);
  1086. if(++i == tx_ring->count) i = 0;
  1087. }
  1088. tx_desc->cmd_type_len |= cpu_to_le32(IXGB_TX_DESC_CMD_EOP
  1089. | IXGB_TX_DESC_CMD_RS );
  1090. /* Force memory writes to complete before letting h/w
  1091. * know there are new descriptors to fetch. (Only
  1092. * applicable for weak-ordered memory model archs,
  1093. * such as IA-64). */
  1094. wmb();
  1095. tx_ring->next_to_use = i;
  1096. IXGB_WRITE_REG(&adapter->hw, TDT, i);
  1097. }
  1098. /* Tx Descriptors needed, worst case */
  1099. #define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
  1100. (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
  1101. #define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) + \
  1102. MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1
  1103. static int
  1104. ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  1105. {
  1106. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1107. unsigned int first;
  1108. unsigned int tx_flags = 0;
  1109. unsigned long flags;
  1110. int vlan_id = 0;
  1111. int tso;
  1112. if(skb->len <= 0) {
  1113. dev_kfree_skb_any(skb);
  1114. return 0;
  1115. }
  1116. spin_lock_irqsave(&adapter->tx_lock, flags);
  1117. if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED)) {
  1118. netif_stop_queue(netdev);
  1119. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1120. return 1;
  1121. }
  1122. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1123. if(adapter->vlgrp && vlan_tx_tag_present(skb)) {
  1124. tx_flags |= IXGB_TX_FLAGS_VLAN;
  1125. vlan_id = vlan_tx_tag_get(skb);
  1126. }
  1127. first = adapter->tx_ring.next_to_use;
  1128. tso = ixgb_tso(adapter, skb);
  1129. if (tso < 0) {
  1130. dev_kfree_skb_any(skb);
  1131. return NETDEV_TX_OK;
  1132. }
  1133. if (tso)
  1134. tx_flags |= IXGB_TX_FLAGS_TSO;
  1135. else if(ixgb_tx_csum(adapter, skb))
  1136. tx_flags |= IXGB_TX_FLAGS_CSUM;
  1137. ixgb_tx_queue(adapter, ixgb_tx_map(adapter, skb, first), vlan_id,
  1138. tx_flags);
  1139. netdev->trans_start = jiffies;
  1140. return 0;
  1141. }
  1142. /**
  1143. * ixgb_tx_timeout - Respond to a Tx Hang
  1144. * @netdev: network interface device structure
  1145. **/
  1146. static void
  1147. ixgb_tx_timeout(struct net_device *netdev)
  1148. {
  1149. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1150. /* Do the reset outside of interrupt context */
  1151. schedule_work(&adapter->tx_timeout_task);
  1152. }
  1153. static void
  1154. ixgb_tx_timeout_task(struct net_device *netdev)
  1155. {
  1156. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1157. ixgb_down(adapter, TRUE);
  1158. ixgb_up(adapter);
  1159. }
  1160. /**
  1161. * ixgb_get_stats - Get System Network Statistics
  1162. * @netdev: network interface device structure
  1163. *
  1164. * Returns the address of the device statistics structure.
  1165. * The statistics are actually updated from the timer callback.
  1166. **/
  1167. static struct net_device_stats *
  1168. ixgb_get_stats(struct net_device *netdev)
  1169. {
  1170. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1171. return &adapter->net_stats;
  1172. }
  1173. /**
  1174. * ixgb_change_mtu - Change the Maximum Transfer Unit
  1175. * @netdev: network interface device structure
  1176. * @new_mtu: new value for maximum frame size
  1177. *
  1178. * Returns 0 on success, negative on failure
  1179. **/
  1180. static int
  1181. ixgb_change_mtu(struct net_device *netdev, int new_mtu)
  1182. {
  1183. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1184. int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  1185. int old_max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  1186. if((max_frame < IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
  1187. || (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) {
  1188. IXGB_ERR("Invalid MTU setting\n");
  1189. return -EINVAL;
  1190. }
  1191. if((max_frame <= IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
  1192. || (max_frame <= IXGB_RXBUFFER_2048)) {
  1193. adapter->rx_buffer_len = IXGB_RXBUFFER_2048;
  1194. } else if(max_frame <= IXGB_RXBUFFER_4096) {
  1195. adapter->rx_buffer_len = IXGB_RXBUFFER_4096;
  1196. } else if(max_frame <= IXGB_RXBUFFER_8192) {
  1197. adapter->rx_buffer_len = IXGB_RXBUFFER_8192;
  1198. } else {
  1199. adapter->rx_buffer_len = IXGB_RXBUFFER_16384;
  1200. }
  1201. netdev->mtu = new_mtu;
  1202. if(old_max_frame != max_frame && netif_running(netdev)) {
  1203. ixgb_down(adapter, TRUE);
  1204. ixgb_up(adapter);
  1205. }
  1206. return 0;
  1207. }
  1208. /**
  1209. * ixgb_update_stats - Update the board statistics counters.
  1210. * @adapter: board private structure
  1211. **/
  1212. void
  1213. ixgb_update_stats(struct ixgb_adapter *adapter)
  1214. {
  1215. struct net_device *netdev = adapter->netdev;
  1216. if((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) ||
  1217. (netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) {
  1218. u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL);
  1219. u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL);
  1220. u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH);
  1221. u64 bcast = ((u64)bcast_h << 32) | bcast_l;
  1222. multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
  1223. /* fix up multicast stats by removing broadcasts */
  1224. if(multi >= bcast)
  1225. multi -= bcast;
  1226. adapter->stats.mprcl += (multi & 0xFFFFFFFF);
  1227. adapter->stats.mprch += (multi >> 32);
  1228. adapter->stats.bprcl += bcast_l;
  1229. adapter->stats.bprch += bcast_h;
  1230. } else {
  1231. adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
  1232. adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
  1233. adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
  1234. adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
  1235. }
  1236. adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
  1237. adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
  1238. adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
  1239. adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
  1240. adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
  1241. adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
  1242. adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
  1243. adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
  1244. adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
  1245. adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
  1246. adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
  1247. adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
  1248. adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
  1249. adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
  1250. adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
  1251. adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
  1252. adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
  1253. adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
  1254. adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
  1255. adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
  1256. adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
  1257. adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
  1258. adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
  1259. adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
  1260. adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
  1261. adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
  1262. adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
  1263. adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
  1264. adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
  1265. adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
  1266. adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
  1267. adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
  1268. adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
  1269. adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
  1270. adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
  1271. adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
  1272. adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
  1273. adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
  1274. adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
  1275. adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
  1276. adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
  1277. adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
  1278. adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
  1279. adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
  1280. adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
  1281. adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
  1282. adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
  1283. adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
  1284. adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
  1285. adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
  1286. adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC);
  1287. adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
  1288. adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
  1289. adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
  1290. adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
  1291. adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
  1292. /* Fill out the OS statistics structure */
  1293. adapter->net_stats.rx_packets = adapter->stats.gprcl;
  1294. adapter->net_stats.tx_packets = adapter->stats.gptcl;
  1295. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  1296. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  1297. adapter->net_stats.multicast = adapter->stats.mprcl;
  1298. adapter->net_stats.collisions = 0;
  1299. /* ignore RLEC as it reports errors for padded (<64bytes) frames
  1300. * with a length in the type/len field */
  1301. adapter->net_stats.rx_errors =
  1302. /* adapter->stats.rnbc + */ adapter->stats.crcerrs +
  1303. adapter->stats.ruc +
  1304. adapter->stats.roc /*+ adapter->stats.rlec */ +
  1305. adapter->stats.icbc +
  1306. adapter->stats.ecbc + adapter->stats.mpc;
  1307. /* see above
  1308. * adapter->net_stats.rx_length_errors = adapter->stats.rlec;
  1309. */
  1310. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  1311. adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
  1312. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  1313. adapter->net_stats.rx_over_errors = adapter->stats.mpc;
  1314. adapter->net_stats.tx_errors = 0;
  1315. adapter->net_stats.rx_frame_errors = 0;
  1316. adapter->net_stats.tx_aborted_errors = 0;
  1317. adapter->net_stats.tx_carrier_errors = 0;
  1318. adapter->net_stats.tx_fifo_errors = 0;
  1319. adapter->net_stats.tx_heartbeat_errors = 0;
  1320. adapter->net_stats.tx_window_errors = 0;
  1321. }
  1322. #define IXGB_MAX_INTR 10
  1323. /**
  1324. * ixgb_intr - Interrupt Handler
  1325. * @irq: interrupt number
  1326. * @data: pointer to a network interface device structure
  1327. * @pt_regs: CPU registers structure
  1328. **/
  1329. static irqreturn_t
  1330. ixgb_intr(int irq, void *data, struct pt_regs *regs)
  1331. {
  1332. struct net_device *netdev = data;
  1333. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1334. struct ixgb_hw *hw = &adapter->hw;
  1335. uint32_t icr = IXGB_READ_REG(hw, ICR);
  1336. #ifndef CONFIG_IXGB_NAPI
  1337. unsigned int i;
  1338. #endif
  1339. if(unlikely(!icr))
  1340. return IRQ_NONE; /* Not our interrupt */
  1341. if(unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC))) {
  1342. mod_timer(&adapter->watchdog_timer, jiffies);
  1343. }
  1344. #ifdef CONFIG_IXGB_NAPI
  1345. if(netif_rx_schedule_prep(netdev)) {
  1346. /* Disable interrupts and register for poll. The flush
  1347. of the posted write is intentionally left out.
  1348. */
  1349. atomic_inc(&adapter->irq_sem);
  1350. IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
  1351. __netif_rx_schedule(netdev);
  1352. }
  1353. #else
  1354. /* yes, that is actually a & and it is meant to make sure that
  1355. * every pass through this for loop checks both receive and
  1356. * transmit queues for completed descriptors, intended to
  1357. * avoid starvation issues and assist tx/rx fairness. */
  1358. for(i = 0; i < IXGB_MAX_INTR; i++)
  1359. if(!ixgb_clean_rx_irq(adapter) &
  1360. !ixgb_clean_tx_irq(adapter))
  1361. break;
  1362. #endif
  1363. return IRQ_HANDLED;
  1364. }
  1365. #ifdef CONFIG_IXGB_NAPI
  1366. /**
  1367. * ixgb_clean - NAPI Rx polling callback
  1368. * @adapter: board private structure
  1369. **/
  1370. static int
  1371. ixgb_clean(struct net_device *netdev, int *budget)
  1372. {
  1373. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1374. int work_to_do = min(*budget, netdev->quota);
  1375. int tx_cleaned;
  1376. int work_done = 0;
  1377. tx_cleaned = ixgb_clean_tx_irq(adapter);
  1378. ixgb_clean_rx_irq(adapter, &work_done, work_to_do);
  1379. *budget -= work_done;
  1380. netdev->quota -= work_done;
  1381. /* if no Tx and not enough Rx work done, exit the polling mode */
  1382. if((!tx_cleaned && (work_done == 0)) || !netif_running(netdev)) {
  1383. netif_rx_complete(netdev);
  1384. ixgb_irq_enable(adapter);
  1385. return 0;
  1386. }
  1387. return 1;
  1388. }
  1389. #endif
  1390. /**
  1391. * ixgb_clean_tx_irq - Reclaim resources after transmit completes
  1392. * @adapter: board private structure
  1393. **/
  1394. static boolean_t
  1395. ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
  1396. {
  1397. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1398. struct net_device *netdev = adapter->netdev;
  1399. struct ixgb_tx_desc *tx_desc, *eop_desc;
  1400. struct ixgb_buffer *buffer_info;
  1401. unsigned int i, eop;
  1402. boolean_t cleaned = FALSE;
  1403. i = tx_ring->next_to_clean;
  1404. eop = tx_ring->buffer_info[i].next_to_watch;
  1405. eop_desc = IXGB_TX_DESC(*tx_ring, eop);
  1406. while(eop_desc->status & IXGB_TX_DESC_STATUS_DD) {
  1407. for(cleaned = FALSE; !cleaned; ) {
  1408. tx_desc = IXGB_TX_DESC(*tx_ring, i);
  1409. buffer_info = &tx_ring->buffer_info[i];
  1410. if (tx_desc->popts
  1411. & (IXGB_TX_DESC_POPTS_TXSM |
  1412. IXGB_TX_DESC_POPTS_IXSM))
  1413. adapter->hw_csum_tx_good++;
  1414. ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
  1415. *(uint32_t *)&(tx_desc->status) = 0;
  1416. cleaned = (i == eop);
  1417. if(++i == tx_ring->count) i = 0;
  1418. }
  1419. eop = tx_ring->buffer_info[i].next_to_watch;
  1420. eop_desc = IXGB_TX_DESC(*tx_ring, eop);
  1421. }
  1422. tx_ring->next_to_clean = i;
  1423. spin_lock(&adapter->tx_lock);
  1424. if(cleaned && netif_queue_stopped(netdev) && netif_carrier_ok(netdev) &&
  1425. (IXGB_DESC_UNUSED(tx_ring) > IXGB_TX_QUEUE_WAKE)) {
  1426. netif_wake_queue(netdev);
  1427. }
  1428. spin_unlock(&adapter->tx_lock);
  1429. if(adapter->detect_tx_hung) {
  1430. /* detect a transmit hang in hardware, this serializes the
  1431. * check with the clearing of time_stamp and movement of i */
  1432. adapter->detect_tx_hung = FALSE;
  1433. if(tx_ring->buffer_info[i].dma &&
  1434. time_after(jiffies, tx_ring->buffer_info[i].time_stamp + HZ)
  1435. && !(IXGB_READ_REG(&adapter->hw, STATUS) &
  1436. IXGB_STATUS_TXOFF))
  1437. netif_stop_queue(netdev);
  1438. }
  1439. return cleaned;
  1440. }
  1441. /**
  1442. * ixgb_rx_checksum - Receive Checksum Offload for 82597.
  1443. * @adapter: board private structure
  1444. * @rx_desc: receive descriptor
  1445. * @sk_buff: socket buffer with received data
  1446. **/
  1447. static inline void
  1448. ixgb_rx_checksum(struct ixgb_adapter *adapter,
  1449. struct ixgb_rx_desc *rx_desc,
  1450. struct sk_buff *skb)
  1451. {
  1452. /* Ignore Checksum bit is set OR
  1453. * TCP Checksum has not been calculated
  1454. */
  1455. if((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) ||
  1456. (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) {
  1457. skb->ip_summed = CHECKSUM_NONE;
  1458. return;
  1459. }
  1460. /* At this point we know the hardware did the TCP checksum */
  1461. /* now look at the TCP checksum error bit */
  1462. if(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) {
  1463. /* let the stack verify checksum errors */
  1464. skb->ip_summed = CHECKSUM_NONE;
  1465. adapter->hw_csum_rx_error++;
  1466. } else {
  1467. /* TCP checksum is good */
  1468. skb->ip_summed = CHECKSUM_UNNECESSARY;
  1469. adapter->hw_csum_rx_good++;
  1470. }
  1471. }
  1472. /**
  1473. * ixgb_clean_rx_irq - Send received data up the network stack,
  1474. * @adapter: board private structure
  1475. **/
  1476. static boolean_t
  1477. #ifdef CONFIG_IXGB_NAPI
  1478. ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do)
  1479. #else
  1480. ixgb_clean_rx_irq(struct ixgb_adapter *adapter)
  1481. #endif
  1482. {
  1483. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  1484. struct net_device *netdev = adapter->netdev;
  1485. struct pci_dev *pdev = adapter->pdev;
  1486. struct ixgb_rx_desc *rx_desc, *next_rxd;
  1487. struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
  1488. uint32_t length;
  1489. unsigned int i, j;
  1490. boolean_t cleaned = FALSE;
  1491. i = rx_ring->next_to_clean;
  1492. rx_desc = IXGB_RX_DESC(*rx_ring, i);
  1493. buffer_info = &rx_ring->buffer_info[i];
  1494. while(rx_desc->status & IXGB_RX_DESC_STATUS_DD) {
  1495. struct sk_buff *skb, *next_skb;
  1496. u8 status;
  1497. #ifdef CONFIG_IXGB_NAPI
  1498. if(*work_done >= work_to_do)
  1499. break;
  1500. (*work_done)++;
  1501. #endif
  1502. status = rx_desc->status;
  1503. skb = buffer_info->skb;
  1504. prefetch(skb->data);
  1505. if(++i == rx_ring->count) i = 0;
  1506. next_rxd = IXGB_RX_DESC(*rx_ring, i);
  1507. prefetch(next_rxd);
  1508. if((j = i + 1) == rx_ring->count) j = 0;
  1509. next2_buffer = &rx_ring->buffer_info[j];
  1510. prefetch(next2_buffer);
  1511. next_buffer = &rx_ring->buffer_info[i];
  1512. next_skb = next_buffer->skb;
  1513. prefetch(next_skb);
  1514. cleaned = TRUE;
  1515. pci_unmap_single(pdev,
  1516. buffer_info->dma,
  1517. buffer_info->length,
  1518. PCI_DMA_FROMDEVICE);
  1519. length = le16_to_cpu(rx_desc->length);
  1520. if(unlikely(!(status & IXGB_RX_DESC_STATUS_EOP))) {
  1521. /* All receives must fit into a single buffer */
  1522. IXGB_DBG("Receive packet consumed multiple buffers "
  1523. "length<%x>\n", length);
  1524. dev_kfree_skb_irq(skb);
  1525. goto rxdesc_done;
  1526. }
  1527. if (unlikely(rx_desc->errors
  1528. & (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE
  1529. | IXGB_RX_DESC_ERRORS_P |
  1530. IXGB_RX_DESC_ERRORS_RXE))) {
  1531. dev_kfree_skb_irq(skb);
  1532. goto rxdesc_done;
  1533. }
  1534. /* Good Receive */
  1535. skb_put(skb, length);
  1536. /* Receive Checksum Offload */
  1537. ixgb_rx_checksum(adapter, rx_desc, skb);
  1538. skb->protocol = eth_type_trans(skb, netdev);
  1539. #ifdef CONFIG_IXGB_NAPI
  1540. if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
  1541. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  1542. le16_to_cpu(rx_desc->special) &
  1543. IXGB_RX_DESC_SPECIAL_VLAN_MASK);
  1544. } else {
  1545. netif_receive_skb(skb);
  1546. }
  1547. #else /* CONFIG_IXGB_NAPI */
  1548. if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
  1549. vlan_hwaccel_rx(skb, adapter->vlgrp,
  1550. le16_to_cpu(rx_desc->special) &
  1551. IXGB_RX_DESC_SPECIAL_VLAN_MASK);
  1552. } else {
  1553. netif_rx(skb);
  1554. }
  1555. #endif /* CONFIG_IXGB_NAPI */
  1556. netdev->last_rx = jiffies;
  1557. rxdesc_done:
  1558. /* clean up descriptor, might be written over by hw */
  1559. rx_desc->status = 0;
  1560. buffer_info->skb = NULL;
  1561. /* use prefetched values */
  1562. rx_desc = next_rxd;
  1563. buffer_info = next_buffer;
  1564. }
  1565. rx_ring->next_to_clean = i;
  1566. ixgb_alloc_rx_buffers(adapter);
  1567. return cleaned;
  1568. }
  1569. /**
  1570. * ixgb_alloc_rx_buffers - Replace used receive buffers
  1571. * @adapter: address of board private structure
  1572. **/
  1573. static void
  1574. ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter)
  1575. {
  1576. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  1577. struct net_device *netdev = adapter->netdev;
  1578. struct pci_dev *pdev = adapter->pdev;
  1579. struct ixgb_rx_desc *rx_desc;
  1580. struct ixgb_buffer *buffer_info;
  1581. struct sk_buff *skb;
  1582. unsigned int i;
  1583. int num_group_tail_writes;
  1584. long cleancount;
  1585. i = rx_ring->next_to_use;
  1586. buffer_info = &rx_ring->buffer_info[i];
  1587. cleancount = IXGB_DESC_UNUSED(rx_ring);
  1588. num_group_tail_writes = IXGB_RX_BUFFER_WRITE;
  1589. /* leave three descriptors unused */
  1590. while(--cleancount > 2) {
  1591. rx_desc = IXGB_RX_DESC(*rx_ring, i);
  1592. skb = dev_alloc_skb(adapter->rx_buffer_len + NET_IP_ALIGN);
  1593. if(unlikely(!skb)) {
  1594. /* Better luck next round */
  1595. break;
  1596. }
  1597. /* Make buffer alignment 2 beyond a 16 byte boundary
  1598. * this will result in a 16 byte aligned IP header after
  1599. * the 14 byte MAC header is removed
  1600. */
  1601. skb_reserve(skb, NET_IP_ALIGN);
  1602. skb->dev = netdev;
  1603. buffer_info->skb = skb;
  1604. buffer_info->length = adapter->rx_buffer_len;
  1605. buffer_info->dma =
  1606. pci_map_single(pdev,
  1607. skb->data,
  1608. adapter->rx_buffer_len,
  1609. PCI_DMA_FROMDEVICE);
  1610. rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
  1611. /* guarantee DD bit not set now before h/w gets descriptor
  1612. * this is the rest of the workaround for h/w double
  1613. * writeback. */
  1614. rx_desc->status = 0;
  1615. if((i & ~(num_group_tail_writes- 1)) == i) {
  1616. /* Force memory writes to complete before letting h/w
  1617. * know there are new descriptors to fetch. (Only
  1618. * applicable for weak-ordered memory model archs,
  1619. * such as IA-64). */
  1620. wmb();
  1621. IXGB_WRITE_REG(&adapter->hw, RDT, i);
  1622. }
  1623. if(++i == rx_ring->count) i = 0;
  1624. buffer_info = &rx_ring->buffer_info[i];
  1625. }
  1626. rx_ring->next_to_use = i;
  1627. }
  1628. /**
  1629. * ixgb_vlan_rx_register - enables or disables vlan tagging/stripping.
  1630. *
  1631. * @param netdev network interface device structure
  1632. * @param grp indicates to enable or disable tagging/stripping
  1633. **/
  1634. static void
  1635. ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  1636. {
  1637. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1638. uint32_t ctrl, rctl;
  1639. ixgb_irq_disable(adapter);
  1640. adapter->vlgrp = grp;
  1641. if(grp) {
  1642. /* enable VLAN tag insert/strip */
  1643. ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
  1644. ctrl |= IXGB_CTRL0_VME;
  1645. IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
  1646. /* enable VLAN receive filtering */
  1647. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  1648. rctl |= IXGB_RCTL_VFE;
  1649. rctl &= ~IXGB_RCTL_CFIEN;
  1650. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  1651. } else {
  1652. /* disable VLAN tag insert/strip */
  1653. ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
  1654. ctrl &= ~IXGB_CTRL0_VME;
  1655. IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
  1656. /* disable VLAN filtering */
  1657. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  1658. rctl &= ~IXGB_RCTL_VFE;
  1659. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  1660. }
  1661. ixgb_irq_enable(adapter);
  1662. }
  1663. static void
  1664. ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  1665. {
  1666. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1667. uint32_t vfta, index;
  1668. /* add VID to filter table */
  1669. index = (vid >> 5) & 0x7F;
  1670. vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  1671. vfta |= (1 << (vid & 0x1F));
  1672. ixgb_write_vfta(&adapter->hw, index, vfta);
  1673. }
  1674. static void
  1675. ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  1676. {
  1677. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1678. uint32_t vfta, index;
  1679. ixgb_irq_disable(adapter);
  1680. if(adapter->vlgrp)
  1681. adapter->vlgrp->vlan_devices[vid] = NULL;
  1682. ixgb_irq_enable(adapter);
  1683. /* remove VID from filter table*/
  1684. index = (vid >> 5) & 0x7F;
  1685. vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  1686. vfta &= ~(1 << (vid & 0x1F));
  1687. ixgb_write_vfta(&adapter->hw, index, vfta);
  1688. }
  1689. static void
  1690. ixgb_restore_vlan(struct ixgb_adapter *adapter)
  1691. {
  1692. ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  1693. if(adapter->vlgrp) {
  1694. uint16_t vid;
  1695. for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  1696. if(!adapter->vlgrp->vlan_devices[vid])
  1697. continue;
  1698. ixgb_vlan_rx_add_vid(adapter->netdev, vid);
  1699. }
  1700. }
  1701. }
  1702. #ifdef CONFIG_NET_POLL_CONTROLLER
  1703. /*
  1704. * Polling 'interrupt' - used by things like netconsole to send skbs
  1705. * without having to re-enable interrupts. It's not called while
  1706. * the interrupt routine is executing.
  1707. */
  1708. static void ixgb_netpoll(struct net_device *dev)
  1709. {
  1710. struct ixgb_adapter *adapter = dev->priv;
  1711. disable_irq(adapter->pdev->irq);
  1712. ixgb_intr(adapter->pdev->irq, dev, NULL);
  1713. enable_irq(adapter->pdev->irq);
  1714. }
  1715. #endif
  1716. /* ixgb_main.c */