nouveau_drm.c 25 KB

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  1. /*
  2. * Copyright 2012 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Ben Skeggs
  23. */
  24. #include <linux/console.h>
  25. #include <linux/module.h>
  26. #include <linux/pci.h>
  27. #include <linux/pm_runtime.h>
  28. #include <linux/vga_switcheroo.h>
  29. #include "drmP.h"
  30. #include "drm_crtc_helper.h"
  31. #include <core/device.h>
  32. #include <core/client.h>
  33. #include <core/gpuobj.h>
  34. #include <core/class.h>
  35. #include <engine/device.h>
  36. #include <engine/disp.h>
  37. #include <engine/fifo.h>
  38. #include <subdev/vm.h>
  39. #include "nouveau_drm.h"
  40. #include "nouveau_dma.h"
  41. #include "nouveau_ttm.h"
  42. #include "nouveau_gem.h"
  43. #include "nouveau_agp.h"
  44. #include "nouveau_vga.h"
  45. #include "nouveau_pm.h"
  46. #include "nouveau_acpi.h"
  47. #include "nouveau_bios.h"
  48. #include "nouveau_ioctl.h"
  49. #include "nouveau_abi16.h"
  50. #include "nouveau_fbcon.h"
  51. #include "nouveau_fence.h"
  52. #include "nouveau_debugfs.h"
  53. MODULE_PARM_DESC(config, "option string to pass to driver core");
  54. static char *nouveau_config;
  55. module_param_named(config, nouveau_config, charp, 0400);
  56. MODULE_PARM_DESC(debug, "debug string to pass to driver core");
  57. static char *nouveau_debug;
  58. module_param_named(debug, nouveau_debug, charp, 0400);
  59. MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
  60. static int nouveau_noaccel = 0;
  61. module_param_named(noaccel, nouveau_noaccel, int, 0400);
  62. MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
  63. "0 = disabled, 1 = enabled, 2 = headless)");
  64. int nouveau_modeset = -1;
  65. module_param_named(modeset, nouveau_modeset, int, 0400);
  66. MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
  67. int nouveau_runtime_pm = -1;
  68. module_param_named(runpm, nouveau_runtime_pm, int, 0400);
  69. static struct drm_driver driver;
  70. static u64
  71. nouveau_name(struct pci_dev *pdev)
  72. {
  73. u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
  74. name |= pdev->bus->number << 16;
  75. name |= PCI_SLOT(pdev->devfn) << 8;
  76. return name | PCI_FUNC(pdev->devfn);
  77. }
  78. static int
  79. nouveau_cli_create(struct pci_dev *pdev, const char *name,
  80. int size, void **pcli)
  81. {
  82. struct nouveau_cli *cli;
  83. int ret;
  84. *pcli = NULL;
  85. ret = nouveau_client_create_(name, nouveau_name(pdev), nouveau_config,
  86. nouveau_debug, size, pcli);
  87. cli = *pcli;
  88. if (ret) {
  89. if (cli)
  90. nouveau_client_destroy(&cli->base);
  91. *pcli = NULL;
  92. return ret;
  93. }
  94. mutex_init(&cli->mutex);
  95. return 0;
  96. }
  97. static void
  98. nouveau_cli_destroy(struct nouveau_cli *cli)
  99. {
  100. struct nouveau_object *client = nv_object(cli);
  101. nouveau_vm_ref(NULL, &cli->base.vm, NULL);
  102. nouveau_client_fini(&cli->base, false);
  103. atomic_set(&client->refcount, 1);
  104. nouveau_object_ref(NULL, &client);
  105. }
  106. static void
  107. nouveau_accel_fini(struct nouveau_drm *drm)
  108. {
  109. nouveau_gpuobj_ref(NULL, &drm->notify);
  110. nouveau_channel_del(&drm->channel);
  111. nouveau_channel_del(&drm->cechan);
  112. if (drm->fence)
  113. nouveau_fence(drm)->dtor(drm);
  114. }
  115. static void
  116. nouveau_accel_init(struct nouveau_drm *drm)
  117. {
  118. struct nouveau_device *device = nv_device(drm->device);
  119. struct nouveau_object *object;
  120. u32 arg0, arg1;
  121. int ret;
  122. if (nouveau_noaccel || !nouveau_fifo(device) /*XXX*/)
  123. return;
  124. /* initialise synchronisation routines */
  125. if (device->card_type < NV_10) ret = nv04_fence_create(drm);
  126. else if (device->card_type < NV_11 ||
  127. device->chipset < 0x17) ret = nv10_fence_create(drm);
  128. else if (device->card_type < NV_50) ret = nv17_fence_create(drm);
  129. else if (device->chipset < 0x84) ret = nv50_fence_create(drm);
  130. else if (device->card_type < NV_C0) ret = nv84_fence_create(drm);
  131. else ret = nvc0_fence_create(drm);
  132. if (ret) {
  133. NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
  134. nouveau_accel_fini(drm);
  135. return;
  136. }
  137. if (device->card_type >= NV_E0) {
  138. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE,
  139. NVDRM_CHAN + 1,
  140. NVE0_CHANNEL_IND_ENGINE_CE0 |
  141. NVE0_CHANNEL_IND_ENGINE_CE1, 0,
  142. &drm->cechan);
  143. if (ret)
  144. NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
  145. arg0 = NVE0_CHANNEL_IND_ENGINE_GR;
  146. arg1 = 1;
  147. } else
  148. if (device->chipset >= 0xa3 &&
  149. device->chipset != 0xaa &&
  150. device->chipset != 0xac) {
  151. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE,
  152. NVDRM_CHAN + 1, NvDmaFB, NvDmaTT,
  153. &drm->cechan);
  154. if (ret)
  155. NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
  156. arg0 = NvDmaFB;
  157. arg1 = NvDmaTT;
  158. } else {
  159. arg0 = NvDmaFB;
  160. arg1 = NvDmaTT;
  161. }
  162. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, NVDRM_CHAN,
  163. arg0, arg1, &drm->channel);
  164. if (ret) {
  165. NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
  166. nouveau_accel_fini(drm);
  167. return;
  168. }
  169. if (device->card_type < NV_C0) {
  170. ret = nouveau_gpuobj_new(drm->device, NULL, 32, 0, 0,
  171. &drm->notify);
  172. if (ret) {
  173. NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
  174. nouveau_accel_fini(drm);
  175. return;
  176. }
  177. ret = nouveau_object_new(nv_object(drm),
  178. drm->channel->handle, NvNotify0,
  179. 0x003d, &(struct nv_dma_class) {
  180. .flags = NV_DMA_TARGET_VRAM |
  181. NV_DMA_ACCESS_RDWR,
  182. .start = drm->notify->addr,
  183. .limit = drm->notify->addr + 31
  184. }, sizeof(struct nv_dma_class),
  185. &object);
  186. if (ret) {
  187. nouveau_accel_fini(drm);
  188. return;
  189. }
  190. }
  191. nouveau_bo_move_init(drm);
  192. }
  193. static int nouveau_drm_probe(struct pci_dev *pdev,
  194. const struct pci_device_id *pent)
  195. {
  196. struct nouveau_device *device;
  197. struct apertures_struct *aper;
  198. bool boot = false;
  199. int ret;
  200. /* remove conflicting drivers (vesafb, efifb etc) */
  201. aper = alloc_apertures(3);
  202. if (!aper)
  203. return -ENOMEM;
  204. aper->ranges[0].base = pci_resource_start(pdev, 1);
  205. aper->ranges[0].size = pci_resource_len(pdev, 1);
  206. aper->count = 1;
  207. if (pci_resource_len(pdev, 2)) {
  208. aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
  209. aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
  210. aper->count++;
  211. }
  212. if (pci_resource_len(pdev, 3)) {
  213. aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
  214. aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
  215. aper->count++;
  216. }
  217. #ifdef CONFIG_X86
  218. boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
  219. #endif
  220. remove_conflicting_framebuffers(aper, "nouveaufb", boot);
  221. kfree(aper);
  222. ret = nouveau_device_create(pdev, nouveau_name(pdev), pci_name(pdev),
  223. nouveau_config, nouveau_debug, &device);
  224. if (ret)
  225. return ret;
  226. pci_set_master(pdev);
  227. ret = drm_get_pci_dev(pdev, pent, &driver);
  228. if (ret) {
  229. nouveau_object_ref(NULL, (struct nouveau_object **)&device);
  230. return ret;
  231. }
  232. return 0;
  233. }
  234. #define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
  235. static void
  236. nouveau_get_hdmi_dev(struct drm_device *dev)
  237. {
  238. struct nouveau_drm *drm = dev->dev_private;
  239. struct pci_dev *pdev = dev->pdev;
  240. /* subfunction one is a hdmi audio device? */
  241. drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number,
  242. PCI_DEVFN(PCI_SLOT(pdev->devfn), 1));
  243. if (!drm->hdmi_device) {
  244. DRM_INFO("hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1);
  245. return;
  246. }
  247. if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) {
  248. DRM_INFO("possible hdmi device not audio %d\n", drm->hdmi_device->class);
  249. pci_dev_put(drm->hdmi_device);
  250. drm->hdmi_device = NULL;
  251. return;
  252. }
  253. }
  254. static int
  255. nouveau_drm_load(struct drm_device *dev, unsigned long flags)
  256. {
  257. struct pci_dev *pdev = dev->pdev;
  258. struct nouveau_device *device;
  259. struct nouveau_drm *drm;
  260. int ret;
  261. ret = nouveau_cli_create(pdev, "DRM", sizeof(*drm), (void**)&drm);
  262. if (ret)
  263. return ret;
  264. dev->dev_private = drm;
  265. drm->dev = dev;
  266. INIT_LIST_HEAD(&drm->clients);
  267. spin_lock_init(&drm->tile.lock);
  268. nouveau_get_hdmi_dev(dev);
  269. /* make sure AGP controller is in a consistent state before we
  270. * (possibly) execute vbios init tables (see nouveau_agp.h)
  271. */
  272. if (drm_pci_device_is_agp(dev) && dev->agp) {
  273. /* dummy device object, doesn't init anything, but allows
  274. * agp code access to registers
  275. */
  276. ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT,
  277. NVDRM_DEVICE, 0x0080,
  278. &(struct nv_device_class) {
  279. .device = ~0,
  280. .disable =
  281. ~(NV_DEVICE_DISABLE_MMIO |
  282. NV_DEVICE_DISABLE_IDENTIFY),
  283. .debug0 = ~0,
  284. }, sizeof(struct nv_device_class),
  285. &drm->device);
  286. if (ret)
  287. goto fail_device;
  288. nouveau_agp_reset(drm);
  289. nouveau_object_del(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE);
  290. }
  291. ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE,
  292. 0x0080, &(struct nv_device_class) {
  293. .device = ~0,
  294. .disable = 0,
  295. .debug0 = 0,
  296. }, sizeof(struct nv_device_class),
  297. &drm->device);
  298. if (ret)
  299. goto fail_device;
  300. /* workaround an odd issue on nvc1 by disabling the device's
  301. * nosnoop capability. hopefully won't cause issues until a
  302. * better fix is found - assuming there is one...
  303. */
  304. device = nv_device(drm->device);
  305. if (nv_device(drm->device)->chipset == 0xc1)
  306. nv_mask(device, 0x00088080, 0x00000800, 0x00000000);
  307. nouveau_vga_init(drm);
  308. nouveau_agp_init(drm);
  309. if (device->card_type >= NV_50) {
  310. ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
  311. 0x1000, &drm->client.base.vm);
  312. if (ret)
  313. goto fail_device;
  314. }
  315. ret = nouveau_ttm_init(drm);
  316. if (ret)
  317. goto fail_ttm;
  318. ret = nouveau_bios_init(dev);
  319. if (ret)
  320. goto fail_bios;
  321. ret = nouveau_display_create(dev);
  322. if (ret)
  323. goto fail_dispctor;
  324. if (dev->mode_config.num_crtc) {
  325. ret = nouveau_display_init(dev);
  326. if (ret)
  327. goto fail_dispinit;
  328. }
  329. nouveau_pm_init(dev);
  330. nouveau_accel_init(drm);
  331. nouveau_fbcon_init(dev);
  332. if (nouveau_runtime_pm != 0) {
  333. pm_runtime_use_autosuspend(dev->dev);
  334. pm_runtime_set_autosuspend_delay(dev->dev, 5000);
  335. pm_runtime_set_active(dev->dev);
  336. pm_runtime_allow(dev->dev);
  337. pm_runtime_mark_last_busy(dev->dev);
  338. pm_runtime_put(dev->dev);
  339. }
  340. return 0;
  341. fail_dispinit:
  342. nouveau_display_destroy(dev);
  343. fail_dispctor:
  344. nouveau_bios_takedown(dev);
  345. fail_bios:
  346. nouveau_ttm_fini(drm);
  347. fail_ttm:
  348. nouveau_agp_fini(drm);
  349. nouveau_vga_fini(drm);
  350. fail_device:
  351. nouveau_cli_destroy(&drm->client);
  352. return ret;
  353. }
  354. static int
  355. nouveau_drm_unload(struct drm_device *dev)
  356. {
  357. struct nouveau_drm *drm = nouveau_drm(dev);
  358. pm_runtime_get_sync(dev->dev);
  359. nouveau_fbcon_fini(dev);
  360. nouveau_accel_fini(drm);
  361. nouveau_pm_fini(dev);
  362. if (dev->mode_config.num_crtc)
  363. nouveau_display_fini(dev);
  364. nouveau_display_destroy(dev);
  365. nouveau_bios_takedown(dev);
  366. nouveau_ttm_fini(drm);
  367. nouveau_agp_fini(drm);
  368. nouveau_vga_fini(drm);
  369. if (drm->hdmi_device)
  370. pci_dev_put(drm->hdmi_device);
  371. nouveau_cli_destroy(&drm->client);
  372. return 0;
  373. }
  374. static void
  375. nouveau_drm_remove(struct pci_dev *pdev)
  376. {
  377. struct drm_device *dev = pci_get_drvdata(pdev);
  378. struct nouveau_drm *drm = nouveau_drm(dev);
  379. struct nouveau_object *device;
  380. device = drm->client.base.device;
  381. drm_put_dev(dev);
  382. nouveau_object_ref(NULL, &device);
  383. nouveau_object_debug();
  384. }
  385. static int
  386. nouveau_do_suspend(struct drm_device *dev)
  387. {
  388. struct nouveau_drm *drm = nouveau_drm(dev);
  389. struct nouveau_cli *cli;
  390. int ret;
  391. if (dev->mode_config.num_crtc) {
  392. NV_INFO(drm, "suspending display...\n");
  393. ret = nouveau_display_suspend(dev);
  394. if (ret)
  395. return ret;
  396. }
  397. NV_INFO(drm, "evicting buffers...\n");
  398. ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
  399. NV_INFO(drm, "waiting for kernel channels to go idle...\n");
  400. if (drm->cechan) {
  401. ret = nouveau_channel_idle(drm->cechan);
  402. if (ret)
  403. return ret;
  404. }
  405. if (drm->channel) {
  406. ret = nouveau_channel_idle(drm->channel);
  407. if (ret)
  408. return ret;
  409. }
  410. NV_INFO(drm, "suspending client object trees...\n");
  411. if (drm->fence && nouveau_fence(drm)->suspend) {
  412. if (!nouveau_fence(drm)->suspend(drm))
  413. return -ENOMEM;
  414. }
  415. list_for_each_entry(cli, &drm->clients, head) {
  416. ret = nouveau_client_fini(&cli->base, true);
  417. if (ret)
  418. goto fail_client;
  419. }
  420. NV_INFO(drm, "suspending kernel object tree...\n");
  421. ret = nouveau_client_fini(&drm->client.base, true);
  422. if (ret)
  423. goto fail_client;
  424. nouveau_agp_fini(drm);
  425. return 0;
  426. fail_client:
  427. list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
  428. nouveau_client_init(&cli->base);
  429. }
  430. if (dev->mode_config.num_crtc) {
  431. NV_INFO(drm, "resuming display...\n");
  432. nouveau_display_resume(dev);
  433. }
  434. return ret;
  435. }
  436. int nouveau_pmops_suspend(struct device *dev)
  437. {
  438. struct pci_dev *pdev = to_pci_dev(dev);
  439. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  440. int ret;
  441. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
  442. drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
  443. return 0;
  444. if (drm_dev->mode_config.num_crtc)
  445. nouveau_fbcon_set_suspend(drm_dev, 1);
  446. ret = nouveau_do_suspend(drm_dev);
  447. if (ret)
  448. return ret;
  449. pci_save_state(pdev);
  450. pci_disable_device(pdev);
  451. pci_set_power_state(pdev, PCI_D3hot);
  452. return 0;
  453. }
  454. static int
  455. nouveau_do_resume(struct drm_device *dev)
  456. {
  457. struct nouveau_drm *drm = nouveau_drm(dev);
  458. struct nouveau_cli *cli;
  459. NV_INFO(drm, "re-enabling device...\n");
  460. nouveau_agp_reset(drm);
  461. NV_INFO(drm, "resuming kernel object tree...\n");
  462. nouveau_client_init(&drm->client.base);
  463. nouveau_agp_init(drm);
  464. NV_INFO(drm, "resuming client object trees...\n");
  465. if (drm->fence && nouveau_fence(drm)->resume)
  466. nouveau_fence(drm)->resume(drm);
  467. list_for_each_entry(cli, &drm->clients, head) {
  468. nouveau_client_init(&cli->base);
  469. }
  470. nouveau_run_vbios_init(dev);
  471. nouveau_pm_resume(dev);
  472. if (dev->mode_config.num_crtc) {
  473. NV_INFO(drm, "resuming display...\n");
  474. nouveau_display_repin(dev);
  475. }
  476. return 0;
  477. }
  478. int nouveau_pmops_resume(struct device *dev)
  479. {
  480. struct pci_dev *pdev = to_pci_dev(dev);
  481. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  482. int ret;
  483. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
  484. drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
  485. return 0;
  486. pci_set_power_state(pdev, PCI_D0);
  487. pci_restore_state(pdev);
  488. ret = pci_enable_device(pdev);
  489. if (ret)
  490. return ret;
  491. pci_set_master(pdev);
  492. ret = nouveau_do_resume(drm_dev);
  493. if (ret)
  494. return ret;
  495. if (drm_dev->mode_config.num_crtc)
  496. nouveau_fbcon_set_suspend(drm_dev, 0);
  497. nouveau_fbcon_zfill_all(drm_dev);
  498. if (drm_dev->mode_config.num_crtc)
  499. nouveau_display_resume(drm_dev);
  500. return 0;
  501. }
  502. static int nouveau_pmops_freeze(struct device *dev)
  503. {
  504. struct pci_dev *pdev = to_pci_dev(dev);
  505. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  506. int ret;
  507. if (drm_dev->mode_config.num_crtc)
  508. nouveau_fbcon_set_suspend(drm_dev, 1);
  509. ret = nouveau_do_suspend(drm_dev);
  510. return ret;
  511. }
  512. static int nouveau_pmops_thaw(struct device *dev)
  513. {
  514. struct pci_dev *pdev = to_pci_dev(dev);
  515. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  516. int ret;
  517. ret = nouveau_do_resume(drm_dev);
  518. if (ret)
  519. return ret;
  520. if (drm_dev->mode_config.num_crtc)
  521. nouveau_fbcon_set_suspend(drm_dev, 0);
  522. nouveau_fbcon_zfill_all(drm_dev);
  523. if (drm_dev->mode_config.num_crtc)
  524. nouveau_display_resume(drm_dev);
  525. return 0;
  526. }
  527. static int
  528. nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
  529. {
  530. struct pci_dev *pdev = dev->pdev;
  531. struct nouveau_drm *drm = nouveau_drm(dev);
  532. struct nouveau_cli *cli;
  533. char name[32], tmpname[TASK_COMM_LEN];
  534. int ret;
  535. /* need to bring up power immediately if opening device */
  536. ret = pm_runtime_get_sync(dev->dev);
  537. if (ret < 0)
  538. return ret;
  539. get_task_comm(tmpname, current);
  540. snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
  541. ret = nouveau_cli_create(pdev, name, sizeof(*cli), (void **)&cli);
  542. if (ret)
  543. goto out_suspend;
  544. if (nv_device(drm->device)->card_type >= NV_50) {
  545. ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
  546. 0x1000, &cli->base.vm);
  547. if (ret) {
  548. nouveau_cli_destroy(cli);
  549. goto out_suspend;
  550. }
  551. }
  552. fpriv->driver_priv = cli;
  553. mutex_lock(&drm->client.mutex);
  554. list_add(&cli->head, &drm->clients);
  555. mutex_unlock(&drm->client.mutex);
  556. out_suspend:
  557. pm_runtime_mark_last_busy(dev->dev);
  558. pm_runtime_put_autosuspend(dev->dev);
  559. return ret;
  560. }
  561. static void
  562. nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
  563. {
  564. struct nouveau_cli *cli = nouveau_cli(fpriv);
  565. struct nouveau_drm *drm = nouveau_drm(dev);
  566. pm_runtime_get_sync(dev->dev);
  567. if (cli->abi16)
  568. nouveau_abi16_fini(cli->abi16);
  569. mutex_lock(&drm->client.mutex);
  570. list_del(&cli->head);
  571. mutex_unlock(&drm->client.mutex);
  572. }
  573. static void
  574. nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
  575. {
  576. struct nouveau_cli *cli = nouveau_cli(fpriv);
  577. nouveau_cli_destroy(cli);
  578. pm_runtime_mark_last_busy(dev->dev);
  579. pm_runtime_put_autosuspend(dev->dev);
  580. }
  581. static const struct drm_ioctl_desc
  582. nouveau_ioctls[] = {
  583. DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  584. DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
  585. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  586. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  587. DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  588. DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  589. DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  590. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  591. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  592. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  593. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  594. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  595. };
  596. long nouveau_drm_ioctl(struct file *filp,
  597. unsigned int cmd, unsigned long arg)
  598. {
  599. struct drm_file *file_priv = filp->private_data;
  600. struct drm_device *dev;
  601. long ret;
  602. dev = file_priv->minor->dev;
  603. ret = pm_runtime_get_sync(dev->dev);
  604. if (ret < 0)
  605. return ret;
  606. ret = drm_ioctl(filp, cmd, arg);
  607. pm_runtime_mark_last_busy(dev->dev);
  608. pm_runtime_put_autosuspend(dev->dev);
  609. return ret;
  610. }
  611. static const struct file_operations
  612. nouveau_driver_fops = {
  613. .owner = THIS_MODULE,
  614. .open = drm_open,
  615. .release = drm_release,
  616. .unlocked_ioctl = nouveau_drm_ioctl,
  617. .mmap = nouveau_ttm_mmap,
  618. .poll = drm_poll,
  619. .read = drm_read,
  620. #if defined(CONFIG_COMPAT)
  621. .compat_ioctl = nouveau_compat_ioctl,
  622. #endif
  623. .llseek = noop_llseek,
  624. };
  625. static struct drm_driver
  626. driver = {
  627. .driver_features =
  628. DRIVER_USE_AGP |
  629. DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER,
  630. .load = nouveau_drm_load,
  631. .unload = nouveau_drm_unload,
  632. .open = nouveau_drm_open,
  633. .preclose = nouveau_drm_preclose,
  634. .postclose = nouveau_drm_postclose,
  635. .lastclose = nouveau_vga_lastclose,
  636. #if defined(CONFIG_DEBUG_FS)
  637. .debugfs_init = nouveau_debugfs_init,
  638. .debugfs_cleanup = nouveau_debugfs_takedown,
  639. #endif
  640. .get_vblank_counter = drm_vblank_count,
  641. .enable_vblank = nouveau_display_vblank_enable,
  642. .disable_vblank = nouveau_display_vblank_disable,
  643. .ioctls = nouveau_ioctls,
  644. .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
  645. .fops = &nouveau_driver_fops,
  646. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  647. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  648. .gem_prime_export = drm_gem_prime_export,
  649. .gem_prime_import = drm_gem_prime_import,
  650. .gem_prime_pin = nouveau_gem_prime_pin,
  651. .gem_prime_unpin = nouveau_gem_prime_unpin,
  652. .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
  653. .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
  654. .gem_prime_vmap = nouveau_gem_prime_vmap,
  655. .gem_prime_vunmap = nouveau_gem_prime_vunmap,
  656. .gem_free_object = nouveau_gem_object_del,
  657. .gem_open_object = nouveau_gem_object_open,
  658. .gem_close_object = nouveau_gem_object_close,
  659. .dumb_create = nouveau_display_dumb_create,
  660. .dumb_map_offset = nouveau_display_dumb_map_offset,
  661. .dumb_destroy = drm_gem_dumb_destroy,
  662. .name = DRIVER_NAME,
  663. .desc = DRIVER_DESC,
  664. #ifdef GIT_REVISION
  665. .date = GIT_REVISION,
  666. #else
  667. .date = DRIVER_DATE,
  668. #endif
  669. .major = DRIVER_MAJOR,
  670. .minor = DRIVER_MINOR,
  671. .patchlevel = DRIVER_PATCHLEVEL,
  672. };
  673. static struct pci_device_id
  674. nouveau_drm_pci_table[] = {
  675. {
  676. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
  677. .class = PCI_BASE_CLASS_DISPLAY << 16,
  678. .class_mask = 0xff << 16,
  679. },
  680. {
  681. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
  682. .class = PCI_BASE_CLASS_DISPLAY << 16,
  683. .class_mask = 0xff << 16,
  684. },
  685. {}
  686. };
  687. static int nouveau_pmops_runtime_suspend(struct device *dev)
  688. {
  689. struct pci_dev *pdev = to_pci_dev(dev);
  690. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  691. int ret;
  692. if (nouveau_runtime_pm == 0)
  693. return -EINVAL;
  694. nv_debug_level(SILENT);
  695. drm_kms_helper_poll_disable(drm_dev);
  696. vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
  697. nouveau_switcheroo_optimus_dsm();
  698. ret = nouveau_do_suspend(drm_dev);
  699. pci_save_state(pdev);
  700. pci_disable_device(pdev);
  701. pci_set_power_state(pdev, PCI_D3cold);
  702. drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
  703. return ret;
  704. }
  705. static int nouveau_pmops_runtime_resume(struct device *dev)
  706. {
  707. struct pci_dev *pdev = to_pci_dev(dev);
  708. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  709. struct nouveau_device *device = nouveau_dev(drm_dev);
  710. int ret;
  711. if (nouveau_runtime_pm == 0)
  712. return -EINVAL;
  713. pci_set_power_state(pdev, PCI_D0);
  714. pci_restore_state(pdev);
  715. ret = pci_enable_device(pdev);
  716. if (ret)
  717. return ret;
  718. pci_set_master(pdev);
  719. ret = nouveau_do_resume(drm_dev);
  720. if (drm_dev->mode_config.num_crtc)
  721. nouveau_display_resume(drm_dev);
  722. drm_kms_helper_poll_enable(drm_dev);
  723. /* do magic */
  724. nv_mask(device, 0x88488, (1 << 25), (1 << 25));
  725. vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
  726. drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
  727. nv_debug_level(NORMAL);
  728. return ret;
  729. }
  730. static int nouveau_pmops_runtime_idle(struct device *dev)
  731. {
  732. struct pci_dev *pdev = to_pci_dev(dev);
  733. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  734. struct nouveau_drm *drm = nouveau_drm(drm_dev);
  735. struct drm_crtc *crtc;
  736. if (nouveau_runtime_pm == 0)
  737. return -EBUSY;
  738. /* are we optimus enabled? */
  739. if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
  740. DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
  741. return -EBUSY;
  742. }
  743. /* if we have a hdmi audio device - make sure it has a driver loaded */
  744. if (drm->hdmi_device) {
  745. if (!drm->hdmi_device->driver) {
  746. DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n");
  747. pm_runtime_mark_last_busy(dev);
  748. return -EBUSY;
  749. }
  750. }
  751. list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) {
  752. if (crtc->enabled) {
  753. DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
  754. return -EBUSY;
  755. }
  756. }
  757. pm_runtime_mark_last_busy(dev);
  758. pm_runtime_autosuspend(dev);
  759. /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
  760. return 1;
  761. }
  762. static const struct dev_pm_ops nouveau_pm_ops = {
  763. .suspend = nouveau_pmops_suspend,
  764. .resume = nouveau_pmops_resume,
  765. .freeze = nouveau_pmops_freeze,
  766. .thaw = nouveau_pmops_thaw,
  767. .poweroff = nouveau_pmops_freeze,
  768. .restore = nouveau_pmops_resume,
  769. .runtime_suspend = nouveau_pmops_runtime_suspend,
  770. .runtime_resume = nouveau_pmops_runtime_resume,
  771. .runtime_idle = nouveau_pmops_runtime_idle,
  772. };
  773. static struct pci_driver
  774. nouveau_drm_pci_driver = {
  775. .name = "nouveau",
  776. .id_table = nouveau_drm_pci_table,
  777. .probe = nouveau_drm_probe,
  778. .remove = nouveau_drm_remove,
  779. .driver.pm = &nouveau_pm_ops,
  780. };
  781. static int __init
  782. nouveau_drm_init(void)
  783. {
  784. if (nouveau_modeset == -1) {
  785. #ifdef CONFIG_VGA_CONSOLE
  786. if (vgacon_text_force())
  787. nouveau_modeset = 0;
  788. #endif
  789. }
  790. if (!nouveau_modeset)
  791. return 0;
  792. nouveau_register_dsm_handler();
  793. return drm_pci_init(&driver, &nouveau_drm_pci_driver);
  794. }
  795. static void __exit
  796. nouveau_drm_exit(void)
  797. {
  798. if (!nouveau_modeset)
  799. return;
  800. drm_pci_exit(&driver, &nouveau_drm_pci_driver);
  801. nouveau_unregister_dsm_handler();
  802. }
  803. module_init(nouveau_drm_init);
  804. module_exit(nouveau_drm_exit);
  805. MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
  806. MODULE_AUTHOR(DRIVER_AUTHOR);
  807. MODULE_DESCRIPTION(DRIVER_DESC);
  808. MODULE_LICENSE("GPL and additional rights");