process.c 32 KB

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  1. /*
  2. * Derived from "arch/i386/kernel/process.c"
  3. * Copyright (C) 1995 Linus Torvalds
  4. *
  5. * Updated and modified by Cort Dougan (cort@cs.nmt.edu) and
  6. * Paul Mackerras (paulus@cs.anu.edu.au)
  7. *
  8. * PowerPC version
  9. * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version
  14. * 2 of the License, or (at your option) any later version.
  15. */
  16. #include <linux/errno.h>
  17. #include <linux/sched.h>
  18. #include <linux/kernel.h>
  19. #include <linux/mm.h>
  20. #include <linux/smp.h>
  21. #include <linux/stddef.h>
  22. #include <linux/unistd.h>
  23. #include <linux/ptrace.h>
  24. #include <linux/slab.h>
  25. #include <linux/user.h>
  26. #include <linux/elf.h>
  27. #include <linux/init.h>
  28. #include <linux/prctl.h>
  29. #include <linux/init_task.h>
  30. #include <linux/module.h>
  31. #include <linux/kallsyms.h>
  32. #include <linux/mqueue.h>
  33. #include <linux/hardirq.h>
  34. #include <linux/utsname.h>
  35. #include <linux/ftrace.h>
  36. #include <linux/kernel_stat.h>
  37. #include <linux/personality.h>
  38. #include <linux/random.h>
  39. #include <linux/hw_breakpoint.h>
  40. #include <asm/pgtable.h>
  41. #include <asm/uaccess.h>
  42. #include <asm/system.h>
  43. #include <asm/io.h>
  44. #include <asm/processor.h>
  45. #include <asm/mmu.h>
  46. #include <asm/prom.h>
  47. #include <asm/machdep.h>
  48. #include <asm/time.h>
  49. #include <asm/syscalls.h>
  50. #ifdef CONFIG_PPC64
  51. #include <asm/firmware.h>
  52. #endif
  53. #include <linux/kprobes.h>
  54. #include <linux/kdebug.h>
  55. extern unsigned long _get_SP(void);
  56. #ifndef CONFIG_SMP
  57. struct task_struct *last_task_used_math = NULL;
  58. struct task_struct *last_task_used_altivec = NULL;
  59. struct task_struct *last_task_used_vsx = NULL;
  60. struct task_struct *last_task_used_spe = NULL;
  61. #endif
  62. /*
  63. * Make sure the floating-point register state in the
  64. * the thread_struct is up to date for task tsk.
  65. */
  66. void flush_fp_to_thread(struct task_struct *tsk)
  67. {
  68. if (tsk->thread.regs) {
  69. /*
  70. * We need to disable preemption here because if we didn't,
  71. * another process could get scheduled after the regs->msr
  72. * test but before we have finished saving the FP registers
  73. * to the thread_struct. That process could take over the
  74. * FPU, and then when we get scheduled again we would store
  75. * bogus values for the remaining FP registers.
  76. */
  77. preempt_disable();
  78. if (tsk->thread.regs->msr & MSR_FP) {
  79. #ifdef CONFIG_SMP
  80. /*
  81. * This should only ever be called for current or
  82. * for a stopped child process. Since we save away
  83. * the FP register state on context switch on SMP,
  84. * there is something wrong if a stopped child appears
  85. * to still have its FP state in the CPU registers.
  86. */
  87. BUG_ON(tsk != current);
  88. #endif
  89. giveup_fpu(tsk);
  90. }
  91. preempt_enable();
  92. }
  93. }
  94. void enable_kernel_fp(void)
  95. {
  96. WARN_ON(preemptible());
  97. #ifdef CONFIG_SMP
  98. if (current->thread.regs && (current->thread.regs->msr & MSR_FP))
  99. giveup_fpu(current);
  100. else
  101. giveup_fpu(NULL); /* just enables FP for kernel */
  102. #else
  103. giveup_fpu(last_task_used_math);
  104. #endif /* CONFIG_SMP */
  105. }
  106. EXPORT_SYMBOL(enable_kernel_fp);
  107. #ifdef CONFIG_ALTIVEC
  108. void enable_kernel_altivec(void)
  109. {
  110. WARN_ON(preemptible());
  111. #ifdef CONFIG_SMP
  112. if (current->thread.regs && (current->thread.regs->msr & MSR_VEC))
  113. giveup_altivec(current);
  114. else
  115. giveup_altivec(NULL); /* just enable AltiVec for kernel - force */
  116. #else
  117. giveup_altivec(last_task_used_altivec);
  118. #endif /* CONFIG_SMP */
  119. }
  120. EXPORT_SYMBOL(enable_kernel_altivec);
  121. /*
  122. * Make sure the VMX/Altivec register state in the
  123. * the thread_struct is up to date for task tsk.
  124. */
  125. void flush_altivec_to_thread(struct task_struct *tsk)
  126. {
  127. if (tsk->thread.regs) {
  128. preempt_disable();
  129. if (tsk->thread.regs->msr & MSR_VEC) {
  130. #ifdef CONFIG_SMP
  131. BUG_ON(tsk != current);
  132. #endif
  133. giveup_altivec(tsk);
  134. }
  135. preempt_enable();
  136. }
  137. }
  138. #endif /* CONFIG_ALTIVEC */
  139. #ifdef CONFIG_VSX
  140. #if 0
  141. /* not currently used, but some crazy RAID module might want to later */
  142. void enable_kernel_vsx(void)
  143. {
  144. WARN_ON(preemptible());
  145. #ifdef CONFIG_SMP
  146. if (current->thread.regs && (current->thread.regs->msr & MSR_VSX))
  147. giveup_vsx(current);
  148. else
  149. giveup_vsx(NULL); /* just enable vsx for kernel - force */
  150. #else
  151. giveup_vsx(last_task_used_vsx);
  152. #endif /* CONFIG_SMP */
  153. }
  154. EXPORT_SYMBOL(enable_kernel_vsx);
  155. #endif
  156. void giveup_vsx(struct task_struct *tsk)
  157. {
  158. giveup_fpu(tsk);
  159. giveup_altivec(tsk);
  160. __giveup_vsx(tsk);
  161. }
  162. void flush_vsx_to_thread(struct task_struct *tsk)
  163. {
  164. if (tsk->thread.regs) {
  165. preempt_disable();
  166. if (tsk->thread.regs->msr & MSR_VSX) {
  167. #ifdef CONFIG_SMP
  168. BUG_ON(tsk != current);
  169. #endif
  170. giveup_vsx(tsk);
  171. }
  172. preempt_enable();
  173. }
  174. }
  175. #endif /* CONFIG_VSX */
  176. #ifdef CONFIG_SPE
  177. void enable_kernel_spe(void)
  178. {
  179. WARN_ON(preemptible());
  180. #ifdef CONFIG_SMP
  181. if (current->thread.regs && (current->thread.regs->msr & MSR_SPE))
  182. giveup_spe(current);
  183. else
  184. giveup_spe(NULL); /* just enable SPE for kernel - force */
  185. #else
  186. giveup_spe(last_task_used_spe);
  187. #endif /* __SMP __ */
  188. }
  189. EXPORT_SYMBOL(enable_kernel_spe);
  190. void flush_spe_to_thread(struct task_struct *tsk)
  191. {
  192. if (tsk->thread.regs) {
  193. preempt_disable();
  194. if (tsk->thread.regs->msr & MSR_SPE) {
  195. #ifdef CONFIG_SMP
  196. BUG_ON(tsk != current);
  197. #endif
  198. giveup_spe(tsk);
  199. }
  200. preempt_enable();
  201. }
  202. }
  203. #endif /* CONFIG_SPE */
  204. #ifndef CONFIG_SMP
  205. /*
  206. * If we are doing lazy switching of CPU state (FP, altivec or SPE),
  207. * and the current task has some state, discard it.
  208. */
  209. void discard_lazy_cpu_state(void)
  210. {
  211. preempt_disable();
  212. if (last_task_used_math == current)
  213. last_task_used_math = NULL;
  214. #ifdef CONFIG_ALTIVEC
  215. if (last_task_used_altivec == current)
  216. last_task_used_altivec = NULL;
  217. #endif /* CONFIG_ALTIVEC */
  218. #ifdef CONFIG_VSX
  219. if (last_task_used_vsx == current)
  220. last_task_used_vsx = NULL;
  221. #endif /* CONFIG_VSX */
  222. #ifdef CONFIG_SPE
  223. if (last_task_used_spe == current)
  224. last_task_used_spe = NULL;
  225. #endif
  226. preempt_enable();
  227. }
  228. #endif /* CONFIG_SMP */
  229. #ifdef CONFIG_PPC_ADV_DEBUG_REGS
  230. void do_send_trap(struct pt_regs *regs, unsigned long address,
  231. unsigned long error_code, int signal_code, int breakpt)
  232. {
  233. siginfo_t info;
  234. if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code,
  235. 11, SIGSEGV) == NOTIFY_STOP)
  236. return;
  237. /* Deliver the signal to userspace */
  238. info.si_signo = SIGTRAP;
  239. info.si_errno = breakpt; /* breakpoint or watchpoint id */
  240. info.si_code = signal_code;
  241. info.si_addr = (void __user *)address;
  242. force_sig_info(SIGTRAP, &info, current);
  243. }
  244. #else /* !CONFIG_PPC_ADV_DEBUG_REGS */
  245. void do_dabr(struct pt_regs *regs, unsigned long address,
  246. unsigned long error_code)
  247. {
  248. siginfo_t info;
  249. if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code,
  250. 11, SIGSEGV) == NOTIFY_STOP)
  251. return;
  252. if (debugger_dabr_match(regs))
  253. return;
  254. /* Clear the DABR */
  255. set_dabr(0);
  256. /* Deliver the signal to userspace */
  257. info.si_signo = SIGTRAP;
  258. info.si_errno = 0;
  259. info.si_code = TRAP_HWBKPT;
  260. info.si_addr = (void __user *)address;
  261. force_sig_info(SIGTRAP, &info, current);
  262. }
  263. #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
  264. static DEFINE_PER_CPU(unsigned long, current_dabr);
  265. #ifdef CONFIG_PPC_ADV_DEBUG_REGS
  266. /*
  267. * Set the debug registers back to their default "safe" values.
  268. */
  269. static void set_debug_reg_defaults(struct thread_struct *thread)
  270. {
  271. thread->iac1 = thread->iac2 = 0;
  272. #if CONFIG_PPC_ADV_DEBUG_IACS > 2
  273. thread->iac3 = thread->iac4 = 0;
  274. #endif
  275. thread->dac1 = thread->dac2 = 0;
  276. #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
  277. thread->dvc1 = thread->dvc2 = 0;
  278. #endif
  279. thread->dbcr0 = 0;
  280. #ifdef CONFIG_BOOKE
  281. /*
  282. * Force User/Supervisor bits to b11 (user-only MSR[PR]=1)
  283. */
  284. thread->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | \
  285. DBCR1_IAC3US | DBCR1_IAC4US;
  286. /*
  287. * Force Data Address Compare User/Supervisor bits to be User-only
  288. * (0b11 MSR[PR]=1) and set all other bits in DBCR2 register to be 0.
  289. */
  290. thread->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US;
  291. #else
  292. thread->dbcr1 = 0;
  293. #endif
  294. }
  295. static void prime_debug_regs(struct thread_struct *thread)
  296. {
  297. mtspr(SPRN_IAC1, thread->iac1);
  298. mtspr(SPRN_IAC2, thread->iac2);
  299. #if CONFIG_PPC_ADV_DEBUG_IACS > 2
  300. mtspr(SPRN_IAC3, thread->iac3);
  301. mtspr(SPRN_IAC4, thread->iac4);
  302. #endif
  303. mtspr(SPRN_DAC1, thread->dac1);
  304. mtspr(SPRN_DAC2, thread->dac2);
  305. #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
  306. mtspr(SPRN_DVC1, thread->dvc1);
  307. mtspr(SPRN_DVC2, thread->dvc2);
  308. #endif
  309. mtspr(SPRN_DBCR0, thread->dbcr0);
  310. mtspr(SPRN_DBCR1, thread->dbcr1);
  311. #ifdef CONFIG_BOOKE
  312. mtspr(SPRN_DBCR2, thread->dbcr2);
  313. #endif
  314. }
  315. /*
  316. * Unless neither the old or new thread are making use of the
  317. * debug registers, set the debug registers from the values
  318. * stored in the new thread.
  319. */
  320. static void switch_booke_debug_regs(struct thread_struct *new_thread)
  321. {
  322. if ((current->thread.dbcr0 & DBCR0_IDM)
  323. || (new_thread->dbcr0 & DBCR0_IDM))
  324. prime_debug_regs(new_thread);
  325. }
  326. #else /* !CONFIG_PPC_ADV_DEBUG_REGS */
  327. static void set_debug_reg_defaults(struct thread_struct *thread)
  328. {
  329. if (thread->dabr) {
  330. thread->dabr = 0;
  331. set_dabr(0);
  332. }
  333. }
  334. #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
  335. int set_dabr(unsigned long dabr)
  336. {
  337. __get_cpu_var(current_dabr) = dabr;
  338. if (ppc_md.set_dabr)
  339. return ppc_md.set_dabr(dabr);
  340. /* XXX should we have a CPU_FTR_HAS_DABR ? */
  341. #ifdef CONFIG_PPC_ADV_DEBUG_REGS
  342. mtspr(SPRN_DAC1, dabr);
  343. #ifdef CONFIG_PPC_47x
  344. isync();
  345. #endif
  346. #elif defined(CONFIG_PPC_BOOK3S)
  347. mtspr(SPRN_DABR, dabr);
  348. #endif
  349. return 0;
  350. }
  351. #ifdef CONFIG_PPC64
  352. DEFINE_PER_CPU(struct cpu_usage, cpu_usage_array);
  353. #endif
  354. struct task_struct *__switch_to(struct task_struct *prev,
  355. struct task_struct *new)
  356. {
  357. struct thread_struct *new_thread, *old_thread;
  358. unsigned long flags;
  359. struct task_struct *last;
  360. #ifdef CONFIG_SMP
  361. /* avoid complexity of lazy save/restore of fpu
  362. * by just saving it every time we switch out if
  363. * this task used the fpu during the last quantum.
  364. *
  365. * If it tries to use the fpu again, it'll trap and
  366. * reload its fp regs. So we don't have to do a restore
  367. * every switch, just a save.
  368. * -- Cort
  369. */
  370. if (prev->thread.regs && (prev->thread.regs->msr & MSR_FP))
  371. giveup_fpu(prev);
  372. #ifdef CONFIG_ALTIVEC
  373. /*
  374. * If the previous thread used altivec in the last quantum
  375. * (thus changing altivec regs) then save them.
  376. * We used to check the VRSAVE register but not all apps
  377. * set it, so we don't rely on it now (and in fact we need
  378. * to save & restore VSCR even if VRSAVE == 0). -- paulus
  379. *
  380. * On SMP we always save/restore altivec regs just to avoid the
  381. * complexity of changing processors.
  382. * -- Cort
  383. */
  384. if (prev->thread.regs && (prev->thread.regs->msr & MSR_VEC))
  385. giveup_altivec(prev);
  386. #endif /* CONFIG_ALTIVEC */
  387. #ifdef CONFIG_VSX
  388. if (prev->thread.regs && (prev->thread.regs->msr & MSR_VSX))
  389. /* VMX and FPU registers are already save here */
  390. __giveup_vsx(prev);
  391. #endif /* CONFIG_VSX */
  392. #ifdef CONFIG_SPE
  393. /*
  394. * If the previous thread used spe in the last quantum
  395. * (thus changing spe regs) then save them.
  396. *
  397. * On SMP we always save/restore spe regs just to avoid the
  398. * complexity of changing processors.
  399. */
  400. if ((prev->thread.regs && (prev->thread.regs->msr & MSR_SPE)))
  401. giveup_spe(prev);
  402. #endif /* CONFIG_SPE */
  403. #else /* CONFIG_SMP */
  404. #ifdef CONFIG_ALTIVEC
  405. /* Avoid the trap. On smp this this never happens since
  406. * we don't set last_task_used_altivec -- Cort
  407. */
  408. if (new->thread.regs && last_task_used_altivec == new)
  409. new->thread.regs->msr |= MSR_VEC;
  410. #endif /* CONFIG_ALTIVEC */
  411. #ifdef CONFIG_VSX
  412. if (new->thread.regs && last_task_used_vsx == new)
  413. new->thread.regs->msr |= MSR_VSX;
  414. #endif /* CONFIG_VSX */
  415. #ifdef CONFIG_SPE
  416. /* Avoid the trap. On smp this this never happens since
  417. * we don't set last_task_used_spe
  418. */
  419. if (new->thread.regs && last_task_used_spe == new)
  420. new->thread.regs->msr |= MSR_SPE;
  421. #endif /* CONFIG_SPE */
  422. #endif /* CONFIG_SMP */
  423. #ifdef CONFIG_PPC_ADV_DEBUG_REGS
  424. switch_booke_debug_regs(&new->thread);
  425. #else
  426. /*
  427. * For PPC_BOOK3S_64, we use the hw-breakpoint interfaces that would
  428. * schedule DABR
  429. */
  430. #ifndef CONFIG_HAVE_HW_BREAKPOINT
  431. if (unlikely(__get_cpu_var(current_dabr) != new->thread.dabr))
  432. set_dabr(new->thread.dabr);
  433. #endif /* CONFIG_HAVE_HW_BREAKPOINT */
  434. #endif
  435. new_thread = &new->thread;
  436. old_thread = &current->thread;
  437. #if defined(CONFIG_PPC_BOOK3E_64)
  438. /* XXX Current Book3E code doesn't deal with kernel side DBCR0,
  439. * we always hold the user values, so we set it now.
  440. *
  441. * However, we ensure the kernel MSR:DE is appropriately cleared too
  442. * to avoid spurrious single step exceptions in the kernel.
  443. *
  444. * This will have to change to merge with the ppc32 code at some point,
  445. * but I don't like much what ppc32 is doing today so there's some
  446. * thinking needed there
  447. */
  448. if ((new_thread->dbcr0 | old_thread->dbcr0) & DBCR0_IDM) {
  449. u32 dbcr0;
  450. mtmsr(mfmsr() & ~MSR_DE);
  451. isync();
  452. dbcr0 = mfspr(SPRN_DBCR0);
  453. dbcr0 = (dbcr0 & DBCR0_EDM) | new_thread->dbcr0;
  454. mtspr(SPRN_DBCR0, dbcr0);
  455. }
  456. #endif /* CONFIG_PPC64_BOOK3E */
  457. #ifdef CONFIG_PPC64
  458. /*
  459. * Collect processor utilization data per process
  460. */
  461. if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
  462. struct cpu_usage *cu = &__get_cpu_var(cpu_usage_array);
  463. long unsigned start_tb, current_tb;
  464. start_tb = old_thread->start_tb;
  465. cu->current_tb = current_tb = mfspr(SPRN_PURR);
  466. old_thread->accum_tb += (current_tb - start_tb);
  467. new_thread->start_tb = current_tb;
  468. }
  469. #endif
  470. local_irq_save(flags);
  471. account_system_vtime(current);
  472. account_process_vtime(current);
  473. calculate_steal_time();
  474. /*
  475. * We can't take a PMU exception inside _switch() since there is a
  476. * window where the kernel stack SLB and the kernel stack are out
  477. * of sync. Hard disable here.
  478. */
  479. hard_irq_disable();
  480. last = _switch(old_thread, new_thread);
  481. local_irq_restore(flags);
  482. return last;
  483. }
  484. static int instructions_to_print = 16;
  485. static void show_instructions(struct pt_regs *regs)
  486. {
  487. int i;
  488. unsigned long pc = regs->nip - (instructions_to_print * 3 / 4 *
  489. sizeof(int));
  490. printk("Instruction dump:");
  491. for (i = 0; i < instructions_to_print; i++) {
  492. int instr;
  493. if (!(i % 8))
  494. printk("\n");
  495. #if !defined(CONFIG_BOOKE)
  496. /* If executing with the IMMU off, adjust pc rather
  497. * than print XXXXXXXX.
  498. */
  499. if (!(regs->msr & MSR_IR))
  500. pc = (unsigned long)phys_to_virt(pc);
  501. #endif
  502. /* We use __get_user here *only* to avoid an OOPS on a
  503. * bad address because the pc *should* only be a
  504. * kernel address.
  505. */
  506. if (!__kernel_text_address(pc) ||
  507. __get_user(instr, (unsigned int __user *)pc)) {
  508. printk("XXXXXXXX ");
  509. } else {
  510. if (regs->nip == pc)
  511. printk("<%08x> ", instr);
  512. else
  513. printk("%08x ", instr);
  514. }
  515. pc += sizeof(int);
  516. }
  517. printk("\n");
  518. }
  519. static struct regbit {
  520. unsigned long bit;
  521. const char *name;
  522. } msr_bits[] = {
  523. {MSR_EE, "EE"},
  524. {MSR_PR, "PR"},
  525. {MSR_FP, "FP"},
  526. {MSR_VEC, "VEC"},
  527. {MSR_VSX, "VSX"},
  528. {MSR_ME, "ME"},
  529. {MSR_CE, "CE"},
  530. {MSR_DE, "DE"},
  531. {MSR_IR, "IR"},
  532. {MSR_DR, "DR"},
  533. {0, NULL}
  534. };
  535. static void printbits(unsigned long val, struct regbit *bits)
  536. {
  537. const char *sep = "";
  538. printk("<");
  539. for (; bits->bit; ++bits)
  540. if (val & bits->bit) {
  541. printk("%s%s", sep, bits->name);
  542. sep = ",";
  543. }
  544. printk(">");
  545. }
  546. #ifdef CONFIG_PPC64
  547. #define REG "%016lx"
  548. #define REGS_PER_LINE 4
  549. #define LAST_VOLATILE 13
  550. #else
  551. #define REG "%08lx"
  552. #define REGS_PER_LINE 8
  553. #define LAST_VOLATILE 12
  554. #endif
  555. void show_regs(struct pt_regs * regs)
  556. {
  557. int i, trap;
  558. printk("NIP: "REG" LR: "REG" CTR: "REG"\n",
  559. regs->nip, regs->link, regs->ctr);
  560. printk("REGS: %p TRAP: %04lx %s (%s)\n",
  561. regs, regs->trap, print_tainted(), init_utsname()->release);
  562. printk("MSR: "REG" ", regs->msr);
  563. printbits(regs->msr, msr_bits);
  564. printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer);
  565. trap = TRAP(regs);
  566. if (trap == 0x300 || trap == 0x600)
  567. #ifdef CONFIG_PPC_ADV_DEBUG_REGS
  568. printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr);
  569. #else
  570. printk("DAR: "REG", DSISR: "REG"\n", regs->dar, regs->dsisr);
  571. #endif
  572. printk("TASK = %p[%d] '%s' THREAD: %p",
  573. current, task_pid_nr(current), current->comm, task_thread_info(current));
  574. #ifdef CONFIG_SMP
  575. printk(" CPU: %d", raw_smp_processor_id());
  576. #endif /* CONFIG_SMP */
  577. for (i = 0; i < 32; i++) {
  578. if ((i % REGS_PER_LINE) == 0)
  579. printk("\nGPR%02d: ", i);
  580. printk(REG " ", regs->gpr[i]);
  581. if (i == LAST_VOLATILE && !FULL_REGS(regs))
  582. break;
  583. }
  584. printk("\n");
  585. #ifdef CONFIG_KALLSYMS
  586. /*
  587. * Lookup NIP late so we have the best change of getting the
  588. * above info out without failing
  589. */
  590. printk("NIP ["REG"] %pS\n", regs->nip, (void *)regs->nip);
  591. printk("LR ["REG"] %pS\n", regs->link, (void *)regs->link);
  592. #endif
  593. show_stack(current, (unsigned long *) regs->gpr[1]);
  594. if (!user_mode(regs))
  595. show_instructions(regs);
  596. }
  597. void exit_thread(void)
  598. {
  599. discard_lazy_cpu_state();
  600. }
  601. void flush_thread(void)
  602. {
  603. discard_lazy_cpu_state();
  604. #ifdef CONFIG_HAVE_HW_BREAKPOINTS
  605. flush_ptrace_hw_breakpoint(current);
  606. #else /* CONFIG_HAVE_HW_BREAKPOINTS */
  607. set_debug_reg_defaults(&current->thread);
  608. #endif /* CONFIG_HAVE_HW_BREAKPOINTS */
  609. }
  610. void
  611. release_thread(struct task_struct *t)
  612. {
  613. }
  614. /*
  615. * This gets called before we allocate a new thread and copy
  616. * the current task into it.
  617. */
  618. void prepare_to_copy(struct task_struct *tsk)
  619. {
  620. flush_fp_to_thread(current);
  621. flush_altivec_to_thread(current);
  622. flush_vsx_to_thread(current);
  623. flush_spe_to_thread(current);
  624. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  625. flush_ptrace_hw_breakpoint(tsk);
  626. #endif /* CONFIG_HAVE_HW_BREAKPOINT */
  627. }
  628. /*
  629. * Copy a thread..
  630. */
  631. int copy_thread(unsigned long clone_flags, unsigned long usp,
  632. unsigned long unused, struct task_struct *p,
  633. struct pt_regs *regs)
  634. {
  635. struct pt_regs *childregs, *kregs;
  636. extern void ret_from_fork(void);
  637. unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE;
  638. CHECK_FULL_REGS(regs);
  639. /* Copy registers */
  640. sp -= sizeof(struct pt_regs);
  641. childregs = (struct pt_regs *) sp;
  642. *childregs = *regs;
  643. if ((childregs->msr & MSR_PR) == 0) {
  644. /* for kernel thread, set `current' and stackptr in new task */
  645. childregs->gpr[1] = sp + sizeof(struct pt_regs);
  646. #ifdef CONFIG_PPC32
  647. childregs->gpr[2] = (unsigned long) p;
  648. #else
  649. clear_tsk_thread_flag(p, TIF_32BIT);
  650. #endif
  651. p->thread.regs = NULL; /* no user register state */
  652. } else {
  653. childregs->gpr[1] = usp;
  654. p->thread.regs = childregs;
  655. if (clone_flags & CLONE_SETTLS) {
  656. #ifdef CONFIG_PPC64
  657. if (!test_thread_flag(TIF_32BIT))
  658. childregs->gpr[13] = childregs->gpr[6];
  659. else
  660. #endif
  661. childregs->gpr[2] = childregs->gpr[6];
  662. }
  663. }
  664. childregs->gpr[3] = 0; /* Result from fork() */
  665. sp -= STACK_FRAME_OVERHEAD;
  666. /*
  667. * The way this works is that at some point in the future
  668. * some task will call _switch to switch to the new task.
  669. * That will pop off the stack frame created below and start
  670. * the new task running at ret_from_fork. The new task will
  671. * do some house keeping and then return from the fork or clone
  672. * system call, using the stack frame created above.
  673. */
  674. sp -= sizeof(struct pt_regs);
  675. kregs = (struct pt_regs *) sp;
  676. sp -= STACK_FRAME_OVERHEAD;
  677. p->thread.ksp = sp;
  678. p->thread.ksp_limit = (unsigned long)task_stack_page(p) +
  679. _ALIGN_UP(sizeof(struct thread_info), 16);
  680. #ifdef CONFIG_PPC_STD_MMU_64
  681. if (cpu_has_feature(CPU_FTR_SLB)) {
  682. unsigned long sp_vsid;
  683. unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp;
  684. if (cpu_has_feature(CPU_FTR_1T_SEGMENT))
  685. sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T)
  686. << SLB_VSID_SHIFT_1T;
  687. else
  688. sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_256M)
  689. << SLB_VSID_SHIFT;
  690. sp_vsid |= SLB_VSID_KERNEL | llp;
  691. p->thread.ksp_vsid = sp_vsid;
  692. }
  693. #endif /* CONFIG_PPC_STD_MMU_64 */
  694. /*
  695. * The PPC64 ABI makes use of a TOC to contain function
  696. * pointers. The function (ret_from_except) is actually a pointer
  697. * to the TOC entry. The first entry is a pointer to the actual
  698. * function.
  699. */
  700. #ifdef CONFIG_PPC64
  701. kregs->nip = *((unsigned long *)ret_from_fork);
  702. #else
  703. kregs->nip = (unsigned long)ret_from_fork;
  704. #endif
  705. return 0;
  706. }
  707. /*
  708. * Set up a thread for executing a new program
  709. */
  710. void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
  711. {
  712. #ifdef CONFIG_PPC64
  713. unsigned long load_addr = regs->gpr[2]; /* saved by ELF_PLAT_INIT */
  714. #endif
  715. set_fs(USER_DS);
  716. /*
  717. * If we exec out of a kernel thread then thread.regs will not be
  718. * set. Do it now.
  719. */
  720. if (!current->thread.regs) {
  721. struct pt_regs *regs = task_stack_page(current) + THREAD_SIZE;
  722. current->thread.regs = regs - 1;
  723. }
  724. memset(regs->gpr, 0, sizeof(regs->gpr));
  725. regs->ctr = 0;
  726. regs->link = 0;
  727. regs->xer = 0;
  728. regs->ccr = 0;
  729. regs->gpr[1] = sp;
  730. /*
  731. * We have just cleared all the nonvolatile GPRs, so make
  732. * FULL_REGS(regs) return true. This is necessary to allow
  733. * ptrace to examine the thread immediately after exec.
  734. */
  735. regs->trap &= ~1UL;
  736. #ifdef CONFIG_PPC32
  737. regs->mq = 0;
  738. regs->nip = start;
  739. regs->msr = MSR_USER;
  740. #else
  741. if (!test_thread_flag(TIF_32BIT)) {
  742. unsigned long entry, toc;
  743. /* start is a relocated pointer to the function descriptor for
  744. * the elf _start routine. The first entry in the function
  745. * descriptor is the entry address of _start and the second
  746. * entry is the TOC value we need to use.
  747. */
  748. __get_user(entry, (unsigned long __user *)start);
  749. __get_user(toc, (unsigned long __user *)start+1);
  750. /* Check whether the e_entry function descriptor entries
  751. * need to be relocated before we can use them.
  752. */
  753. if (load_addr != 0) {
  754. entry += load_addr;
  755. toc += load_addr;
  756. }
  757. regs->nip = entry;
  758. regs->gpr[2] = toc;
  759. regs->msr = MSR_USER64;
  760. } else {
  761. regs->nip = start;
  762. regs->gpr[2] = 0;
  763. regs->msr = MSR_USER32;
  764. }
  765. #endif
  766. discard_lazy_cpu_state();
  767. #ifdef CONFIG_VSX
  768. current->thread.used_vsr = 0;
  769. #endif
  770. memset(current->thread.fpr, 0, sizeof(current->thread.fpr));
  771. current->thread.fpscr.val = 0;
  772. #ifdef CONFIG_ALTIVEC
  773. memset(current->thread.vr, 0, sizeof(current->thread.vr));
  774. memset(&current->thread.vscr, 0, sizeof(current->thread.vscr));
  775. current->thread.vscr.u[3] = 0x00010000; /* Java mode disabled */
  776. current->thread.vrsave = 0;
  777. current->thread.used_vr = 0;
  778. #endif /* CONFIG_ALTIVEC */
  779. #ifdef CONFIG_SPE
  780. memset(current->thread.evr, 0, sizeof(current->thread.evr));
  781. current->thread.acc = 0;
  782. current->thread.spefscr = 0;
  783. current->thread.used_spe = 0;
  784. #endif /* CONFIG_SPE */
  785. }
  786. #define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \
  787. | PR_FP_EXC_RES | PR_FP_EXC_INV)
  788. int set_fpexc_mode(struct task_struct *tsk, unsigned int val)
  789. {
  790. struct pt_regs *regs = tsk->thread.regs;
  791. /* This is a bit hairy. If we are an SPE enabled processor
  792. * (have embedded fp) we store the IEEE exception enable flags in
  793. * fpexc_mode. fpexc_mode is also used for setting FP exception
  794. * mode (asyn, precise, disabled) for 'Classic' FP. */
  795. if (val & PR_FP_EXC_SW_ENABLE) {
  796. #ifdef CONFIG_SPE
  797. if (cpu_has_feature(CPU_FTR_SPE)) {
  798. tsk->thread.fpexc_mode = val &
  799. (PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT);
  800. return 0;
  801. } else {
  802. return -EINVAL;
  803. }
  804. #else
  805. return -EINVAL;
  806. #endif
  807. }
  808. /* on a CONFIG_SPE this does not hurt us. The bits that
  809. * __pack_fe01 use do not overlap with bits used for
  810. * PR_FP_EXC_SW_ENABLE. Additionally, the MSR[FE0,FE1] bits
  811. * on CONFIG_SPE implementations are reserved so writing to
  812. * them does not change anything */
  813. if (val > PR_FP_EXC_PRECISE)
  814. return -EINVAL;
  815. tsk->thread.fpexc_mode = __pack_fe01(val);
  816. if (regs != NULL && (regs->msr & MSR_FP) != 0)
  817. regs->msr = (regs->msr & ~(MSR_FE0|MSR_FE1))
  818. | tsk->thread.fpexc_mode;
  819. return 0;
  820. }
  821. int get_fpexc_mode(struct task_struct *tsk, unsigned long adr)
  822. {
  823. unsigned int val;
  824. if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE)
  825. #ifdef CONFIG_SPE
  826. if (cpu_has_feature(CPU_FTR_SPE))
  827. val = tsk->thread.fpexc_mode;
  828. else
  829. return -EINVAL;
  830. #else
  831. return -EINVAL;
  832. #endif
  833. else
  834. val = __unpack_fe01(tsk->thread.fpexc_mode);
  835. return put_user(val, (unsigned int __user *) adr);
  836. }
  837. int set_endian(struct task_struct *tsk, unsigned int val)
  838. {
  839. struct pt_regs *regs = tsk->thread.regs;
  840. if ((val == PR_ENDIAN_LITTLE && !cpu_has_feature(CPU_FTR_REAL_LE)) ||
  841. (val == PR_ENDIAN_PPC_LITTLE && !cpu_has_feature(CPU_FTR_PPC_LE)))
  842. return -EINVAL;
  843. if (regs == NULL)
  844. return -EINVAL;
  845. if (val == PR_ENDIAN_BIG)
  846. regs->msr &= ~MSR_LE;
  847. else if (val == PR_ENDIAN_LITTLE || val == PR_ENDIAN_PPC_LITTLE)
  848. regs->msr |= MSR_LE;
  849. else
  850. return -EINVAL;
  851. return 0;
  852. }
  853. int get_endian(struct task_struct *tsk, unsigned long adr)
  854. {
  855. struct pt_regs *regs = tsk->thread.regs;
  856. unsigned int val;
  857. if (!cpu_has_feature(CPU_FTR_PPC_LE) &&
  858. !cpu_has_feature(CPU_FTR_REAL_LE))
  859. return -EINVAL;
  860. if (regs == NULL)
  861. return -EINVAL;
  862. if (regs->msr & MSR_LE) {
  863. if (cpu_has_feature(CPU_FTR_REAL_LE))
  864. val = PR_ENDIAN_LITTLE;
  865. else
  866. val = PR_ENDIAN_PPC_LITTLE;
  867. } else
  868. val = PR_ENDIAN_BIG;
  869. return put_user(val, (unsigned int __user *)adr);
  870. }
  871. int set_unalign_ctl(struct task_struct *tsk, unsigned int val)
  872. {
  873. tsk->thread.align_ctl = val;
  874. return 0;
  875. }
  876. int get_unalign_ctl(struct task_struct *tsk, unsigned long adr)
  877. {
  878. return put_user(tsk->thread.align_ctl, (unsigned int __user *)adr);
  879. }
  880. #define TRUNC_PTR(x) ((typeof(x))(((unsigned long)(x)) & 0xffffffff))
  881. int sys_clone(unsigned long clone_flags, unsigned long usp,
  882. int __user *parent_tidp, void __user *child_threadptr,
  883. int __user *child_tidp, int p6,
  884. struct pt_regs *regs)
  885. {
  886. CHECK_FULL_REGS(regs);
  887. if (usp == 0)
  888. usp = regs->gpr[1]; /* stack pointer for child */
  889. #ifdef CONFIG_PPC64
  890. if (test_thread_flag(TIF_32BIT)) {
  891. parent_tidp = TRUNC_PTR(parent_tidp);
  892. child_tidp = TRUNC_PTR(child_tidp);
  893. }
  894. #endif
  895. return do_fork(clone_flags, usp, regs, 0, parent_tidp, child_tidp);
  896. }
  897. int sys_fork(unsigned long p1, unsigned long p2, unsigned long p3,
  898. unsigned long p4, unsigned long p5, unsigned long p6,
  899. struct pt_regs *regs)
  900. {
  901. CHECK_FULL_REGS(regs);
  902. return do_fork(SIGCHLD, regs->gpr[1], regs, 0, NULL, NULL);
  903. }
  904. int sys_vfork(unsigned long p1, unsigned long p2, unsigned long p3,
  905. unsigned long p4, unsigned long p5, unsigned long p6,
  906. struct pt_regs *regs)
  907. {
  908. CHECK_FULL_REGS(regs);
  909. return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->gpr[1],
  910. regs, 0, NULL, NULL);
  911. }
  912. int sys_execve(unsigned long a0, unsigned long a1, unsigned long a2,
  913. unsigned long a3, unsigned long a4, unsigned long a5,
  914. struct pt_regs *regs)
  915. {
  916. int error;
  917. char *filename;
  918. filename = getname((char __user *) a0);
  919. error = PTR_ERR(filename);
  920. if (IS_ERR(filename))
  921. goto out;
  922. flush_fp_to_thread(current);
  923. flush_altivec_to_thread(current);
  924. flush_spe_to_thread(current);
  925. error = do_execve(filename, (char __user * __user *) a1,
  926. (char __user * __user *) a2, regs);
  927. putname(filename);
  928. out:
  929. return error;
  930. }
  931. static inline int valid_irq_stack(unsigned long sp, struct task_struct *p,
  932. unsigned long nbytes)
  933. {
  934. unsigned long stack_page;
  935. unsigned long cpu = task_cpu(p);
  936. /*
  937. * Avoid crashing if the stack has overflowed and corrupted
  938. * task_cpu(p), which is in the thread_info struct.
  939. */
  940. if (cpu < NR_CPUS && cpu_possible(cpu)) {
  941. stack_page = (unsigned long) hardirq_ctx[cpu];
  942. if (sp >= stack_page + sizeof(struct thread_struct)
  943. && sp <= stack_page + THREAD_SIZE - nbytes)
  944. return 1;
  945. stack_page = (unsigned long) softirq_ctx[cpu];
  946. if (sp >= stack_page + sizeof(struct thread_struct)
  947. && sp <= stack_page + THREAD_SIZE - nbytes)
  948. return 1;
  949. }
  950. return 0;
  951. }
  952. int validate_sp(unsigned long sp, struct task_struct *p,
  953. unsigned long nbytes)
  954. {
  955. unsigned long stack_page = (unsigned long)task_stack_page(p);
  956. if (sp >= stack_page + sizeof(struct thread_struct)
  957. && sp <= stack_page + THREAD_SIZE - nbytes)
  958. return 1;
  959. return valid_irq_stack(sp, p, nbytes);
  960. }
  961. EXPORT_SYMBOL(validate_sp);
  962. unsigned long get_wchan(struct task_struct *p)
  963. {
  964. unsigned long ip, sp;
  965. int count = 0;
  966. if (!p || p == current || p->state == TASK_RUNNING)
  967. return 0;
  968. sp = p->thread.ksp;
  969. if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD))
  970. return 0;
  971. do {
  972. sp = *(unsigned long *)sp;
  973. if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD))
  974. return 0;
  975. if (count > 0) {
  976. ip = ((unsigned long *)sp)[STACK_FRAME_LR_SAVE];
  977. if (!in_sched_functions(ip))
  978. return ip;
  979. }
  980. } while (count++ < 16);
  981. return 0;
  982. }
  983. static int kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH;
  984. void show_stack(struct task_struct *tsk, unsigned long *stack)
  985. {
  986. unsigned long sp, ip, lr, newsp;
  987. int count = 0;
  988. int firstframe = 1;
  989. #ifdef CONFIG_FUNCTION_GRAPH_TRACER
  990. int curr_frame = current->curr_ret_stack;
  991. extern void return_to_handler(void);
  992. unsigned long rth = (unsigned long)return_to_handler;
  993. unsigned long mrth = -1;
  994. #ifdef CONFIG_PPC64
  995. extern void mod_return_to_handler(void);
  996. rth = *(unsigned long *)rth;
  997. mrth = (unsigned long)mod_return_to_handler;
  998. mrth = *(unsigned long *)mrth;
  999. #endif
  1000. #endif
  1001. sp = (unsigned long) stack;
  1002. if (tsk == NULL)
  1003. tsk = current;
  1004. if (sp == 0) {
  1005. if (tsk == current)
  1006. asm("mr %0,1" : "=r" (sp));
  1007. else
  1008. sp = tsk->thread.ksp;
  1009. }
  1010. lr = 0;
  1011. printk("Call Trace:\n");
  1012. do {
  1013. if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD))
  1014. return;
  1015. stack = (unsigned long *) sp;
  1016. newsp = stack[0];
  1017. ip = stack[STACK_FRAME_LR_SAVE];
  1018. if (!firstframe || ip != lr) {
  1019. printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip);
  1020. #ifdef CONFIG_FUNCTION_GRAPH_TRACER
  1021. if ((ip == rth || ip == mrth) && curr_frame >= 0) {
  1022. printk(" (%pS)",
  1023. (void *)current->ret_stack[curr_frame].ret);
  1024. curr_frame--;
  1025. }
  1026. #endif
  1027. if (firstframe)
  1028. printk(" (unreliable)");
  1029. printk("\n");
  1030. }
  1031. firstframe = 0;
  1032. /*
  1033. * See if this is an exception frame.
  1034. * We look for the "regshere" marker in the current frame.
  1035. */
  1036. if (validate_sp(sp, tsk, STACK_INT_FRAME_SIZE)
  1037. && stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) {
  1038. struct pt_regs *regs = (struct pt_regs *)
  1039. (sp + STACK_FRAME_OVERHEAD);
  1040. lr = regs->link;
  1041. printk("--- Exception: %lx at %pS\n LR = %pS\n",
  1042. regs->trap, (void *)regs->nip, (void *)lr);
  1043. firstframe = 1;
  1044. }
  1045. sp = newsp;
  1046. } while (count++ < kstack_depth_to_print);
  1047. }
  1048. void dump_stack(void)
  1049. {
  1050. show_stack(current, NULL);
  1051. }
  1052. EXPORT_SYMBOL(dump_stack);
  1053. #ifdef CONFIG_PPC64
  1054. void ppc64_runlatch_on(void)
  1055. {
  1056. unsigned long ctrl;
  1057. if (cpu_has_feature(CPU_FTR_CTRL) && !test_thread_flag(TIF_RUNLATCH)) {
  1058. HMT_medium();
  1059. ctrl = mfspr(SPRN_CTRLF);
  1060. ctrl |= CTRL_RUNLATCH;
  1061. mtspr(SPRN_CTRLT, ctrl);
  1062. set_thread_flag(TIF_RUNLATCH);
  1063. }
  1064. }
  1065. void ppc64_runlatch_off(void)
  1066. {
  1067. unsigned long ctrl;
  1068. if (cpu_has_feature(CPU_FTR_CTRL) && test_thread_flag(TIF_RUNLATCH)) {
  1069. HMT_medium();
  1070. clear_thread_flag(TIF_RUNLATCH);
  1071. ctrl = mfspr(SPRN_CTRLF);
  1072. ctrl &= ~CTRL_RUNLATCH;
  1073. mtspr(SPRN_CTRLT, ctrl);
  1074. }
  1075. }
  1076. #endif
  1077. #if THREAD_SHIFT < PAGE_SHIFT
  1078. static struct kmem_cache *thread_info_cache;
  1079. struct thread_info *alloc_thread_info(struct task_struct *tsk)
  1080. {
  1081. struct thread_info *ti;
  1082. ti = kmem_cache_alloc(thread_info_cache, GFP_KERNEL);
  1083. if (unlikely(ti == NULL))
  1084. return NULL;
  1085. #ifdef CONFIG_DEBUG_STACK_USAGE
  1086. memset(ti, 0, THREAD_SIZE);
  1087. #endif
  1088. return ti;
  1089. }
  1090. void free_thread_info(struct thread_info *ti)
  1091. {
  1092. kmem_cache_free(thread_info_cache, ti);
  1093. }
  1094. void thread_info_cache_init(void)
  1095. {
  1096. thread_info_cache = kmem_cache_create("thread_info", THREAD_SIZE,
  1097. THREAD_SIZE, 0, NULL);
  1098. BUG_ON(thread_info_cache == NULL);
  1099. }
  1100. #endif /* THREAD_SHIFT < PAGE_SHIFT */
  1101. unsigned long arch_align_stack(unsigned long sp)
  1102. {
  1103. if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
  1104. sp -= get_random_int() & ~PAGE_MASK;
  1105. return sp & ~0xf;
  1106. }
  1107. static inline unsigned long brk_rnd(void)
  1108. {
  1109. unsigned long rnd = 0;
  1110. /* 8MB for 32bit, 1GB for 64bit */
  1111. if (is_32bit_task())
  1112. rnd = (long)(get_random_int() % (1<<(23-PAGE_SHIFT)));
  1113. else
  1114. rnd = (long)(get_random_int() % (1<<(30-PAGE_SHIFT)));
  1115. return rnd << PAGE_SHIFT;
  1116. }
  1117. unsigned long arch_randomize_brk(struct mm_struct *mm)
  1118. {
  1119. unsigned long base = mm->brk;
  1120. unsigned long ret;
  1121. #ifdef CONFIG_PPC_STD_MMU_64
  1122. /*
  1123. * If we are using 1TB segments and we are allowed to randomise
  1124. * the heap, we can put it above 1TB so it is backed by a 1TB
  1125. * segment. Otherwise the heap will be in the bottom 1TB
  1126. * which always uses 256MB segments and this may result in a
  1127. * performance penalty.
  1128. */
  1129. if (!is_32bit_task() && (mmu_highuser_ssize == MMU_SEGSIZE_1T))
  1130. base = max_t(unsigned long, mm->brk, 1UL << SID_SHIFT_1T);
  1131. #endif
  1132. ret = PAGE_ALIGN(base + brk_rnd());
  1133. if (ret < mm->brk)
  1134. return mm->brk;
  1135. return ret;
  1136. }
  1137. unsigned long randomize_et_dyn(unsigned long base)
  1138. {
  1139. unsigned long ret = PAGE_ALIGN(base + brk_rnd());
  1140. if (ret < base)
  1141. return base;
  1142. return ret;
  1143. }
  1144. #ifdef CONFIG_SMP
  1145. int arch_sd_sibling_asym_packing(void)
  1146. {
  1147. if (cpu_has_feature(CPU_FTR_ASYM_SMT)) {
  1148. printk_once(KERN_INFO "Enabling Asymmetric SMT scheduling\n");
  1149. return SD_ASYM_PACKING;
  1150. }
  1151. return 0;
  1152. }
  1153. #endif