fsl-diu-fb.c 46 KB

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  1. /*
  2. * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
  3. *
  4. * Freescale DIU Frame Buffer device driver
  5. *
  6. * Authors: Hongjun Chen <hong-jun.chen@freescale.com>
  7. * Paul Widmer <paul.widmer@freescale.com>
  8. * Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
  9. * York Sun <yorksun@freescale.com>
  10. *
  11. * Based on imxfb.c Copyright (C) 2004 S.Hauer, Pengutronix
  12. *
  13. * This program is free software; you can redistribute it and/or modify it
  14. * under the terms of the GNU General Public License as published by the
  15. * Free Software Foundation; either version 2 of the License, or (at your
  16. * option) any later version.
  17. *
  18. */
  19. #include <linux/module.h>
  20. #include <linux/kernel.h>
  21. #include <linux/errno.h>
  22. #include <linux/string.h>
  23. #include <linux/slab.h>
  24. #include <linux/fb.h>
  25. #include <linux/init.h>
  26. #include <linux/dma-mapping.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/clk.h>
  30. #include <linux/uaccess.h>
  31. #include <linux/vmalloc.h>
  32. #include <linux/spinlock.h>
  33. #include <sysdev/fsl_soc.h>
  34. #include <linux/fsl-diu-fb.h>
  35. #include "edid.h"
  36. #define FSL_AOI_NUM 6 /* 5 AOIs and one dummy AOI */
  37. /* 1 for plane 0, 2 for plane 1&2 each */
  38. /* HW cursor parameters */
  39. #define MAX_CURS 32
  40. /* INT_STATUS/INT_MASK field descriptions */
  41. #define INT_VSYNC 0x01 /* Vsync interrupt */
  42. #define INT_VSYNC_WB 0x02 /* Vsync interrupt for write back operation */
  43. #define INT_UNDRUN 0x04 /* Under run exception interrupt */
  44. #define INT_PARERR 0x08 /* Display parameters error interrupt */
  45. #define INT_LS_BF_VS 0x10 /* Lines before vsync. interrupt */
  46. struct diu_hw {
  47. struct diu __iomem *diu_reg;
  48. spinlock_t reg_lock;
  49. };
  50. struct diu_addr {
  51. void *vaddr; /* Virtual address */
  52. dma_addr_t paddr; /* Physical address */
  53. __u32 offset;
  54. };
  55. struct diu_pool {
  56. struct diu_addr ad;
  57. struct diu_addr gamma;
  58. struct diu_addr pallete;
  59. struct diu_addr cursor;
  60. };
  61. /*
  62. * List of supported video modes
  63. *
  64. * The first entry is the default video mode. The remain entries are in
  65. * order if increasing resolution and frequency. The 320x240-60 mode is
  66. * the initial AOI for the second and third planes.
  67. */
  68. static struct fb_videomode __devinitdata fsl_diu_mode_db[] = {
  69. {
  70. .refresh = 60,
  71. .xres = 1024,
  72. .yres = 768,
  73. .pixclock = 15385,
  74. .left_margin = 160,
  75. .right_margin = 24,
  76. .upper_margin = 29,
  77. .lower_margin = 3,
  78. .hsync_len = 136,
  79. .vsync_len = 6,
  80. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  81. .vmode = FB_VMODE_NONINTERLACED
  82. },
  83. {
  84. .refresh = 60,
  85. .xres = 320,
  86. .yres = 240,
  87. .pixclock = 79440,
  88. .left_margin = 16,
  89. .right_margin = 16,
  90. .upper_margin = 16,
  91. .lower_margin = 5,
  92. .hsync_len = 48,
  93. .vsync_len = 1,
  94. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  95. .vmode = FB_VMODE_NONINTERLACED
  96. },
  97. {
  98. .refresh = 60,
  99. .xres = 640,
  100. .yres = 480,
  101. .pixclock = 39722,
  102. .left_margin = 48,
  103. .right_margin = 16,
  104. .upper_margin = 33,
  105. .lower_margin = 10,
  106. .hsync_len = 96,
  107. .vsync_len = 2,
  108. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  109. .vmode = FB_VMODE_NONINTERLACED
  110. },
  111. {
  112. .refresh = 72,
  113. .xres = 640,
  114. .yres = 480,
  115. .pixclock = 32052,
  116. .left_margin = 128,
  117. .right_margin = 24,
  118. .upper_margin = 28,
  119. .lower_margin = 9,
  120. .hsync_len = 40,
  121. .vsync_len = 3,
  122. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  123. .vmode = FB_VMODE_NONINTERLACED
  124. },
  125. {
  126. .refresh = 75,
  127. .xres = 640,
  128. .yres = 480,
  129. .pixclock = 31747,
  130. .left_margin = 120,
  131. .right_margin = 16,
  132. .upper_margin = 16,
  133. .lower_margin = 1,
  134. .hsync_len = 64,
  135. .vsync_len = 3,
  136. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  137. .vmode = FB_VMODE_NONINTERLACED
  138. },
  139. {
  140. .refresh = 90,
  141. .xres = 640,
  142. .yres = 480,
  143. .pixclock = 25057,
  144. .left_margin = 120,
  145. .right_margin = 32,
  146. .upper_margin = 14,
  147. .lower_margin = 25,
  148. .hsync_len = 40,
  149. .vsync_len = 14,
  150. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  151. .vmode = FB_VMODE_NONINTERLACED
  152. },
  153. {
  154. .refresh = 100,
  155. .xres = 640,
  156. .yres = 480,
  157. .pixclock = 22272,
  158. .left_margin = 48,
  159. .right_margin = 32,
  160. .upper_margin = 17,
  161. .lower_margin = 22,
  162. .hsync_len = 128,
  163. .vsync_len = 12,
  164. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  165. .vmode = FB_VMODE_NONINTERLACED
  166. },
  167. {
  168. .refresh = 60,
  169. .xres = 800,
  170. .yres = 480,
  171. .pixclock = 33805,
  172. .left_margin = 96,
  173. .right_margin = 24,
  174. .upper_margin = 10,
  175. .lower_margin = 3,
  176. .hsync_len = 72,
  177. .vsync_len = 7,
  178. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  179. .vmode = FB_VMODE_NONINTERLACED
  180. },
  181. {
  182. .refresh = 60,
  183. .xres = 800,
  184. .yres = 600,
  185. .pixclock = 25000,
  186. .left_margin = 88,
  187. .right_margin = 40,
  188. .upper_margin = 23,
  189. .lower_margin = 1,
  190. .hsync_len = 128,
  191. .vsync_len = 4,
  192. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  193. .vmode = FB_VMODE_NONINTERLACED
  194. },
  195. {
  196. .refresh = 60,
  197. .xres = 854,
  198. .yres = 480,
  199. .pixclock = 31518,
  200. .left_margin = 104,
  201. .right_margin = 16,
  202. .upper_margin = 13,
  203. .lower_margin = 1,
  204. .hsync_len = 88,
  205. .vsync_len = 3,
  206. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  207. .vmode = FB_VMODE_NONINTERLACED
  208. },
  209. {
  210. .refresh = 70,
  211. .xres = 1024,
  212. .yres = 768,
  213. .pixclock = 16886,
  214. .left_margin = 3,
  215. .right_margin = 3,
  216. .upper_margin = 2,
  217. .lower_margin = 2,
  218. .hsync_len = 40,
  219. .vsync_len = 18,
  220. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  221. .vmode = FB_VMODE_NONINTERLACED
  222. },
  223. {
  224. .refresh = 75,
  225. .xres = 1024,
  226. .yres = 768,
  227. .pixclock = 15009,
  228. .left_margin = 3,
  229. .right_margin = 3,
  230. .upper_margin = 2,
  231. .lower_margin = 2,
  232. .hsync_len = 80,
  233. .vsync_len = 32,
  234. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  235. .vmode = FB_VMODE_NONINTERLACED
  236. },
  237. {
  238. .refresh = 60,
  239. .xres = 1280,
  240. .yres = 480,
  241. .pixclock = 18939,
  242. .left_margin = 353,
  243. .right_margin = 47,
  244. .upper_margin = 39,
  245. .lower_margin = 4,
  246. .hsync_len = 8,
  247. .vsync_len = 2,
  248. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  249. .vmode = FB_VMODE_NONINTERLACED
  250. },
  251. {
  252. .refresh = 60,
  253. .xres = 1280,
  254. .yres = 720,
  255. .pixclock = 13426,
  256. .left_margin = 192,
  257. .right_margin = 64,
  258. .upper_margin = 22,
  259. .lower_margin = 1,
  260. .hsync_len = 136,
  261. .vsync_len = 3,
  262. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  263. .vmode = FB_VMODE_NONINTERLACED
  264. },
  265. {
  266. .refresh = 60,
  267. .xres = 1280,
  268. .yres = 1024,
  269. .pixclock = 9375,
  270. .left_margin = 38,
  271. .right_margin = 128,
  272. .upper_margin = 2,
  273. .lower_margin = 7,
  274. .hsync_len = 216,
  275. .vsync_len = 37,
  276. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  277. .vmode = FB_VMODE_NONINTERLACED
  278. },
  279. {
  280. .refresh = 70,
  281. .xres = 1280,
  282. .yres = 1024,
  283. .pixclock = 9380,
  284. .left_margin = 6,
  285. .right_margin = 6,
  286. .upper_margin = 4,
  287. .lower_margin = 4,
  288. .hsync_len = 60,
  289. .vsync_len = 94,
  290. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  291. .vmode = FB_VMODE_NONINTERLACED
  292. },
  293. {
  294. .refresh = 75,
  295. .xres = 1280,
  296. .yres = 1024,
  297. .pixclock = 9380,
  298. .left_margin = 6,
  299. .right_margin = 6,
  300. .upper_margin = 4,
  301. .lower_margin = 4,
  302. .hsync_len = 60,
  303. .vsync_len = 15,
  304. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  305. .vmode = FB_VMODE_NONINTERLACED
  306. },
  307. {
  308. .refresh = 60,
  309. .xres = 1920,
  310. .yres = 1080,
  311. .pixclock = 5787,
  312. .left_margin = 328,
  313. .right_margin = 120,
  314. .upper_margin = 34,
  315. .lower_margin = 1,
  316. .hsync_len = 208,
  317. .vsync_len = 3,
  318. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  319. .vmode = FB_VMODE_NONINTERLACED
  320. },
  321. };
  322. static char *fb_mode;
  323. static unsigned long default_bpp = 32;
  324. static enum fsl_diu_monitor_port monitor_port;
  325. static char *monitor_string;
  326. #if defined(CONFIG_NOT_COHERENT_CACHE)
  327. static u8 *coherence_data;
  328. static size_t coherence_data_size;
  329. static unsigned int d_cache_line_size;
  330. #endif
  331. static DEFINE_SPINLOCK(diu_lock);
  332. struct fsl_diu_data {
  333. struct fb_info *fsl_diu_info[FSL_AOI_NUM - 1];
  334. /*FSL_AOI_NUM has one dummy AOI */
  335. struct device_attribute dev_attr;
  336. struct diu_ad *dummy_ad;
  337. void *dummy_aoi_virt;
  338. unsigned int irq;
  339. int fb_enabled;
  340. enum fsl_diu_monitor_port monitor_port;
  341. };
  342. enum mfb_index {
  343. PLANE0 = 0, /* Plane 0, only one AOI that fills the screen */
  344. PLANE1_AOI0, /* Plane 1, first AOI */
  345. PLANE1_AOI1, /* Plane 1, second AOI */
  346. PLANE2_AOI0, /* Plane 2, first AOI */
  347. PLANE2_AOI1, /* Plane 2, second AOI */
  348. };
  349. struct mfb_info {
  350. enum mfb_index index;
  351. char *id;
  352. int registered;
  353. unsigned long pseudo_palette[16];
  354. struct diu_ad *ad;
  355. int cursor_reset;
  356. unsigned char g_alpha;
  357. unsigned int count;
  358. int x_aoi_d; /* aoi display x offset to physical screen */
  359. int y_aoi_d; /* aoi display y offset to physical screen */
  360. struct fsl_diu_data *parent;
  361. u8 *edid_data;
  362. };
  363. static struct mfb_info mfb_template[] = {
  364. {
  365. .index = PLANE0,
  366. .id = "Panel0",
  367. .registered = 0,
  368. .count = 0,
  369. .x_aoi_d = 0,
  370. .y_aoi_d = 0,
  371. },
  372. {
  373. .index = PLANE1_AOI0,
  374. .id = "Panel1 AOI0",
  375. .registered = 0,
  376. .g_alpha = 0xff,
  377. .count = 0,
  378. .x_aoi_d = 0,
  379. .y_aoi_d = 0,
  380. },
  381. {
  382. .index = PLANE1_AOI1,
  383. .id = "Panel1 AOI1",
  384. .registered = 0,
  385. .g_alpha = 0xff,
  386. .count = 0,
  387. .x_aoi_d = 0,
  388. .y_aoi_d = 480,
  389. },
  390. {
  391. .index = PLANE2_AOI0,
  392. .id = "Panel2 AOI0",
  393. .registered = 0,
  394. .g_alpha = 0xff,
  395. .count = 0,
  396. .x_aoi_d = 640,
  397. .y_aoi_d = 0,
  398. },
  399. {
  400. .index = PLANE2_AOI1,
  401. .id = "Panel2 AOI1",
  402. .registered = 0,
  403. .g_alpha = 0xff,
  404. .count = 0,
  405. .x_aoi_d = 640,
  406. .y_aoi_d = 480,
  407. },
  408. };
  409. static struct diu_hw dr = {
  410. .reg_lock = __SPIN_LOCK_UNLOCKED(diu_hw.reg_lock),
  411. };
  412. static struct diu_pool pool;
  413. /**
  414. * fsl_diu_name_to_port - convert a port name to a monitor port enum
  415. *
  416. * Takes the name of a monitor port ("dvi", "lvds", or "dlvds") and returns
  417. * the enum fsl_diu_monitor_port that corresponds to that string.
  418. *
  419. * For compatibility with older versions, a number ("0", "1", or "2") is also
  420. * supported.
  421. *
  422. * If the string is unknown, DVI is assumed.
  423. *
  424. * If the particular port is not supported by the platform, another port
  425. * (platform-specific) is chosen instead.
  426. */
  427. static enum fsl_diu_monitor_port fsl_diu_name_to_port(const char *s)
  428. {
  429. enum fsl_diu_monitor_port port = FSL_DIU_PORT_DVI;
  430. unsigned long val;
  431. if (s) {
  432. if (!strict_strtoul(s, 10, &val) && (val <= 2))
  433. port = (enum fsl_diu_monitor_port) val;
  434. else if (strncmp(s, "lvds", 4) == 0)
  435. port = FSL_DIU_PORT_LVDS;
  436. else if (strncmp(s, "dlvds", 5) == 0)
  437. port = FSL_DIU_PORT_DLVDS;
  438. }
  439. return diu_ops.valid_monitor_port(port);
  440. }
  441. /**
  442. * fsl_diu_alloc - allocate memory for the DIU
  443. * @size: number of bytes to allocate
  444. * @param: returned physical address of memory
  445. *
  446. * This function allocates a physically-contiguous block of memory.
  447. */
  448. static void *fsl_diu_alloc(size_t size, phys_addr_t *phys)
  449. {
  450. void *virt;
  451. virt = alloc_pages_exact(size, GFP_DMA | __GFP_ZERO);
  452. if (virt)
  453. *phys = virt_to_phys(virt);
  454. return virt;
  455. }
  456. /**
  457. * fsl_diu_free - release DIU memory
  458. * @virt: pointer returned by fsl_diu_alloc()
  459. * @size: number of bytes allocated by fsl_diu_alloc()
  460. *
  461. * This function releases memory allocated by fsl_diu_alloc().
  462. */
  463. static void fsl_diu_free(void *virt, size_t size)
  464. {
  465. if (virt && size)
  466. free_pages_exact(virt, size);
  467. }
  468. /*
  469. * Workaround for failed writing desc register of planes.
  470. * Needed with MPC5121 DIU rev 2.0 silicon.
  471. */
  472. void wr_reg_wa(u32 *reg, u32 val)
  473. {
  474. do {
  475. out_be32(reg, val);
  476. } while (in_be32(reg) != val);
  477. }
  478. static void fsl_diu_enable_panel(struct fb_info *info)
  479. {
  480. struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par;
  481. struct diu *hw = dr.diu_reg;
  482. struct diu_ad *ad = mfbi->ad;
  483. struct fsl_diu_data *machine_data = mfbi->parent;
  484. switch (mfbi->index) {
  485. case PLANE0:
  486. if (hw->desc[0] != ad->paddr)
  487. wr_reg_wa(&hw->desc[0], ad->paddr);
  488. break;
  489. case PLANE1_AOI0:
  490. cmfbi = machine_data->fsl_diu_info[2]->par;
  491. if (hw->desc[1] != ad->paddr) { /* AOI0 closed */
  492. if (cmfbi->count > 0) /* AOI1 open */
  493. ad->next_ad =
  494. cpu_to_le32(cmfbi->ad->paddr);
  495. else
  496. ad->next_ad = 0;
  497. wr_reg_wa(&hw->desc[1], ad->paddr);
  498. }
  499. break;
  500. case PLANE2_AOI0:
  501. cmfbi = machine_data->fsl_diu_info[4]->par;
  502. if (hw->desc[2] != ad->paddr) { /* AOI0 closed */
  503. if (cmfbi->count > 0) /* AOI1 open */
  504. ad->next_ad =
  505. cpu_to_le32(cmfbi->ad->paddr);
  506. else
  507. ad->next_ad = 0;
  508. wr_reg_wa(&hw->desc[2], ad->paddr);
  509. }
  510. break;
  511. case PLANE1_AOI1:
  512. pmfbi = machine_data->fsl_diu_info[1]->par;
  513. ad->next_ad = 0;
  514. if (hw->desc[1] == machine_data->dummy_ad->paddr)
  515. wr_reg_wa(&hw->desc[1], ad->paddr);
  516. else /* AOI0 open */
  517. pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
  518. break;
  519. case PLANE2_AOI1:
  520. pmfbi = machine_data->fsl_diu_info[3]->par;
  521. ad->next_ad = 0;
  522. if (hw->desc[2] == machine_data->dummy_ad->paddr)
  523. wr_reg_wa(&hw->desc[2], ad->paddr);
  524. else /* AOI0 was open */
  525. pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
  526. break;
  527. }
  528. }
  529. static void fsl_diu_disable_panel(struct fb_info *info)
  530. {
  531. struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par;
  532. struct diu *hw = dr.diu_reg;
  533. struct diu_ad *ad = mfbi->ad;
  534. struct fsl_diu_data *machine_data = mfbi->parent;
  535. switch (mfbi->index) {
  536. case PLANE0:
  537. if (hw->desc[0] != machine_data->dummy_ad->paddr)
  538. wr_reg_wa(&hw->desc[0], machine_data->dummy_ad->paddr);
  539. break;
  540. case PLANE1_AOI0:
  541. cmfbi = machine_data->fsl_diu_info[2]->par;
  542. if (cmfbi->count > 0) /* AOI1 is open */
  543. wr_reg_wa(&hw->desc[1], cmfbi->ad->paddr);
  544. /* move AOI1 to the first */
  545. else /* AOI1 was closed */
  546. wr_reg_wa(&hw->desc[1], machine_data->dummy_ad->paddr);
  547. /* close AOI 0 */
  548. break;
  549. case PLANE2_AOI0:
  550. cmfbi = machine_data->fsl_diu_info[4]->par;
  551. if (cmfbi->count > 0) /* AOI1 is open */
  552. wr_reg_wa(&hw->desc[2], cmfbi->ad->paddr);
  553. /* move AOI1 to the first */
  554. else /* AOI1 was closed */
  555. wr_reg_wa(&hw->desc[2], machine_data->dummy_ad->paddr);
  556. /* close AOI 0 */
  557. break;
  558. case PLANE1_AOI1:
  559. pmfbi = machine_data->fsl_diu_info[1]->par;
  560. if (hw->desc[1] != ad->paddr) {
  561. /* AOI1 is not the first in the chain */
  562. if (pmfbi->count > 0)
  563. /* AOI0 is open, must be the first */
  564. pmfbi->ad->next_ad = 0;
  565. } else /* AOI1 is the first in the chain */
  566. wr_reg_wa(&hw->desc[1], machine_data->dummy_ad->paddr);
  567. /* close AOI 1 */
  568. break;
  569. case PLANE2_AOI1:
  570. pmfbi = machine_data->fsl_diu_info[3]->par;
  571. if (hw->desc[2] != ad->paddr) {
  572. /* AOI1 is not the first in the chain */
  573. if (pmfbi->count > 0)
  574. /* AOI0 is open, must be the first */
  575. pmfbi->ad->next_ad = 0;
  576. } else /* AOI1 is the first in the chain */
  577. wr_reg_wa(&hw->desc[2], machine_data->dummy_ad->paddr);
  578. /* close AOI 1 */
  579. break;
  580. }
  581. }
  582. static void enable_lcdc(struct fb_info *info)
  583. {
  584. struct diu *hw = dr.diu_reg;
  585. struct mfb_info *mfbi = info->par;
  586. struct fsl_diu_data *machine_data = mfbi->parent;
  587. if (!machine_data->fb_enabled) {
  588. out_be32(&hw->diu_mode, MFB_MODE1);
  589. machine_data->fb_enabled++;
  590. }
  591. }
  592. static void disable_lcdc(struct fb_info *info)
  593. {
  594. struct diu *hw = dr.diu_reg;
  595. struct mfb_info *mfbi = info->par;
  596. struct fsl_diu_data *machine_data = mfbi->parent;
  597. if (machine_data->fb_enabled) {
  598. out_be32(&hw->diu_mode, 0);
  599. machine_data->fb_enabled = 0;
  600. }
  601. }
  602. static void adjust_aoi_size_position(struct fb_var_screeninfo *var,
  603. struct fb_info *info)
  604. {
  605. struct mfb_info *lower_aoi_mfbi, *upper_aoi_mfbi, *mfbi = info->par;
  606. struct fsl_diu_data *machine_data = mfbi->parent;
  607. int available_height, upper_aoi_bottom;
  608. enum mfb_index index = mfbi->index;
  609. int lower_aoi_is_open, upper_aoi_is_open;
  610. __u32 base_plane_width, base_plane_height, upper_aoi_height;
  611. base_plane_width = machine_data->fsl_diu_info[0]->var.xres;
  612. base_plane_height = machine_data->fsl_diu_info[0]->var.yres;
  613. if (mfbi->x_aoi_d < 0)
  614. mfbi->x_aoi_d = 0;
  615. if (mfbi->y_aoi_d < 0)
  616. mfbi->y_aoi_d = 0;
  617. switch (index) {
  618. case PLANE0:
  619. if (mfbi->x_aoi_d != 0)
  620. mfbi->x_aoi_d = 0;
  621. if (mfbi->y_aoi_d != 0)
  622. mfbi->y_aoi_d = 0;
  623. break;
  624. case PLANE1_AOI0:
  625. case PLANE2_AOI0:
  626. lower_aoi_mfbi = machine_data->fsl_diu_info[index+1]->par;
  627. lower_aoi_is_open = lower_aoi_mfbi->count > 0 ? 1 : 0;
  628. if (var->xres > base_plane_width)
  629. var->xres = base_plane_width;
  630. if ((mfbi->x_aoi_d + var->xres) > base_plane_width)
  631. mfbi->x_aoi_d = base_plane_width - var->xres;
  632. if (lower_aoi_is_open)
  633. available_height = lower_aoi_mfbi->y_aoi_d;
  634. else
  635. available_height = base_plane_height;
  636. if (var->yres > available_height)
  637. var->yres = available_height;
  638. if ((mfbi->y_aoi_d + var->yres) > available_height)
  639. mfbi->y_aoi_d = available_height - var->yres;
  640. break;
  641. case PLANE1_AOI1:
  642. case PLANE2_AOI1:
  643. upper_aoi_mfbi = machine_data->fsl_diu_info[index-1]->par;
  644. upper_aoi_height =
  645. machine_data->fsl_diu_info[index-1]->var.yres;
  646. upper_aoi_bottom = upper_aoi_mfbi->y_aoi_d + upper_aoi_height;
  647. upper_aoi_is_open = upper_aoi_mfbi->count > 0 ? 1 : 0;
  648. if (var->xres > base_plane_width)
  649. var->xres = base_plane_width;
  650. if ((mfbi->x_aoi_d + var->xres) > base_plane_width)
  651. mfbi->x_aoi_d = base_plane_width - var->xres;
  652. if (mfbi->y_aoi_d < 0)
  653. mfbi->y_aoi_d = 0;
  654. if (upper_aoi_is_open) {
  655. if (mfbi->y_aoi_d < upper_aoi_bottom)
  656. mfbi->y_aoi_d = upper_aoi_bottom;
  657. available_height = base_plane_height
  658. - upper_aoi_bottom;
  659. } else
  660. available_height = base_plane_height;
  661. if (var->yres > available_height)
  662. var->yres = available_height;
  663. if ((mfbi->y_aoi_d + var->yres) > base_plane_height)
  664. mfbi->y_aoi_d = base_plane_height - var->yres;
  665. break;
  666. }
  667. }
  668. /*
  669. * Checks to see if the hardware supports the state requested by var passed
  670. * in. This function does not alter the hardware state! If the var passed in
  671. * is slightly off by what the hardware can support then we alter the var
  672. * PASSED in to what we can do. If the hardware doesn't support mode change
  673. * a -EINVAL will be returned by the upper layers.
  674. */
  675. static int fsl_diu_check_var(struct fb_var_screeninfo *var,
  676. struct fb_info *info)
  677. {
  678. if (var->xres_virtual < var->xres)
  679. var->xres_virtual = var->xres;
  680. if (var->yres_virtual < var->yres)
  681. var->yres_virtual = var->yres;
  682. if (var->xoffset < 0)
  683. var->xoffset = 0;
  684. if (var->yoffset < 0)
  685. var->yoffset = 0;
  686. if (var->xoffset + info->var.xres > info->var.xres_virtual)
  687. var->xoffset = info->var.xres_virtual - info->var.xres;
  688. if (var->yoffset + info->var.yres > info->var.yres_virtual)
  689. var->yoffset = info->var.yres_virtual - info->var.yres;
  690. if ((var->bits_per_pixel != 32) && (var->bits_per_pixel != 24) &&
  691. (var->bits_per_pixel != 16))
  692. var->bits_per_pixel = default_bpp;
  693. switch (var->bits_per_pixel) {
  694. case 16:
  695. var->red.length = 5;
  696. var->red.offset = 11;
  697. var->red.msb_right = 0;
  698. var->green.length = 6;
  699. var->green.offset = 5;
  700. var->green.msb_right = 0;
  701. var->blue.length = 5;
  702. var->blue.offset = 0;
  703. var->blue.msb_right = 0;
  704. var->transp.length = 0;
  705. var->transp.offset = 0;
  706. var->transp.msb_right = 0;
  707. break;
  708. case 24:
  709. var->red.length = 8;
  710. var->red.offset = 0;
  711. var->red.msb_right = 0;
  712. var->green.length = 8;
  713. var->green.offset = 8;
  714. var->green.msb_right = 0;
  715. var->blue.length = 8;
  716. var->blue.offset = 16;
  717. var->blue.msb_right = 0;
  718. var->transp.length = 0;
  719. var->transp.offset = 0;
  720. var->transp.msb_right = 0;
  721. break;
  722. case 32:
  723. var->red.length = 8;
  724. var->red.offset = 16;
  725. var->red.msb_right = 0;
  726. var->green.length = 8;
  727. var->green.offset = 8;
  728. var->green.msb_right = 0;
  729. var->blue.length = 8;
  730. var->blue.offset = 0;
  731. var->blue.msb_right = 0;
  732. var->transp.length = 8;
  733. var->transp.offset = 24;
  734. var->transp.msb_right = 0;
  735. break;
  736. }
  737. var->height = -1;
  738. var->width = -1;
  739. var->grayscale = 0;
  740. /* Copy nonstd field to/from sync for fbset usage */
  741. var->sync |= var->nonstd;
  742. var->nonstd |= var->sync;
  743. adjust_aoi_size_position(var, info);
  744. return 0;
  745. }
  746. static void set_fix(struct fb_info *info)
  747. {
  748. struct fb_fix_screeninfo *fix = &info->fix;
  749. struct fb_var_screeninfo *var = &info->var;
  750. struct mfb_info *mfbi = info->par;
  751. strncpy(fix->id, mfbi->id, sizeof(fix->id));
  752. fix->line_length = var->xres_virtual * var->bits_per_pixel / 8;
  753. fix->type = FB_TYPE_PACKED_PIXELS;
  754. fix->accel = FB_ACCEL_NONE;
  755. fix->visual = FB_VISUAL_TRUECOLOR;
  756. fix->xpanstep = 1;
  757. fix->ypanstep = 1;
  758. }
  759. static void update_lcdc(struct fb_info *info)
  760. {
  761. struct fb_var_screeninfo *var = &info->var;
  762. struct mfb_info *mfbi = info->par;
  763. struct fsl_diu_data *machine_data = mfbi->parent;
  764. struct diu *hw;
  765. int i, j;
  766. char __iomem *cursor_base, *gamma_table_base;
  767. u32 temp;
  768. hw = dr.diu_reg;
  769. diu_ops.set_monitor_port(machine_data->monitor_port);
  770. gamma_table_base = pool.gamma.vaddr;
  771. cursor_base = pool.cursor.vaddr;
  772. /* Prep for DIU init - gamma table, cursor table */
  773. for (i = 0; i <= 2; i++)
  774. for (j = 0; j <= 255; j++)
  775. *gamma_table_base++ = j;
  776. diu_ops.set_gamma_table(machine_data->monitor_port, pool.gamma.vaddr);
  777. disable_lcdc(info);
  778. /* Program DIU registers */
  779. out_be32(&hw->gamma, pool.gamma.paddr);
  780. out_be32(&hw->cursor, pool.cursor.paddr);
  781. out_be32(&hw->bgnd, 0x007F7F7F); /* BGND */
  782. out_be32(&hw->bgnd_wb, 0); /* BGND_WB */
  783. out_be32(&hw->disp_size, (var->yres << 16 | var->xres));
  784. /* DISP SIZE */
  785. out_be32(&hw->wb_size, 0); /* WB SIZE */
  786. out_be32(&hw->wb_mem_addr, 0); /* WB MEM ADDR */
  787. /* Horizontal and vertical configuration register */
  788. temp = var->left_margin << 22 | /* BP_H */
  789. var->hsync_len << 11 | /* PW_H */
  790. var->right_margin; /* FP_H */
  791. out_be32(&hw->hsyn_para, temp);
  792. temp = var->upper_margin << 22 | /* BP_V */
  793. var->vsync_len << 11 | /* PW_V */
  794. var->lower_margin; /* FP_V */
  795. out_be32(&hw->vsyn_para, temp);
  796. diu_ops.set_pixel_clock(var->pixclock);
  797. out_be32(&hw->syn_pol, 0); /* SYNC SIGNALS POLARITY */
  798. out_be32(&hw->thresholds, 0x00037800); /* The Thresholds */
  799. out_be32(&hw->int_status, 0); /* INTERRUPT STATUS */
  800. out_be32(&hw->plut, 0x01F5F666);
  801. /* Enable the DIU */
  802. enable_lcdc(info);
  803. }
  804. static int map_video_memory(struct fb_info *info)
  805. {
  806. phys_addr_t phys;
  807. u32 smem_len = info->fix.line_length * info->var.yres_virtual;
  808. info->screen_base = fsl_diu_alloc(smem_len, &phys);
  809. if (info->screen_base == NULL) {
  810. dev_err(info->dev, "unable to allocate fb memory\n");
  811. return -ENOMEM;
  812. }
  813. mutex_lock(&info->mm_lock);
  814. info->fix.smem_start = (unsigned long) phys;
  815. info->fix.smem_len = smem_len;
  816. mutex_unlock(&info->mm_lock);
  817. info->screen_size = info->fix.smem_len;
  818. return 0;
  819. }
  820. static void unmap_video_memory(struct fb_info *info)
  821. {
  822. fsl_diu_free(info->screen_base, info->fix.smem_len);
  823. mutex_lock(&info->mm_lock);
  824. info->screen_base = NULL;
  825. info->fix.smem_start = 0;
  826. info->fix.smem_len = 0;
  827. mutex_unlock(&info->mm_lock);
  828. }
  829. /*
  830. * Using the fb_var_screeninfo in fb_info we set the aoi of this
  831. * particular framebuffer. It is a light version of fsl_diu_set_par.
  832. */
  833. static int fsl_diu_set_aoi(struct fb_info *info)
  834. {
  835. struct fb_var_screeninfo *var = &info->var;
  836. struct mfb_info *mfbi = info->par;
  837. struct diu_ad *ad = mfbi->ad;
  838. /* AOI should not be greater than display size */
  839. ad->offset_xyi = cpu_to_le32((var->yoffset << 16) | var->xoffset);
  840. ad->offset_xyd = cpu_to_le32((mfbi->y_aoi_d << 16) | mfbi->x_aoi_d);
  841. return 0;
  842. }
  843. /*
  844. * Using the fb_var_screeninfo in fb_info we set the resolution of this
  845. * particular framebuffer. This function alters the fb_fix_screeninfo stored
  846. * in fb_info. It does not alter var in fb_info since we are using that
  847. * data. This means we depend on the data in var inside fb_info to be
  848. * supported by the hardware. fsl_diu_check_var is always called before
  849. * fsl_diu_set_par to ensure this.
  850. */
  851. static int fsl_diu_set_par(struct fb_info *info)
  852. {
  853. unsigned long len;
  854. struct fb_var_screeninfo *var = &info->var;
  855. struct mfb_info *mfbi = info->par;
  856. struct fsl_diu_data *machine_data = mfbi->parent;
  857. struct diu_ad *ad = mfbi->ad;
  858. struct diu *hw;
  859. hw = dr.diu_reg;
  860. set_fix(info);
  861. mfbi->cursor_reset = 1;
  862. len = info->var.yres_virtual * info->fix.line_length;
  863. /* Alloc & dealloc each time resolution/bpp change */
  864. if (len != info->fix.smem_len) {
  865. if (info->fix.smem_start)
  866. unmap_video_memory(info);
  867. /* Memory allocation for framebuffer */
  868. if (map_video_memory(info)) {
  869. dev_err(info->dev, "unable to allocate fb memory 1\n");
  870. return -ENOMEM;
  871. }
  872. }
  873. ad->pix_fmt = diu_ops.get_pixel_format(machine_data->monitor_port,
  874. var->bits_per_pixel);
  875. ad->addr = cpu_to_le32(info->fix.smem_start);
  876. ad->src_size_g_alpha = cpu_to_le32((var->yres_virtual << 12) |
  877. var->xres_virtual) | mfbi->g_alpha;
  878. /* AOI should not be greater than display size */
  879. ad->aoi_size = cpu_to_le32((var->yres << 16) | var->xres);
  880. ad->offset_xyi = cpu_to_le32((var->yoffset << 16) | var->xoffset);
  881. ad->offset_xyd = cpu_to_le32((mfbi->y_aoi_d << 16) | mfbi->x_aoi_d);
  882. /* Disable chroma keying function */
  883. ad->ckmax_r = 0;
  884. ad->ckmax_g = 0;
  885. ad->ckmax_b = 0;
  886. ad->ckmin_r = 255;
  887. ad->ckmin_g = 255;
  888. ad->ckmin_b = 255;
  889. if (mfbi->index == PLANE0)
  890. update_lcdc(info);
  891. return 0;
  892. }
  893. static inline __u32 CNVT_TOHW(__u32 val, __u32 width)
  894. {
  895. return ((val << width) + 0x7FFF - val) >> 16;
  896. }
  897. /*
  898. * Set a single color register. The values supplied have a 16 bit magnitude
  899. * which needs to be scaled in this function for the hardware. Things to take
  900. * into consideration are how many color registers, if any, are supported with
  901. * the current color visual. With truecolor mode no color palettes are
  902. * supported. Here a pseudo palette is created which we store the value in
  903. * pseudo_palette in struct fb_info. For pseudocolor mode we have a limited
  904. * color palette.
  905. */
  906. static int fsl_diu_setcolreg(unsigned int regno, unsigned int red,
  907. unsigned int green, unsigned int blue,
  908. unsigned int transp, struct fb_info *info)
  909. {
  910. int ret = 1;
  911. /*
  912. * If greyscale is true, then we convert the RGB value
  913. * to greyscale no matter what visual we are using.
  914. */
  915. if (info->var.grayscale)
  916. red = green = blue = (19595 * red + 38470 * green +
  917. 7471 * blue) >> 16;
  918. switch (info->fix.visual) {
  919. case FB_VISUAL_TRUECOLOR:
  920. /*
  921. * 16-bit True Colour. We encode the RGB value
  922. * according to the RGB bitfield information.
  923. */
  924. if (regno < 16) {
  925. u32 *pal = info->pseudo_palette;
  926. u32 v;
  927. red = CNVT_TOHW(red, info->var.red.length);
  928. green = CNVT_TOHW(green, info->var.green.length);
  929. blue = CNVT_TOHW(blue, info->var.blue.length);
  930. transp = CNVT_TOHW(transp, info->var.transp.length);
  931. v = (red << info->var.red.offset) |
  932. (green << info->var.green.offset) |
  933. (blue << info->var.blue.offset) |
  934. (transp << info->var.transp.offset);
  935. pal[regno] = v;
  936. ret = 0;
  937. }
  938. break;
  939. }
  940. return ret;
  941. }
  942. /*
  943. * Pan (or wrap, depending on the `vmode' field) the display using the
  944. * 'xoffset' and 'yoffset' fields of the 'var' structure. If the values
  945. * don't fit, return -EINVAL.
  946. */
  947. static int fsl_diu_pan_display(struct fb_var_screeninfo *var,
  948. struct fb_info *info)
  949. {
  950. if ((info->var.xoffset == var->xoffset) &&
  951. (info->var.yoffset == var->yoffset))
  952. return 0; /* No change, do nothing */
  953. if (var->xoffset < 0 || var->yoffset < 0
  954. || var->xoffset + info->var.xres > info->var.xres_virtual
  955. || var->yoffset + info->var.yres > info->var.yres_virtual)
  956. return -EINVAL;
  957. info->var.xoffset = var->xoffset;
  958. info->var.yoffset = var->yoffset;
  959. if (var->vmode & FB_VMODE_YWRAP)
  960. info->var.vmode |= FB_VMODE_YWRAP;
  961. else
  962. info->var.vmode &= ~FB_VMODE_YWRAP;
  963. fsl_diu_set_aoi(info);
  964. return 0;
  965. }
  966. static int fsl_diu_ioctl(struct fb_info *info, unsigned int cmd,
  967. unsigned long arg)
  968. {
  969. struct mfb_info *mfbi = info->par;
  970. struct diu_ad *ad = mfbi->ad;
  971. struct mfb_chroma_key ck;
  972. unsigned char global_alpha;
  973. struct aoi_display_offset aoi_d;
  974. __u32 pix_fmt;
  975. void __user *buf = (void __user *)arg;
  976. if (!arg)
  977. return -EINVAL;
  978. switch (cmd) {
  979. case MFB_SET_PIXFMT_OLD:
  980. dev_warn(info->dev,
  981. "MFB_SET_PIXFMT value of 0x%08x is deprecated.\n",
  982. MFB_SET_PIXFMT_OLD);
  983. case MFB_SET_PIXFMT:
  984. if (copy_from_user(&pix_fmt, buf, sizeof(pix_fmt)))
  985. return -EFAULT;
  986. ad->pix_fmt = pix_fmt;
  987. break;
  988. case MFB_GET_PIXFMT_OLD:
  989. dev_warn(info->dev,
  990. "MFB_GET_PIXFMT value of 0x%08x is deprecated.\n",
  991. MFB_GET_PIXFMT_OLD);
  992. case MFB_GET_PIXFMT:
  993. pix_fmt = ad->pix_fmt;
  994. if (copy_to_user(buf, &pix_fmt, sizeof(pix_fmt)))
  995. return -EFAULT;
  996. break;
  997. case MFB_SET_AOID:
  998. if (copy_from_user(&aoi_d, buf, sizeof(aoi_d)))
  999. return -EFAULT;
  1000. mfbi->x_aoi_d = aoi_d.x_aoi_d;
  1001. mfbi->y_aoi_d = aoi_d.y_aoi_d;
  1002. fsl_diu_check_var(&info->var, info);
  1003. fsl_diu_set_aoi(info);
  1004. break;
  1005. case MFB_GET_AOID:
  1006. aoi_d.x_aoi_d = mfbi->x_aoi_d;
  1007. aoi_d.y_aoi_d = mfbi->y_aoi_d;
  1008. if (copy_to_user(buf, &aoi_d, sizeof(aoi_d)))
  1009. return -EFAULT;
  1010. break;
  1011. case MFB_GET_ALPHA:
  1012. global_alpha = mfbi->g_alpha;
  1013. if (copy_to_user(buf, &global_alpha, sizeof(global_alpha)))
  1014. return -EFAULT;
  1015. break;
  1016. case MFB_SET_ALPHA:
  1017. /* set panel information */
  1018. if (copy_from_user(&global_alpha, buf, sizeof(global_alpha)))
  1019. return -EFAULT;
  1020. ad->src_size_g_alpha = (ad->src_size_g_alpha & (~0xff)) |
  1021. (global_alpha & 0xff);
  1022. mfbi->g_alpha = global_alpha;
  1023. break;
  1024. case MFB_SET_CHROMA_KEY:
  1025. /* set panel winformation */
  1026. if (copy_from_user(&ck, buf, sizeof(ck)))
  1027. return -EFAULT;
  1028. if (ck.enable &&
  1029. (ck.red_max < ck.red_min ||
  1030. ck.green_max < ck.green_min ||
  1031. ck.blue_max < ck.blue_min))
  1032. return -EINVAL;
  1033. if (!ck.enable) {
  1034. ad->ckmax_r = 0;
  1035. ad->ckmax_g = 0;
  1036. ad->ckmax_b = 0;
  1037. ad->ckmin_r = 255;
  1038. ad->ckmin_g = 255;
  1039. ad->ckmin_b = 255;
  1040. } else {
  1041. ad->ckmax_r = ck.red_max;
  1042. ad->ckmax_g = ck.green_max;
  1043. ad->ckmax_b = ck.blue_max;
  1044. ad->ckmin_r = ck.red_min;
  1045. ad->ckmin_g = ck.green_min;
  1046. ad->ckmin_b = ck.blue_min;
  1047. }
  1048. break;
  1049. default:
  1050. dev_err(info->dev, "unknown ioctl command (0x%08X)\n", cmd);
  1051. return -ENOIOCTLCMD;
  1052. }
  1053. return 0;
  1054. }
  1055. /* turn on fb if count == 1
  1056. */
  1057. static int fsl_diu_open(struct fb_info *info, int user)
  1058. {
  1059. struct mfb_info *mfbi = info->par;
  1060. int res = 0;
  1061. /* free boot splash memory on first /dev/fb0 open */
  1062. if ((mfbi->index == PLANE0) && diu_ops.release_bootmem)
  1063. diu_ops.release_bootmem();
  1064. spin_lock(&diu_lock);
  1065. mfbi->count++;
  1066. if (mfbi->count == 1) {
  1067. fsl_diu_check_var(&info->var, info);
  1068. res = fsl_diu_set_par(info);
  1069. if (res < 0)
  1070. mfbi->count--;
  1071. else
  1072. fsl_diu_enable_panel(info);
  1073. }
  1074. spin_unlock(&diu_lock);
  1075. return res;
  1076. }
  1077. /* turn off fb if count == 0
  1078. */
  1079. static int fsl_diu_release(struct fb_info *info, int user)
  1080. {
  1081. struct mfb_info *mfbi = info->par;
  1082. int res = 0;
  1083. spin_lock(&diu_lock);
  1084. mfbi->count--;
  1085. if (mfbi->count == 0)
  1086. fsl_diu_disable_panel(info);
  1087. spin_unlock(&diu_lock);
  1088. return res;
  1089. }
  1090. static struct fb_ops fsl_diu_ops = {
  1091. .owner = THIS_MODULE,
  1092. .fb_check_var = fsl_diu_check_var,
  1093. .fb_set_par = fsl_diu_set_par,
  1094. .fb_setcolreg = fsl_diu_setcolreg,
  1095. .fb_pan_display = fsl_diu_pan_display,
  1096. .fb_fillrect = cfb_fillrect,
  1097. .fb_copyarea = cfb_copyarea,
  1098. .fb_imageblit = cfb_imageblit,
  1099. .fb_ioctl = fsl_diu_ioctl,
  1100. .fb_open = fsl_diu_open,
  1101. .fb_release = fsl_diu_release,
  1102. };
  1103. static int init_fbinfo(struct fb_info *info)
  1104. {
  1105. struct mfb_info *mfbi = info->par;
  1106. info->device = NULL;
  1107. info->var.activate = FB_ACTIVATE_NOW;
  1108. info->fbops = &fsl_diu_ops;
  1109. info->flags = FBINFO_FLAG_DEFAULT;
  1110. info->pseudo_palette = &mfbi->pseudo_palette;
  1111. /* Allocate colormap */
  1112. fb_alloc_cmap(&info->cmap, 16, 0);
  1113. return 0;
  1114. }
  1115. static int __devinit install_fb(struct fb_info *info)
  1116. {
  1117. int rc;
  1118. struct mfb_info *mfbi = info->par;
  1119. const char *aoi_mode, *init_aoi_mode = "320x240";
  1120. struct fb_videomode *db = fsl_diu_mode_db;
  1121. unsigned int dbsize = ARRAY_SIZE(fsl_diu_mode_db);
  1122. int has_default_mode = 1;
  1123. if (init_fbinfo(info))
  1124. return -EINVAL;
  1125. if (mfbi->index == PLANE0) {
  1126. if (mfbi->edid_data) {
  1127. /* Now build modedb from EDID */
  1128. fb_edid_to_monspecs(mfbi->edid_data, &info->monspecs);
  1129. fb_videomode_to_modelist(info->monspecs.modedb,
  1130. info->monspecs.modedb_len,
  1131. &info->modelist);
  1132. db = info->monspecs.modedb;
  1133. dbsize = info->monspecs.modedb_len;
  1134. }
  1135. aoi_mode = fb_mode;
  1136. } else {
  1137. aoi_mode = init_aoi_mode;
  1138. }
  1139. rc = fb_find_mode(&info->var, info, aoi_mode, db, dbsize, NULL,
  1140. default_bpp);
  1141. if (!rc) {
  1142. /*
  1143. * For plane 0 we continue and look into
  1144. * driver's internal modedb.
  1145. */
  1146. if ((mfbi->index == PLANE0) && mfbi->edid_data)
  1147. has_default_mode = 0;
  1148. else
  1149. return -EINVAL;
  1150. }
  1151. if (!has_default_mode) {
  1152. rc = fb_find_mode(&info->var, info, aoi_mode, fsl_diu_mode_db,
  1153. ARRAY_SIZE(fsl_diu_mode_db), NULL, default_bpp);
  1154. if (rc)
  1155. has_default_mode = 1;
  1156. }
  1157. /* Still not found, use preferred mode from database if any */
  1158. if (!has_default_mode && info->monspecs.modedb) {
  1159. struct fb_monspecs *specs = &info->monspecs;
  1160. struct fb_videomode *modedb = &specs->modedb[0];
  1161. /*
  1162. * Get preferred timing. If not found,
  1163. * first mode in database will be used.
  1164. */
  1165. if (specs->misc & FB_MISC_1ST_DETAIL) {
  1166. int i;
  1167. for (i = 0; i < specs->modedb_len; i++) {
  1168. if (specs->modedb[i].flag & FB_MODE_IS_FIRST) {
  1169. modedb = &specs->modedb[i];
  1170. break;
  1171. }
  1172. }
  1173. }
  1174. info->var.bits_per_pixel = default_bpp;
  1175. fb_videomode_to_var(&info->var, modedb);
  1176. }
  1177. if (fsl_diu_check_var(&info->var, info)) {
  1178. dev_err(info->dev, "fsl_diu_check_var failed\n");
  1179. unmap_video_memory(info);
  1180. fb_dealloc_cmap(&info->cmap);
  1181. return -EINVAL;
  1182. }
  1183. if (register_framebuffer(info) < 0) {
  1184. dev_err(info->dev, "register_framebuffer failed\n");
  1185. unmap_video_memory(info);
  1186. fb_dealloc_cmap(&info->cmap);
  1187. return -EINVAL;
  1188. }
  1189. mfbi->registered = 1;
  1190. dev_info(info->dev, "%s registered successfully\n", mfbi->id);
  1191. return 0;
  1192. }
  1193. static void uninstall_fb(struct fb_info *info)
  1194. {
  1195. struct mfb_info *mfbi = info->par;
  1196. if (!mfbi->registered)
  1197. return;
  1198. if (mfbi->index == PLANE0)
  1199. kfree(mfbi->edid_data);
  1200. unregister_framebuffer(info);
  1201. unmap_video_memory(info);
  1202. if (&info->cmap)
  1203. fb_dealloc_cmap(&info->cmap);
  1204. mfbi->registered = 0;
  1205. }
  1206. static irqreturn_t fsl_diu_isr(int irq, void *dev_id)
  1207. {
  1208. struct diu *hw = dr.diu_reg;
  1209. unsigned int status = in_be32(&hw->int_status);
  1210. if (status) {
  1211. /* This is the workaround for underrun */
  1212. if (status & INT_UNDRUN) {
  1213. out_be32(&hw->diu_mode, 0);
  1214. udelay(1);
  1215. out_be32(&hw->diu_mode, 1);
  1216. }
  1217. #if defined(CONFIG_NOT_COHERENT_CACHE)
  1218. else if (status & INT_VSYNC) {
  1219. unsigned int i;
  1220. for (i = 0; i < coherence_data_size;
  1221. i += d_cache_line_size)
  1222. __asm__ __volatile__ (
  1223. "dcbz 0, %[input]"
  1224. ::[input]"r"(&coherence_data[i]));
  1225. }
  1226. #endif
  1227. return IRQ_HANDLED;
  1228. }
  1229. return IRQ_NONE;
  1230. }
  1231. static int request_irq_local(int irq)
  1232. {
  1233. u32 ints;
  1234. struct diu *hw;
  1235. int ret;
  1236. hw = dr.diu_reg;
  1237. /* Read to clear the status */
  1238. in_be32(&hw->int_status);
  1239. ret = request_irq(irq, fsl_diu_isr, 0, "fsl-diu-fb", NULL);
  1240. if (!ret) {
  1241. ints = INT_PARERR | INT_LS_BF_VS;
  1242. #if !defined(CONFIG_NOT_COHERENT_CACHE)
  1243. ints |= INT_VSYNC;
  1244. #endif
  1245. /* Read to clear the status */
  1246. in_be32(&hw->int_status);
  1247. out_be32(&hw->int_mask, ints);
  1248. }
  1249. return ret;
  1250. }
  1251. static void free_irq_local(int irq)
  1252. {
  1253. struct diu *hw = dr.diu_reg;
  1254. /* Disable all LCDC interrupt */
  1255. out_be32(&hw->int_mask, 0x1f);
  1256. free_irq(irq, NULL);
  1257. }
  1258. #ifdef CONFIG_PM
  1259. /*
  1260. * Power management hooks. Note that we won't be called from IRQ context,
  1261. * unlike the blank functions above, so we may sleep.
  1262. */
  1263. static int fsl_diu_suspend(struct platform_device *ofdev, pm_message_t state)
  1264. {
  1265. struct fsl_diu_data *machine_data;
  1266. machine_data = dev_get_drvdata(&ofdev->dev);
  1267. disable_lcdc(machine_data->fsl_diu_info[0]);
  1268. return 0;
  1269. }
  1270. static int fsl_diu_resume(struct platform_device *ofdev)
  1271. {
  1272. struct fsl_diu_data *machine_data;
  1273. machine_data = dev_get_drvdata(&ofdev->dev);
  1274. enable_lcdc(machine_data->fsl_diu_info[0]);
  1275. return 0;
  1276. }
  1277. #else
  1278. #define fsl_diu_suspend NULL
  1279. #define fsl_diu_resume NULL
  1280. #endif /* CONFIG_PM */
  1281. /* Align to 64-bit(8-byte), 32-byte, etc. */
  1282. static int allocate_buf(struct device *dev, struct diu_addr *buf, u32 size,
  1283. u32 bytes_align)
  1284. {
  1285. u32 offset;
  1286. dma_addr_t mask;
  1287. buf->vaddr =
  1288. dma_alloc_coherent(dev, size + bytes_align, &buf->paddr,
  1289. GFP_DMA | __GFP_ZERO);
  1290. if (!buf->vaddr)
  1291. return -ENOMEM;
  1292. mask = bytes_align - 1;
  1293. offset = buf->paddr & mask;
  1294. if (offset) {
  1295. buf->offset = bytes_align - offset;
  1296. buf->paddr = buf->paddr + offset;
  1297. } else
  1298. buf->offset = 0;
  1299. return 0;
  1300. }
  1301. static void free_buf(struct device *dev, struct diu_addr *buf, u32 size,
  1302. u32 bytes_align)
  1303. {
  1304. dma_free_coherent(dev, size + bytes_align, buf->vaddr,
  1305. buf->paddr - buf->offset);
  1306. }
  1307. static ssize_t store_monitor(struct device *device,
  1308. struct device_attribute *attr, const char *buf, size_t count)
  1309. {
  1310. enum fsl_diu_monitor_port old_monitor_port;
  1311. struct fsl_diu_data *machine_data =
  1312. container_of(attr, struct fsl_diu_data, dev_attr);
  1313. old_monitor_port = machine_data->monitor_port;
  1314. machine_data->monitor_port = fsl_diu_name_to_port(buf);
  1315. if (old_monitor_port != machine_data->monitor_port) {
  1316. /* All AOIs need adjust pixel format
  1317. * fsl_diu_set_par only change the pixsel format here
  1318. * unlikely to fail. */
  1319. fsl_diu_set_par(machine_data->fsl_diu_info[0]);
  1320. fsl_diu_set_par(machine_data->fsl_diu_info[1]);
  1321. fsl_diu_set_par(machine_data->fsl_diu_info[2]);
  1322. fsl_diu_set_par(machine_data->fsl_diu_info[3]);
  1323. fsl_diu_set_par(machine_data->fsl_diu_info[4]);
  1324. }
  1325. return count;
  1326. }
  1327. static ssize_t show_monitor(struct device *device,
  1328. struct device_attribute *attr, char *buf)
  1329. {
  1330. struct fsl_diu_data *machine_data =
  1331. container_of(attr, struct fsl_diu_data, dev_attr);
  1332. switch (machine_data->monitor_port) {
  1333. case FSL_DIU_PORT_DVI:
  1334. return sprintf(buf, "DVI\n");
  1335. case FSL_DIU_PORT_LVDS:
  1336. return sprintf(buf, "Single-link LVDS\n");
  1337. case FSL_DIU_PORT_DLVDS:
  1338. return sprintf(buf, "Dual-link LVDS\n");
  1339. }
  1340. return 0;
  1341. }
  1342. static int __devinit fsl_diu_probe(struct platform_device *pdev)
  1343. {
  1344. struct device_node *np = pdev->dev.of_node;
  1345. struct mfb_info *mfbi;
  1346. phys_addr_t dummy_ad_addr = 0;
  1347. int ret, i, error = 0;
  1348. struct fsl_diu_data *machine_data;
  1349. int diu_mode;
  1350. machine_data = kzalloc(sizeof(struct fsl_diu_data), GFP_KERNEL);
  1351. if (!machine_data)
  1352. return -ENOMEM;
  1353. for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++) {
  1354. machine_data->fsl_diu_info[i] =
  1355. framebuffer_alloc(sizeof(struct mfb_info), &pdev->dev);
  1356. if (!machine_data->fsl_diu_info[i]) {
  1357. dev_err(&pdev->dev, "cannot allocate memory\n");
  1358. ret = -ENOMEM;
  1359. goto error2;
  1360. }
  1361. mfbi = machine_data->fsl_diu_info[i]->par;
  1362. memcpy(mfbi, &mfb_template[i], sizeof(struct mfb_info));
  1363. mfbi->parent = machine_data;
  1364. if (mfbi->index == PLANE0) {
  1365. const u8 *prop;
  1366. int len;
  1367. /* Get EDID */
  1368. prop = of_get_property(np, "edid", &len);
  1369. if (prop && len == EDID_LENGTH)
  1370. mfbi->edid_data = kmemdup(prop, EDID_LENGTH,
  1371. GFP_KERNEL);
  1372. }
  1373. }
  1374. dr.diu_reg = of_iomap(np, 0);
  1375. if (!dr.diu_reg) {
  1376. dev_err(&pdev->dev, "cannot map DIU registers\n");
  1377. ret = -EFAULT;
  1378. goto error2;
  1379. }
  1380. diu_mode = in_be32(&dr.diu_reg->diu_mode);
  1381. if (diu_mode == MFB_MODE0)
  1382. out_be32(&dr.diu_reg->diu_mode, 0); /* disable DIU */
  1383. /* Get the IRQ of the DIU */
  1384. machine_data->irq = irq_of_parse_and_map(np, 0);
  1385. if (!machine_data->irq) {
  1386. dev_err(&pdev->dev, "could not get DIU IRQ\n");
  1387. ret = -EINVAL;
  1388. goto error;
  1389. }
  1390. machine_data->monitor_port = monitor_port;
  1391. /* Area descriptor memory pool aligns to 64-bit boundary */
  1392. if (allocate_buf(&pdev->dev, &pool.ad,
  1393. sizeof(struct diu_ad) * FSL_AOI_NUM, 8))
  1394. return -ENOMEM;
  1395. /* Get memory for Gamma Table - 32-byte aligned memory */
  1396. if (allocate_buf(&pdev->dev, &pool.gamma, 768, 32)) {
  1397. ret = -ENOMEM;
  1398. goto error;
  1399. }
  1400. /* For performance, cursor bitmap buffer aligns to 32-byte boundary */
  1401. if (allocate_buf(&pdev->dev, &pool.cursor, MAX_CURS * MAX_CURS * 2,
  1402. 32)) {
  1403. ret = -ENOMEM;
  1404. goto error;
  1405. }
  1406. i = ARRAY_SIZE(machine_data->fsl_diu_info);
  1407. machine_data->dummy_ad = (struct diu_ad *)
  1408. ((u32)pool.ad.vaddr + pool.ad.offset) + i;
  1409. machine_data->dummy_ad->paddr = pool.ad.paddr +
  1410. i * sizeof(struct diu_ad);
  1411. machine_data->dummy_aoi_virt = fsl_diu_alloc(64, &dummy_ad_addr);
  1412. if (!machine_data->dummy_aoi_virt) {
  1413. ret = -ENOMEM;
  1414. goto error;
  1415. }
  1416. machine_data->dummy_ad->addr = cpu_to_le32(dummy_ad_addr);
  1417. machine_data->dummy_ad->pix_fmt = 0x88882317;
  1418. machine_data->dummy_ad->src_size_g_alpha = cpu_to_le32((4 << 12) | 4);
  1419. machine_data->dummy_ad->aoi_size = cpu_to_le32((4 << 16) | 2);
  1420. machine_data->dummy_ad->offset_xyi = 0;
  1421. machine_data->dummy_ad->offset_xyd = 0;
  1422. machine_data->dummy_ad->next_ad = 0;
  1423. /*
  1424. * Let DIU display splash screen if it was pre-initialized
  1425. * by the bootloader, set dummy area descriptor otherwise.
  1426. */
  1427. if (diu_mode == MFB_MODE0)
  1428. out_be32(&dr.diu_reg->desc[0], machine_data->dummy_ad->paddr);
  1429. out_be32(&dr.diu_reg->desc[1], machine_data->dummy_ad->paddr);
  1430. out_be32(&dr.diu_reg->desc[2], machine_data->dummy_ad->paddr);
  1431. for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++) {
  1432. machine_data->fsl_diu_info[i]->fix.smem_start = 0;
  1433. mfbi = machine_data->fsl_diu_info[i]->par;
  1434. mfbi->ad = (struct diu_ad *)((u32)pool.ad.vaddr
  1435. + pool.ad.offset) + i;
  1436. mfbi->ad->paddr = pool.ad.paddr + i * sizeof(struct diu_ad);
  1437. ret = install_fb(machine_data->fsl_diu_info[i]);
  1438. if (ret) {
  1439. dev_err(&pdev->dev, "could not register fb %d\n", i);
  1440. goto error;
  1441. }
  1442. }
  1443. if (request_irq_local(machine_data->irq)) {
  1444. dev_err(&pdev->dev, "could not claim irq\n");
  1445. goto error;
  1446. }
  1447. sysfs_attr_init(&machine_data->dev_attr.attr);
  1448. machine_data->dev_attr.attr.name = "monitor";
  1449. machine_data->dev_attr.attr.mode = S_IRUGO|S_IWUSR;
  1450. machine_data->dev_attr.show = show_monitor;
  1451. machine_data->dev_attr.store = store_monitor;
  1452. error = device_create_file(machine_data->fsl_diu_info[0]->dev,
  1453. &machine_data->dev_attr);
  1454. if (error) {
  1455. dev_err(&pdev->dev, "could not create sysfs file %s\n",
  1456. machine_data->dev_attr.attr.name);
  1457. }
  1458. dev_set_drvdata(&pdev->dev, machine_data);
  1459. return 0;
  1460. error:
  1461. for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++)
  1462. uninstall_fb(machine_data->fsl_diu_info[i]);
  1463. if (pool.ad.vaddr)
  1464. free_buf(&pdev->dev, &pool.ad,
  1465. sizeof(struct diu_ad) * FSL_AOI_NUM, 8);
  1466. if (pool.gamma.vaddr)
  1467. free_buf(&pdev->dev, &pool.gamma, 768, 32);
  1468. if (pool.cursor.vaddr)
  1469. free_buf(&pdev->dev, &pool.cursor, MAX_CURS * MAX_CURS * 2,
  1470. 32);
  1471. if (machine_data->dummy_aoi_virt)
  1472. fsl_diu_free(machine_data->dummy_aoi_virt, 64);
  1473. iounmap(dr.diu_reg);
  1474. error2:
  1475. for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++)
  1476. if (machine_data->fsl_diu_info[i])
  1477. framebuffer_release(machine_data->fsl_diu_info[i]);
  1478. kfree(machine_data);
  1479. return ret;
  1480. }
  1481. static int fsl_diu_remove(struct platform_device *pdev)
  1482. {
  1483. struct fsl_diu_data *machine_data;
  1484. int i;
  1485. machine_data = dev_get_drvdata(&pdev->dev);
  1486. disable_lcdc(machine_data->fsl_diu_info[0]);
  1487. free_irq_local(machine_data->irq);
  1488. for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++)
  1489. uninstall_fb(machine_data->fsl_diu_info[i]);
  1490. if (pool.ad.vaddr)
  1491. free_buf(&pdev->dev, &pool.ad,
  1492. sizeof(struct diu_ad) * FSL_AOI_NUM, 8);
  1493. if (pool.gamma.vaddr)
  1494. free_buf(&pdev->dev, &pool.gamma, 768, 32);
  1495. if (pool.cursor.vaddr)
  1496. free_buf(&pdev->dev, &pool.cursor, MAX_CURS * MAX_CURS * 2, 32);
  1497. if (machine_data->dummy_aoi_virt)
  1498. fsl_diu_free(machine_data->dummy_aoi_virt, 64);
  1499. iounmap(dr.diu_reg);
  1500. for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++)
  1501. if (machine_data->fsl_diu_info[i])
  1502. framebuffer_release(machine_data->fsl_diu_info[i]);
  1503. kfree(machine_data);
  1504. return 0;
  1505. }
  1506. #ifndef MODULE
  1507. static int __init fsl_diu_setup(char *options)
  1508. {
  1509. char *opt;
  1510. unsigned long val;
  1511. if (!options || !*options)
  1512. return 0;
  1513. while ((opt = strsep(&options, ",")) != NULL) {
  1514. if (!*opt)
  1515. continue;
  1516. if (!strncmp(opt, "monitor=", 8)) {
  1517. monitor_port = fsl_diu_name_to_port(opt + 8);
  1518. } else if (!strncmp(opt, "bpp=", 4)) {
  1519. if (!strict_strtoul(opt + 4, 10, &val))
  1520. default_bpp = val;
  1521. } else
  1522. fb_mode = opt;
  1523. }
  1524. return 0;
  1525. }
  1526. #endif
  1527. static struct of_device_id fsl_diu_match[] = {
  1528. #ifdef CONFIG_PPC_MPC512x
  1529. {
  1530. .compatible = "fsl,mpc5121-diu",
  1531. },
  1532. #endif
  1533. {
  1534. .compatible = "fsl,diu",
  1535. },
  1536. {}
  1537. };
  1538. MODULE_DEVICE_TABLE(of, fsl_diu_match);
  1539. static struct platform_driver fsl_diu_driver = {
  1540. .driver = {
  1541. .name = "fsl-diu-fb",
  1542. .owner = THIS_MODULE,
  1543. .of_match_table = fsl_diu_match,
  1544. },
  1545. .probe = fsl_diu_probe,
  1546. .remove = fsl_diu_remove,
  1547. .suspend = fsl_diu_suspend,
  1548. .resume = fsl_diu_resume,
  1549. };
  1550. static int __init fsl_diu_init(void)
  1551. {
  1552. #ifdef CONFIG_NOT_COHERENT_CACHE
  1553. struct device_node *np;
  1554. const u32 *prop;
  1555. #endif
  1556. int ret;
  1557. #ifndef MODULE
  1558. char *option;
  1559. /*
  1560. * For kernel boot options (in 'video=xxxfb:<options>' format)
  1561. */
  1562. if (fb_get_options("fslfb", &option))
  1563. return -ENODEV;
  1564. fsl_diu_setup(option);
  1565. #else
  1566. monitor_port = fsl_diu_name_to_port(monitor_string);
  1567. #endif
  1568. pr_info("Freescale Display Interface Unit (DIU) framebuffer driver\n");
  1569. #ifdef CONFIG_NOT_COHERENT_CACHE
  1570. np = of_find_node_by_type(NULL, "cpu");
  1571. if (!np) {
  1572. pr_err("fsl-diu-fb: can't find 'cpu' device node\n");
  1573. return -ENODEV;
  1574. }
  1575. prop = of_get_property(np, "d-cache-size", NULL);
  1576. if (prop == NULL) {
  1577. pr_err("fsl-diu-fb: missing 'd-cache-size' property' "
  1578. "in 'cpu' node\n");
  1579. of_node_put(np);
  1580. return -ENODEV;
  1581. }
  1582. /*
  1583. * Freescale PLRU requires 13/8 times the cache size to do a proper
  1584. * displacement flush
  1585. */
  1586. coherence_data_size = be32_to_cpup(prop) * 13;
  1587. coherence_data_size /= 8;
  1588. prop = of_get_property(np, "d-cache-line-size", NULL);
  1589. if (prop == NULL) {
  1590. pr_err("fsl-diu-fb: missing 'd-cache-line-size' property' "
  1591. "in 'cpu' node\n");
  1592. of_node_put(np);
  1593. return -ENODEV;
  1594. }
  1595. d_cache_line_size = be32_to_cpup(prop);
  1596. of_node_put(np);
  1597. coherence_data = vmalloc(coherence_data_size);
  1598. if (!coherence_data)
  1599. return -ENOMEM;
  1600. #endif
  1601. ret = platform_driver_register(&fsl_diu_driver);
  1602. if (ret) {
  1603. pr_err("fsl-diu-fb: failed to register platform driver\n");
  1604. #if defined(CONFIG_NOT_COHERENT_CACHE)
  1605. vfree(coherence_data);
  1606. #endif
  1607. iounmap(dr.diu_reg);
  1608. }
  1609. return ret;
  1610. }
  1611. static void __exit fsl_diu_exit(void)
  1612. {
  1613. platform_driver_unregister(&fsl_diu_driver);
  1614. #if defined(CONFIG_NOT_COHERENT_CACHE)
  1615. vfree(coherence_data);
  1616. #endif
  1617. }
  1618. module_init(fsl_diu_init);
  1619. module_exit(fsl_diu_exit);
  1620. MODULE_AUTHOR("York Sun <yorksun@freescale.com>");
  1621. MODULE_DESCRIPTION("Freescale DIU framebuffer driver");
  1622. MODULE_LICENSE("GPL");
  1623. module_param_named(mode, fb_mode, charp, 0);
  1624. MODULE_PARM_DESC(mode,
  1625. "Specify resolution as \"<xres>x<yres>[-<bpp>][@<refresh>]\" ");
  1626. module_param_named(bpp, default_bpp, ulong, 0);
  1627. MODULE_PARM_DESC(bpp, "Specify bit-per-pixel if not specified in 'mode'");
  1628. module_param_named(monitor, monitor_string, charp, 0);
  1629. MODULE_PARM_DESC(monitor, "Specify the monitor port "
  1630. "(\"dvi\", \"lvds\", or \"dlvds\") if supported by the platform");