main.c 60 KB

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  1. /*
  2. * Copyright (c) 2008-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/nl80211.h>
  17. #include <linux/delay.h>
  18. #include "ath9k.h"
  19. #include "btcoex.h"
  20. static u8 parse_mpdudensity(u8 mpdudensity)
  21. {
  22. /*
  23. * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  24. * 0 for no restriction
  25. * 1 for 1/4 us
  26. * 2 for 1/2 us
  27. * 3 for 1 us
  28. * 4 for 2 us
  29. * 5 for 4 us
  30. * 6 for 8 us
  31. * 7 for 16 us
  32. */
  33. switch (mpdudensity) {
  34. case 0:
  35. return 0;
  36. case 1:
  37. case 2:
  38. case 3:
  39. /* Our lower layer calculations limit our precision to
  40. 1 microsecond */
  41. return 1;
  42. case 4:
  43. return 2;
  44. case 5:
  45. return 4;
  46. case 6:
  47. return 8;
  48. case 7:
  49. return 16;
  50. default:
  51. return 0;
  52. }
  53. }
  54. static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
  55. {
  56. bool pending = false;
  57. spin_lock_bh(&txq->axq_lock);
  58. if (txq->axq_depth || !list_empty(&txq->axq_acq))
  59. pending = true;
  60. spin_unlock_bh(&txq->axq_lock);
  61. return pending;
  62. }
  63. static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  64. {
  65. unsigned long flags;
  66. bool ret;
  67. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  68. ret = ath9k_hw_setpower(sc->sc_ah, mode);
  69. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  70. return ret;
  71. }
  72. void ath9k_ps_wakeup(struct ath_softc *sc)
  73. {
  74. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  75. unsigned long flags;
  76. enum ath9k_power_mode power_mode;
  77. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  78. if (++sc->ps_usecount != 1)
  79. goto unlock;
  80. power_mode = sc->sc_ah->power_mode;
  81. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  82. /*
  83. * While the hardware is asleep, the cycle counters contain no
  84. * useful data. Better clear them now so that they don't mess up
  85. * survey data results.
  86. */
  87. if (power_mode != ATH9K_PM_AWAKE) {
  88. spin_lock(&common->cc_lock);
  89. ath_hw_cycle_counters_update(common);
  90. memset(&common->cc_survey, 0, sizeof(common->cc_survey));
  91. spin_unlock(&common->cc_lock);
  92. }
  93. unlock:
  94. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  95. }
  96. void ath9k_ps_restore(struct ath_softc *sc)
  97. {
  98. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  99. enum ath9k_power_mode mode;
  100. unsigned long flags;
  101. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  102. if (--sc->ps_usecount != 0)
  103. goto unlock;
  104. if (sc->ps_idle && (sc->ps_flags & PS_WAIT_FOR_TX_ACK))
  105. mode = ATH9K_PM_FULL_SLEEP;
  106. else if (sc->ps_enabled &&
  107. !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
  108. PS_WAIT_FOR_CAB |
  109. PS_WAIT_FOR_PSPOLL_DATA |
  110. PS_WAIT_FOR_TX_ACK)))
  111. mode = ATH9K_PM_NETWORK_SLEEP;
  112. else
  113. goto unlock;
  114. spin_lock(&common->cc_lock);
  115. ath_hw_cycle_counters_update(common);
  116. spin_unlock(&common->cc_lock);
  117. ath9k_hw_setpower(sc->sc_ah, mode);
  118. unlock:
  119. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  120. }
  121. void ath_start_ani(struct ath_common *common)
  122. {
  123. struct ath_hw *ah = common->ah;
  124. unsigned long timestamp = jiffies_to_msecs(jiffies);
  125. struct ath_softc *sc = (struct ath_softc *) common->priv;
  126. if (!(sc->sc_flags & SC_OP_ANI_RUN))
  127. return;
  128. if (sc->sc_flags & SC_OP_OFFCHANNEL)
  129. return;
  130. common->ani.longcal_timer = timestamp;
  131. common->ani.shortcal_timer = timestamp;
  132. common->ani.checkani_timer = timestamp;
  133. mod_timer(&common->ani.timer,
  134. jiffies +
  135. msecs_to_jiffies((u32)ah->config.ani_poll_interval));
  136. }
  137. static void ath_update_survey_nf(struct ath_softc *sc, int channel)
  138. {
  139. struct ath_hw *ah = sc->sc_ah;
  140. struct ath9k_channel *chan = &ah->channels[channel];
  141. struct survey_info *survey = &sc->survey[channel];
  142. if (chan->noisefloor) {
  143. survey->filled |= SURVEY_INFO_NOISE_DBM;
  144. survey->noise = ath9k_hw_getchan_noise(ah, chan);
  145. }
  146. }
  147. /*
  148. * Updates the survey statistics and returns the busy time since last
  149. * update in %, if the measurement duration was long enough for the
  150. * result to be useful, -1 otherwise.
  151. */
  152. static int ath_update_survey_stats(struct ath_softc *sc)
  153. {
  154. struct ath_hw *ah = sc->sc_ah;
  155. struct ath_common *common = ath9k_hw_common(ah);
  156. int pos = ah->curchan - &ah->channels[0];
  157. struct survey_info *survey = &sc->survey[pos];
  158. struct ath_cycle_counters *cc = &common->cc_survey;
  159. unsigned int div = common->clockrate * 1000;
  160. int ret = 0;
  161. if (!ah->curchan)
  162. return -1;
  163. if (ah->power_mode == ATH9K_PM_AWAKE)
  164. ath_hw_cycle_counters_update(common);
  165. if (cc->cycles > 0) {
  166. survey->filled |= SURVEY_INFO_CHANNEL_TIME |
  167. SURVEY_INFO_CHANNEL_TIME_BUSY |
  168. SURVEY_INFO_CHANNEL_TIME_RX |
  169. SURVEY_INFO_CHANNEL_TIME_TX;
  170. survey->channel_time += cc->cycles / div;
  171. survey->channel_time_busy += cc->rx_busy / div;
  172. survey->channel_time_rx += cc->rx_frame / div;
  173. survey->channel_time_tx += cc->tx_frame / div;
  174. }
  175. if (cc->cycles < div)
  176. return -1;
  177. if (cc->cycles > 0)
  178. ret = cc->rx_busy * 100 / cc->cycles;
  179. memset(cc, 0, sizeof(*cc));
  180. ath_update_survey_nf(sc, pos);
  181. return ret;
  182. }
  183. static void __ath_cancel_work(struct ath_softc *sc)
  184. {
  185. cancel_work_sync(&sc->paprd_work);
  186. cancel_work_sync(&sc->hw_check_work);
  187. cancel_delayed_work_sync(&sc->tx_complete_work);
  188. cancel_delayed_work_sync(&sc->hw_pll_work);
  189. }
  190. static void ath_cancel_work(struct ath_softc *sc)
  191. {
  192. __ath_cancel_work(sc);
  193. cancel_work_sync(&sc->hw_reset_work);
  194. }
  195. static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
  196. {
  197. struct ath_hw *ah = sc->sc_ah;
  198. struct ath_common *common = ath9k_hw_common(ah);
  199. bool ret;
  200. ieee80211_stop_queues(sc->hw);
  201. sc->hw_busy_count = 0;
  202. del_timer_sync(&common->ani.timer);
  203. ath9k_debug_samp_bb_mac(sc);
  204. ath9k_hw_disable_interrupts(ah);
  205. ret = ath_drain_all_txq(sc, retry_tx);
  206. if (!ath_stoprecv(sc))
  207. ret = false;
  208. if (!flush) {
  209. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  210. ath_rx_tasklet(sc, 1, true);
  211. ath_rx_tasklet(sc, 1, false);
  212. } else {
  213. ath_flushrecv(sc);
  214. }
  215. return ret;
  216. }
  217. static bool ath_complete_reset(struct ath_softc *sc, bool start)
  218. {
  219. struct ath_hw *ah = sc->sc_ah;
  220. struct ath_common *common = ath9k_hw_common(ah);
  221. if (ath_startrecv(sc) != 0) {
  222. ath_err(common, "Unable to restart recv logic\n");
  223. return false;
  224. }
  225. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  226. sc->config.txpowlimit, &sc->curtxpow);
  227. ath9k_hw_set_interrupts(ah);
  228. ath9k_hw_enable_interrupts(ah);
  229. if (!(sc->sc_flags & (SC_OP_OFFCHANNEL)) && start) {
  230. if (sc->sc_flags & SC_OP_BEACONS)
  231. ath_set_beacon(sc);
  232. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  233. ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
  234. if (!common->disable_ani)
  235. ath_start_ani(common);
  236. }
  237. if (ath9k_hw_ops(ah)->antdiv_comb_conf_get && sc->ant_rx != 3) {
  238. struct ath_hw_antcomb_conf div_ant_conf;
  239. u8 lna_conf;
  240. ath9k_hw_antdiv_comb_conf_get(ah, &div_ant_conf);
  241. if (sc->ant_rx == 1)
  242. lna_conf = ATH_ANT_DIV_COMB_LNA1;
  243. else
  244. lna_conf = ATH_ANT_DIV_COMB_LNA2;
  245. div_ant_conf.main_lna_conf = lna_conf;
  246. div_ant_conf.alt_lna_conf = lna_conf;
  247. ath9k_hw_antdiv_comb_conf_set(ah, &div_ant_conf);
  248. }
  249. ieee80211_wake_queues(sc->hw);
  250. return true;
  251. }
  252. static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
  253. bool retry_tx)
  254. {
  255. struct ath_hw *ah = sc->sc_ah;
  256. struct ath_common *common = ath9k_hw_common(ah);
  257. struct ath9k_hw_cal_data *caldata = NULL;
  258. bool fastcc = true;
  259. bool flush = false;
  260. int r;
  261. __ath_cancel_work(sc);
  262. spin_lock_bh(&sc->sc_pcu_lock);
  263. if (!(sc->sc_flags & SC_OP_OFFCHANNEL)) {
  264. fastcc = false;
  265. caldata = &sc->caldata;
  266. }
  267. if (!hchan) {
  268. fastcc = false;
  269. flush = true;
  270. hchan = ah->curchan;
  271. }
  272. if (fastcc && (ah->chip_fullsleep ||
  273. !ath9k_hw_check_alive(ah)))
  274. fastcc = false;
  275. if (!ath_prepare_reset(sc, retry_tx, flush))
  276. fastcc = false;
  277. ath_dbg(common, ATH_DBG_CONFIG,
  278. "Reset to %u MHz, HT40: %d fastcc: %d\n",
  279. hchan->channel, !!(hchan->channelFlags & (CHANNEL_HT40MINUS |
  280. CHANNEL_HT40PLUS)),
  281. fastcc);
  282. r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
  283. if (r) {
  284. ath_err(common,
  285. "Unable to reset channel, reset status %d\n", r);
  286. goto out;
  287. }
  288. if (!ath_complete_reset(sc, true))
  289. r = -EIO;
  290. out:
  291. spin_unlock_bh(&sc->sc_pcu_lock);
  292. return r;
  293. }
  294. /*
  295. * Set/change channels. If the channel is really being changed, it's done
  296. * by reseting the chip. To accomplish this we must first cleanup any pending
  297. * DMA, then restart stuff.
  298. */
  299. static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  300. struct ath9k_channel *hchan)
  301. {
  302. int r;
  303. if (sc->sc_flags & SC_OP_INVALID)
  304. return -EIO;
  305. ath9k_ps_wakeup(sc);
  306. r = ath_reset_internal(sc, hchan, false);
  307. ath9k_ps_restore(sc);
  308. return r;
  309. }
  310. static void ath_paprd_activate(struct ath_softc *sc)
  311. {
  312. struct ath_hw *ah = sc->sc_ah;
  313. struct ath9k_hw_cal_data *caldata = ah->caldata;
  314. int chain;
  315. if (!caldata || !caldata->paprd_done)
  316. return;
  317. ath9k_ps_wakeup(sc);
  318. ar9003_paprd_enable(ah, false);
  319. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  320. if (!(ah->txchainmask & BIT(chain)))
  321. continue;
  322. ar9003_paprd_populate_single_table(ah, caldata, chain);
  323. }
  324. ar9003_paprd_enable(ah, true);
  325. ath9k_ps_restore(sc);
  326. }
  327. static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
  328. {
  329. struct ieee80211_hw *hw = sc->hw;
  330. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  331. struct ath_hw *ah = sc->sc_ah;
  332. struct ath_common *common = ath9k_hw_common(ah);
  333. struct ath_tx_control txctl;
  334. int time_left;
  335. memset(&txctl, 0, sizeof(txctl));
  336. txctl.txq = sc->tx.txq_map[WME_AC_BE];
  337. memset(tx_info, 0, sizeof(*tx_info));
  338. tx_info->band = hw->conf.channel->band;
  339. tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
  340. tx_info->control.rates[0].idx = 0;
  341. tx_info->control.rates[0].count = 1;
  342. tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
  343. tx_info->control.rates[1].idx = -1;
  344. init_completion(&sc->paprd_complete);
  345. txctl.paprd = BIT(chain);
  346. if (ath_tx_start(hw, skb, &txctl) != 0) {
  347. ath_dbg(common, ATH_DBG_CALIBRATE, "PAPRD TX failed\n");
  348. dev_kfree_skb_any(skb);
  349. return false;
  350. }
  351. time_left = wait_for_completion_timeout(&sc->paprd_complete,
  352. msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
  353. if (!time_left)
  354. ath_dbg(common, ATH_DBG_CALIBRATE,
  355. "Timeout waiting for paprd training on TX chain %d\n",
  356. chain);
  357. return !!time_left;
  358. }
  359. void ath_paprd_calibrate(struct work_struct *work)
  360. {
  361. struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
  362. struct ieee80211_hw *hw = sc->hw;
  363. struct ath_hw *ah = sc->sc_ah;
  364. struct ieee80211_hdr *hdr;
  365. struct sk_buff *skb = NULL;
  366. struct ath9k_hw_cal_data *caldata = ah->caldata;
  367. struct ath_common *common = ath9k_hw_common(ah);
  368. int ftype;
  369. int chain_ok = 0;
  370. int chain;
  371. int len = 1800;
  372. if (!caldata)
  373. return;
  374. ath9k_ps_wakeup(sc);
  375. if (ar9003_paprd_init_table(ah) < 0)
  376. goto fail_paprd;
  377. skb = alloc_skb(len, GFP_KERNEL);
  378. if (!skb)
  379. goto fail_paprd;
  380. skb_put(skb, len);
  381. memset(skb->data, 0, len);
  382. hdr = (struct ieee80211_hdr *)skb->data;
  383. ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
  384. hdr->frame_control = cpu_to_le16(ftype);
  385. hdr->duration_id = cpu_to_le16(10);
  386. memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
  387. memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
  388. memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
  389. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  390. if (!(ah->txchainmask & BIT(chain)))
  391. continue;
  392. chain_ok = 0;
  393. ath_dbg(common, ATH_DBG_CALIBRATE,
  394. "Sending PAPRD frame for thermal measurement "
  395. "on chain %d\n", chain);
  396. if (!ath_paprd_send_frame(sc, skb, chain))
  397. goto fail_paprd;
  398. ar9003_paprd_setup_gain_table(ah, chain);
  399. ath_dbg(common, ATH_DBG_CALIBRATE,
  400. "Sending PAPRD training frame on chain %d\n", chain);
  401. if (!ath_paprd_send_frame(sc, skb, chain))
  402. goto fail_paprd;
  403. if (!ar9003_paprd_is_done(ah)) {
  404. ath_dbg(common, ATH_DBG_CALIBRATE,
  405. "PAPRD not yet done on chain %d\n", chain);
  406. break;
  407. }
  408. if (ar9003_paprd_create_curve(ah, caldata, chain)) {
  409. ath_dbg(common, ATH_DBG_CALIBRATE,
  410. "PAPRD create curve failed on chain %d\n",
  411. chain);
  412. break;
  413. }
  414. chain_ok = 1;
  415. }
  416. kfree_skb(skb);
  417. if (chain_ok) {
  418. caldata->paprd_done = true;
  419. ath_paprd_activate(sc);
  420. }
  421. fail_paprd:
  422. ath9k_ps_restore(sc);
  423. }
  424. /*
  425. * This routine performs the periodic noise floor calibration function
  426. * that is used to adjust and optimize the chip performance. This
  427. * takes environmental changes (location, temperature) into account.
  428. * When the task is complete, it reschedules itself depending on the
  429. * appropriate interval that was calculated.
  430. */
  431. void ath_ani_calibrate(unsigned long data)
  432. {
  433. struct ath_softc *sc = (struct ath_softc *)data;
  434. struct ath_hw *ah = sc->sc_ah;
  435. struct ath_common *common = ath9k_hw_common(ah);
  436. bool longcal = false;
  437. bool shortcal = false;
  438. bool aniflag = false;
  439. unsigned int timestamp = jiffies_to_msecs(jiffies);
  440. u32 cal_interval, short_cal_interval, long_cal_interval;
  441. unsigned long flags;
  442. if (ah->caldata && ah->caldata->nfcal_interference)
  443. long_cal_interval = ATH_LONG_CALINTERVAL_INT;
  444. else
  445. long_cal_interval = ATH_LONG_CALINTERVAL;
  446. short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
  447. ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
  448. /* Only calibrate if awake */
  449. if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
  450. goto set_timer;
  451. ath9k_ps_wakeup(sc);
  452. /* Long calibration runs independently of short calibration. */
  453. if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
  454. longcal = true;
  455. common->ani.longcal_timer = timestamp;
  456. }
  457. /* Short calibration applies only while caldone is false */
  458. if (!common->ani.caldone) {
  459. if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
  460. shortcal = true;
  461. common->ani.shortcal_timer = timestamp;
  462. common->ani.resetcal_timer = timestamp;
  463. }
  464. } else {
  465. if ((timestamp - common->ani.resetcal_timer) >=
  466. ATH_RESTART_CALINTERVAL) {
  467. common->ani.caldone = ath9k_hw_reset_calvalid(ah);
  468. if (common->ani.caldone)
  469. common->ani.resetcal_timer = timestamp;
  470. }
  471. }
  472. /* Verify whether we must check ANI */
  473. if (sc->sc_ah->config.enable_ani
  474. && (timestamp - common->ani.checkani_timer) >=
  475. ah->config.ani_poll_interval) {
  476. aniflag = true;
  477. common->ani.checkani_timer = timestamp;
  478. }
  479. /* Call ANI routine if necessary */
  480. if (aniflag) {
  481. spin_lock_irqsave(&common->cc_lock, flags);
  482. ath9k_hw_ani_monitor(ah, ah->curchan);
  483. ath_update_survey_stats(sc);
  484. spin_unlock_irqrestore(&common->cc_lock, flags);
  485. }
  486. /* Perform calibration if necessary */
  487. if (longcal || shortcal) {
  488. common->ani.caldone =
  489. ath9k_hw_calibrate(ah, ah->curchan,
  490. ah->rxchainmask, longcal);
  491. }
  492. ath_dbg(common, ATH_DBG_ANI,
  493. "Calibration @%lu finished: %s %s %s, caldone: %s\n", jiffies,
  494. longcal ? "long" : "", shortcal ? "short" : "",
  495. aniflag ? "ani" : "", common->ani.caldone ? "true" : "false");
  496. ath9k_ps_restore(sc);
  497. set_timer:
  498. /*
  499. * Set timer interval based on previous results.
  500. * The interval must be the shortest necessary to satisfy ANI,
  501. * short calibration and long calibration.
  502. */
  503. ath9k_debug_samp_bb_mac(sc);
  504. cal_interval = ATH_LONG_CALINTERVAL;
  505. if (sc->sc_ah->config.enable_ani)
  506. cal_interval = min(cal_interval,
  507. (u32)ah->config.ani_poll_interval);
  508. if (!common->ani.caldone)
  509. cal_interval = min(cal_interval, (u32)short_cal_interval);
  510. mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
  511. if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
  512. if (!ah->caldata->paprd_done)
  513. ieee80211_queue_work(sc->hw, &sc->paprd_work);
  514. else if (!ah->paprd_table_write_done)
  515. ath_paprd_activate(sc);
  516. }
  517. }
  518. static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
  519. struct ieee80211_vif *vif)
  520. {
  521. struct ath_node *an;
  522. an = (struct ath_node *)sta->drv_priv;
  523. #ifdef CONFIG_ATH9K_DEBUGFS
  524. spin_lock(&sc->nodes_lock);
  525. list_add(&an->list, &sc->nodes);
  526. spin_unlock(&sc->nodes_lock);
  527. an->sta = sta;
  528. an->vif = vif;
  529. #endif
  530. if (sc->sc_flags & SC_OP_TXAGGR) {
  531. ath_tx_node_init(sc, an);
  532. an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
  533. sta->ht_cap.ampdu_factor);
  534. an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
  535. }
  536. }
  537. static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
  538. {
  539. struct ath_node *an = (struct ath_node *)sta->drv_priv;
  540. #ifdef CONFIG_ATH9K_DEBUGFS
  541. spin_lock(&sc->nodes_lock);
  542. list_del(&an->list);
  543. spin_unlock(&sc->nodes_lock);
  544. an->sta = NULL;
  545. #endif
  546. if (sc->sc_flags & SC_OP_TXAGGR)
  547. ath_tx_node_cleanup(sc, an);
  548. }
  549. void ath9k_tasklet(unsigned long data)
  550. {
  551. struct ath_softc *sc = (struct ath_softc *)data;
  552. struct ath_hw *ah = sc->sc_ah;
  553. struct ath_common *common = ath9k_hw_common(ah);
  554. u32 status = sc->intrstatus;
  555. u32 rxmask;
  556. ath9k_ps_wakeup(sc);
  557. spin_lock(&sc->sc_pcu_lock);
  558. if ((status & ATH9K_INT_FATAL) ||
  559. (status & ATH9K_INT_BB_WATCHDOG)) {
  560. #ifdef CONFIG_ATH9K_DEBUGFS
  561. enum ath_reset_type type;
  562. if (status & ATH9K_INT_FATAL)
  563. type = RESET_TYPE_FATAL_INT;
  564. else
  565. type = RESET_TYPE_BB_WATCHDOG;
  566. RESET_STAT_INC(sc, type);
  567. #endif
  568. ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  569. goto out;
  570. }
  571. /*
  572. * Only run the baseband hang check if beacons stop working in AP or
  573. * IBSS mode, because it has a high false positive rate. For station
  574. * mode it should not be necessary, since the upper layers will detect
  575. * this through a beacon miss automatically and the following channel
  576. * change will trigger a hardware reset anyway
  577. */
  578. if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
  579. !ath9k_hw_check_alive(ah))
  580. ieee80211_queue_work(sc->hw, &sc->hw_check_work);
  581. if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
  582. /*
  583. * TSF sync does not look correct; remain awake to sync with
  584. * the next Beacon.
  585. */
  586. ath_dbg(common, ATH_DBG_PS,
  587. "TSFOOR - Sync with next Beacon\n");
  588. sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
  589. }
  590. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  591. rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
  592. ATH9K_INT_RXORN);
  593. else
  594. rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  595. if (status & rxmask) {
  596. /* Check for high priority Rx first */
  597. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  598. (status & ATH9K_INT_RXHP))
  599. ath_rx_tasklet(sc, 0, true);
  600. ath_rx_tasklet(sc, 0, false);
  601. }
  602. if (status & ATH9K_INT_TX) {
  603. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  604. ath_tx_edma_tasklet(sc);
  605. else
  606. ath_tx_tasklet(sc);
  607. }
  608. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  609. if (status & ATH9K_INT_GENTIMER)
  610. ath_gen_timer_isr(sc->sc_ah);
  611. if (status & ATH9K_INT_MCI)
  612. ath_mci_intr(sc);
  613. out:
  614. /* re-enable hardware interrupt */
  615. ath9k_hw_enable_interrupts(ah);
  616. spin_unlock(&sc->sc_pcu_lock);
  617. ath9k_ps_restore(sc);
  618. }
  619. irqreturn_t ath_isr(int irq, void *dev)
  620. {
  621. #define SCHED_INTR ( \
  622. ATH9K_INT_FATAL | \
  623. ATH9K_INT_BB_WATCHDOG | \
  624. ATH9K_INT_RXORN | \
  625. ATH9K_INT_RXEOL | \
  626. ATH9K_INT_RX | \
  627. ATH9K_INT_RXLP | \
  628. ATH9K_INT_RXHP | \
  629. ATH9K_INT_TX | \
  630. ATH9K_INT_BMISS | \
  631. ATH9K_INT_CST | \
  632. ATH9K_INT_TSFOOR | \
  633. ATH9K_INT_GENTIMER | \
  634. ATH9K_INT_MCI)
  635. struct ath_softc *sc = dev;
  636. struct ath_hw *ah = sc->sc_ah;
  637. struct ath_common *common = ath9k_hw_common(ah);
  638. enum ath9k_int status;
  639. bool sched = false;
  640. /*
  641. * The hardware is not ready/present, don't
  642. * touch anything. Note this can happen early
  643. * on if the IRQ is shared.
  644. */
  645. if (sc->sc_flags & SC_OP_INVALID)
  646. return IRQ_NONE;
  647. /* shared irq, not for us */
  648. if (!ath9k_hw_intrpend(ah))
  649. return IRQ_NONE;
  650. /*
  651. * Figure out the reason(s) for the interrupt. Note
  652. * that the hal returns a pseudo-ISR that may include
  653. * bits we haven't explicitly enabled so we mask the
  654. * value to insure we only process bits we requested.
  655. */
  656. ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
  657. status &= ah->imask; /* discard unasked-for bits */
  658. /*
  659. * If there are no status bits set, then this interrupt was not
  660. * for me (should have been caught above).
  661. */
  662. if (!status)
  663. return IRQ_NONE;
  664. /* Cache the status */
  665. sc->intrstatus = status;
  666. if (status & SCHED_INTR)
  667. sched = true;
  668. /*
  669. * If a FATAL or RXORN interrupt is received, we have to reset the
  670. * chip immediately.
  671. */
  672. if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
  673. !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
  674. goto chip_reset;
  675. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  676. (status & ATH9K_INT_BB_WATCHDOG)) {
  677. spin_lock(&common->cc_lock);
  678. ath_hw_cycle_counters_update(common);
  679. ar9003_hw_bb_watchdog_dbg_info(ah);
  680. spin_unlock(&common->cc_lock);
  681. goto chip_reset;
  682. }
  683. if (status & ATH9K_INT_SWBA)
  684. tasklet_schedule(&sc->bcon_tasklet);
  685. if (status & ATH9K_INT_TXURN)
  686. ath9k_hw_updatetxtriglevel(ah, true);
  687. if (status & ATH9K_INT_RXEOL) {
  688. ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  689. ath9k_hw_set_interrupts(ah);
  690. }
  691. if (status & ATH9K_INT_MIB) {
  692. /*
  693. * Disable interrupts until we service the MIB
  694. * interrupt; otherwise it will continue to
  695. * fire.
  696. */
  697. ath9k_hw_disable_interrupts(ah);
  698. /*
  699. * Let the hal handle the event. We assume
  700. * it will clear whatever condition caused
  701. * the interrupt.
  702. */
  703. spin_lock(&common->cc_lock);
  704. ath9k_hw_proc_mib_event(ah);
  705. spin_unlock(&common->cc_lock);
  706. ath9k_hw_enable_interrupts(ah);
  707. }
  708. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  709. if (status & ATH9K_INT_TIM_TIMER) {
  710. if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
  711. goto chip_reset;
  712. /* Clear RxAbort bit so that we can
  713. * receive frames */
  714. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  715. ath9k_hw_setrxabort(sc->sc_ah, 0);
  716. sc->ps_flags |= PS_WAIT_FOR_BEACON;
  717. }
  718. chip_reset:
  719. ath_debug_stat_interrupt(sc, status);
  720. if (sched) {
  721. /* turn off every interrupt */
  722. ath9k_hw_disable_interrupts(ah);
  723. tasklet_schedule(&sc->intr_tq);
  724. }
  725. return IRQ_HANDLED;
  726. #undef SCHED_INTR
  727. }
  728. static int ath_reset(struct ath_softc *sc, bool retry_tx)
  729. {
  730. int r;
  731. ath9k_ps_wakeup(sc);
  732. r = ath_reset_internal(sc, NULL, retry_tx);
  733. if (retry_tx) {
  734. int i;
  735. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  736. if (ATH_TXQ_SETUP(sc, i)) {
  737. spin_lock_bh(&sc->tx.txq[i].axq_lock);
  738. ath_txq_schedule(sc, &sc->tx.txq[i]);
  739. spin_unlock_bh(&sc->tx.txq[i].axq_lock);
  740. }
  741. }
  742. }
  743. ath9k_ps_restore(sc);
  744. return r;
  745. }
  746. void ath_reset_work(struct work_struct *work)
  747. {
  748. struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
  749. ath_reset(sc, true);
  750. }
  751. void ath_hw_check(struct work_struct *work)
  752. {
  753. struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
  754. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  755. unsigned long flags;
  756. int busy;
  757. ath9k_ps_wakeup(sc);
  758. if (ath9k_hw_check_alive(sc->sc_ah))
  759. goto out;
  760. spin_lock_irqsave(&common->cc_lock, flags);
  761. busy = ath_update_survey_stats(sc);
  762. spin_unlock_irqrestore(&common->cc_lock, flags);
  763. ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
  764. "busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
  765. if (busy >= 99) {
  766. if (++sc->hw_busy_count >= 3) {
  767. RESET_STAT_INC(sc, RESET_TYPE_BB_HANG);
  768. ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  769. }
  770. } else if (busy >= 0)
  771. sc->hw_busy_count = 0;
  772. out:
  773. ath9k_ps_restore(sc);
  774. }
  775. static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
  776. {
  777. static int count;
  778. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  779. if (pll_sqsum >= 0x40000) {
  780. count++;
  781. if (count == 3) {
  782. /* Rx is hung for more than 500ms. Reset it */
  783. ath_dbg(common, ATH_DBG_RESET,
  784. "Possible RX hang, resetting");
  785. RESET_STAT_INC(sc, RESET_TYPE_PLL_HANG);
  786. ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  787. count = 0;
  788. }
  789. } else
  790. count = 0;
  791. }
  792. void ath_hw_pll_work(struct work_struct *work)
  793. {
  794. struct ath_softc *sc = container_of(work, struct ath_softc,
  795. hw_pll_work.work);
  796. u32 pll_sqsum;
  797. if (AR_SREV_9485(sc->sc_ah)) {
  798. ath9k_ps_wakeup(sc);
  799. pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
  800. ath9k_ps_restore(sc);
  801. ath_hw_pll_rx_hang_check(sc, pll_sqsum);
  802. ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
  803. }
  804. }
  805. /**********************/
  806. /* mac80211 callbacks */
  807. /**********************/
  808. static int ath9k_start(struct ieee80211_hw *hw)
  809. {
  810. struct ath_softc *sc = hw->priv;
  811. struct ath_hw *ah = sc->sc_ah;
  812. struct ath_common *common = ath9k_hw_common(ah);
  813. struct ieee80211_channel *curchan = hw->conf.channel;
  814. struct ath9k_channel *init_channel;
  815. int r;
  816. ath_dbg(common, ATH_DBG_CONFIG,
  817. "Starting driver with initial channel: %d MHz\n",
  818. curchan->center_freq);
  819. ath9k_ps_wakeup(sc);
  820. mutex_lock(&sc->mutex);
  821. /* setup initial channel */
  822. sc->chan_idx = curchan->hw_value;
  823. init_channel = ath9k_cmn_get_curchannel(hw, ah);
  824. /* Reset SERDES registers */
  825. ath9k_hw_configpcipowersave(ah, false);
  826. /*
  827. * The basic interface to setting the hardware in a good
  828. * state is ``reset''. On return the hardware is known to
  829. * be powered up and with interrupts disabled. This must
  830. * be followed by initialization of the appropriate bits
  831. * and then setup of the interrupt mask.
  832. */
  833. spin_lock_bh(&sc->sc_pcu_lock);
  834. atomic_set(&ah->intr_ref_cnt, -1);
  835. r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
  836. if (r) {
  837. ath_err(common,
  838. "Unable to reset hardware; reset status %d (freq %u MHz)\n",
  839. r, curchan->center_freq);
  840. spin_unlock_bh(&sc->sc_pcu_lock);
  841. goto mutex_unlock;
  842. }
  843. /* Setup our intr mask. */
  844. ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
  845. ATH9K_INT_RXORN | ATH9K_INT_FATAL |
  846. ATH9K_INT_GLOBAL;
  847. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  848. ah->imask |= ATH9K_INT_RXHP |
  849. ATH9K_INT_RXLP |
  850. ATH9K_INT_BB_WATCHDOG;
  851. else
  852. ah->imask |= ATH9K_INT_RX;
  853. ah->imask |= ATH9K_INT_GTT;
  854. if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  855. ah->imask |= ATH9K_INT_CST;
  856. if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI)
  857. ah->imask |= ATH9K_INT_MCI;
  858. sc->sc_flags &= ~SC_OP_INVALID;
  859. sc->sc_ah->is_monitoring = false;
  860. /* Disable BMISS interrupt when we're not associated */
  861. ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
  862. if (!ath_complete_reset(sc, false)) {
  863. r = -EIO;
  864. spin_unlock_bh(&sc->sc_pcu_lock);
  865. goto mutex_unlock;
  866. }
  867. if (ah->led_pin >= 0) {
  868. ath9k_hw_cfg_output(ah, ah->led_pin,
  869. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  870. ath9k_hw_set_gpio(ah, ah->led_pin, 0);
  871. }
  872. /*
  873. * Reset key cache to sane defaults (all entries cleared) instead of
  874. * semi-random values after suspend/resume.
  875. */
  876. ath9k_cmn_init_crypto(sc->sc_ah);
  877. spin_unlock_bh(&sc->sc_pcu_lock);
  878. if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
  879. !ah->btcoex_hw.enabled) {
  880. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_MCI))
  881. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  882. AR_STOMP_LOW_WLAN_WGHT);
  883. ath9k_hw_btcoex_enable(ah);
  884. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  885. ath9k_btcoex_timer_resume(sc);
  886. }
  887. if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
  888. common->bus_ops->extn_synch_en(common);
  889. mutex_unlock:
  890. mutex_unlock(&sc->mutex);
  891. ath9k_ps_restore(sc);
  892. return r;
  893. }
  894. static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  895. {
  896. struct ath_softc *sc = hw->priv;
  897. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  898. struct ath_tx_control txctl;
  899. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  900. if (sc->ps_enabled) {
  901. /*
  902. * mac80211 does not set PM field for normal data frames, so we
  903. * need to update that based on the current PS mode.
  904. */
  905. if (ieee80211_is_data(hdr->frame_control) &&
  906. !ieee80211_is_nullfunc(hdr->frame_control) &&
  907. !ieee80211_has_pm(hdr->frame_control)) {
  908. ath_dbg(common, ATH_DBG_PS,
  909. "Add PM=1 for a TX frame while in PS mode\n");
  910. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
  911. }
  912. }
  913. /*
  914. * Cannot tx while the hardware is in full sleep, it first needs a full
  915. * chip reset to recover from that
  916. */
  917. if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP))
  918. goto exit;
  919. if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
  920. /*
  921. * We are using PS-Poll and mac80211 can request TX while in
  922. * power save mode. Need to wake up hardware for the TX to be
  923. * completed and if needed, also for RX of buffered frames.
  924. */
  925. ath9k_ps_wakeup(sc);
  926. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  927. ath9k_hw_setrxabort(sc->sc_ah, 0);
  928. if (ieee80211_is_pspoll(hdr->frame_control)) {
  929. ath_dbg(common, ATH_DBG_PS,
  930. "Sending PS-Poll to pick a buffered frame\n");
  931. sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
  932. } else {
  933. ath_dbg(common, ATH_DBG_PS,
  934. "Wake up to complete TX\n");
  935. sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
  936. }
  937. /*
  938. * The actual restore operation will happen only after
  939. * the sc_flags bit is cleared. We are just dropping
  940. * the ps_usecount here.
  941. */
  942. ath9k_ps_restore(sc);
  943. }
  944. memset(&txctl, 0, sizeof(struct ath_tx_control));
  945. txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
  946. ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
  947. if (ath_tx_start(hw, skb, &txctl) != 0) {
  948. ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
  949. goto exit;
  950. }
  951. return;
  952. exit:
  953. dev_kfree_skb_any(skb);
  954. }
  955. static void ath9k_stop(struct ieee80211_hw *hw)
  956. {
  957. struct ath_softc *sc = hw->priv;
  958. struct ath_hw *ah = sc->sc_ah;
  959. struct ath_common *common = ath9k_hw_common(ah);
  960. bool prev_idle;
  961. mutex_lock(&sc->mutex);
  962. ath_cancel_work(sc);
  963. if (sc->sc_flags & SC_OP_INVALID) {
  964. ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
  965. mutex_unlock(&sc->mutex);
  966. return;
  967. }
  968. /* Ensure HW is awake when we try to shut it down. */
  969. ath9k_ps_wakeup(sc);
  970. if (ah->btcoex_hw.enabled) {
  971. ath9k_hw_btcoex_disable(ah);
  972. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  973. ath9k_btcoex_timer_pause(sc);
  974. ath_mci_flush_profile(&sc->btcoex.mci);
  975. }
  976. spin_lock_bh(&sc->sc_pcu_lock);
  977. /* prevent tasklets to enable interrupts once we disable them */
  978. ah->imask &= ~ATH9K_INT_GLOBAL;
  979. /* make sure h/w will not generate any interrupt
  980. * before setting the invalid flag. */
  981. ath9k_hw_disable_interrupts(ah);
  982. spin_unlock_bh(&sc->sc_pcu_lock);
  983. /* we can now sync irq and kill any running tasklets, since we already
  984. * disabled interrupts and not holding a spin lock */
  985. synchronize_irq(sc->irq);
  986. tasklet_kill(&sc->intr_tq);
  987. tasklet_kill(&sc->bcon_tasklet);
  988. prev_idle = sc->ps_idle;
  989. sc->ps_idle = true;
  990. spin_lock_bh(&sc->sc_pcu_lock);
  991. if (ah->led_pin >= 0) {
  992. ath9k_hw_set_gpio(ah, ah->led_pin, 1);
  993. ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
  994. }
  995. ath_prepare_reset(sc, false, true);
  996. if (sc->rx.frag) {
  997. dev_kfree_skb_any(sc->rx.frag);
  998. sc->rx.frag = NULL;
  999. }
  1000. if (!ah->curchan)
  1001. ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
  1002. ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  1003. ath9k_hw_phy_disable(ah);
  1004. ath9k_hw_configpcipowersave(ah, true);
  1005. spin_unlock_bh(&sc->sc_pcu_lock);
  1006. ath9k_ps_restore(sc);
  1007. sc->sc_flags |= SC_OP_INVALID;
  1008. sc->ps_idle = prev_idle;
  1009. mutex_unlock(&sc->mutex);
  1010. ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
  1011. }
  1012. bool ath9k_uses_beacons(int type)
  1013. {
  1014. switch (type) {
  1015. case NL80211_IFTYPE_AP:
  1016. case NL80211_IFTYPE_ADHOC:
  1017. case NL80211_IFTYPE_MESH_POINT:
  1018. return true;
  1019. default:
  1020. return false;
  1021. }
  1022. }
  1023. static void ath9k_reclaim_beacon(struct ath_softc *sc,
  1024. struct ieee80211_vif *vif)
  1025. {
  1026. struct ath_vif *avp = (void *)vif->drv_priv;
  1027. ath9k_set_beaconing_status(sc, false);
  1028. ath_beacon_return(sc, avp);
  1029. ath9k_set_beaconing_status(sc, true);
  1030. sc->sc_flags &= ~SC_OP_BEACONS;
  1031. }
  1032. static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  1033. {
  1034. struct ath9k_vif_iter_data *iter_data = data;
  1035. int i;
  1036. if (iter_data->hw_macaddr)
  1037. for (i = 0; i < ETH_ALEN; i++)
  1038. iter_data->mask[i] &=
  1039. ~(iter_data->hw_macaddr[i] ^ mac[i]);
  1040. switch (vif->type) {
  1041. case NL80211_IFTYPE_AP:
  1042. iter_data->naps++;
  1043. break;
  1044. case NL80211_IFTYPE_STATION:
  1045. iter_data->nstations++;
  1046. break;
  1047. case NL80211_IFTYPE_ADHOC:
  1048. iter_data->nadhocs++;
  1049. break;
  1050. case NL80211_IFTYPE_MESH_POINT:
  1051. iter_data->nmeshes++;
  1052. break;
  1053. case NL80211_IFTYPE_WDS:
  1054. iter_data->nwds++;
  1055. break;
  1056. default:
  1057. iter_data->nothers++;
  1058. break;
  1059. }
  1060. }
  1061. /* Called with sc->mutex held. */
  1062. void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
  1063. struct ieee80211_vif *vif,
  1064. struct ath9k_vif_iter_data *iter_data)
  1065. {
  1066. struct ath_softc *sc = hw->priv;
  1067. struct ath_hw *ah = sc->sc_ah;
  1068. struct ath_common *common = ath9k_hw_common(ah);
  1069. /*
  1070. * Use the hardware MAC address as reference, the hardware uses it
  1071. * together with the BSSID mask when matching addresses.
  1072. */
  1073. memset(iter_data, 0, sizeof(*iter_data));
  1074. iter_data->hw_macaddr = common->macaddr;
  1075. memset(&iter_data->mask, 0xff, ETH_ALEN);
  1076. if (vif)
  1077. ath9k_vif_iter(iter_data, vif->addr, vif);
  1078. /* Get list of all active MAC addresses */
  1079. ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
  1080. iter_data);
  1081. }
  1082. /* Called with sc->mutex held. */
  1083. static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
  1084. struct ieee80211_vif *vif)
  1085. {
  1086. struct ath_softc *sc = hw->priv;
  1087. struct ath_hw *ah = sc->sc_ah;
  1088. struct ath_common *common = ath9k_hw_common(ah);
  1089. struct ath9k_vif_iter_data iter_data;
  1090. ath9k_calculate_iter_data(hw, vif, &iter_data);
  1091. /* Set BSSID mask. */
  1092. memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
  1093. ath_hw_setbssidmask(common);
  1094. /* Set op-mode & TSF */
  1095. if (iter_data.naps > 0) {
  1096. ath9k_hw_set_tsfadjust(ah, 1);
  1097. sc->sc_flags |= SC_OP_TSF_RESET;
  1098. ah->opmode = NL80211_IFTYPE_AP;
  1099. } else {
  1100. ath9k_hw_set_tsfadjust(ah, 0);
  1101. sc->sc_flags &= ~SC_OP_TSF_RESET;
  1102. if (iter_data.nmeshes)
  1103. ah->opmode = NL80211_IFTYPE_MESH_POINT;
  1104. else if (iter_data.nwds)
  1105. ah->opmode = NL80211_IFTYPE_AP;
  1106. else if (iter_data.nadhocs)
  1107. ah->opmode = NL80211_IFTYPE_ADHOC;
  1108. else
  1109. ah->opmode = NL80211_IFTYPE_STATION;
  1110. }
  1111. /*
  1112. * Enable MIB interrupts when there are hardware phy counters.
  1113. */
  1114. if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
  1115. if (ah->config.enable_ani)
  1116. ah->imask |= ATH9K_INT_MIB;
  1117. ah->imask |= ATH9K_INT_TSFOOR;
  1118. } else {
  1119. ah->imask &= ~ATH9K_INT_MIB;
  1120. ah->imask &= ~ATH9K_INT_TSFOOR;
  1121. }
  1122. ath9k_hw_set_interrupts(ah);
  1123. /* Set up ANI */
  1124. if (iter_data.naps > 0) {
  1125. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1126. if (!common->disable_ani) {
  1127. sc->sc_flags |= SC_OP_ANI_RUN;
  1128. ath_start_ani(common);
  1129. }
  1130. } else {
  1131. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1132. del_timer_sync(&common->ani.timer);
  1133. }
  1134. }
  1135. /* Called with sc->mutex held, vif counts set up properly. */
  1136. static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
  1137. struct ieee80211_vif *vif)
  1138. {
  1139. struct ath_softc *sc = hw->priv;
  1140. ath9k_calculate_summary_state(hw, vif);
  1141. if (ath9k_uses_beacons(vif->type)) {
  1142. int error;
  1143. /* This may fail because upper levels do not have beacons
  1144. * properly configured yet. That's OK, we assume it
  1145. * will be properly configured and then we will be notified
  1146. * in the info_changed method and set up beacons properly
  1147. * there.
  1148. */
  1149. ath9k_set_beaconing_status(sc, false);
  1150. error = ath_beacon_alloc(sc, vif);
  1151. if (!error)
  1152. ath_beacon_config(sc, vif);
  1153. ath9k_set_beaconing_status(sc, true);
  1154. }
  1155. }
  1156. static int ath9k_add_interface(struct ieee80211_hw *hw,
  1157. struct ieee80211_vif *vif)
  1158. {
  1159. struct ath_softc *sc = hw->priv;
  1160. struct ath_hw *ah = sc->sc_ah;
  1161. struct ath_common *common = ath9k_hw_common(ah);
  1162. int ret = 0;
  1163. ath9k_ps_wakeup(sc);
  1164. mutex_lock(&sc->mutex);
  1165. switch (vif->type) {
  1166. case NL80211_IFTYPE_STATION:
  1167. case NL80211_IFTYPE_WDS:
  1168. case NL80211_IFTYPE_ADHOC:
  1169. case NL80211_IFTYPE_AP:
  1170. case NL80211_IFTYPE_MESH_POINT:
  1171. break;
  1172. default:
  1173. ath_err(common, "Interface type %d not yet supported\n",
  1174. vif->type);
  1175. ret = -EOPNOTSUPP;
  1176. goto out;
  1177. }
  1178. if (ath9k_uses_beacons(vif->type)) {
  1179. if (sc->nbcnvifs >= ATH_BCBUF) {
  1180. ath_err(common, "Not enough beacon buffers when adding"
  1181. " new interface of type: %i\n",
  1182. vif->type);
  1183. ret = -ENOBUFS;
  1184. goto out;
  1185. }
  1186. }
  1187. if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
  1188. ((vif->type == NL80211_IFTYPE_ADHOC) &&
  1189. sc->nvifs > 0)) {
  1190. ath_err(common, "Cannot create ADHOC interface when other"
  1191. " interfaces already exist.\n");
  1192. ret = -EINVAL;
  1193. goto out;
  1194. }
  1195. ath_dbg(common, ATH_DBG_CONFIG,
  1196. "Attach a VIF of type: %d\n", vif->type);
  1197. sc->nvifs++;
  1198. ath9k_do_vif_add_setup(hw, vif);
  1199. out:
  1200. mutex_unlock(&sc->mutex);
  1201. ath9k_ps_restore(sc);
  1202. return ret;
  1203. }
  1204. static int ath9k_change_interface(struct ieee80211_hw *hw,
  1205. struct ieee80211_vif *vif,
  1206. enum nl80211_iftype new_type,
  1207. bool p2p)
  1208. {
  1209. struct ath_softc *sc = hw->priv;
  1210. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1211. int ret = 0;
  1212. ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
  1213. mutex_lock(&sc->mutex);
  1214. ath9k_ps_wakeup(sc);
  1215. /* See if new interface type is valid. */
  1216. if ((new_type == NL80211_IFTYPE_ADHOC) &&
  1217. (sc->nvifs > 1)) {
  1218. ath_err(common, "When using ADHOC, it must be the only"
  1219. " interface.\n");
  1220. ret = -EINVAL;
  1221. goto out;
  1222. }
  1223. if (ath9k_uses_beacons(new_type) &&
  1224. !ath9k_uses_beacons(vif->type)) {
  1225. if (sc->nbcnvifs >= ATH_BCBUF) {
  1226. ath_err(common, "No beacon slot available\n");
  1227. ret = -ENOBUFS;
  1228. goto out;
  1229. }
  1230. }
  1231. /* Clean up old vif stuff */
  1232. if (ath9k_uses_beacons(vif->type))
  1233. ath9k_reclaim_beacon(sc, vif);
  1234. /* Add new settings */
  1235. vif->type = new_type;
  1236. vif->p2p = p2p;
  1237. ath9k_do_vif_add_setup(hw, vif);
  1238. out:
  1239. ath9k_ps_restore(sc);
  1240. mutex_unlock(&sc->mutex);
  1241. return ret;
  1242. }
  1243. static void ath9k_remove_interface(struct ieee80211_hw *hw,
  1244. struct ieee80211_vif *vif)
  1245. {
  1246. struct ath_softc *sc = hw->priv;
  1247. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1248. ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
  1249. ath9k_ps_wakeup(sc);
  1250. mutex_lock(&sc->mutex);
  1251. sc->nvifs--;
  1252. /* Reclaim beacon resources */
  1253. if (ath9k_uses_beacons(vif->type))
  1254. ath9k_reclaim_beacon(sc, vif);
  1255. ath9k_calculate_summary_state(hw, NULL);
  1256. mutex_unlock(&sc->mutex);
  1257. ath9k_ps_restore(sc);
  1258. }
  1259. static void ath9k_enable_ps(struct ath_softc *sc)
  1260. {
  1261. struct ath_hw *ah = sc->sc_ah;
  1262. sc->ps_enabled = true;
  1263. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1264. if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
  1265. ah->imask |= ATH9K_INT_TIM_TIMER;
  1266. ath9k_hw_set_interrupts(ah);
  1267. }
  1268. ath9k_hw_setrxabort(ah, 1);
  1269. }
  1270. }
  1271. static void ath9k_disable_ps(struct ath_softc *sc)
  1272. {
  1273. struct ath_hw *ah = sc->sc_ah;
  1274. sc->ps_enabled = false;
  1275. ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
  1276. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1277. ath9k_hw_setrxabort(ah, 0);
  1278. sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
  1279. PS_WAIT_FOR_CAB |
  1280. PS_WAIT_FOR_PSPOLL_DATA |
  1281. PS_WAIT_FOR_TX_ACK);
  1282. if (ah->imask & ATH9K_INT_TIM_TIMER) {
  1283. ah->imask &= ~ATH9K_INT_TIM_TIMER;
  1284. ath9k_hw_set_interrupts(ah);
  1285. }
  1286. }
  1287. }
  1288. static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
  1289. {
  1290. struct ath_softc *sc = hw->priv;
  1291. struct ath_hw *ah = sc->sc_ah;
  1292. struct ath_common *common = ath9k_hw_common(ah);
  1293. struct ieee80211_conf *conf = &hw->conf;
  1294. ath9k_ps_wakeup(sc);
  1295. mutex_lock(&sc->mutex);
  1296. /*
  1297. * Leave this as the first check because we need to turn on the
  1298. * radio if it was disabled before prior to processing the rest
  1299. * of the changes. Likewise we must only disable the radio towards
  1300. * the end.
  1301. */
  1302. if (changed & IEEE80211_CONF_CHANGE_IDLE) {
  1303. sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
  1304. if (sc->ps_idle)
  1305. ath_cancel_work(sc);
  1306. }
  1307. /*
  1308. * We just prepare to enable PS. We have to wait until our AP has
  1309. * ACK'd our null data frame to disable RX otherwise we'll ignore
  1310. * those ACKs and end up retransmitting the same null data frames.
  1311. * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
  1312. */
  1313. if (changed & IEEE80211_CONF_CHANGE_PS) {
  1314. unsigned long flags;
  1315. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  1316. if (conf->flags & IEEE80211_CONF_PS)
  1317. ath9k_enable_ps(sc);
  1318. else
  1319. ath9k_disable_ps(sc);
  1320. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  1321. }
  1322. if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
  1323. if (conf->flags & IEEE80211_CONF_MONITOR) {
  1324. ath_dbg(common, ATH_DBG_CONFIG,
  1325. "Monitor mode is enabled\n");
  1326. sc->sc_ah->is_monitoring = true;
  1327. } else {
  1328. ath_dbg(common, ATH_DBG_CONFIG,
  1329. "Monitor mode is disabled\n");
  1330. sc->sc_ah->is_monitoring = false;
  1331. }
  1332. }
  1333. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  1334. struct ieee80211_channel *curchan = hw->conf.channel;
  1335. struct ath9k_channel old_chan;
  1336. int pos = curchan->hw_value;
  1337. int old_pos = -1;
  1338. unsigned long flags;
  1339. if (ah->curchan)
  1340. old_pos = ah->curchan - &ah->channels[0];
  1341. if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
  1342. sc->sc_flags |= SC_OP_OFFCHANNEL;
  1343. else
  1344. sc->sc_flags &= ~SC_OP_OFFCHANNEL;
  1345. ath_dbg(common, ATH_DBG_CONFIG,
  1346. "Set channel: %d MHz type: %d\n",
  1347. curchan->center_freq, conf->channel_type);
  1348. /* update survey stats for the old channel before switching */
  1349. spin_lock_irqsave(&common->cc_lock, flags);
  1350. ath_update_survey_stats(sc);
  1351. spin_unlock_irqrestore(&common->cc_lock, flags);
  1352. /*
  1353. * Preserve the current channel values, before updating
  1354. * the same channel
  1355. */
  1356. if (old_pos == pos) {
  1357. memcpy(&old_chan, &sc->sc_ah->channels[pos],
  1358. sizeof(struct ath9k_channel));
  1359. ah->curchan = &old_chan;
  1360. }
  1361. ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
  1362. curchan, conf->channel_type);
  1363. /*
  1364. * If the operating channel changes, change the survey in-use flags
  1365. * along with it.
  1366. * Reset the survey data for the new channel, unless we're switching
  1367. * back to the operating channel from an off-channel operation.
  1368. */
  1369. if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
  1370. sc->cur_survey != &sc->survey[pos]) {
  1371. if (sc->cur_survey)
  1372. sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
  1373. sc->cur_survey = &sc->survey[pos];
  1374. memset(sc->cur_survey, 0, sizeof(struct survey_info));
  1375. sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
  1376. } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
  1377. memset(&sc->survey[pos], 0, sizeof(struct survey_info));
  1378. }
  1379. if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
  1380. ath_err(common, "Unable to set channel\n");
  1381. mutex_unlock(&sc->mutex);
  1382. return -EINVAL;
  1383. }
  1384. /*
  1385. * The most recent snapshot of channel->noisefloor for the old
  1386. * channel is only available after the hardware reset. Copy it to
  1387. * the survey stats now.
  1388. */
  1389. if (old_pos >= 0)
  1390. ath_update_survey_nf(sc, old_pos);
  1391. }
  1392. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1393. ath_dbg(common, ATH_DBG_CONFIG,
  1394. "Set power: %d\n", conf->power_level);
  1395. sc->config.txpowlimit = 2 * conf->power_level;
  1396. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  1397. sc->config.txpowlimit, &sc->curtxpow);
  1398. }
  1399. mutex_unlock(&sc->mutex);
  1400. ath9k_ps_restore(sc);
  1401. return 0;
  1402. }
  1403. #define SUPPORTED_FILTERS \
  1404. (FIF_PROMISC_IN_BSS | \
  1405. FIF_ALLMULTI | \
  1406. FIF_CONTROL | \
  1407. FIF_PSPOLL | \
  1408. FIF_OTHER_BSS | \
  1409. FIF_BCN_PRBRESP_PROMISC | \
  1410. FIF_PROBE_REQ | \
  1411. FIF_FCSFAIL)
  1412. /* FIXME: sc->sc_full_reset ? */
  1413. static void ath9k_configure_filter(struct ieee80211_hw *hw,
  1414. unsigned int changed_flags,
  1415. unsigned int *total_flags,
  1416. u64 multicast)
  1417. {
  1418. struct ath_softc *sc = hw->priv;
  1419. u32 rfilt;
  1420. changed_flags &= SUPPORTED_FILTERS;
  1421. *total_flags &= SUPPORTED_FILTERS;
  1422. sc->rx.rxfilter = *total_flags;
  1423. ath9k_ps_wakeup(sc);
  1424. rfilt = ath_calcrxfilter(sc);
  1425. ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
  1426. ath9k_ps_restore(sc);
  1427. ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
  1428. "Set HW RX filter: 0x%x\n", rfilt);
  1429. }
  1430. static int ath9k_sta_add(struct ieee80211_hw *hw,
  1431. struct ieee80211_vif *vif,
  1432. struct ieee80211_sta *sta)
  1433. {
  1434. struct ath_softc *sc = hw->priv;
  1435. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1436. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1437. struct ieee80211_key_conf ps_key = { };
  1438. ath_node_attach(sc, sta, vif);
  1439. if (vif->type != NL80211_IFTYPE_AP &&
  1440. vif->type != NL80211_IFTYPE_AP_VLAN)
  1441. return 0;
  1442. an->ps_key = ath_key_config(common, vif, sta, &ps_key);
  1443. return 0;
  1444. }
  1445. static void ath9k_del_ps_key(struct ath_softc *sc,
  1446. struct ieee80211_vif *vif,
  1447. struct ieee80211_sta *sta)
  1448. {
  1449. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1450. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1451. struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
  1452. if (!an->ps_key)
  1453. return;
  1454. ath_key_delete(common, &ps_key);
  1455. }
  1456. static int ath9k_sta_remove(struct ieee80211_hw *hw,
  1457. struct ieee80211_vif *vif,
  1458. struct ieee80211_sta *sta)
  1459. {
  1460. struct ath_softc *sc = hw->priv;
  1461. ath9k_del_ps_key(sc, vif, sta);
  1462. ath_node_detach(sc, sta);
  1463. return 0;
  1464. }
  1465. static void ath9k_sta_notify(struct ieee80211_hw *hw,
  1466. struct ieee80211_vif *vif,
  1467. enum sta_notify_cmd cmd,
  1468. struct ieee80211_sta *sta)
  1469. {
  1470. struct ath_softc *sc = hw->priv;
  1471. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1472. switch (cmd) {
  1473. case STA_NOTIFY_SLEEP:
  1474. an->sleeping = true;
  1475. ath_tx_aggr_sleep(sta, sc, an);
  1476. break;
  1477. case STA_NOTIFY_AWAKE:
  1478. an->sleeping = false;
  1479. ath_tx_aggr_wakeup(sc, an);
  1480. break;
  1481. }
  1482. }
  1483. static int ath9k_conf_tx(struct ieee80211_hw *hw,
  1484. struct ieee80211_vif *vif, u16 queue,
  1485. const struct ieee80211_tx_queue_params *params)
  1486. {
  1487. struct ath_softc *sc = hw->priv;
  1488. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1489. struct ath_txq *txq;
  1490. struct ath9k_tx_queue_info qi;
  1491. int ret = 0;
  1492. if (queue >= WME_NUM_AC)
  1493. return 0;
  1494. txq = sc->tx.txq_map[queue];
  1495. ath9k_ps_wakeup(sc);
  1496. mutex_lock(&sc->mutex);
  1497. memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
  1498. qi.tqi_aifs = params->aifs;
  1499. qi.tqi_cwmin = params->cw_min;
  1500. qi.tqi_cwmax = params->cw_max;
  1501. qi.tqi_burstTime = params->txop;
  1502. ath_dbg(common, ATH_DBG_CONFIG,
  1503. "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
  1504. queue, txq->axq_qnum, params->aifs, params->cw_min,
  1505. params->cw_max, params->txop);
  1506. ret = ath_txq_update(sc, txq->axq_qnum, &qi);
  1507. if (ret)
  1508. ath_err(common, "TXQ Update failed\n");
  1509. if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
  1510. if (queue == WME_AC_BE && !ret)
  1511. ath_beaconq_config(sc);
  1512. mutex_unlock(&sc->mutex);
  1513. ath9k_ps_restore(sc);
  1514. return ret;
  1515. }
  1516. static int ath9k_set_key(struct ieee80211_hw *hw,
  1517. enum set_key_cmd cmd,
  1518. struct ieee80211_vif *vif,
  1519. struct ieee80211_sta *sta,
  1520. struct ieee80211_key_conf *key)
  1521. {
  1522. struct ath_softc *sc = hw->priv;
  1523. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1524. int ret = 0;
  1525. if (ath9k_modparam_nohwcrypt)
  1526. return -ENOSPC;
  1527. if (vif->type == NL80211_IFTYPE_ADHOC &&
  1528. (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
  1529. key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
  1530. !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
  1531. /*
  1532. * For now, disable hw crypto for the RSN IBSS group keys. This
  1533. * could be optimized in the future to use a modified key cache
  1534. * design to support per-STA RX GTK, but until that gets
  1535. * implemented, use of software crypto for group addressed
  1536. * frames is a acceptable to allow RSN IBSS to be used.
  1537. */
  1538. return -EOPNOTSUPP;
  1539. }
  1540. mutex_lock(&sc->mutex);
  1541. ath9k_ps_wakeup(sc);
  1542. ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
  1543. switch (cmd) {
  1544. case SET_KEY:
  1545. if (sta)
  1546. ath9k_del_ps_key(sc, vif, sta);
  1547. ret = ath_key_config(common, vif, sta, key);
  1548. if (ret >= 0) {
  1549. key->hw_key_idx = ret;
  1550. /* push IV and Michael MIC generation to stack */
  1551. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1552. if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
  1553. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  1554. if (sc->sc_ah->sw_mgmt_crypto &&
  1555. key->cipher == WLAN_CIPHER_SUITE_CCMP)
  1556. key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
  1557. ret = 0;
  1558. }
  1559. break;
  1560. case DISABLE_KEY:
  1561. ath_key_delete(common, key);
  1562. break;
  1563. default:
  1564. ret = -EINVAL;
  1565. }
  1566. ath9k_ps_restore(sc);
  1567. mutex_unlock(&sc->mutex);
  1568. return ret;
  1569. }
  1570. static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  1571. {
  1572. struct ath_softc *sc = data;
  1573. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1574. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1575. struct ath_vif *avp = (void *)vif->drv_priv;
  1576. /*
  1577. * Skip iteration if primary station vif's bss info
  1578. * was not changed
  1579. */
  1580. if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
  1581. return;
  1582. if (bss_conf->assoc) {
  1583. sc->sc_flags |= SC_OP_PRIM_STA_VIF;
  1584. avp->primary_sta_vif = true;
  1585. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1586. common->curaid = bss_conf->aid;
  1587. ath9k_hw_write_associd(sc->sc_ah);
  1588. ath_dbg(common, ATH_DBG_CONFIG,
  1589. "Bss Info ASSOC %d, bssid: %pM\n",
  1590. bss_conf->aid, common->curbssid);
  1591. ath_beacon_config(sc, vif);
  1592. /*
  1593. * Request a re-configuration of Beacon related timers
  1594. * on the receipt of the first Beacon frame (i.e.,
  1595. * after time sync with the AP).
  1596. */
  1597. sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
  1598. /* Reset rssi stats */
  1599. sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
  1600. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1601. if (!common->disable_ani) {
  1602. sc->sc_flags |= SC_OP_ANI_RUN;
  1603. ath_start_ani(common);
  1604. }
  1605. }
  1606. }
  1607. static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
  1608. {
  1609. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1610. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1611. struct ath_vif *avp = (void *)vif->drv_priv;
  1612. if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
  1613. return;
  1614. /* Reconfigure bss info */
  1615. if (avp->primary_sta_vif && !bss_conf->assoc) {
  1616. ath_dbg(common, ATH_DBG_CONFIG,
  1617. "Bss Info DISASSOC %d, bssid %pM\n",
  1618. common->curaid, common->curbssid);
  1619. sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
  1620. avp->primary_sta_vif = false;
  1621. memset(common->curbssid, 0, ETH_ALEN);
  1622. common->curaid = 0;
  1623. }
  1624. ieee80211_iterate_active_interfaces_atomic(
  1625. sc->hw, ath9k_bss_iter, sc);
  1626. /*
  1627. * None of station vifs are associated.
  1628. * Clear bssid & aid
  1629. */
  1630. if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
  1631. ath9k_hw_write_associd(sc->sc_ah);
  1632. /* Stop ANI */
  1633. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1634. del_timer_sync(&common->ani.timer);
  1635. memset(&sc->caldata, 0, sizeof(sc->caldata));
  1636. }
  1637. }
  1638. static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
  1639. struct ieee80211_vif *vif,
  1640. struct ieee80211_bss_conf *bss_conf,
  1641. u32 changed)
  1642. {
  1643. struct ath_softc *sc = hw->priv;
  1644. struct ath_hw *ah = sc->sc_ah;
  1645. struct ath_common *common = ath9k_hw_common(ah);
  1646. struct ath_vif *avp = (void *)vif->drv_priv;
  1647. int slottime;
  1648. int error;
  1649. ath9k_ps_wakeup(sc);
  1650. mutex_lock(&sc->mutex);
  1651. if (changed & BSS_CHANGED_BSSID) {
  1652. ath9k_config_bss(sc, vif);
  1653. ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
  1654. common->curbssid, common->curaid);
  1655. }
  1656. if (changed & BSS_CHANGED_IBSS) {
  1657. /* There can be only one vif available */
  1658. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1659. common->curaid = bss_conf->aid;
  1660. ath9k_hw_write_associd(sc->sc_ah);
  1661. if (bss_conf->ibss_joined) {
  1662. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1663. if (!common->disable_ani) {
  1664. sc->sc_flags |= SC_OP_ANI_RUN;
  1665. ath_start_ani(common);
  1666. }
  1667. } else {
  1668. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1669. del_timer_sync(&common->ani.timer);
  1670. }
  1671. }
  1672. /* Enable transmission of beacons (AP, IBSS, MESH) */
  1673. if ((changed & BSS_CHANGED_BEACON) ||
  1674. ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
  1675. ath9k_set_beaconing_status(sc, false);
  1676. error = ath_beacon_alloc(sc, vif);
  1677. if (!error)
  1678. ath_beacon_config(sc, vif);
  1679. ath9k_set_beaconing_status(sc, true);
  1680. }
  1681. if (changed & BSS_CHANGED_ERP_SLOT) {
  1682. if (bss_conf->use_short_slot)
  1683. slottime = 9;
  1684. else
  1685. slottime = 20;
  1686. if (vif->type == NL80211_IFTYPE_AP) {
  1687. /*
  1688. * Defer update, so that connected stations can adjust
  1689. * their settings at the same time.
  1690. * See beacon.c for more details
  1691. */
  1692. sc->beacon.slottime = slottime;
  1693. sc->beacon.updateslot = UPDATE;
  1694. } else {
  1695. ah->slottime = slottime;
  1696. ath9k_hw_init_global_settings(ah);
  1697. }
  1698. }
  1699. /* Disable transmission of beacons */
  1700. if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
  1701. !bss_conf->enable_beacon) {
  1702. ath9k_set_beaconing_status(sc, false);
  1703. avp->is_bslot_active = false;
  1704. ath9k_set_beaconing_status(sc, true);
  1705. }
  1706. if (changed & BSS_CHANGED_BEACON_INT) {
  1707. /*
  1708. * In case of AP mode, the HW TSF has to be reset
  1709. * when the beacon interval changes.
  1710. */
  1711. if (vif->type == NL80211_IFTYPE_AP) {
  1712. sc->sc_flags |= SC_OP_TSF_RESET;
  1713. ath9k_set_beaconing_status(sc, false);
  1714. error = ath_beacon_alloc(sc, vif);
  1715. if (!error)
  1716. ath_beacon_config(sc, vif);
  1717. ath9k_set_beaconing_status(sc, true);
  1718. } else
  1719. ath_beacon_config(sc, vif);
  1720. }
  1721. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  1722. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
  1723. bss_conf->use_short_preamble);
  1724. if (bss_conf->use_short_preamble)
  1725. sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
  1726. else
  1727. sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
  1728. }
  1729. if (changed & BSS_CHANGED_ERP_CTS_PROT) {
  1730. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
  1731. bss_conf->use_cts_prot);
  1732. if (bss_conf->use_cts_prot &&
  1733. hw->conf.channel->band != IEEE80211_BAND_5GHZ)
  1734. sc->sc_flags |= SC_OP_PROTECT_ENABLE;
  1735. else
  1736. sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
  1737. }
  1738. mutex_unlock(&sc->mutex);
  1739. ath9k_ps_restore(sc);
  1740. }
  1741. static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  1742. {
  1743. struct ath_softc *sc = hw->priv;
  1744. u64 tsf;
  1745. mutex_lock(&sc->mutex);
  1746. ath9k_ps_wakeup(sc);
  1747. tsf = ath9k_hw_gettsf64(sc->sc_ah);
  1748. ath9k_ps_restore(sc);
  1749. mutex_unlock(&sc->mutex);
  1750. return tsf;
  1751. }
  1752. static void ath9k_set_tsf(struct ieee80211_hw *hw,
  1753. struct ieee80211_vif *vif,
  1754. u64 tsf)
  1755. {
  1756. struct ath_softc *sc = hw->priv;
  1757. mutex_lock(&sc->mutex);
  1758. ath9k_ps_wakeup(sc);
  1759. ath9k_hw_settsf64(sc->sc_ah, tsf);
  1760. ath9k_ps_restore(sc);
  1761. mutex_unlock(&sc->mutex);
  1762. }
  1763. static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  1764. {
  1765. struct ath_softc *sc = hw->priv;
  1766. mutex_lock(&sc->mutex);
  1767. ath9k_ps_wakeup(sc);
  1768. ath9k_hw_reset_tsf(sc->sc_ah);
  1769. ath9k_ps_restore(sc);
  1770. mutex_unlock(&sc->mutex);
  1771. }
  1772. static int ath9k_ampdu_action(struct ieee80211_hw *hw,
  1773. struct ieee80211_vif *vif,
  1774. enum ieee80211_ampdu_mlme_action action,
  1775. struct ieee80211_sta *sta,
  1776. u16 tid, u16 *ssn, u8 buf_size)
  1777. {
  1778. struct ath_softc *sc = hw->priv;
  1779. int ret = 0;
  1780. local_bh_disable();
  1781. switch (action) {
  1782. case IEEE80211_AMPDU_RX_START:
  1783. if (!(sc->sc_flags & SC_OP_RXAGGR))
  1784. ret = -ENOTSUPP;
  1785. break;
  1786. case IEEE80211_AMPDU_RX_STOP:
  1787. break;
  1788. case IEEE80211_AMPDU_TX_START:
  1789. if (!(sc->sc_flags & SC_OP_TXAGGR))
  1790. return -EOPNOTSUPP;
  1791. ath9k_ps_wakeup(sc);
  1792. ret = ath_tx_aggr_start(sc, sta, tid, ssn);
  1793. if (!ret)
  1794. ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1795. ath9k_ps_restore(sc);
  1796. break;
  1797. case IEEE80211_AMPDU_TX_STOP:
  1798. ath9k_ps_wakeup(sc);
  1799. ath_tx_aggr_stop(sc, sta, tid);
  1800. ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1801. ath9k_ps_restore(sc);
  1802. break;
  1803. case IEEE80211_AMPDU_TX_OPERATIONAL:
  1804. ath9k_ps_wakeup(sc);
  1805. ath_tx_aggr_resume(sc, sta, tid);
  1806. ath9k_ps_restore(sc);
  1807. break;
  1808. default:
  1809. ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
  1810. }
  1811. local_bh_enable();
  1812. return ret;
  1813. }
  1814. static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
  1815. struct survey_info *survey)
  1816. {
  1817. struct ath_softc *sc = hw->priv;
  1818. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1819. struct ieee80211_supported_band *sband;
  1820. struct ieee80211_channel *chan;
  1821. unsigned long flags;
  1822. int pos;
  1823. spin_lock_irqsave(&common->cc_lock, flags);
  1824. if (idx == 0)
  1825. ath_update_survey_stats(sc);
  1826. sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
  1827. if (sband && idx >= sband->n_channels) {
  1828. idx -= sband->n_channels;
  1829. sband = NULL;
  1830. }
  1831. if (!sband)
  1832. sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
  1833. if (!sband || idx >= sband->n_channels) {
  1834. spin_unlock_irqrestore(&common->cc_lock, flags);
  1835. return -ENOENT;
  1836. }
  1837. chan = &sband->channels[idx];
  1838. pos = chan->hw_value;
  1839. memcpy(survey, &sc->survey[pos], sizeof(*survey));
  1840. survey->channel = chan;
  1841. spin_unlock_irqrestore(&common->cc_lock, flags);
  1842. return 0;
  1843. }
  1844. static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
  1845. {
  1846. struct ath_softc *sc = hw->priv;
  1847. struct ath_hw *ah = sc->sc_ah;
  1848. mutex_lock(&sc->mutex);
  1849. ah->coverage_class = coverage_class;
  1850. ath9k_ps_wakeup(sc);
  1851. ath9k_hw_init_global_settings(ah);
  1852. ath9k_ps_restore(sc);
  1853. mutex_unlock(&sc->mutex);
  1854. }
  1855. static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
  1856. {
  1857. struct ath_softc *sc = hw->priv;
  1858. struct ath_hw *ah = sc->sc_ah;
  1859. struct ath_common *common = ath9k_hw_common(ah);
  1860. int timeout = 200; /* ms */
  1861. int i, j;
  1862. bool drain_txq;
  1863. mutex_lock(&sc->mutex);
  1864. cancel_delayed_work_sync(&sc->tx_complete_work);
  1865. if (ah->ah_flags & AH_UNPLUGGED) {
  1866. ath_dbg(common, ATH_DBG_ANY, "Device has been unplugged!\n");
  1867. mutex_unlock(&sc->mutex);
  1868. return;
  1869. }
  1870. if (sc->sc_flags & SC_OP_INVALID) {
  1871. ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
  1872. mutex_unlock(&sc->mutex);
  1873. return;
  1874. }
  1875. for (j = 0; j < timeout; j++) {
  1876. bool npend = false;
  1877. if (j)
  1878. usleep_range(1000, 2000);
  1879. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  1880. if (!ATH_TXQ_SETUP(sc, i))
  1881. continue;
  1882. npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
  1883. if (npend)
  1884. break;
  1885. }
  1886. if (!npend)
  1887. break;
  1888. }
  1889. if (drop) {
  1890. ath9k_ps_wakeup(sc);
  1891. spin_lock_bh(&sc->sc_pcu_lock);
  1892. drain_txq = ath_drain_all_txq(sc, false);
  1893. spin_unlock_bh(&sc->sc_pcu_lock);
  1894. if (!drain_txq)
  1895. ath_reset(sc, false);
  1896. ath9k_ps_restore(sc);
  1897. ieee80211_wake_queues(hw);
  1898. }
  1899. ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
  1900. mutex_unlock(&sc->mutex);
  1901. }
  1902. static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
  1903. {
  1904. struct ath_softc *sc = hw->priv;
  1905. int i;
  1906. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  1907. if (!ATH_TXQ_SETUP(sc, i))
  1908. continue;
  1909. if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
  1910. return true;
  1911. }
  1912. return false;
  1913. }
  1914. static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
  1915. {
  1916. struct ath_softc *sc = hw->priv;
  1917. struct ath_hw *ah = sc->sc_ah;
  1918. struct ieee80211_vif *vif;
  1919. struct ath_vif *avp;
  1920. struct ath_buf *bf;
  1921. struct ath_tx_status ts;
  1922. int status;
  1923. vif = sc->beacon.bslot[0];
  1924. if (!vif)
  1925. return 0;
  1926. avp = (void *)vif->drv_priv;
  1927. if (!avp->is_bslot_active)
  1928. return 0;
  1929. if (!sc->beacon.tx_processed) {
  1930. tasklet_disable(&sc->bcon_tasklet);
  1931. bf = avp->av_bcbuf;
  1932. if (!bf || !bf->bf_mpdu)
  1933. goto skip;
  1934. status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
  1935. if (status == -EINPROGRESS)
  1936. goto skip;
  1937. sc->beacon.tx_processed = true;
  1938. sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
  1939. skip:
  1940. tasklet_enable(&sc->bcon_tasklet);
  1941. }
  1942. return sc->beacon.tx_last;
  1943. }
  1944. static int ath9k_get_stats(struct ieee80211_hw *hw,
  1945. struct ieee80211_low_level_stats *stats)
  1946. {
  1947. struct ath_softc *sc = hw->priv;
  1948. struct ath_hw *ah = sc->sc_ah;
  1949. struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
  1950. stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
  1951. stats->dot11RTSFailureCount = mib_stats->rts_bad;
  1952. stats->dot11FCSErrorCount = mib_stats->fcs_bad;
  1953. stats->dot11RTSSuccessCount = mib_stats->rts_good;
  1954. return 0;
  1955. }
  1956. static u32 fill_chainmask(u32 cap, u32 new)
  1957. {
  1958. u32 filled = 0;
  1959. int i;
  1960. for (i = 0; cap && new; i++, cap >>= 1) {
  1961. if (!(cap & BIT(0)))
  1962. continue;
  1963. if (new & BIT(0))
  1964. filled |= BIT(i);
  1965. new >>= 1;
  1966. }
  1967. return filled;
  1968. }
  1969. static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
  1970. {
  1971. struct ath_softc *sc = hw->priv;
  1972. struct ath_hw *ah = sc->sc_ah;
  1973. if (!rx_ant || !tx_ant)
  1974. return -EINVAL;
  1975. sc->ant_rx = rx_ant;
  1976. sc->ant_tx = tx_ant;
  1977. if (ah->caps.rx_chainmask == 1)
  1978. return 0;
  1979. /* AR9100 runs into calibration issues if not all rx chains are enabled */
  1980. if (AR_SREV_9100(ah))
  1981. ah->rxchainmask = 0x7;
  1982. else
  1983. ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
  1984. ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
  1985. ath9k_reload_chainmask_settings(sc);
  1986. return 0;
  1987. }
  1988. static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
  1989. {
  1990. struct ath_softc *sc = hw->priv;
  1991. *tx_ant = sc->ant_tx;
  1992. *rx_ant = sc->ant_rx;
  1993. return 0;
  1994. }
  1995. struct ieee80211_ops ath9k_ops = {
  1996. .tx = ath9k_tx,
  1997. .start = ath9k_start,
  1998. .stop = ath9k_stop,
  1999. .add_interface = ath9k_add_interface,
  2000. .change_interface = ath9k_change_interface,
  2001. .remove_interface = ath9k_remove_interface,
  2002. .config = ath9k_config,
  2003. .configure_filter = ath9k_configure_filter,
  2004. .sta_add = ath9k_sta_add,
  2005. .sta_remove = ath9k_sta_remove,
  2006. .sta_notify = ath9k_sta_notify,
  2007. .conf_tx = ath9k_conf_tx,
  2008. .bss_info_changed = ath9k_bss_info_changed,
  2009. .set_key = ath9k_set_key,
  2010. .get_tsf = ath9k_get_tsf,
  2011. .set_tsf = ath9k_set_tsf,
  2012. .reset_tsf = ath9k_reset_tsf,
  2013. .ampdu_action = ath9k_ampdu_action,
  2014. .get_survey = ath9k_get_survey,
  2015. .rfkill_poll = ath9k_rfkill_poll_state,
  2016. .set_coverage_class = ath9k_set_coverage_class,
  2017. .flush = ath9k_flush,
  2018. .tx_frames_pending = ath9k_tx_frames_pending,
  2019. .tx_last_beacon = ath9k_tx_last_beacon,
  2020. .get_stats = ath9k_get_stats,
  2021. .set_antenna = ath9k_set_antenna,
  2022. .get_antenna = ath9k_get_antenna,
  2023. };