sdio.c 26 KB

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  1. /*
  2. * Copyright (c) 2004-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/module.h>
  17. #include <linux/mmc/card.h>
  18. #include <linux/mmc/mmc.h>
  19. #include <linux/mmc/host.h>
  20. #include <linux/mmc/sdio_func.h>
  21. #include <linux/mmc/sdio_ids.h>
  22. #include <linux/mmc/sdio.h>
  23. #include <linux/mmc/sd.h>
  24. #include "hif.h"
  25. #include "hif-ops.h"
  26. #include "target.h"
  27. #include "debug.h"
  28. #include "cfg80211.h"
  29. struct ath6kl_sdio {
  30. struct sdio_func *func;
  31. spinlock_t lock;
  32. /* free list */
  33. struct list_head bus_req_freeq;
  34. /* available bus requests */
  35. struct bus_request bus_req[BUS_REQUEST_MAX_NUM];
  36. struct ath6kl *ar;
  37. u8 *dma_buffer;
  38. /* scatter request list head */
  39. struct list_head scat_req;
  40. spinlock_t scat_lock;
  41. bool scatter_enabled;
  42. bool is_disabled;
  43. atomic_t irq_handling;
  44. const struct sdio_device_id *id;
  45. struct work_struct wr_async_work;
  46. struct list_head wr_asyncq;
  47. spinlock_t wr_async_lock;
  48. };
  49. #define CMD53_ARG_READ 0
  50. #define CMD53_ARG_WRITE 1
  51. #define CMD53_ARG_BLOCK_BASIS 1
  52. #define CMD53_ARG_FIXED_ADDRESS 0
  53. #define CMD53_ARG_INCR_ADDRESS 1
  54. static inline struct ath6kl_sdio *ath6kl_sdio_priv(struct ath6kl *ar)
  55. {
  56. return ar->hif_priv;
  57. }
  58. /*
  59. * Macro to check if DMA buffer is WORD-aligned and DMA-able.
  60. * Most host controllers assume the buffer is DMA'able and will
  61. * bug-check otherwise (i.e. buffers on the stack). virt_addr_valid
  62. * check fails on stack memory.
  63. */
  64. static inline bool buf_needs_bounce(u8 *buf)
  65. {
  66. return ((unsigned long) buf & 0x3) || !virt_addr_valid(buf);
  67. }
  68. static void ath6kl_sdio_set_mbox_info(struct ath6kl *ar)
  69. {
  70. struct ath6kl_mbox_info *mbox_info = &ar->mbox_info;
  71. /* EP1 has an extended range */
  72. mbox_info->htc_addr = HIF_MBOX_BASE_ADDR;
  73. mbox_info->htc_ext_addr = HIF_MBOX0_EXT_BASE_ADDR;
  74. mbox_info->htc_ext_sz = HIF_MBOX0_EXT_WIDTH;
  75. mbox_info->block_size = HIF_MBOX_BLOCK_SIZE;
  76. mbox_info->gmbox_addr = HIF_GMBOX_BASE_ADDR;
  77. mbox_info->gmbox_sz = HIF_GMBOX_WIDTH;
  78. }
  79. static inline void ath6kl_sdio_set_cmd53_arg(u32 *arg, u8 rw, u8 func,
  80. u8 mode, u8 opcode, u32 addr,
  81. u16 blksz)
  82. {
  83. *arg = (((rw & 1) << 31) |
  84. ((func & 0x7) << 28) |
  85. ((mode & 1) << 27) |
  86. ((opcode & 1) << 26) |
  87. ((addr & 0x1FFFF) << 9) |
  88. (blksz & 0x1FF));
  89. }
  90. static inline void ath6kl_sdio_set_cmd52_arg(u32 *arg, u8 write, u8 raw,
  91. unsigned int address,
  92. unsigned char val)
  93. {
  94. const u8 func = 0;
  95. *arg = ((write & 1) << 31) |
  96. ((func & 0x7) << 28) |
  97. ((raw & 1) << 27) |
  98. (1 << 26) |
  99. ((address & 0x1FFFF) << 9) |
  100. (1 << 8) |
  101. (val & 0xFF);
  102. }
  103. static int ath6kl_sdio_func0_cmd52_wr_byte(struct mmc_card *card,
  104. unsigned int address,
  105. unsigned char byte)
  106. {
  107. struct mmc_command io_cmd;
  108. memset(&io_cmd, 0, sizeof(io_cmd));
  109. ath6kl_sdio_set_cmd52_arg(&io_cmd.arg, 1, 0, address, byte);
  110. io_cmd.opcode = SD_IO_RW_DIRECT;
  111. io_cmd.flags = MMC_RSP_R5 | MMC_CMD_AC;
  112. return mmc_wait_for_cmd(card->host, &io_cmd, 0);
  113. }
  114. static int ath6kl_sdio_io(struct sdio_func *func, u32 request, u32 addr,
  115. u8 *buf, u32 len)
  116. {
  117. int ret = 0;
  118. sdio_claim_host(func);
  119. if (request & HIF_WRITE) {
  120. /* FIXME: looks like ugly workaround for something */
  121. if (addr >= HIF_MBOX_BASE_ADDR &&
  122. addr <= HIF_MBOX_END_ADDR)
  123. addr += (HIF_MBOX_WIDTH - len);
  124. /* FIXME: this also looks like ugly workaround */
  125. if (addr == HIF_MBOX0_EXT_BASE_ADDR)
  126. addr += HIF_MBOX0_EXT_WIDTH - len;
  127. if (request & HIF_FIXED_ADDRESS)
  128. ret = sdio_writesb(func, addr, buf, len);
  129. else
  130. ret = sdio_memcpy_toio(func, addr, buf, len);
  131. } else {
  132. if (request & HIF_FIXED_ADDRESS)
  133. ret = sdio_readsb(func, buf, addr, len);
  134. else
  135. ret = sdio_memcpy_fromio(func, buf, addr, len);
  136. }
  137. sdio_release_host(func);
  138. ath6kl_dbg(ATH6KL_DBG_SDIO, "%s addr 0x%x%s buf 0x%p len %d\n",
  139. request & HIF_WRITE ? "wr" : "rd", addr,
  140. request & HIF_FIXED_ADDRESS ? " (fixed)" : "", buf, len);
  141. ath6kl_dbg_dump(ATH6KL_DBG_SDIO_DUMP, NULL, "sdio ", buf, len);
  142. return ret;
  143. }
  144. static struct bus_request *ath6kl_sdio_alloc_busreq(struct ath6kl_sdio *ar_sdio)
  145. {
  146. struct bus_request *bus_req;
  147. spin_lock_bh(&ar_sdio->lock);
  148. if (list_empty(&ar_sdio->bus_req_freeq)) {
  149. spin_unlock_bh(&ar_sdio->lock);
  150. return NULL;
  151. }
  152. bus_req = list_first_entry(&ar_sdio->bus_req_freeq,
  153. struct bus_request, list);
  154. list_del(&bus_req->list);
  155. spin_unlock_bh(&ar_sdio->lock);
  156. ath6kl_dbg(ATH6KL_DBG_SCATTER, "%s: bus request 0x%p\n",
  157. __func__, bus_req);
  158. return bus_req;
  159. }
  160. static void ath6kl_sdio_free_bus_req(struct ath6kl_sdio *ar_sdio,
  161. struct bus_request *bus_req)
  162. {
  163. ath6kl_dbg(ATH6KL_DBG_SCATTER, "%s: bus request 0x%p\n",
  164. __func__, bus_req);
  165. spin_lock_bh(&ar_sdio->lock);
  166. list_add_tail(&bus_req->list, &ar_sdio->bus_req_freeq);
  167. spin_unlock_bh(&ar_sdio->lock);
  168. }
  169. static void ath6kl_sdio_setup_scat_data(struct hif_scatter_req *scat_req,
  170. struct mmc_data *data)
  171. {
  172. struct scatterlist *sg;
  173. int i;
  174. data->blksz = HIF_MBOX_BLOCK_SIZE;
  175. data->blocks = scat_req->len / HIF_MBOX_BLOCK_SIZE;
  176. ath6kl_dbg(ATH6KL_DBG_SCATTER,
  177. "hif-scatter: (%s) addr: 0x%X, (block len: %d, block count: %d) , (tot:%d,sg:%d)\n",
  178. (scat_req->req & HIF_WRITE) ? "WR" : "RD", scat_req->addr,
  179. data->blksz, data->blocks, scat_req->len,
  180. scat_req->scat_entries);
  181. data->flags = (scat_req->req & HIF_WRITE) ? MMC_DATA_WRITE :
  182. MMC_DATA_READ;
  183. /* fill SG entries */
  184. sg = scat_req->sgentries;
  185. sg_init_table(sg, scat_req->scat_entries);
  186. /* assemble SG list */
  187. for (i = 0; i < scat_req->scat_entries; i++, sg++) {
  188. ath6kl_dbg(ATH6KL_DBG_SCATTER, "%d: addr:0x%p, len:%d\n",
  189. i, scat_req->scat_list[i].buf,
  190. scat_req->scat_list[i].len);
  191. sg_set_buf(sg, scat_req->scat_list[i].buf,
  192. scat_req->scat_list[i].len);
  193. }
  194. /* set scatter-gather table for request */
  195. data->sg = scat_req->sgentries;
  196. data->sg_len = scat_req->scat_entries;
  197. }
  198. static int ath6kl_sdio_scat_rw(struct ath6kl_sdio *ar_sdio,
  199. struct bus_request *req)
  200. {
  201. struct mmc_request mmc_req;
  202. struct mmc_command cmd;
  203. struct mmc_data data;
  204. struct hif_scatter_req *scat_req;
  205. u8 opcode, rw;
  206. int status, len;
  207. scat_req = req->scat_req;
  208. if (scat_req->virt_scat) {
  209. len = scat_req->len;
  210. if (scat_req->req & HIF_BLOCK_BASIS)
  211. len = round_down(len, HIF_MBOX_BLOCK_SIZE);
  212. status = ath6kl_sdio_io(ar_sdio->func, scat_req->req,
  213. scat_req->addr, scat_req->virt_dma_buf,
  214. len);
  215. goto scat_complete;
  216. }
  217. memset(&mmc_req, 0, sizeof(struct mmc_request));
  218. memset(&cmd, 0, sizeof(struct mmc_command));
  219. memset(&data, 0, sizeof(struct mmc_data));
  220. ath6kl_sdio_setup_scat_data(scat_req, &data);
  221. opcode = (scat_req->req & HIF_FIXED_ADDRESS) ?
  222. CMD53_ARG_FIXED_ADDRESS : CMD53_ARG_INCR_ADDRESS;
  223. rw = (scat_req->req & HIF_WRITE) ? CMD53_ARG_WRITE : CMD53_ARG_READ;
  224. /* Fixup the address so that the last byte will fall on MBOX EOM */
  225. if (scat_req->req & HIF_WRITE) {
  226. if (scat_req->addr == HIF_MBOX_BASE_ADDR)
  227. scat_req->addr += HIF_MBOX_WIDTH - scat_req->len;
  228. else
  229. /* Uses extended address range */
  230. scat_req->addr += HIF_MBOX0_EXT_WIDTH - scat_req->len;
  231. }
  232. /* set command argument */
  233. ath6kl_sdio_set_cmd53_arg(&cmd.arg, rw, ar_sdio->func->num,
  234. CMD53_ARG_BLOCK_BASIS, opcode, scat_req->addr,
  235. data.blocks);
  236. cmd.opcode = SD_IO_RW_EXTENDED;
  237. cmd.flags = MMC_RSP_SPI_R5 | MMC_RSP_R5 | MMC_CMD_ADTC;
  238. mmc_req.cmd = &cmd;
  239. mmc_req.data = &data;
  240. sdio_claim_host(ar_sdio->func);
  241. mmc_set_data_timeout(&data, ar_sdio->func->card);
  242. /* synchronous call to process request */
  243. mmc_wait_for_req(ar_sdio->func->card->host, &mmc_req);
  244. sdio_release_host(ar_sdio->func);
  245. status = cmd.error ? cmd.error : data.error;
  246. scat_complete:
  247. scat_req->status = status;
  248. if (scat_req->status)
  249. ath6kl_err("Scatter write request failed:%d\n",
  250. scat_req->status);
  251. if (scat_req->req & HIF_ASYNCHRONOUS)
  252. scat_req->complete(ar_sdio->ar->htc_target, scat_req);
  253. return status;
  254. }
  255. static int ath6kl_sdio_alloc_prep_scat_req(struct ath6kl_sdio *ar_sdio,
  256. int n_scat_entry, int n_scat_req,
  257. bool virt_scat)
  258. {
  259. struct hif_scatter_req *s_req;
  260. struct bus_request *bus_req;
  261. int i, scat_req_sz, scat_list_sz, sg_sz, buf_sz;
  262. u8 *virt_buf;
  263. scat_list_sz = (n_scat_entry - 1) * sizeof(struct hif_scatter_item);
  264. scat_req_sz = sizeof(*s_req) + scat_list_sz;
  265. if (!virt_scat)
  266. sg_sz = sizeof(struct scatterlist) * n_scat_entry;
  267. else
  268. buf_sz = 2 * L1_CACHE_BYTES +
  269. ATH6KL_MAX_TRANSFER_SIZE_PER_SCATTER;
  270. for (i = 0; i < n_scat_req; i++) {
  271. /* allocate the scatter request */
  272. s_req = kzalloc(scat_req_sz, GFP_KERNEL);
  273. if (!s_req)
  274. return -ENOMEM;
  275. if (virt_scat) {
  276. virt_buf = kzalloc(buf_sz, GFP_KERNEL);
  277. if (!virt_buf) {
  278. kfree(s_req);
  279. return -ENOMEM;
  280. }
  281. s_req->virt_dma_buf =
  282. (u8 *)L1_CACHE_ALIGN((unsigned long)virt_buf);
  283. } else {
  284. /* allocate sglist */
  285. s_req->sgentries = kzalloc(sg_sz, GFP_KERNEL);
  286. if (!s_req->sgentries) {
  287. kfree(s_req);
  288. return -ENOMEM;
  289. }
  290. }
  291. /* allocate a bus request for this scatter request */
  292. bus_req = ath6kl_sdio_alloc_busreq(ar_sdio);
  293. if (!bus_req) {
  294. kfree(s_req->sgentries);
  295. kfree(s_req->virt_dma_buf);
  296. kfree(s_req);
  297. return -ENOMEM;
  298. }
  299. /* assign the scatter request to this bus request */
  300. bus_req->scat_req = s_req;
  301. s_req->busrequest = bus_req;
  302. s_req->virt_scat = virt_scat;
  303. /* add it to the scatter pool */
  304. hif_scatter_req_add(ar_sdio->ar, s_req);
  305. }
  306. return 0;
  307. }
  308. static int ath6kl_sdio_read_write_sync(struct ath6kl *ar, u32 addr, u8 *buf,
  309. u32 len, u32 request)
  310. {
  311. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  312. u8 *tbuf = NULL;
  313. int ret;
  314. bool bounced = false;
  315. if (request & HIF_BLOCK_BASIS)
  316. len = round_down(len, HIF_MBOX_BLOCK_SIZE);
  317. if (buf_needs_bounce(buf)) {
  318. if (!ar_sdio->dma_buffer)
  319. return -ENOMEM;
  320. tbuf = ar_sdio->dma_buffer;
  321. memcpy(tbuf, buf, len);
  322. bounced = true;
  323. } else
  324. tbuf = buf;
  325. ret = ath6kl_sdio_io(ar_sdio->func, request, addr, tbuf, len);
  326. if ((request & HIF_READ) && bounced)
  327. memcpy(buf, tbuf, len);
  328. return ret;
  329. }
  330. static void __ath6kl_sdio_write_async(struct ath6kl_sdio *ar_sdio,
  331. struct bus_request *req)
  332. {
  333. if (req->scat_req)
  334. ath6kl_sdio_scat_rw(ar_sdio, req);
  335. else {
  336. void *context;
  337. int status;
  338. status = ath6kl_sdio_read_write_sync(ar_sdio->ar, req->address,
  339. req->buffer, req->length,
  340. req->request);
  341. context = req->packet;
  342. ath6kl_sdio_free_bus_req(ar_sdio, req);
  343. ath6kl_hif_rw_comp_handler(context, status);
  344. }
  345. }
  346. static void ath6kl_sdio_write_async_work(struct work_struct *work)
  347. {
  348. struct ath6kl_sdio *ar_sdio;
  349. struct bus_request *req, *tmp_req;
  350. ar_sdio = container_of(work, struct ath6kl_sdio, wr_async_work);
  351. spin_lock_bh(&ar_sdio->wr_async_lock);
  352. list_for_each_entry_safe(req, tmp_req, &ar_sdio->wr_asyncq, list) {
  353. list_del(&req->list);
  354. spin_unlock_bh(&ar_sdio->wr_async_lock);
  355. __ath6kl_sdio_write_async(ar_sdio, req);
  356. spin_lock_bh(&ar_sdio->wr_async_lock);
  357. }
  358. spin_unlock_bh(&ar_sdio->wr_async_lock);
  359. }
  360. static void ath6kl_sdio_irq_handler(struct sdio_func *func)
  361. {
  362. int status;
  363. struct ath6kl_sdio *ar_sdio;
  364. ath6kl_dbg(ATH6KL_DBG_SDIO, "irq\n");
  365. ar_sdio = sdio_get_drvdata(func);
  366. atomic_set(&ar_sdio->irq_handling, 1);
  367. /*
  368. * Release the host during interrups so we can pick it back up when
  369. * we process commands.
  370. */
  371. sdio_release_host(ar_sdio->func);
  372. status = ath6kl_hif_intr_bh_handler(ar_sdio->ar);
  373. sdio_claim_host(ar_sdio->func);
  374. atomic_set(&ar_sdio->irq_handling, 0);
  375. WARN_ON(status && status != -ECANCELED);
  376. }
  377. static int ath6kl_sdio_power_on(struct ath6kl *ar)
  378. {
  379. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  380. struct sdio_func *func = ar_sdio->func;
  381. int ret = 0;
  382. if (!ar_sdio->is_disabled)
  383. return 0;
  384. ath6kl_dbg(ATH6KL_DBG_BOOT, "sdio power on\n");
  385. sdio_claim_host(func);
  386. ret = sdio_enable_func(func);
  387. if (ret) {
  388. ath6kl_err("Unable to enable sdio func: %d)\n", ret);
  389. sdio_release_host(func);
  390. return ret;
  391. }
  392. sdio_release_host(func);
  393. /*
  394. * Wait for hardware to initialise. It should take a lot less than
  395. * 10 ms but let's be conservative here.
  396. */
  397. msleep(10);
  398. ar_sdio->is_disabled = false;
  399. return ret;
  400. }
  401. static int ath6kl_sdio_power_off(struct ath6kl *ar)
  402. {
  403. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  404. int ret;
  405. if (ar_sdio->is_disabled)
  406. return 0;
  407. ath6kl_dbg(ATH6KL_DBG_BOOT, "sdio power off\n");
  408. /* Disable the card */
  409. sdio_claim_host(ar_sdio->func);
  410. ret = sdio_disable_func(ar_sdio->func);
  411. sdio_release_host(ar_sdio->func);
  412. if (ret)
  413. return ret;
  414. ar_sdio->is_disabled = true;
  415. return ret;
  416. }
  417. static int ath6kl_sdio_write_async(struct ath6kl *ar, u32 address, u8 *buffer,
  418. u32 length, u32 request,
  419. struct htc_packet *packet)
  420. {
  421. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  422. struct bus_request *bus_req;
  423. bus_req = ath6kl_sdio_alloc_busreq(ar_sdio);
  424. if (!bus_req)
  425. return -ENOMEM;
  426. bus_req->address = address;
  427. bus_req->buffer = buffer;
  428. bus_req->length = length;
  429. bus_req->request = request;
  430. bus_req->packet = packet;
  431. spin_lock_bh(&ar_sdio->wr_async_lock);
  432. list_add_tail(&bus_req->list, &ar_sdio->wr_asyncq);
  433. spin_unlock_bh(&ar_sdio->wr_async_lock);
  434. queue_work(ar->ath6kl_wq, &ar_sdio->wr_async_work);
  435. return 0;
  436. }
  437. static void ath6kl_sdio_irq_enable(struct ath6kl *ar)
  438. {
  439. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  440. int ret;
  441. sdio_claim_host(ar_sdio->func);
  442. /* Register the isr */
  443. ret = sdio_claim_irq(ar_sdio->func, ath6kl_sdio_irq_handler);
  444. if (ret)
  445. ath6kl_err("Failed to claim sdio irq: %d\n", ret);
  446. sdio_release_host(ar_sdio->func);
  447. }
  448. static void ath6kl_sdio_irq_disable(struct ath6kl *ar)
  449. {
  450. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  451. int ret;
  452. sdio_claim_host(ar_sdio->func);
  453. /* Mask our function IRQ */
  454. while (atomic_read(&ar_sdio->irq_handling)) {
  455. sdio_release_host(ar_sdio->func);
  456. schedule_timeout(HZ / 10);
  457. sdio_claim_host(ar_sdio->func);
  458. }
  459. ret = sdio_release_irq(ar_sdio->func);
  460. if (ret)
  461. ath6kl_err("Failed to release sdio irq: %d\n", ret);
  462. sdio_release_host(ar_sdio->func);
  463. }
  464. static struct hif_scatter_req *ath6kl_sdio_scatter_req_get(struct ath6kl *ar)
  465. {
  466. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  467. struct hif_scatter_req *node = NULL;
  468. spin_lock_bh(&ar_sdio->scat_lock);
  469. if (!list_empty(&ar_sdio->scat_req)) {
  470. node = list_first_entry(&ar_sdio->scat_req,
  471. struct hif_scatter_req, list);
  472. list_del(&node->list);
  473. }
  474. spin_unlock_bh(&ar_sdio->scat_lock);
  475. return node;
  476. }
  477. static void ath6kl_sdio_scatter_req_add(struct ath6kl *ar,
  478. struct hif_scatter_req *s_req)
  479. {
  480. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  481. spin_lock_bh(&ar_sdio->scat_lock);
  482. list_add_tail(&s_req->list, &ar_sdio->scat_req);
  483. spin_unlock_bh(&ar_sdio->scat_lock);
  484. }
  485. /* scatter gather read write request */
  486. static int ath6kl_sdio_async_rw_scatter(struct ath6kl *ar,
  487. struct hif_scatter_req *scat_req)
  488. {
  489. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  490. u32 request = scat_req->req;
  491. int status = 0;
  492. if (!scat_req->len)
  493. return -EINVAL;
  494. ath6kl_dbg(ATH6KL_DBG_SCATTER,
  495. "hif-scatter: total len: %d scatter entries: %d\n",
  496. scat_req->len, scat_req->scat_entries);
  497. if (request & HIF_SYNCHRONOUS)
  498. status = ath6kl_sdio_scat_rw(ar_sdio, scat_req->busrequest);
  499. else {
  500. spin_lock_bh(&ar_sdio->wr_async_lock);
  501. list_add_tail(&scat_req->busrequest->list, &ar_sdio->wr_asyncq);
  502. spin_unlock_bh(&ar_sdio->wr_async_lock);
  503. queue_work(ar->ath6kl_wq, &ar_sdio->wr_async_work);
  504. }
  505. return status;
  506. }
  507. /* clean up scatter support */
  508. static void ath6kl_sdio_cleanup_scatter(struct ath6kl *ar)
  509. {
  510. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  511. struct hif_scatter_req *s_req, *tmp_req;
  512. /* empty the free list */
  513. spin_lock_bh(&ar_sdio->scat_lock);
  514. list_for_each_entry_safe(s_req, tmp_req, &ar_sdio->scat_req, list) {
  515. list_del(&s_req->list);
  516. spin_unlock_bh(&ar_sdio->scat_lock);
  517. /*
  518. * FIXME: should we also call completion handler with
  519. * ath6kl_hif_rw_comp_handler() with status -ECANCELED so
  520. * that the packet is properly freed?
  521. */
  522. if (s_req->busrequest)
  523. ath6kl_sdio_free_bus_req(ar_sdio, s_req->busrequest);
  524. kfree(s_req->virt_dma_buf);
  525. kfree(s_req->sgentries);
  526. kfree(s_req);
  527. spin_lock_bh(&ar_sdio->scat_lock);
  528. }
  529. spin_unlock_bh(&ar_sdio->scat_lock);
  530. }
  531. /* setup of HIF scatter resources */
  532. static int ath6kl_sdio_enable_scatter(struct ath6kl *ar)
  533. {
  534. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  535. struct htc_target *target = ar->htc_target;
  536. int ret;
  537. bool virt_scat = false;
  538. if (ar_sdio->scatter_enabled)
  539. return 0;
  540. ar_sdio->scatter_enabled = true;
  541. /* check if host supports scatter and it meets our requirements */
  542. if (ar_sdio->func->card->host->max_segs < MAX_SCATTER_ENTRIES_PER_REQ) {
  543. ath6kl_err("host only supports scatter of :%d entries, need: %d\n",
  544. ar_sdio->func->card->host->max_segs,
  545. MAX_SCATTER_ENTRIES_PER_REQ);
  546. virt_scat = true;
  547. }
  548. if (!virt_scat) {
  549. ret = ath6kl_sdio_alloc_prep_scat_req(ar_sdio,
  550. MAX_SCATTER_ENTRIES_PER_REQ,
  551. MAX_SCATTER_REQUESTS, virt_scat);
  552. if (!ret) {
  553. ath6kl_dbg(ATH6KL_DBG_BOOT,
  554. "hif-scatter enabled requests %d entries %d\n",
  555. MAX_SCATTER_REQUESTS,
  556. MAX_SCATTER_ENTRIES_PER_REQ);
  557. target->max_scat_entries = MAX_SCATTER_ENTRIES_PER_REQ;
  558. target->max_xfer_szper_scatreq =
  559. MAX_SCATTER_REQ_TRANSFER_SIZE;
  560. } else {
  561. ath6kl_sdio_cleanup_scatter(ar);
  562. ath6kl_warn("hif scatter resource setup failed, trying virtual scatter method\n");
  563. }
  564. }
  565. if (virt_scat || ret) {
  566. ret = ath6kl_sdio_alloc_prep_scat_req(ar_sdio,
  567. ATH6KL_SCATTER_ENTRIES_PER_REQ,
  568. ATH6KL_SCATTER_REQS, virt_scat);
  569. if (ret) {
  570. ath6kl_err("failed to alloc virtual scatter resources !\n");
  571. ath6kl_sdio_cleanup_scatter(ar);
  572. return ret;
  573. }
  574. ath6kl_dbg(ATH6KL_DBG_BOOT,
  575. "virtual scatter enabled requests %d entries %d\n",
  576. ATH6KL_SCATTER_REQS, ATH6KL_SCATTER_ENTRIES_PER_REQ);
  577. target->max_scat_entries = ATH6KL_SCATTER_ENTRIES_PER_REQ;
  578. target->max_xfer_szper_scatreq =
  579. ATH6KL_MAX_TRANSFER_SIZE_PER_SCATTER;
  580. }
  581. return 0;
  582. }
  583. static int ath6kl_sdio_config(struct ath6kl *ar)
  584. {
  585. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  586. struct sdio_func *func = ar_sdio->func;
  587. int ret;
  588. sdio_claim_host(func);
  589. if ((ar_sdio->id->device & MANUFACTURER_ID_ATH6KL_BASE_MASK) >=
  590. MANUFACTURER_ID_AR6003_BASE) {
  591. /* enable 4-bit ASYNC interrupt on AR6003 or later */
  592. ret = ath6kl_sdio_func0_cmd52_wr_byte(func->card,
  593. CCCR_SDIO_IRQ_MODE_REG,
  594. SDIO_IRQ_MODE_ASYNC_4BIT_IRQ);
  595. if (ret) {
  596. ath6kl_err("Failed to enable 4-bit async irq mode %d\n",
  597. ret);
  598. goto out;
  599. }
  600. ath6kl_dbg(ATH6KL_DBG_BOOT, "4-bit async irq mode enabled\n");
  601. }
  602. /* give us some time to enable, in ms */
  603. func->enable_timeout = 100;
  604. ret = sdio_set_block_size(func, HIF_MBOX_BLOCK_SIZE);
  605. if (ret) {
  606. ath6kl_err("Set sdio block size %d failed: %d)\n",
  607. HIF_MBOX_BLOCK_SIZE, ret);
  608. sdio_release_host(func);
  609. goto out;
  610. }
  611. out:
  612. sdio_release_host(func);
  613. return ret;
  614. }
  615. static int ath6kl_sdio_suspend(struct ath6kl *ar, struct cfg80211_wowlan *wow)
  616. {
  617. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  618. struct sdio_func *func = ar_sdio->func;
  619. mmc_pm_flag_t flags;
  620. int ret;
  621. flags = sdio_get_host_pm_caps(func);
  622. ath6kl_dbg(ATH6KL_DBG_SUSPEND, "sdio suspend pm_caps 0x%x\n", flags);
  623. if (!(flags & MMC_PM_KEEP_POWER) ||
  624. (ar->conf_flags & ATH6KL_CONF_SUSPEND_CUTPOWER)) {
  625. /* as host doesn't support keep power we need to cut power */
  626. return ath6kl_cfg80211_suspend(ar, ATH6KL_CFG_SUSPEND_CUTPOWER,
  627. NULL);
  628. }
  629. ret = sdio_set_host_pm_flags(func, MMC_PM_KEEP_POWER);
  630. if (ret) {
  631. printk(KERN_ERR "ath6kl: set sdio pm flags failed: %d\n",
  632. ret);
  633. return ret;
  634. }
  635. if ((flags & MMC_PM_WAKE_SDIO_IRQ) && wow) {
  636. /*
  637. * The host sdio controller is capable of keep power and
  638. * sdio irq wake up at this point. It's fine to continue
  639. * wow suspend operation.
  640. */
  641. ret = ath6kl_cfg80211_suspend(ar, ATH6KL_CFG_SUSPEND_WOW, wow);
  642. if (ret)
  643. return ret;
  644. ret = sdio_set_host_pm_flags(func, MMC_PM_WAKE_SDIO_IRQ);
  645. if (ret)
  646. ath6kl_err("set sdio wake irq flag failed: %d\n", ret);
  647. return ret;
  648. }
  649. return ath6kl_cfg80211_suspend(ar, ATH6KL_CFG_SUSPEND_DEEPSLEEP, NULL);
  650. }
  651. static int ath6kl_sdio_resume(struct ath6kl *ar)
  652. {
  653. switch (ar->state) {
  654. case ATH6KL_STATE_OFF:
  655. case ATH6KL_STATE_CUTPOWER:
  656. ath6kl_dbg(ATH6KL_DBG_SUSPEND,
  657. "sdio resume configuring sdio\n");
  658. /* need to set sdio settings after power is cut from sdio */
  659. ath6kl_sdio_config(ar);
  660. break;
  661. case ATH6KL_STATE_ON:
  662. break;
  663. case ATH6KL_STATE_DEEPSLEEP:
  664. break;
  665. case ATH6KL_STATE_WOW:
  666. break;
  667. }
  668. ath6kl_cfg80211_resume(ar);
  669. return 0;
  670. }
  671. static void ath6kl_sdio_stop(struct ath6kl *ar)
  672. {
  673. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  674. struct bus_request *req, *tmp_req;
  675. void *context;
  676. /* FIXME: make sure that wq is not queued again */
  677. cancel_work_sync(&ar_sdio->wr_async_work);
  678. spin_lock_bh(&ar_sdio->wr_async_lock);
  679. list_for_each_entry_safe(req, tmp_req, &ar_sdio->wr_asyncq, list) {
  680. list_del(&req->list);
  681. if (req->scat_req) {
  682. /* this is a scatter gather request */
  683. req->scat_req->status = -ECANCELED;
  684. req->scat_req->complete(ar_sdio->ar->htc_target,
  685. req->scat_req);
  686. } else {
  687. context = req->packet;
  688. ath6kl_sdio_free_bus_req(ar_sdio, req);
  689. ath6kl_hif_rw_comp_handler(context, -ECANCELED);
  690. }
  691. }
  692. spin_unlock_bh(&ar_sdio->wr_async_lock);
  693. WARN_ON(get_queue_depth(&ar_sdio->scat_req) != 4);
  694. }
  695. static const struct ath6kl_hif_ops ath6kl_sdio_ops = {
  696. .read_write_sync = ath6kl_sdio_read_write_sync,
  697. .write_async = ath6kl_sdio_write_async,
  698. .irq_enable = ath6kl_sdio_irq_enable,
  699. .irq_disable = ath6kl_sdio_irq_disable,
  700. .scatter_req_get = ath6kl_sdio_scatter_req_get,
  701. .scatter_req_add = ath6kl_sdio_scatter_req_add,
  702. .enable_scatter = ath6kl_sdio_enable_scatter,
  703. .scat_req_rw = ath6kl_sdio_async_rw_scatter,
  704. .cleanup_scatter = ath6kl_sdio_cleanup_scatter,
  705. .suspend = ath6kl_sdio_suspend,
  706. .resume = ath6kl_sdio_resume,
  707. .power_on = ath6kl_sdio_power_on,
  708. .power_off = ath6kl_sdio_power_off,
  709. .stop = ath6kl_sdio_stop,
  710. };
  711. #ifdef CONFIG_PM_SLEEP
  712. /*
  713. * Empty handlers so that mmc subsystem doesn't remove us entirely during
  714. * suspend. We instead follow cfg80211 suspend/resume handlers.
  715. */
  716. static int ath6kl_sdio_pm_suspend(struct device *device)
  717. {
  718. ath6kl_dbg(ATH6KL_DBG_SUSPEND, "sdio pm suspend\n");
  719. return 0;
  720. }
  721. static int ath6kl_sdio_pm_resume(struct device *device)
  722. {
  723. ath6kl_dbg(ATH6KL_DBG_SUSPEND, "sdio pm resume\n");
  724. return 0;
  725. }
  726. static SIMPLE_DEV_PM_OPS(ath6kl_sdio_pm_ops, ath6kl_sdio_pm_suspend,
  727. ath6kl_sdio_pm_resume);
  728. #define ATH6KL_SDIO_PM_OPS (&ath6kl_sdio_pm_ops)
  729. #else
  730. #define ATH6KL_SDIO_PM_OPS NULL
  731. #endif /* CONFIG_PM_SLEEP */
  732. static int ath6kl_sdio_probe(struct sdio_func *func,
  733. const struct sdio_device_id *id)
  734. {
  735. int ret;
  736. struct ath6kl_sdio *ar_sdio;
  737. struct ath6kl *ar;
  738. int count;
  739. ath6kl_dbg(ATH6KL_DBG_BOOT,
  740. "sdio new func %d vendor 0x%x device 0x%x block 0x%x/0x%x\n",
  741. func->num, func->vendor, func->device,
  742. func->max_blksize, func->cur_blksize);
  743. ar_sdio = kzalloc(sizeof(struct ath6kl_sdio), GFP_KERNEL);
  744. if (!ar_sdio)
  745. return -ENOMEM;
  746. ar_sdio->dma_buffer = kzalloc(HIF_DMA_BUFFER_SIZE, GFP_KERNEL);
  747. if (!ar_sdio->dma_buffer) {
  748. ret = -ENOMEM;
  749. goto err_hif;
  750. }
  751. ar_sdio->func = func;
  752. sdio_set_drvdata(func, ar_sdio);
  753. ar_sdio->id = id;
  754. ar_sdio->is_disabled = true;
  755. spin_lock_init(&ar_sdio->lock);
  756. spin_lock_init(&ar_sdio->scat_lock);
  757. spin_lock_init(&ar_sdio->wr_async_lock);
  758. INIT_LIST_HEAD(&ar_sdio->scat_req);
  759. INIT_LIST_HEAD(&ar_sdio->bus_req_freeq);
  760. INIT_LIST_HEAD(&ar_sdio->wr_asyncq);
  761. INIT_WORK(&ar_sdio->wr_async_work, ath6kl_sdio_write_async_work);
  762. for (count = 0; count < BUS_REQUEST_MAX_NUM; count++)
  763. ath6kl_sdio_free_bus_req(ar_sdio, &ar_sdio->bus_req[count]);
  764. ar = ath6kl_core_alloc(&ar_sdio->func->dev);
  765. if (!ar) {
  766. ath6kl_err("Failed to alloc ath6kl core\n");
  767. ret = -ENOMEM;
  768. goto err_dma;
  769. }
  770. ar_sdio->ar = ar;
  771. ar->hif_priv = ar_sdio;
  772. ar->hif_ops = &ath6kl_sdio_ops;
  773. ath6kl_sdio_set_mbox_info(ar);
  774. ret = ath6kl_sdio_config(ar);
  775. if (ret) {
  776. ath6kl_err("Failed to config sdio: %d\n", ret);
  777. goto err_core_alloc;
  778. }
  779. ret = ath6kl_core_init(ar);
  780. if (ret) {
  781. ath6kl_err("Failed to init ath6kl core\n");
  782. goto err_core_alloc;
  783. }
  784. return ret;
  785. err_core_alloc:
  786. ath6kl_core_free(ar_sdio->ar);
  787. err_dma:
  788. kfree(ar_sdio->dma_buffer);
  789. err_hif:
  790. kfree(ar_sdio);
  791. return ret;
  792. }
  793. static void ath6kl_sdio_remove(struct sdio_func *func)
  794. {
  795. struct ath6kl_sdio *ar_sdio;
  796. ath6kl_dbg(ATH6KL_DBG_BOOT,
  797. "sdio removed func %d vendor 0x%x device 0x%x\n",
  798. func->num, func->vendor, func->device);
  799. ar_sdio = sdio_get_drvdata(func);
  800. ath6kl_stop_txrx(ar_sdio->ar);
  801. cancel_work_sync(&ar_sdio->wr_async_work);
  802. ath6kl_core_cleanup(ar_sdio->ar);
  803. kfree(ar_sdio->dma_buffer);
  804. kfree(ar_sdio);
  805. }
  806. static const struct sdio_device_id ath6kl_sdio_devices[] = {
  807. {SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6003_BASE | 0x0))},
  808. {SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6003_BASE | 0x1))},
  809. {},
  810. };
  811. MODULE_DEVICE_TABLE(sdio, ath6kl_sdio_devices);
  812. static struct sdio_driver ath6kl_sdio_driver = {
  813. .name = "ath6kl",
  814. .id_table = ath6kl_sdio_devices,
  815. .probe = ath6kl_sdio_probe,
  816. .remove = ath6kl_sdio_remove,
  817. .drv.pm = ATH6KL_SDIO_PM_OPS,
  818. };
  819. static int __init ath6kl_sdio_init(void)
  820. {
  821. int ret;
  822. ret = sdio_register_driver(&ath6kl_sdio_driver);
  823. if (ret)
  824. ath6kl_err("sdio driver registration failed: %d\n", ret);
  825. return ret;
  826. }
  827. static void __exit ath6kl_sdio_exit(void)
  828. {
  829. sdio_unregister_driver(&ath6kl_sdio_driver);
  830. }
  831. module_init(ath6kl_sdio_init);
  832. module_exit(ath6kl_sdio_exit);
  833. MODULE_AUTHOR("Atheros Communications, Inc.");
  834. MODULE_DESCRIPTION("Driver support for Atheros AR600x SDIO devices");
  835. MODULE_LICENSE("Dual BSD/GPL");
  836. MODULE_FIRMWARE(AR6003_REV2_OTP_FILE);
  837. MODULE_FIRMWARE(AR6003_REV2_FIRMWARE_FILE);
  838. MODULE_FIRMWARE(AR6003_REV2_PATCH_FILE);
  839. MODULE_FIRMWARE(AR6003_REV2_BOARD_DATA_FILE);
  840. MODULE_FIRMWARE(AR6003_REV2_DEFAULT_BOARD_DATA_FILE);
  841. MODULE_FIRMWARE(AR6003_REV3_OTP_FILE);
  842. MODULE_FIRMWARE(AR6003_REV3_FIRMWARE_FILE);
  843. MODULE_FIRMWARE(AR6003_REV3_PATCH_FILE);
  844. MODULE_FIRMWARE(AR6003_REV3_BOARD_DATA_FILE);
  845. MODULE_FIRMWARE(AR6003_REV3_DEFAULT_BOARD_DATA_FILE);