phy-mv-usb.c 21 KB

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  1. /*
  2. * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
  3. * Author: Chao Xie <chao.xie@marvell.com>
  4. * Neil Zhang <zhangwm@marvell.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/init.h>
  14. #include <linux/io.h>
  15. #include <linux/uaccess.h>
  16. #include <linux/device.h>
  17. #include <linux/proc_fs.h>
  18. #include <linux/clk.h>
  19. #include <linux/workqueue.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/usb.h>
  22. #include <linux/usb/ch9.h>
  23. #include <linux/usb/otg.h>
  24. #include <linux/usb/gadget.h>
  25. #include <linux/usb/hcd.h>
  26. #include <linux/platform_data/mv_usb.h>
  27. #include "phy-mv-usb.h"
  28. #define DRIVER_DESC "Marvell USB OTG transceiver driver"
  29. #define DRIVER_VERSION "Jan 20, 2010"
  30. MODULE_DESCRIPTION(DRIVER_DESC);
  31. MODULE_VERSION(DRIVER_VERSION);
  32. MODULE_LICENSE("GPL");
  33. static const char driver_name[] = "mv-otg";
  34. static char *state_string[] = {
  35. "undefined",
  36. "b_idle",
  37. "b_srp_init",
  38. "b_peripheral",
  39. "b_wait_acon",
  40. "b_host",
  41. "a_idle",
  42. "a_wait_vrise",
  43. "a_wait_bcon",
  44. "a_host",
  45. "a_suspend",
  46. "a_peripheral",
  47. "a_wait_vfall",
  48. "a_vbus_err"
  49. };
  50. static int mv_otg_set_vbus(struct usb_otg *otg, bool on)
  51. {
  52. struct mv_otg *mvotg = container_of(otg->phy, struct mv_otg, phy);
  53. if (mvotg->pdata->set_vbus == NULL)
  54. return -ENODEV;
  55. return mvotg->pdata->set_vbus(on);
  56. }
  57. static int mv_otg_set_host(struct usb_otg *otg,
  58. struct usb_bus *host)
  59. {
  60. otg->host = host;
  61. return 0;
  62. }
  63. static int mv_otg_set_peripheral(struct usb_otg *otg,
  64. struct usb_gadget *gadget)
  65. {
  66. otg->gadget = gadget;
  67. return 0;
  68. }
  69. static void mv_otg_run_state_machine(struct mv_otg *mvotg,
  70. unsigned long delay)
  71. {
  72. dev_dbg(&mvotg->pdev->dev, "transceiver is updated\n");
  73. if (!mvotg->qwork)
  74. return;
  75. queue_delayed_work(mvotg->qwork, &mvotg->work, delay);
  76. }
  77. static void mv_otg_timer_await_bcon(unsigned long data)
  78. {
  79. struct mv_otg *mvotg = (struct mv_otg *) data;
  80. mvotg->otg_ctrl.a_wait_bcon_timeout = 1;
  81. dev_info(&mvotg->pdev->dev, "B Device No Response!\n");
  82. if (spin_trylock(&mvotg->wq_lock)) {
  83. mv_otg_run_state_machine(mvotg, 0);
  84. spin_unlock(&mvotg->wq_lock);
  85. }
  86. }
  87. static int mv_otg_cancel_timer(struct mv_otg *mvotg, unsigned int id)
  88. {
  89. struct timer_list *timer;
  90. if (id >= OTG_TIMER_NUM)
  91. return -EINVAL;
  92. timer = &mvotg->otg_ctrl.timer[id];
  93. if (timer_pending(timer))
  94. del_timer(timer);
  95. return 0;
  96. }
  97. static int mv_otg_set_timer(struct mv_otg *mvotg, unsigned int id,
  98. unsigned long interval,
  99. void (*callback) (unsigned long))
  100. {
  101. struct timer_list *timer;
  102. if (id >= OTG_TIMER_NUM)
  103. return -EINVAL;
  104. timer = &mvotg->otg_ctrl.timer[id];
  105. if (timer_pending(timer)) {
  106. dev_err(&mvotg->pdev->dev, "Timer%d is already running\n", id);
  107. return -EBUSY;
  108. }
  109. init_timer(timer);
  110. timer->data = (unsigned long) mvotg;
  111. timer->function = callback;
  112. timer->expires = jiffies + interval;
  113. add_timer(timer);
  114. return 0;
  115. }
  116. static int mv_otg_reset(struct mv_otg *mvotg)
  117. {
  118. unsigned int loops;
  119. u32 tmp;
  120. /* Stop the controller */
  121. tmp = readl(&mvotg->op_regs->usbcmd);
  122. tmp &= ~USBCMD_RUN_STOP;
  123. writel(tmp, &mvotg->op_regs->usbcmd);
  124. /* Reset the controller to get default values */
  125. writel(USBCMD_CTRL_RESET, &mvotg->op_regs->usbcmd);
  126. loops = 500;
  127. while (readl(&mvotg->op_regs->usbcmd) & USBCMD_CTRL_RESET) {
  128. if (loops == 0) {
  129. dev_err(&mvotg->pdev->dev,
  130. "Wait for RESET completed TIMEOUT\n");
  131. return -ETIMEDOUT;
  132. }
  133. loops--;
  134. udelay(20);
  135. }
  136. writel(0x0, &mvotg->op_regs->usbintr);
  137. tmp = readl(&mvotg->op_regs->usbsts);
  138. writel(tmp, &mvotg->op_regs->usbsts);
  139. return 0;
  140. }
  141. static void mv_otg_init_irq(struct mv_otg *mvotg)
  142. {
  143. u32 otgsc;
  144. mvotg->irq_en = OTGSC_INTR_A_SESSION_VALID
  145. | OTGSC_INTR_A_VBUS_VALID;
  146. mvotg->irq_status = OTGSC_INTSTS_A_SESSION_VALID
  147. | OTGSC_INTSTS_A_VBUS_VALID;
  148. if (mvotg->pdata->vbus == NULL) {
  149. mvotg->irq_en |= OTGSC_INTR_B_SESSION_VALID
  150. | OTGSC_INTR_B_SESSION_END;
  151. mvotg->irq_status |= OTGSC_INTSTS_B_SESSION_VALID
  152. | OTGSC_INTSTS_B_SESSION_END;
  153. }
  154. if (mvotg->pdata->id == NULL) {
  155. mvotg->irq_en |= OTGSC_INTR_USB_ID;
  156. mvotg->irq_status |= OTGSC_INTSTS_USB_ID;
  157. }
  158. otgsc = readl(&mvotg->op_regs->otgsc);
  159. otgsc |= mvotg->irq_en;
  160. writel(otgsc, &mvotg->op_regs->otgsc);
  161. }
  162. static void mv_otg_start_host(struct mv_otg *mvotg, int on)
  163. {
  164. #ifdef CONFIG_USB
  165. struct usb_otg *otg = mvotg->phy.otg;
  166. struct usb_hcd *hcd;
  167. if (!otg->host)
  168. return;
  169. dev_info(&mvotg->pdev->dev, "%s host\n", on ? "start" : "stop");
  170. hcd = bus_to_hcd(otg->host);
  171. if (on)
  172. usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
  173. else
  174. usb_remove_hcd(hcd);
  175. #endif /* CONFIG_USB */
  176. }
  177. static void mv_otg_start_periphrals(struct mv_otg *mvotg, int on)
  178. {
  179. struct usb_otg *otg = mvotg->phy.otg;
  180. if (!otg->gadget)
  181. return;
  182. dev_info(mvotg->phy.dev, "gadget %s\n", on ? "on" : "off");
  183. if (on)
  184. usb_gadget_vbus_connect(otg->gadget);
  185. else
  186. usb_gadget_vbus_disconnect(otg->gadget);
  187. }
  188. static void otg_clock_enable(struct mv_otg *mvotg)
  189. {
  190. clk_prepare_enable(mvotg->clk);
  191. }
  192. static void otg_clock_disable(struct mv_otg *mvotg)
  193. {
  194. clk_disable_unprepare(mvotg->clk);
  195. }
  196. static int mv_otg_enable_internal(struct mv_otg *mvotg)
  197. {
  198. int retval = 0;
  199. if (mvotg->active)
  200. return 0;
  201. dev_dbg(&mvotg->pdev->dev, "otg enabled\n");
  202. otg_clock_enable(mvotg);
  203. if (mvotg->pdata->phy_init) {
  204. retval = mvotg->pdata->phy_init(mvotg->phy_regs);
  205. if (retval) {
  206. dev_err(&mvotg->pdev->dev,
  207. "init phy error %d\n", retval);
  208. otg_clock_disable(mvotg);
  209. return retval;
  210. }
  211. }
  212. mvotg->active = 1;
  213. return 0;
  214. }
  215. static int mv_otg_enable(struct mv_otg *mvotg)
  216. {
  217. if (mvotg->clock_gating)
  218. return mv_otg_enable_internal(mvotg);
  219. return 0;
  220. }
  221. static void mv_otg_disable_internal(struct mv_otg *mvotg)
  222. {
  223. if (mvotg->active) {
  224. dev_dbg(&mvotg->pdev->dev, "otg disabled\n");
  225. if (mvotg->pdata->phy_deinit)
  226. mvotg->pdata->phy_deinit(mvotg->phy_regs);
  227. otg_clock_disable(mvotg);
  228. mvotg->active = 0;
  229. }
  230. }
  231. static void mv_otg_disable(struct mv_otg *mvotg)
  232. {
  233. if (mvotg->clock_gating)
  234. mv_otg_disable_internal(mvotg);
  235. }
  236. static void mv_otg_update_inputs(struct mv_otg *mvotg)
  237. {
  238. struct mv_otg_ctrl *otg_ctrl = &mvotg->otg_ctrl;
  239. u32 otgsc;
  240. otgsc = readl(&mvotg->op_regs->otgsc);
  241. if (mvotg->pdata->vbus) {
  242. if (mvotg->pdata->vbus->poll() == VBUS_HIGH) {
  243. otg_ctrl->b_sess_vld = 1;
  244. otg_ctrl->b_sess_end = 0;
  245. } else {
  246. otg_ctrl->b_sess_vld = 0;
  247. otg_ctrl->b_sess_end = 1;
  248. }
  249. } else {
  250. otg_ctrl->b_sess_vld = !!(otgsc & OTGSC_STS_B_SESSION_VALID);
  251. otg_ctrl->b_sess_end = !!(otgsc & OTGSC_STS_B_SESSION_END);
  252. }
  253. if (mvotg->pdata->id)
  254. otg_ctrl->id = !!mvotg->pdata->id->poll();
  255. else
  256. otg_ctrl->id = !!(otgsc & OTGSC_STS_USB_ID);
  257. if (mvotg->pdata->otg_force_a_bus_req && !otg_ctrl->id)
  258. otg_ctrl->a_bus_req = 1;
  259. otg_ctrl->a_sess_vld = !!(otgsc & OTGSC_STS_A_SESSION_VALID);
  260. otg_ctrl->a_vbus_vld = !!(otgsc & OTGSC_STS_A_VBUS_VALID);
  261. dev_dbg(&mvotg->pdev->dev, "%s: ", __func__);
  262. dev_dbg(&mvotg->pdev->dev, "id %d\n", otg_ctrl->id);
  263. dev_dbg(&mvotg->pdev->dev, "b_sess_vld %d\n", otg_ctrl->b_sess_vld);
  264. dev_dbg(&mvotg->pdev->dev, "b_sess_end %d\n", otg_ctrl->b_sess_end);
  265. dev_dbg(&mvotg->pdev->dev, "a_vbus_vld %d\n", otg_ctrl->a_vbus_vld);
  266. dev_dbg(&mvotg->pdev->dev, "a_sess_vld %d\n", otg_ctrl->a_sess_vld);
  267. }
  268. static void mv_otg_update_state(struct mv_otg *mvotg)
  269. {
  270. struct mv_otg_ctrl *otg_ctrl = &mvotg->otg_ctrl;
  271. struct usb_phy *phy = &mvotg->phy;
  272. int old_state = phy->state;
  273. switch (old_state) {
  274. case OTG_STATE_UNDEFINED:
  275. phy->state = OTG_STATE_B_IDLE;
  276. /* FALL THROUGH */
  277. case OTG_STATE_B_IDLE:
  278. if (otg_ctrl->id == 0)
  279. phy->state = OTG_STATE_A_IDLE;
  280. else if (otg_ctrl->b_sess_vld)
  281. phy->state = OTG_STATE_B_PERIPHERAL;
  282. break;
  283. case OTG_STATE_B_PERIPHERAL:
  284. if (!otg_ctrl->b_sess_vld || otg_ctrl->id == 0)
  285. phy->state = OTG_STATE_B_IDLE;
  286. break;
  287. case OTG_STATE_A_IDLE:
  288. if (otg_ctrl->id)
  289. phy->state = OTG_STATE_B_IDLE;
  290. else if (!(otg_ctrl->a_bus_drop) &&
  291. (otg_ctrl->a_bus_req || otg_ctrl->a_srp_det))
  292. phy->state = OTG_STATE_A_WAIT_VRISE;
  293. break;
  294. case OTG_STATE_A_WAIT_VRISE:
  295. if (otg_ctrl->a_vbus_vld)
  296. phy->state = OTG_STATE_A_WAIT_BCON;
  297. break;
  298. case OTG_STATE_A_WAIT_BCON:
  299. if (otg_ctrl->id || otg_ctrl->a_bus_drop
  300. || otg_ctrl->a_wait_bcon_timeout) {
  301. mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER);
  302. mvotg->otg_ctrl.a_wait_bcon_timeout = 0;
  303. phy->state = OTG_STATE_A_WAIT_VFALL;
  304. otg_ctrl->a_bus_req = 0;
  305. } else if (!otg_ctrl->a_vbus_vld) {
  306. mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER);
  307. mvotg->otg_ctrl.a_wait_bcon_timeout = 0;
  308. phy->state = OTG_STATE_A_VBUS_ERR;
  309. } else if (otg_ctrl->b_conn) {
  310. mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER);
  311. mvotg->otg_ctrl.a_wait_bcon_timeout = 0;
  312. phy->state = OTG_STATE_A_HOST;
  313. }
  314. break;
  315. case OTG_STATE_A_HOST:
  316. if (otg_ctrl->id || !otg_ctrl->b_conn
  317. || otg_ctrl->a_bus_drop)
  318. phy->state = OTG_STATE_A_WAIT_BCON;
  319. else if (!otg_ctrl->a_vbus_vld)
  320. phy->state = OTG_STATE_A_VBUS_ERR;
  321. break;
  322. case OTG_STATE_A_WAIT_VFALL:
  323. if (otg_ctrl->id
  324. || (!otg_ctrl->b_conn && otg_ctrl->a_sess_vld)
  325. || otg_ctrl->a_bus_req)
  326. phy->state = OTG_STATE_A_IDLE;
  327. break;
  328. case OTG_STATE_A_VBUS_ERR:
  329. if (otg_ctrl->id || otg_ctrl->a_clr_err
  330. || otg_ctrl->a_bus_drop) {
  331. otg_ctrl->a_clr_err = 0;
  332. phy->state = OTG_STATE_A_WAIT_VFALL;
  333. }
  334. break;
  335. default:
  336. break;
  337. }
  338. }
  339. static void mv_otg_work(struct work_struct *work)
  340. {
  341. struct mv_otg *mvotg;
  342. struct usb_phy *phy;
  343. struct usb_otg *otg;
  344. int old_state;
  345. mvotg = container_of(to_delayed_work(work), struct mv_otg, work);
  346. run:
  347. /* work queue is single thread, or we need spin_lock to protect */
  348. phy = &mvotg->phy;
  349. otg = phy->otg;
  350. old_state = phy->state;
  351. if (!mvotg->active)
  352. return;
  353. mv_otg_update_inputs(mvotg);
  354. mv_otg_update_state(mvotg);
  355. if (old_state != phy->state) {
  356. dev_info(&mvotg->pdev->dev, "change from state %s to %s\n",
  357. state_string[old_state],
  358. state_string[phy->state]);
  359. switch (phy->state) {
  360. case OTG_STATE_B_IDLE:
  361. otg->default_a = 0;
  362. if (old_state == OTG_STATE_B_PERIPHERAL)
  363. mv_otg_start_periphrals(mvotg, 0);
  364. mv_otg_reset(mvotg);
  365. mv_otg_disable(mvotg);
  366. break;
  367. case OTG_STATE_B_PERIPHERAL:
  368. mv_otg_enable(mvotg);
  369. mv_otg_start_periphrals(mvotg, 1);
  370. break;
  371. case OTG_STATE_A_IDLE:
  372. otg->default_a = 1;
  373. mv_otg_enable(mvotg);
  374. if (old_state == OTG_STATE_A_WAIT_VFALL)
  375. mv_otg_start_host(mvotg, 0);
  376. mv_otg_reset(mvotg);
  377. break;
  378. case OTG_STATE_A_WAIT_VRISE:
  379. mv_otg_set_vbus(otg, 1);
  380. break;
  381. case OTG_STATE_A_WAIT_BCON:
  382. if (old_state != OTG_STATE_A_HOST)
  383. mv_otg_start_host(mvotg, 1);
  384. mv_otg_set_timer(mvotg, A_WAIT_BCON_TIMER,
  385. T_A_WAIT_BCON,
  386. mv_otg_timer_await_bcon);
  387. /*
  388. * Now, we directly enter A_HOST. So set b_conn = 1
  389. * here. In fact, it need host driver to notify us.
  390. */
  391. mvotg->otg_ctrl.b_conn = 1;
  392. break;
  393. case OTG_STATE_A_HOST:
  394. break;
  395. case OTG_STATE_A_WAIT_VFALL:
  396. /*
  397. * Now, we has exited A_HOST. So set b_conn = 0
  398. * here. In fact, it need host driver to notify us.
  399. */
  400. mvotg->otg_ctrl.b_conn = 0;
  401. mv_otg_set_vbus(otg, 0);
  402. break;
  403. case OTG_STATE_A_VBUS_ERR:
  404. break;
  405. default:
  406. break;
  407. }
  408. goto run;
  409. }
  410. }
  411. static irqreturn_t mv_otg_irq(int irq, void *dev)
  412. {
  413. struct mv_otg *mvotg = dev;
  414. u32 otgsc;
  415. otgsc = readl(&mvotg->op_regs->otgsc);
  416. writel(otgsc, &mvotg->op_regs->otgsc);
  417. /*
  418. * if we have vbus, then the vbus detection for B-device
  419. * will be done by mv_otg_inputs_irq().
  420. */
  421. if (mvotg->pdata->vbus)
  422. if ((otgsc & OTGSC_STS_USB_ID) &&
  423. !(otgsc & OTGSC_INTSTS_USB_ID))
  424. return IRQ_NONE;
  425. if ((otgsc & mvotg->irq_status) == 0)
  426. return IRQ_NONE;
  427. mv_otg_run_state_machine(mvotg, 0);
  428. return IRQ_HANDLED;
  429. }
  430. static irqreturn_t mv_otg_inputs_irq(int irq, void *dev)
  431. {
  432. struct mv_otg *mvotg = dev;
  433. /* The clock may disabled at this time */
  434. if (!mvotg->active) {
  435. mv_otg_enable(mvotg);
  436. mv_otg_init_irq(mvotg);
  437. }
  438. mv_otg_run_state_machine(mvotg, 0);
  439. return IRQ_HANDLED;
  440. }
  441. static ssize_t
  442. get_a_bus_req(struct device *dev, struct device_attribute *attr, char *buf)
  443. {
  444. struct mv_otg *mvotg = dev_get_drvdata(dev);
  445. return scnprintf(buf, PAGE_SIZE, "%d\n",
  446. mvotg->otg_ctrl.a_bus_req);
  447. }
  448. static ssize_t
  449. set_a_bus_req(struct device *dev, struct device_attribute *attr,
  450. const char *buf, size_t count)
  451. {
  452. struct mv_otg *mvotg = dev_get_drvdata(dev);
  453. if (count > 2)
  454. return -1;
  455. /* We will use this interface to change to A device */
  456. if (mvotg->phy.state != OTG_STATE_B_IDLE
  457. && mvotg->phy.state != OTG_STATE_A_IDLE)
  458. return -1;
  459. /* The clock may disabled and we need to set irq for ID detected */
  460. mv_otg_enable(mvotg);
  461. mv_otg_init_irq(mvotg);
  462. if (buf[0] == '1') {
  463. mvotg->otg_ctrl.a_bus_req = 1;
  464. mvotg->otg_ctrl.a_bus_drop = 0;
  465. dev_dbg(&mvotg->pdev->dev,
  466. "User request: a_bus_req = 1\n");
  467. if (spin_trylock(&mvotg->wq_lock)) {
  468. mv_otg_run_state_machine(mvotg, 0);
  469. spin_unlock(&mvotg->wq_lock);
  470. }
  471. }
  472. return count;
  473. }
  474. static DEVICE_ATTR(a_bus_req, S_IRUGO | S_IWUSR, get_a_bus_req,
  475. set_a_bus_req);
  476. static ssize_t
  477. set_a_clr_err(struct device *dev, struct device_attribute *attr,
  478. const char *buf, size_t count)
  479. {
  480. struct mv_otg *mvotg = dev_get_drvdata(dev);
  481. if (!mvotg->phy.otg->default_a)
  482. return -1;
  483. if (count > 2)
  484. return -1;
  485. if (buf[0] == '1') {
  486. mvotg->otg_ctrl.a_clr_err = 1;
  487. dev_dbg(&mvotg->pdev->dev,
  488. "User request: a_clr_err = 1\n");
  489. }
  490. if (spin_trylock(&mvotg->wq_lock)) {
  491. mv_otg_run_state_machine(mvotg, 0);
  492. spin_unlock(&mvotg->wq_lock);
  493. }
  494. return count;
  495. }
  496. static DEVICE_ATTR(a_clr_err, S_IWUSR, NULL, set_a_clr_err);
  497. static ssize_t
  498. get_a_bus_drop(struct device *dev, struct device_attribute *attr,
  499. char *buf)
  500. {
  501. struct mv_otg *mvotg = dev_get_drvdata(dev);
  502. return scnprintf(buf, PAGE_SIZE, "%d\n",
  503. mvotg->otg_ctrl.a_bus_drop);
  504. }
  505. static ssize_t
  506. set_a_bus_drop(struct device *dev, struct device_attribute *attr,
  507. const char *buf, size_t count)
  508. {
  509. struct mv_otg *mvotg = dev_get_drvdata(dev);
  510. if (!mvotg->phy.otg->default_a)
  511. return -1;
  512. if (count > 2)
  513. return -1;
  514. if (buf[0] == '0') {
  515. mvotg->otg_ctrl.a_bus_drop = 0;
  516. dev_dbg(&mvotg->pdev->dev,
  517. "User request: a_bus_drop = 0\n");
  518. } else if (buf[0] == '1') {
  519. mvotg->otg_ctrl.a_bus_drop = 1;
  520. mvotg->otg_ctrl.a_bus_req = 0;
  521. dev_dbg(&mvotg->pdev->dev,
  522. "User request: a_bus_drop = 1\n");
  523. dev_dbg(&mvotg->pdev->dev,
  524. "User request: and a_bus_req = 0\n");
  525. }
  526. if (spin_trylock(&mvotg->wq_lock)) {
  527. mv_otg_run_state_machine(mvotg, 0);
  528. spin_unlock(&mvotg->wq_lock);
  529. }
  530. return count;
  531. }
  532. static DEVICE_ATTR(a_bus_drop, S_IRUGO | S_IWUSR,
  533. get_a_bus_drop, set_a_bus_drop);
  534. static struct attribute *inputs_attrs[] = {
  535. &dev_attr_a_bus_req.attr,
  536. &dev_attr_a_clr_err.attr,
  537. &dev_attr_a_bus_drop.attr,
  538. NULL,
  539. };
  540. static struct attribute_group inputs_attr_group = {
  541. .name = "inputs",
  542. .attrs = inputs_attrs,
  543. };
  544. int mv_otg_remove(struct platform_device *pdev)
  545. {
  546. struct mv_otg *mvotg = platform_get_drvdata(pdev);
  547. sysfs_remove_group(&mvotg->pdev->dev.kobj, &inputs_attr_group);
  548. if (mvotg->qwork) {
  549. flush_workqueue(mvotg->qwork);
  550. destroy_workqueue(mvotg->qwork);
  551. }
  552. mv_otg_disable(mvotg);
  553. usb_remove_phy(&mvotg->phy);
  554. return 0;
  555. }
  556. static int mv_otg_probe(struct platform_device *pdev)
  557. {
  558. struct mv_usb_platform_data *pdata = pdev->dev.platform_data;
  559. struct mv_otg *mvotg;
  560. struct usb_otg *otg;
  561. struct resource *r;
  562. int retval = 0, i;
  563. if (pdata == NULL) {
  564. dev_err(&pdev->dev, "failed to get platform data\n");
  565. return -ENODEV;
  566. }
  567. mvotg = devm_kzalloc(&pdev->dev, sizeof(*mvotg), GFP_KERNEL);
  568. if (!mvotg) {
  569. dev_err(&pdev->dev, "failed to allocate memory!\n");
  570. return -ENOMEM;
  571. }
  572. otg = devm_kzalloc(&pdev->dev, sizeof(*otg), GFP_KERNEL);
  573. if (!otg)
  574. return -ENOMEM;
  575. platform_set_drvdata(pdev, mvotg);
  576. mvotg->pdev = pdev;
  577. mvotg->pdata = pdata;
  578. mvotg->clk = devm_clk_get(&pdev->dev, NULL);
  579. if (IS_ERR(mvotg->clk))
  580. return PTR_ERR(mvotg->clk);
  581. mvotg->qwork = create_singlethread_workqueue("mv_otg_queue");
  582. if (!mvotg->qwork) {
  583. dev_dbg(&pdev->dev, "cannot create workqueue for OTG\n");
  584. return -ENOMEM;
  585. }
  586. INIT_DELAYED_WORK(&mvotg->work, mv_otg_work);
  587. /* OTG common part */
  588. mvotg->pdev = pdev;
  589. mvotg->phy.dev = &pdev->dev;
  590. mvotg->phy.otg = otg;
  591. mvotg->phy.label = driver_name;
  592. mvotg->phy.state = OTG_STATE_UNDEFINED;
  593. otg->phy = &mvotg->phy;
  594. otg->set_host = mv_otg_set_host;
  595. otg->set_peripheral = mv_otg_set_peripheral;
  596. otg->set_vbus = mv_otg_set_vbus;
  597. for (i = 0; i < OTG_TIMER_NUM; i++)
  598. init_timer(&mvotg->otg_ctrl.timer[i]);
  599. r = platform_get_resource_byname(mvotg->pdev,
  600. IORESOURCE_MEM, "phyregs");
  601. if (r == NULL) {
  602. dev_err(&pdev->dev, "no phy I/O memory resource defined\n");
  603. retval = -ENODEV;
  604. goto err_destroy_workqueue;
  605. }
  606. mvotg->phy_regs = devm_ioremap(&pdev->dev, r->start, resource_size(r));
  607. if (mvotg->phy_regs == NULL) {
  608. dev_err(&pdev->dev, "failed to map phy I/O memory\n");
  609. retval = -EFAULT;
  610. goto err_destroy_workqueue;
  611. }
  612. r = platform_get_resource_byname(mvotg->pdev,
  613. IORESOURCE_MEM, "capregs");
  614. if (r == NULL) {
  615. dev_err(&pdev->dev, "no I/O memory resource defined\n");
  616. retval = -ENODEV;
  617. goto err_destroy_workqueue;
  618. }
  619. mvotg->cap_regs = devm_ioremap(&pdev->dev, r->start, resource_size(r));
  620. if (mvotg->cap_regs == NULL) {
  621. dev_err(&pdev->dev, "failed to map I/O memory\n");
  622. retval = -EFAULT;
  623. goto err_destroy_workqueue;
  624. }
  625. /* we will acces controller register, so enable the udc controller */
  626. retval = mv_otg_enable_internal(mvotg);
  627. if (retval) {
  628. dev_err(&pdev->dev, "mv otg enable error %d\n", retval);
  629. goto err_destroy_workqueue;
  630. }
  631. mvotg->op_regs =
  632. (struct mv_otg_regs __iomem *) ((unsigned long) mvotg->cap_regs
  633. + (readl(mvotg->cap_regs) & CAPLENGTH_MASK));
  634. if (pdata->id) {
  635. retval = devm_request_threaded_irq(&pdev->dev, pdata->id->irq,
  636. NULL, mv_otg_inputs_irq,
  637. IRQF_ONESHOT, "id", mvotg);
  638. if (retval) {
  639. dev_info(&pdev->dev,
  640. "Failed to request irq for ID\n");
  641. pdata->id = NULL;
  642. }
  643. }
  644. if (pdata->vbus) {
  645. mvotg->clock_gating = 1;
  646. retval = devm_request_threaded_irq(&pdev->dev, pdata->vbus->irq,
  647. NULL, mv_otg_inputs_irq,
  648. IRQF_ONESHOT, "vbus", mvotg);
  649. if (retval) {
  650. dev_info(&pdev->dev,
  651. "Failed to request irq for VBUS, "
  652. "disable clock gating\n");
  653. mvotg->clock_gating = 0;
  654. pdata->vbus = NULL;
  655. }
  656. }
  657. if (pdata->disable_otg_clock_gating)
  658. mvotg->clock_gating = 0;
  659. mv_otg_reset(mvotg);
  660. mv_otg_init_irq(mvotg);
  661. r = platform_get_resource(mvotg->pdev, IORESOURCE_IRQ, 0);
  662. if (r == NULL) {
  663. dev_err(&pdev->dev, "no IRQ resource defined\n");
  664. retval = -ENODEV;
  665. goto err_disable_clk;
  666. }
  667. mvotg->irq = r->start;
  668. if (devm_request_irq(&pdev->dev, mvotg->irq, mv_otg_irq, IRQF_SHARED,
  669. driver_name, mvotg)) {
  670. dev_err(&pdev->dev, "Request irq %d for OTG failed\n",
  671. mvotg->irq);
  672. mvotg->irq = 0;
  673. retval = -ENODEV;
  674. goto err_disable_clk;
  675. }
  676. retval = usb_add_phy(&mvotg->phy, USB_PHY_TYPE_USB2);
  677. if (retval < 0) {
  678. dev_err(&pdev->dev, "can't register transceiver, %d\n",
  679. retval);
  680. goto err_disable_clk;
  681. }
  682. retval = sysfs_create_group(&pdev->dev.kobj, &inputs_attr_group);
  683. if (retval < 0) {
  684. dev_dbg(&pdev->dev,
  685. "Can't register sysfs attr group: %d\n", retval);
  686. goto err_remove_phy;
  687. }
  688. spin_lock_init(&mvotg->wq_lock);
  689. if (spin_trylock(&mvotg->wq_lock)) {
  690. mv_otg_run_state_machine(mvotg, 2 * HZ);
  691. spin_unlock(&mvotg->wq_lock);
  692. }
  693. dev_info(&pdev->dev,
  694. "successful probe OTG device %s clock gating.\n",
  695. mvotg->clock_gating ? "with" : "without");
  696. return 0;
  697. err_remove_phy:
  698. usb_remove_phy(&mvotg->phy);
  699. err_disable_clk:
  700. mv_otg_disable_internal(mvotg);
  701. err_destroy_workqueue:
  702. flush_workqueue(mvotg->qwork);
  703. destroy_workqueue(mvotg->qwork);
  704. return retval;
  705. }
  706. #ifdef CONFIG_PM
  707. static int mv_otg_suspend(struct platform_device *pdev, pm_message_t state)
  708. {
  709. struct mv_otg *mvotg = platform_get_drvdata(pdev);
  710. if (mvotg->phy.state != OTG_STATE_B_IDLE) {
  711. dev_info(&pdev->dev,
  712. "OTG state is not B_IDLE, it is %d!\n",
  713. mvotg->phy.state);
  714. return -EAGAIN;
  715. }
  716. if (!mvotg->clock_gating)
  717. mv_otg_disable_internal(mvotg);
  718. return 0;
  719. }
  720. static int mv_otg_resume(struct platform_device *pdev)
  721. {
  722. struct mv_otg *mvotg = platform_get_drvdata(pdev);
  723. u32 otgsc;
  724. if (!mvotg->clock_gating) {
  725. mv_otg_enable_internal(mvotg);
  726. otgsc = readl(&mvotg->op_regs->otgsc);
  727. otgsc |= mvotg->irq_en;
  728. writel(otgsc, &mvotg->op_regs->otgsc);
  729. if (spin_trylock(&mvotg->wq_lock)) {
  730. mv_otg_run_state_machine(mvotg, 0);
  731. spin_unlock(&mvotg->wq_lock);
  732. }
  733. }
  734. return 0;
  735. }
  736. #endif
  737. static struct platform_driver mv_otg_driver = {
  738. .probe = mv_otg_probe,
  739. .remove = __exit_p(mv_otg_remove),
  740. .driver = {
  741. .owner = THIS_MODULE,
  742. .name = driver_name,
  743. },
  744. #ifdef CONFIG_PM
  745. .suspend = mv_otg_suspend,
  746. .resume = mv_otg_resume,
  747. #endif
  748. };
  749. module_platform_driver(mv_otg_driver);