musb_virthub.c 13 KB

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  1. /*
  2. * MUSB OTG driver virtual root hub support
  3. *
  4. * Copyright 2005 Mentor Graphics Corporation
  5. * Copyright (C) 2005-2006 by Texas Instruments
  6. * Copyright (C) 2006-2007 Nokia Corporation
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * version 2 as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20. * 02110-1301 USA
  21. *
  22. * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
  23. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  24. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  25. * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  26. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  27. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  28. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  29. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  31. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. */
  34. #include <linux/module.h>
  35. #include <linux/kernel.h>
  36. #include <linux/sched.h>
  37. #include <linux/errno.h>
  38. #include <linux/init.h>
  39. #include <linux/time.h>
  40. #include <linux/timer.h>
  41. #include <asm/unaligned.h>
  42. #include "musb_core.h"
  43. /*
  44. * Program the HDRC to start (enable interrupts, dma, etc.).
  45. */
  46. static void musb_start(struct musb *musb)
  47. {
  48. void __iomem *regs = musb->mregs;
  49. u8 devctl = musb_readb(regs, MUSB_DEVCTL);
  50. dev_dbg(musb->controller, "<== devctl %02x\n", devctl);
  51. /* Set INT enable registers, enable interrupts */
  52. musb->intrtxe = musb->epmask;
  53. musb_writew(regs, MUSB_INTRTXE, musb->intrtxe);
  54. musb->intrrxe = musb->epmask & 0xfffe;
  55. musb_writew(regs, MUSB_INTRRXE, musb->intrrxe);
  56. musb_writeb(regs, MUSB_INTRUSBE, 0xf7);
  57. musb_writeb(regs, MUSB_TESTMODE, 0);
  58. /* put into basic highspeed mode and start session */
  59. musb_writeb(regs, MUSB_POWER, MUSB_POWER_ISOUPDATE
  60. | MUSB_POWER_HSENAB
  61. /* ENSUSPEND wedges tusb */
  62. /* | MUSB_POWER_ENSUSPEND */
  63. );
  64. musb->is_active = 0;
  65. devctl = musb_readb(regs, MUSB_DEVCTL);
  66. devctl &= ~MUSB_DEVCTL_SESSION;
  67. /* session started after:
  68. * (a) ID-grounded irq, host mode;
  69. * (b) vbus present/connect IRQ, peripheral mode;
  70. * (c) peripheral initiates, using SRP
  71. */
  72. if (musb->port_mode != MUSB_PORT_MODE_HOST &&
  73. (devctl & MUSB_DEVCTL_VBUS) == MUSB_DEVCTL_VBUS) {
  74. musb->is_active = 1;
  75. } else {
  76. devctl |= MUSB_DEVCTL_SESSION;
  77. }
  78. musb_platform_enable(musb);
  79. musb_writeb(regs, MUSB_DEVCTL, devctl);
  80. }
  81. static void musb_port_suspend(struct musb *musb, bool do_suspend)
  82. {
  83. struct usb_otg *otg = musb->xceiv->otg;
  84. u8 power;
  85. void __iomem *mbase = musb->mregs;
  86. if (!is_host_active(musb))
  87. return;
  88. /* NOTE: this doesn't necessarily put PHY into low power mode,
  89. * turning off its clock; that's a function of PHY integration and
  90. * MUSB_POWER_ENSUSPEND. PHY may need a clock (sigh) to detect
  91. * SE0 changing to connect (J) or wakeup (K) states.
  92. */
  93. power = musb_readb(mbase, MUSB_POWER);
  94. if (do_suspend) {
  95. int retries = 10000;
  96. power &= ~MUSB_POWER_RESUME;
  97. power |= MUSB_POWER_SUSPENDM;
  98. musb_writeb(mbase, MUSB_POWER, power);
  99. /* Needed for OPT A tests */
  100. power = musb_readb(mbase, MUSB_POWER);
  101. while (power & MUSB_POWER_SUSPENDM) {
  102. power = musb_readb(mbase, MUSB_POWER);
  103. if (retries-- < 1)
  104. break;
  105. }
  106. dev_dbg(musb->controller, "Root port suspended, power %02x\n", power);
  107. musb->port1_status |= USB_PORT_STAT_SUSPEND;
  108. switch (musb->xceiv->state) {
  109. case OTG_STATE_A_HOST:
  110. musb->xceiv->state = OTG_STATE_A_SUSPEND;
  111. musb->is_active = otg->host->b_hnp_enable;
  112. if (musb->is_active)
  113. mod_timer(&musb->otg_timer, jiffies
  114. + msecs_to_jiffies(
  115. OTG_TIME_A_AIDL_BDIS));
  116. musb_platform_try_idle(musb, 0);
  117. break;
  118. case OTG_STATE_B_HOST:
  119. musb->xceiv->state = OTG_STATE_B_WAIT_ACON;
  120. musb->is_active = otg->host->b_hnp_enable;
  121. musb_platform_try_idle(musb, 0);
  122. break;
  123. default:
  124. dev_dbg(musb->controller, "bogus rh suspend? %s\n",
  125. usb_otg_state_string(musb->xceiv->state));
  126. }
  127. } else if (power & MUSB_POWER_SUSPENDM) {
  128. power &= ~MUSB_POWER_SUSPENDM;
  129. power |= MUSB_POWER_RESUME;
  130. musb_writeb(mbase, MUSB_POWER, power);
  131. dev_dbg(musb->controller, "Root port resuming, power %02x\n", power);
  132. /* later, GetPortStatus will stop RESUME signaling */
  133. musb->port1_status |= MUSB_PORT_STAT_RESUME;
  134. musb->rh_timer = jiffies + msecs_to_jiffies(20);
  135. }
  136. }
  137. static void musb_port_reset(struct musb *musb, bool do_reset)
  138. {
  139. u8 power;
  140. void __iomem *mbase = musb->mregs;
  141. if (musb->xceiv->state == OTG_STATE_B_IDLE) {
  142. dev_dbg(musb->controller, "HNP: Returning from HNP; no hub reset from b_idle\n");
  143. musb->port1_status &= ~USB_PORT_STAT_RESET;
  144. return;
  145. }
  146. if (!is_host_active(musb))
  147. return;
  148. /* NOTE: caller guarantees it will turn off the reset when
  149. * the appropriate amount of time has passed
  150. */
  151. power = musb_readb(mbase, MUSB_POWER);
  152. if (do_reset) {
  153. /*
  154. * If RESUME is set, we must make sure it stays minimum 20 ms.
  155. * Then we must clear RESUME and wait a bit to let musb start
  156. * generating SOFs. If we don't do this, OPT HS A 6.8 tests
  157. * fail with "Error! Did not receive an SOF before suspend
  158. * detected".
  159. */
  160. if (power & MUSB_POWER_RESUME) {
  161. while (time_before(jiffies, musb->rh_timer))
  162. msleep(1);
  163. musb_writeb(mbase, MUSB_POWER,
  164. power & ~MUSB_POWER_RESUME);
  165. msleep(1);
  166. }
  167. power &= 0xf0;
  168. musb_writeb(mbase, MUSB_POWER,
  169. power | MUSB_POWER_RESET);
  170. musb->port1_status |= USB_PORT_STAT_RESET;
  171. musb->port1_status &= ~USB_PORT_STAT_ENABLE;
  172. musb->rh_timer = jiffies + msecs_to_jiffies(50);
  173. } else {
  174. dev_dbg(musb->controller, "root port reset stopped\n");
  175. musb_writeb(mbase, MUSB_POWER,
  176. power & ~MUSB_POWER_RESET);
  177. power = musb_readb(mbase, MUSB_POWER);
  178. if (power & MUSB_POWER_HSMODE) {
  179. dev_dbg(musb->controller, "high-speed device connected\n");
  180. musb->port1_status |= USB_PORT_STAT_HIGH_SPEED;
  181. }
  182. musb->port1_status &= ~USB_PORT_STAT_RESET;
  183. musb->port1_status |= USB_PORT_STAT_ENABLE
  184. | (USB_PORT_STAT_C_RESET << 16)
  185. | (USB_PORT_STAT_C_ENABLE << 16);
  186. usb_hcd_poll_rh_status(musb->hcd);
  187. musb->vbuserr_retry = VBUSERR_RETRY_COUNT;
  188. }
  189. }
  190. void musb_root_disconnect(struct musb *musb)
  191. {
  192. struct usb_otg *otg = musb->xceiv->otg;
  193. musb->port1_status = USB_PORT_STAT_POWER
  194. | (USB_PORT_STAT_C_CONNECTION << 16);
  195. usb_hcd_poll_rh_status(musb->hcd);
  196. musb->is_active = 0;
  197. switch (musb->xceiv->state) {
  198. case OTG_STATE_A_SUSPEND:
  199. if (otg->host->b_hnp_enable) {
  200. musb->xceiv->state = OTG_STATE_A_PERIPHERAL;
  201. musb->g.is_a_peripheral = 1;
  202. break;
  203. }
  204. /* FALLTHROUGH */
  205. case OTG_STATE_A_HOST:
  206. musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
  207. musb->is_active = 0;
  208. break;
  209. case OTG_STATE_A_WAIT_VFALL:
  210. musb->xceiv->state = OTG_STATE_B_IDLE;
  211. break;
  212. default:
  213. dev_dbg(musb->controller, "host disconnect (%s)\n",
  214. usb_otg_state_string(musb->xceiv->state));
  215. }
  216. }
  217. /*---------------------------------------------------------------------*/
  218. /* Caller may or may not hold musb->lock */
  219. int musb_hub_status_data(struct usb_hcd *hcd, char *buf)
  220. {
  221. struct musb *musb = hcd_to_musb(hcd);
  222. int retval = 0;
  223. /* called in_irq() via usb_hcd_poll_rh_status() */
  224. if (musb->port1_status & 0xffff0000) {
  225. *buf = 0x02;
  226. retval = 1;
  227. }
  228. return retval;
  229. }
  230. int musb_hub_control(
  231. struct usb_hcd *hcd,
  232. u16 typeReq,
  233. u16 wValue,
  234. u16 wIndex,
  235. char *buf,
  236. u16 wLength)
  237. {
  238. struct musb *musb = hcd_to_musb(hcd);
  239. u32 temp;
  240. int retval = 0;
  241. unsigned long flags;
  242. spin_lock_irqsave(&musb->lock, flags);
  243. if (unlikely(!HCD_HW_ACCESSIBLE(hcd))) {
  244. spin_unlock_irqrestore(&musb->lock, flags);
  245. return -ESHUTDOWN;
  246. }
  247. /* hub features: always zero, setting is a NOP
  248. * port features: reported, sometimes updated when host is active
  249. * no indicators
  250. */
  251. switch (typeReq) {
  252. case ClearHubFeature:
  253. case SetHubFeature:
  254. switch (wValue) {
  255. case C_HUB_OVER_CURRENT:
  256. case C_HUB_LOCAL_POWER:
  257. break;
  258. default:
  259. goto error;
  260. }
  261. break;
  262. case ClearPortFeature:
  263. if ((wIndex & 0xff) != 1)
  264. goto error;
  265. switch (wValue) {
  266. case USB_PORT_FEAT_ENABLE:
  267. break;
  268. case USB_PORT_FEAT_SUSPEND:
  269. musb_port_suspend(musb, false);
  270. break;
  271. case USB_PORT_FEAT_POWER:
  272. if (!hcd->self.is_b_host)
  273. musb_platform_set_vbus(musb, 0);
  274. break;
  275. case USB_PORT_FEAT_C_CONNECTION:
  276. case USB_PORT_FEAT_C_ENABLE:
  277. case USB_PORT_FEAT_C_OVER_CURRENT:
  278. case USB_PORT_FEAT_C_RESET:
  279. case USB_PORT_FEAT_C_SUSPEND:
  280. break;
  281. default:
  282. goto error;
  283. }
  284. dev_dbg(musb->controller, "clear feature %d\n", wValue);
  285. musb->port1_status &= ~(1 << wValue);
  286. break;
  287. case GetHubDescriptor:
  288. {
  289. struct usb_hub_descriptor *desc = (void *)buf;
  290. desc->bDescLength = 9;
  291. desc->bDescriptorType = 0x29;
  292. desc->bNbrPorts = 1;
  293. desc->wHubCharacteristics = cpu_to_le16(
  294. 0x0001 /* per-port power switching */
  295. | 0x0010 /* no overcurrent reporting */
  296. );
  297. desc->bPwrOn2PwrGood = 5; /* msec/2 */
  298. desc->bHubContrCurrent = 0;
  299. /* workaround bogus struct definition */
  300. desc->u.hs.DeviceRemovable[0] = 0x02; /* port 1 */
  301. desc->u.hs.DeviceRemovable[1] = 0xff;
  302. }
  303. break;
  304. case GetHubStatus:
  305. temp = 0;
  306. *(__le32 *) buf = cpu_to_le32(temp);
  307. break;
  308. case GetPortStatus:
  309. if (wIndex != 1)
  310. goto error;
  311. /* finish RESET signaling? */
  312. if ((musb->port1_status & USB_PORT_STAT_RESET)
  313. && time_after_eq(jiffies, musb->rh_timer))
  314. musb_port_reset(musb, false);
  315. /* finish RESUME signaling? */
  316. if ((musb->port1_status & MUSB_PORT_STAT_RESUME)
  317. && time_after_eq(jiffies, musb->rh_timer)) {
  318. u8 power;
  319. power = musb_readb(musb->mregs, MUSB_POWER);
  320. power &= ~MUSB_POWER_RESUME;
  321. dev_dbg(musb->controller, "root port resume stopped, power %02x\n",
  322. power);
  323. musb_writeb(musb->mregs, MUSB_POWER, power);
  324. /* ISSUE: DaVinci (RTL 1.300) disconnects after
  325. * resume of high speed peripherals (but not full
  326. * speed ones).
  327. */
  328. musb->is_active = 1;
  329. musb->port1_status &= ~(USB_PORT_STAT_SUSPEND
  330. | MUSB_PORT_STAT_RESUME);
  331. musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
  332. usb_hcd_poll_rh_status(musb->hcd);
  333. /* NOTE: it might really be A_WAIT_BCON ... */
  334. musb->xceiv->state = OTG_STATE_A_HOST;
  335. }
  336. put_unaligned(cpu_to_le32(musb->port1_status
  337. & ~MUSB_PORT_STAT_RESUME),
  338. (__le32 *) buf);
  339. /* port change status is more interesting */
  340. dev_dbg(musb->controller, "port status %08x\n",
  341. musb->port1_status);
  342. break;
  343. case SetPortFeature:
  344. if ((wIndex & 0xff) != 1)
  345. goto error;
  346. switch (wValue) {
  347. case USB_PORT_FEAT_POWER:
  348. /* NOTE: this controller has a strange state machine
  349. * that involves "requesting sessions" according to
  350. * magic side effects from incompletely-described
  351. * rules about startup...
  352. *
  353. * This call is what really starts the host mode; be
  354. * very careful about side effects if you reorder any
  355. * initialization logic, e.g. for OTG, or change any
  356. * logic relating to VBUS power-up.
  357. */
  358. if (!hcd->self.is_b_host)
  359. musb_start(musb);
  360. break;
  361. case USB_PORT_FEAT_RESET:
  362. musb_port_reset(musb, true);
  363. break;
  364. case USB_PORT_FEAT_SUSPEND:
  365. musb_port_suspend(musb, true);
  366. break;
  367. case USB_PORT_FEAT_TEST:
  368. if (unlikely(is_host_active(musb)))
  369. goto error;
  370. wIndex >>= 8;
  371. switch (wIndex) {
  372. case 1:
  373. pr_debug("TEST_J\n");
  374. temp = MUSB_TEST_J;
  375. break;
  376. case 2:
  377. pr_debug("TEST_K\n");
  378. temp = MUSB_TEST_K;
  379. break;
  380. case 3:
  381. pr_debug("TEST_SE0_NAK\n");
  382. temp = MUSB_TEST_SE0_NAK;
  383. break;
  384. case 4:
  385. pr_debug("TEST_PACKET\n");
  386. temp = MUSB_TEST_PACKET;
  387. musb_load_testpacket(musb);
  388. break;
  389. case 5:
  390. pr_debug("TEST_FORCE_ENABLE\n");
  391. temp = MUSB_TEST_FORCE_HOST
  392. | MUSB_TEST_FORCE_HS;
  393. musb_writeb(musb->mregs, MUSB_DEVCTL,
  394. MUSB_DEVCTL_SESSION);
  395. break;
  396. case 6:
  397. pr_debug("TEST_FIFO_ACCESS\n");
  398. temp = MUSB_TEST_FIFO_ACCESS;
  399. break;
  400. default:
  401. goto error;
  402. }
  403. musb_writeb(musb->mregs, MUSB_TESTMODE, temp);
  404. break;
  405. default:
  406. goto error;
  407. }
  408. dev_dbg(musb->controller, "set feature %d\n", wValue);
  409. musb->port1_status |= 1 << wValue;
  410. break;
  411. default:
  412. error:
  413. /* "protocol stall" on error */
  414. retval = -EPIPE;
  415. }
  416. spin_unlock_irqrestore(&musb->lock, flags);
  417. return retval;
  418. }