musb_core.h 15 KB

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  1. /*
  2. * MUSB OTG driver defines
  3. *
  4. * Copyright 2005 Mentor Graphics Corporation
  5. * Copyright (C) 2005-2006 by Texas Instruments
  6. * Copyright (C) 2006-2007 Nokia Corporation
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * version 2 as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20. * 02110-1301 USA
  21. *
  22. * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
  23. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  24. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  25. * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  26. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  27. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  28. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  29. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  31. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. */
  34. #ifndef __MUSB_CORE_H__
  35. #define __MUSB_CORE_H__
  36. #include <linux/slab.h>
  37. #include <linux/list.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/errno.h>
  40. #include <linux/timer.h>
  41. #include <linux/device.h>
  42. #include <linux/usb/ch9.h>
  43. #include <linux/usb/gadget.h>
  44. #include <linux/usb.h>
  45. #include <linux/usb/otg.h>
  46. #include <linux/usb/musb.h>
  47. struct musb;
  48. struct musb_hw_ep;
  49. struct musb_ep;
  50. /* Helper defines for struct musb->hwvers */
  51. #define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f)
  52. #define MUSB_HWVERS_MINOR(x) (x & 0x3ff)
  53. #define MUSB_HWVERS_RC 0x8000
  54. #define MUSB_HWVERS_1300 0x52C
  55. #define MUSB_HWVERS_1400 0x590
  56. #define MUSB_HWVERS_1800 0x720
  57. #define MUSB_HWVERS_1900 0x784
  58. #define MUSB_HWVERS_2000 0x800
  59. #include "musb_debug.h"
  60. #include "musb_dma.h"
  61. #include "musb_io.h"
  62. #include "musb_regs.h"
  63. #include "musb_gadget.h"
  64. #include <linux/usb/hcd.h>
  65. #include "musb_host.h"
  66. /* NOTE: otg and peripheral-only state machines start at B_IDLE.
  67. * OTG or host-only go to A_IDLE when ID is sensed.
  68. */
  69. #define is_peripheral_active(m) (!(m)->is_host)
  70. #define is_host_active(m) ((m)->is_host)
  71. enum {
  72. MUSB_PORT_MODE_HOST = 1,
  73. MUSB_PORT_MODE_GADGET,
  74. MUSB_PORT_MODE_DUAL_ROLE,
  75. };
  76. #ifdef CONFIG_PROC_FS
  77. #include <linux/fs.h>
  78. #define MUSB_CONFIG_PROC_FS
  79. #endif
  80. /****************************** CONSTANTS ********************************/
  81. #ifndef MUSB_C_NUM_EPS
  82. #define MUSB_C_NUM_EPS ((u8)16)
  83. #endif
  84. #ifndef MUSB_MAX_END0_PACKET
  85. #define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
  86. #endif
  87. /* host side ep0 states */
  88. enum musb_h_ep0_state {
  89. MUSB_EP0_IDLE,
  90. MUSB_EP0_START, /* expect ack of setup */
  91. MUSB_EP0_IN, /* expect IN DATA */
  92. MUSB_EP0_OUT, /* expect ack of OUT DATA */
  93. MUSB_EP0_STATUS, /* expect ack of STATUS */
  94. } __attribute__ ((packed));
  95. /* peripheral side ep0 states */
  96. enum musb_g_ep0_state {
  97. MUSB_EP0_STAGE_IDLE, /* idle, waiting for SETUP */
  98. MUSB_EP0_STAGE_SETUP, /* received SETUP */
  99. MUSB_EP0_STAGE_TX, /* IN data */
  100. MUSB_EP0_STAGE_RX, /* OUT data */
  101. MUSB_EP0_STAGE_STATUSIN, /* (after OUT data) */
  102. MUSB_EP0_STAGE_STATUSOUT, /* (after IN data) */
  103. MUSB_EP0_STAGE_ACKWAIT, /* after zlp, before statusin */
  104. } __attribute__ ((packed));
  105. /*
  106. * OTG protocol constants. See USB OTG 1.3 spec,
  107. * sections 5.5 "Device Timings" and 6.6.5 "Timers".
  108. */
  109. #define OTG_TIME_A_WAIT_VRISE 100 /* msec (max) */
  110. #define OTG_TIME_A_WAIT_BCON 1100 /* min 1 second */
  111. #define OTG_TIME_A_AIDL_BDIS 200 /* min 200 msec */
  112. #define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */
  113. /*************************** REGISTER ACCESS ********************************/
  114. /* Endpoint registers (other than dynfifo setup) can be accessed either
  115. * directly with the "flat" model, or after setting up an index register.
  116. */
  117. #if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_SOC_OMAP2430) \
  118. || defined(CONFIG_SOC_OMAP3430) || defined(CONFIG_BLACKFIN) \
  119. || defined(CONFIG_ARCH_OMAP4)
  120. /* REVISIT indexed access seemed to
  121. * misbehave (on DaVinci) for at least peripheral IN ...
  122. */
  123. #define MUSB_FLAT_REG
  124. #endif
  125. /* TUSB mapping: "flat" plus ep0 special cases */
  126. #if defined(CONFIG_USB_MUSB_TUSB6010) || \
  127. defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
  128. #define musb_ep_select(_mbase, _epnum) \
  129. musb_writeb((_mbase), MUSB_INDEX, (_epnum))
  130. #define MUSB_EP_OFFSET MUSB_TUSB_OFFSET
  131. /* "flat" mapping: each endpoint has its own i/o address */
  132. #elif defined(MUSB_FLAT_REG)
  133. #define musb_ep_select(_mbase, _epnum) (((void)(_mbase)), ((void)(_epnum)))
  134. #define MUSB_EP_OFFSET MUSB_FLAT_OFFSET
  135. /* "indexed" mapping: INDEX register controls register bank select */
  136. #else
  137. #define musb_ep_select(_mbase, _epnum) \
  138. musb_writeb((_mbase), MUSB_INDEX, (_epnum))
  139. #define MUSB_EP_OFFSET MUSB_INDEXED_OFFSET
  140. #endif
  141. /****************************** FUNCTIONS ********************************/
  142. #define MUSB_HST_MODE(_musb)\
  143. { (_musb)->is_host = true; }
  144. #define MUSB_DEV_MODE(_musb) \
  145. { (_musb)->is_host = false; }
  146. #define test_devctl_hst_mode(_x) \
  147. (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
  148. #define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
  149. /******************************** TYPES *************************************/
  150. /**
  151. * struct musb_platform_ops - Operations passed to musb_core by HW glue layer
  152. * @init: turns on clocks, sets up platform-specific registers, etc
  153. * @exit: undoes @init
  154. * @set_mode: forcefully changes operating mode
  155. * @try_ilde: tries to idle the IP
  156. * @vbus_status: returns vbus status if possible
  157. * @set_vbus: forces vbus status
  158. * @adjust_channel_params: pre check for standard dma channel_program func
  159. */
  160. struct musb_platform_ops {
  161. int (*init)(struct musb *musb);
  162. int (*exit)(struct musb *musb);
  163. void (*enable)(struct musb *musb);
  164. void (*disable)(struct musb *musb);
  165. int (*set_mode)(struct musb *musb, u8 mode);
  166. void (*try_idle)(struct musb *musb, unsigned long timeout);
  167. int (*vbus_status)(struct musb *musb);
  168. void (*set_vbus)(struct musb *musb, int on);
  169. int (*adjust_channel_params)(struct dma_channel *channel,
  170. u16 packet_sz, u8 *mode,
  171. dma_addr_t *dma_addr, u32 *len);
  172. };
  173. /*
  174. * struct musb_hw_ep - endpoint hardware (bidirectional)
  175. *
  176. * Ordered slightly for better cacheline locality.
  177. */
  178. struct musb_hw_ep {
  179. struct musb *musb;
  180. void __iomem *fifo;
  181. void __iomem *regs;
  182. #if defined(CONFIG_USB_MUSB_TUSB6010) || \
  183. defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
  184. void __iomem *conf;
  185. #endif
  186. /* index in musb->endpoints[] */
  187. u8 epnum;
  188. /* hardware configuration, possibly dynamic */
  189. bool is_shared_fifo;
  190. bool tx_double_buffered;
  191. bool rx_double_buffered;
  192. u16 max_packet_sz_tx;
  193. u16 max_packet_sz_rx;
  194. struct dma_channel *tx_channel;
  195. struct dma_channel *rx_channel;
  196. #if defined(CONFIG_USB_MUSB_TUSB6010) || \
  197. defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
  198. /* TUSB has "asynchronous" and "synchronous" dma modes */
  199. dma_addr_t fifo_async;
  200. dma_addr_t fifo_sync;
  201. void __iomem *fifo_sync_va;
  202. #endif
  203. void __iomem *target_regs;
  204. /* currently scheduled peripheral endpoint */
  205. struct musb_qh *in_qh;
  206. struct musb_qh *out_qh;
  207. u8 rx_reinit;
  208. u8 tx_reinit;
  209. /* peripheral side */
  210. struct musb_ep ep_in; /* TX */
  211. struct musb_ep ep_out; /* RX */
  212. };
  213. static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep)
  214. {
  215. return next_request(&hw_ep->ep_in);
  216. }
  217. static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep)
  218. {
  219. return next_request(&hw_ep->ep_out);
  220. }
  221. struct musb_csr_regs {
  222. /* FIFO registers */
  223. u16 txmaxp, txcsr, rxmaxp, rxcsr;
  224. u16 rxfifoadd, txfifoadd;
  225. u8 txtype, txinterval, rxtype, rxinterval;
  226. u8 rxfifosz, txfifosz;
  227. u8 txfunaddr, txhubaddr, txhubport;
  228. u8 rxfunaddr, rxhubaddr, rxhubport;
  229. };
  230. struct musb_context_registers {
  231. u8 power;
  232. u8 intrusbe;
  233. u16 frame;
  234. u8 index, testmode;
  235. u8 devctl, busctl, misc;
  236. u32 otg_interfsel;
  237. struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
  238. };
  239. /*
  240. * struct musb - Driver instance data.
  241. */
  242. struct musb {
  243. /* device lock */
  244. spinlock_t lock;
  245. const struct musb_platform_ops *ops;
  246. struct musb_context_registers context;
  247. irqreturn_t (*isr)(int, void *);
  248. struct work_struct irq_work;
  249. u16 hwvers;
  250. u16 intrrxe;
  251. u16 intrtxe;
  252. /* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
  253. #define MUSB_PORT_STAT_RESUME (1 << 31)
  254. u32 port1_status;
  255. unsigned long rh_timer;
  256. enum musb_h_ep0_state ep0_stage;
  257. /* bulk traffic normally dedicates endpoint hardware, and each
  258. * direction has its own ring of host side endpoints.
  259. * we try to progress the transfer at the head of each endpoint's
  260. * queue until it completes or NAKs too much; then we try the next
  261. * endpoint.
  262. */
  263. struct musb_hw_ep *bulk_ep;
  264. struct list_head control; /* of musb_qh */
  265. struct list_head in_bulk; /* of musb_qh */
  266. struct list_head out_bulk; /* of musb_qh */
  267. struct timer_list otg_timer;
  268. struct notifier_block nb;
  269. struct dma_controller *dma_controller;
  270. struct device *controller;
  271. void __iomem *ctrl_base;
  272. void __iomem *mregs;
  273. #if defined(CONFIG_USB_MUSB_TUSB6010) || \
  274. defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
  275. dma_addr_t async;
  276. dma_addr_t sync;
  277. void __iomem *sync_va;
  278. #endif
  279. /* passed down from chip/board specific irq handlers */
  280. u8 int_usb;
  281. u16 int_rx;
  282. u16 int_tx;
  283. struct usb_phy *xceiv;
  284. int nIrq;
  285. unsigned irq_wake:1;
  286. struct musb_hw_ep endpoints[MUSB_C_NUM_EPS];
  287. #define control_ep endpoints
  288. #define VBUSERR_RETRY_COUNT 3
  289. u16 vbuserr_retry;
  290. u16 epmask;
  291. u8 nr_endpoints;
  292. int (*board_set_power)(int state);
  293. u8 min_power; /* vbus for periph, in mA/2 */
  294. int port_mode; /* MUSB_PORT_MODE_* */
  295. bool is_host;
  296. int a_wait_bcon; /* VBUS timeout in msecs */
  297. unsigned long idle_timeout; /* Next timeout in jiffies */
  298. /* active means connected and not suspended */
  299. unsigned is_active:1;
  300. unsigned is_multipoint:1;
  301. unsigned hb_iso_rx:1; /* high bandwidth iso rx? */
  302. unsigned hb_iso_tx:1; /* high bandwidth iso tx? */
  303. unsigned dyn_fifo:1; /* dynamic FIFO supported? */
  304. unsigned bulk_split:1;
  305. #define can_bulk_split(musb,type) \
  306. (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
  307. unsigned bulk_combine:1;
  308. #define can_bulk_combine(musb,type) \
  309. (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
  310. /* is_suspended means USB B_PERIPHERAL suspend */
  311. unsigned is_suspended:1;
  312. /* may_wakeup means remote wakeup is enabled */
  313. unsigned may_wakeup:1;
  314. /* is_self_powered is reported in device status and the
  315. * config descriptor. is_bus_powered means B_PERIPHERAL
  316. * draws some VBUS current; both can be true.
  317. */
  318. unsigned is_self_powered:1;
  319. unsigned is_bus_powered:1;
  320. unsigned set_address:1;
  321. unsigned test_mode:1;
  322. unsigned softconnect:1;
  323. u8 address;
  324. u8 test_mode_nr;
  325. u16 ackpend; /* ep0 */
  326. enum musb_g_ep0_state ep0_state;
  327. struct usb_gadget g; /* the gadget */
  328. struct usb_gadget_driver *gadget_driver; /* its driver */
  329. struct usb_hcd *hcd; /* the usb hcd */
  330. /*
  331. * FIXME: Remove this flag.
  332. *
  333. * This is only added to allow Blackfin to work
  334. * with current driver. For some unknown reason
  335. * Blackfin doesn't work with double buffering
  336. * and that's enabled by default.
  337. *
  338. * We added this flag to forcefully disable double
  339. * buffering until we get it working.
  340. */
  341. unsigned double_buffer_not_ok:1;
  342. struct musb_hdrc_config *config;
  343. #ifdef MUSB_CONFIG_PROC_FS
  344. struct proc_dir_entry *proc_entry;
  345. #endif
  346. int xceiv_old_state;
  347. #ifdef CONFIG_DEBUG_FS
  348. struct dentry *debugfs_root;
  349. #endif
  350. };
  351. static inline struct musb *gadget_to_musb(struct usb_gadget *g)
  352. {
  353. return container_of(g, struct musb, g);
  354. }
  355. #ifdef CONFIG_BLACKFIN
  356. static inline int musb_read_fifosize(struct musb *musb,
  357. struct musb_hw_ep *hw_ep, u8 epnum)
  358. {
  359. musb->nr_endpoints++;
  360. musb->epmask |= (1 << epnum);
  361. if (epnum < 5) {
  362. hw_ep->max_packet_sz_tx = 128;
  363. hw_ep->max_packet_sz_rx = 128;
  364. } else {
  365. hw_ep->max_packet_sz_tx = 1024;
  366. hw_ep->max_packet_sz_rx = 1024;
  367. }
  368. hw_ep->is_shared_fifo = false;
  369. return 0;
  370. }
  371. static inline void musb_configure_ep0(struct musb *musb)
  372. {
  373. musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
  374. musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
  375. musb->endpoints[0].is_shared_fifo = true;
  376. }
  377. #else
  378. static inline int musb_read_fifosize(struct musb *musb,
  379. struct musb_hw_ep *hw_ep, u8 epnum)
  380. {
  381. void __iomem *mbase = musb->mregs;
  382. u8 reg = 0;
  383. /* read from core using indexed model */
  384. reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE));
  385. /* 0's returned when no more endpoints */
  386. if (!reg)
  387. return -ENODEV;
  388. musb->nr_endpoints++;
  389. musb->epmask |= (1 << epnum);
  390. hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
  391. /* shared TX/RX FIFO? */
  392. if ((reg & 0xf0) == 0xf0) {
  393. hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
  394. hw_ep->is_shared_fifo = true;
  395. return 0;
  396. } else {
  397. hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
  398. hw_ep->is_shared_fifo = false;
  399. }
  400. return 0;
  401. }
  402. static inline void musb_configure_ep0(struct musb *musb)
  403. {
  404. musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
  405. musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
  406. musb->endpoints[0].is_shared_fifo = true;
  407. }
  408. #endif /* CONFIG_BLACKFIN */
  409. /***************************** Glue it together *****************************/
  410. extern const char musb_driver_name[];
  411. extern void musb_stop(struct musb *musb);
  412. extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
  413. extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);
  414. extern void musb_load_testpacket(struct musb *);
  415. extern irqreturn_t musb_interrupt(struct musb *);
  416. extern void musb_hnp_stop(struct musb *musb);
  417. static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
  418. {
  419. if (musb->ops->set_vbus)
  420. musb->ops->set_vbus(musb, is_on);
  421. }
  422. static inline void musb_platform_enable(struct musb *musb)
  423. {
  424. if (musb->ops->enable)
  425. musb->ops->enable(musb);
  426. }
  427. static inline void musb_platform_disable(struct musb *musb)
  428. {
  429. if (musb->ops->disable)
  430. musb->ops->disable(musb);
  431. }
  432. static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
  433. {
  434. if (!musb->ops->set_mode)
  435. return 0;
  436. return musb->ops->set_mode(musb, mode);
  437. }
  438. static inline void musb_platform_try_idle(struct musb *musb,
  439. unsigned long timeout)
  440. {
  441. if (musb->ops->try_idle)
  442. musb->ops->try_idle(musb, timeout);
  443. }
  444. static inline int musb_platform_get_vbus_status(struct musb *musb)
  445. {
  446. if (!musb->ops->vbus_status)
  447. return 0;
  448. return musb->ops->vbus_status(musb);
  449. }
  450. static inline int musb_platform_init(struct musb *musb)
  451. {
  452. if (!musb->ops->init)
  453. return -EINVAL;
  454. return musb->ops->init(musb);
  455. }
  456. static inline int musb_platform_exit(struct musb *musb)
  457. {
  458. if (!musb->ops->exit)
  459. return -EINVAL;
  460. return musb->ops->exit(musb);
  461. }
  462. #endif /* __MUSB_CORE_H__ */