fusbh200-hcd.c 166 KB

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  1. /*
  2. * Faraday FUSBH200 EHCI-like driver
  3. *
  4. * Copyright (c) 2013 Faraday Technology Corporation
  5. *
  6. * Author: Yuan-Hsin Chen <yhchen@faraday-tech.com>
  7. * Feng-Hsin Chiang <john453@faraday-tech.com>
  8. * Po-Yu Chuang <ratbert.chuang@gmail.com>
  9. *
  10. * Most of code borrowed from the Linux-3.7 EHCI driver
  11. *
  12. * This program is free software; you can redistribute it and/or modify it
  13. * under the terms of the GNU General Public License as published by the
  14. * Free Software Foundation; either version 2 of the License, or (at your
  15. * option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful, but
  18. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  19. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  20. * for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software Foundation,
  24. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  25. */
  26. #include <linux/module.h>
  27. #include <linux/device.h>
  28. #include <linux/dmapool.h>
  29. #include <linux/kernel.h>
  30. #include <linux/delay.h>
  31. #include <linux/ioport.h>
  32. #include <linux/sched.h>
  33. #include <linux/vmalloc.h>
  34. #include <linux/errno.h>
  35. #include <linux/init.h>
  36. #include <linux/hrtimer.h>
  37. #include <linux/list.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/usb.h>
  40. #include <linux/usb/hcd.h>
  41. #include <linux/moduleparam.h>
  42. #include <linux/dma-mapping.h>
  43. #include <linux/debugfs.h>
  44. #include <linux/slab.h>
  45. #include <linux/uaccess.h>
  46. #include <linux/platform_device.h>
  47. #include <asm/byteorder.h>
  48. #include <asm/io.h>
  49. #include <asm/irq.h>
  50. #include <asm/unaligned.h>
  51. /*-------------------------------------------------------------------------*/
  52. #define DRIVER_AUTHOR "Yuan-Hsin Chen"
  53. #define DRIVER_DESC "FUSBH200 Host Controller (EHCI) Driver"
  54. static const char hcd_name [] = "fusbh200_hcd";
  55. #undef VERBOSE_DEBUG
  56. #undef FUSBH200_URB_TRACE
  57. #ifdef DEBUG
  58. #define FUSBH200_STATS
  59. #endif
  60. /* magic numbers that can affect system performance */
  61. #define FUSBH200_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
  62. #define FUSBH200_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
  63. #define FUSBH200_TUNE_RL_TT 0
  64. #define FUSBH200_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
  65. #define FUSBH200_TUNE_MULT_TT 1
  66. /*
  67. * Some drivers think it's safe to schedule isochronous transfers more than
  68. * 256 ms into the future (partly as a result of an old bug in the scheduling
  69. * code). In an attempt to avoid trouble, we will use a minimum scheduling
  70. * length of 512 frames instead of 256.
  71. */
  72. #define FUSBH200_TUNE_FLS 1 /* (medium) 512-frame schedule */
  73. /* Initial IRQ latency: faster than hw default */
  74. static int log2_irq_thresh = 0; // 0 to 6
  75. module_param (log2_irq_thresh, int, S_IRUGO);
  76. MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
  77. /* initial park setting: slower than hw default */
  78. static unsigned park = 0;
  79. module_param (park, uint, S_IRUGO);
  80. MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
  81. /* for link power management(LPM) feature */
  82. static unsigned int hird;
  83. module_param(hird, int, S_IRUGO);
  84. MODULE_PARM_DESC(hird, "host initiated resume duration, +1 for each 75us");
  85. #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
  86. #include "fusbh200.h"
  87. /*-------------------------------------------------------------------------*/
  88. #define fusbh200_dbg(fusbh200, fmt, args...) \
  89. dev_dbg (fusbh200_to_hcd(fusbh200)->self.controller , fmt , ## args )
  90. #define fusbh200_err(fusbh200, fmt, args...) \
  91. dev_err (fusbh200_to_hcd(fusbh200)->self.controller , fmt , ## args )
  92. #define fusbh200_info(fusbh200, fmt, args...) \
  93. dev_info (fusbh200_to_hcd(fusbh200)->self.controller , fmt , ## args )
  94. #define fusbh200_warn(fusbh200, fmt, args...) \
  95. dev_warn (fusbh200_to_hcd(fusbh200)->self.controller , fmt , ## args )
  96. #ifdef VERBOSE_DEBUG
  97. # define fusbh200_vdbg fusbh200_dbg
  98. #else
  99. static inline void fusbh200_vdbg(struct fusbh200_hcd *fusbh200, ...) {}
  100. #endif
  101. #ifdef DEBUG
  102. /* check the values in the HCSPARAMS register
  103. * (host controller _Structural_ parameters)
  104. * see EHCI spec, Table 2-4 for each value
  105. */
  106. static void dbg_hcs_params (struct fusbh200_hcd *fusbh200, char *label)
  107. {
  108. u32 params = fusbh200_readl(fusbh200, &fusbh200->caps->hcs_params);
  109. fusbh200_dbg (fusbh200,
  110. "%s hcs_params 0x%x ports=%d\n",
  111. label, params,
  112. HCS_N_PORTS (params)
  113. );
  114. }
  115. #else
  116. static inline void dbg_hcs_params (struct fusbh200_hcd *fusbh200, char *label) {}
  117. #endif
  118. #ifdef DEBUG
  119. /* check the values in the HCCPARAMS register
  120. * (host controller _Capability_ parameters)
  121. * see EHCI Spec, Table 2-5 for each value
  122. * */
  123. static void dbg_hcc_params (struct fusbh200_hcd *fusbh200, char *label)
  124. {
  125. u32 params = fusbh200_readl(fusbh200, &fusbh200->caps->hcc_params);
  126. fusbh200_dbg (fusbh200,
  127. "%s hcc_params %04x uframes %s%s\n",
  128. label,
  129. params,
  130. HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024",
  131. HCC_CANPARK(params) ? " park" : "");
  132. }
  133. #else
  134. static inline void dbg_hcc_params (struct fusbh200_hcd *fusbh200, char *label) {}
  135. #endif
  136. #ifdef DEBUG
  137. static void __maybe_unused
  138. dbg_qtd (const char *label, struct fusbh200_hcd *fusbh200, struct fusbh200_qtd *qtd)
  139. {
  140. fusbh200_dbg(fusbh200, "%s td %p n%08x %08x t%08x p0=%08x\n", label, qtd,
  141. hc32_to_cpup(fusbh200, &qtd->hw_next),
  142. hc32_to_cpup(fusbh200, &qtd->hw_alt_next),
  143. hc32_to_cpup(fusbh200, &qtd->hw_token),
  144. hc32_to_cpup(fusbh200, &qtd->hw_buf [0]));
  145. if (qtd->hw_buf [1])
  146. fusbh200_dbg(fusbh200, " p1=%08x p2=%08x p3=%08x p4=%08x\n",
  147. hc32_to_cpup(fusbh200, &qtd->hw_buf[1]),
  148. hc32_to_cpup(fusbh200, &qtd->hw_buf[2]),
  149. hc32_to_cpup(fusbh200, &qtd->hw_buf[3]),
  150. hc32_to_cpup(fusbh200, &qtd->hw_buf[4]));
  151. }
  152. static void __maybe_unused
  153. dbg_qh (const char *label, struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  154. {
  155. struct fusbh200_qh_hw *hw = qh->hw;
  156. fusbh200_dbg (fusbh200, "%s qh %p n%08x info %x %x qtd %x\n", label,
  157. qh, hw->hw_next, hw->hw_info1, hw->hw_info2, hw->hw_current);
  158. dbg_qtd("overlay", fusbh200, (struct fusbh200_qtd *) &hw->hw_qtd_next);
  159. }
  160. static void __maybe_unused
  161. dbg_itd (const char *label, struct fusbh200_hcd *fusbh200, struct fusbh200_itd *itd)
  162. {
  163. fusbh200_dbg (fusbh200, "%s [%d] itd %p, next %08x, urb %p\n",
  164. label, itd->frame, itd, hc32_to_cpu(fusbh200, itd->hw_next),
  165. itd->urb);
  166. fusbh200_dbg (fusbh200,
  167. " trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
  168. hc32_to_cpu(fusbh200, itd->hw_transaction[0]),
  169. hc32_to_cpu(fusbh200, itd->hw_transaction[1]),
  170. hc32_to_cpu(fusbh200, itd->hw_transaction[2]),
  171. hc32_to_cpu(fusbh200, itd->hw_transaction[3]),
  172. hc32_to_cpu(fusbh200, itd->hw_transaction[4]),
  173. hc32_to_cpu(fusbh200, itd->hw_transaction[5]),
  174. hc32_to_cpu(fusbh200, itd->hw_transaction[6]),
  175. hc32_to_cpu(fusbh200, itd->hw_transaction[7]));
  176. fusbh200_dbg (fusbh200,
  177. " buf: %08x %08x %08x %08x %08x %08x %08x\n",
  178. hc32_to_cpu(fusbh200, itd->hw_bufp[0]),
  179. hc32_to_cpu(fusbh200, itd->hw_bufp[1]),
  180. hc32_to_cpu(fusbh200, itd->hw_bufp[2]),
  181. hc32_to_cpu(fusbh200, itd->hw_bufp[3]),
  182. hc32_to_cpu(fusbh200, itd->hw_bufp[4]),
  183. hc32_to_cpu(fusbh200, itd->hw_bufp[5]),
  184. hc32_to_cpu(fusbh200, itd->hw_bufp[6]));
  185. fusbh200_dbg (fusbh200, " index: %d %d %d %d %d %d %d %d\n",
  186. itd->index[0], itd->index[1], itd->index[2],
  187. itd->index[3], itd->index[4], itd->index[5],
  188. itd->index[6], itd->index[7]);
  189. }
  190. static int __maybe_unused
  191. dbg_status_buf (char *buf, unsigned len, const char *label, u32 status)
  192. {
  193. return scnprintf (buf, len,
  194. "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s",
  195. label, label [0] ? " " : "", status,
  196. (status & STS_ASS) ? " Async" : "",
  197. (status & STS_PSS) ? " Periodic" : "",
  198. (status & STS_RECL) ? " Recl" : "",
  199. (status & STS_HALT) ? " Halt" : "",
  200. (status & STS_IAA) ? " IAA" : "",
  201. (status & STS_FATAL) ? " FATAL" : "",
  202. (status & STS_FLR) ? " FLR" : "",
  203. (status & STS_PCD) ? " PCD" : "",
  204. (status & STS_ERR) ? " ERR" : "",
  205. (status & STS_INT) ? " INT" : ""
  206. );
  207. }
  208. static int __maybe_unused
  209. dbg_intr_buf (char *buf, unsigned len, const char *label, u32 enable)
  210. {
  211. return scnprintf (buf, len,
  212. "%s%sintrenable %02x%s%s%s%s%s%s",
  213. label, label [0] ? " " : "", enable,
  214. (enable & STS_IAA) ? " IAA" : "",
  215. (enable & STS_FATAL) ? " FATAL" : "",
  216. (enable & STS_FLR) ? " FLR" : "",
  217. (enable & STS_PCD) ? " PCD" : "",
  218. (enable & STS_ERR) ? " ERR" : "",
  219. (enable & STS_INT) ? " INT" : ""
  220. );
  221. }
  222. static const char *const fls_strings [] =
  223. { "1024", "512", "256", "??" };
  224. static int
  225. dbg_command_buf (char *buf, unsigned len, const char *label, u32 command)
  226. {
  227. return scnprintf (buf, len,
  228. "%s%scommand %07x %s=%d ithresh=%d%s%s%s "
  229. "period=%s%s %s",
  230. label, label [0] ? " " : "", command,
  231. (command & CMD_PARK) ? " park" : "(park)",
  232. CMD_PARK_CNT (command),
  233. (command >> 16) & 0x3f,
  234. (command & CMD_IAAD) ? " IAAD" : "",
  235. (command & CMD_ASE) ? " Async" : "",
  236. (command & CMD_PSE) ? " Periodic" : "",
  237. fls_strings [(command >> 2) & 0x3],
  238. (command & CMD_RESET) ? " Reset" : "",
  239. (command & CMD_RUN) ? "RUN" : "HALT"
  240. );
  241. }
  242. static int
  243. dbg_port_buf (char *buf, unsigned len, const char *label, int port, u32 status)
  244. {
  245. char *sig;
  246. /* signaling state */
  247. switch (status & (3 << 10)) {
  248. case 0 << 10: sig = "se0"; break;
  249. case 1 << 10: sig = "k"; break; /* low speed */
  250. case 2 << 10: sig = "j"; break;
  251. default: sig = "?"; break;
  252. }
  253. return scnprintf (buf, len,
  254. "%s%sport:%d status %06x %d "
  255. "sig=%s%s%s%s%s%s%s%s",
  256. label, label [0] ? " " : "", port, status,
  257. status>>25,/*device address */
  258. sig,
  259. (status & PORT_RESET) ? " RESET" : "",
  260. (status & PORT_SUSPEND) ? " SUSPEND" : "",
  261. (status & PORT_RESUME) ? " RESUME" : "",
  262. (status & PORT_PEC) ? " PEC" : "",
  263. (status & PORT_PE) ? " PE" : "",
  264. (status & PORT_CSC) ? " CSC" : "",
  265. (status & PORT_CONNECT) ? " CONNECT" : "");
  266. }
  267. #else
  268. static inline void __maybe_unused
  269. dbg_qh (char *label, struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  270. {}
  271. static inline int __maybe_unused
  272. dbg_status_buf (char *buf, unsigned len, const char *label, u32 status)
  273. { return 0; }
  274. static inline int __maybe_unused
  275. dbg_command_buf (char *buf, unsigned len, const char *label, u32 command)
  276. { return 0; }
  277. static inline int __maybe_unused
  278. dbg_intr_buf (char *buf, unsigned len, const char *label, u32 enable)
  279. { return 0; }
  280. static inline int __maybe_unused
  281. dbg_port_buf (char *buf, unsigned len, const char *label, int port, u32 status)
  282. { return 0; }
  283. #endif /* DEBUG */
  284. /* functions have the "wrong" filename when they're output... */
  285. #define dbg_status(fusbh200, label, status) { \
  286. char _buf [80]; \
  287. dbg_status_buf (_buf, sizeof _buf, label, status); \
  288. fusbh200_dbg (fusbh200, "%s\n", _buf); \
  289. }
  290. #define dbg_cmd(fusbh200, label, command) { \
  291. char _buf [80]; \
  292. dbg_command_buf (_buf, sizeof _buf, label, command); \
  293. fusbh200_dbg (fusbh200, "%s\n", _buf); \
  294. }
  295. #define dbg_port(fusbh200, label, port, status) { \
  296. char _buf [80]; \
  297. dbg_port_buf (_buf, sizeof _buf, label, port, status); \
  298. fusbh200_dbg (fusbh200, "%s\n", _buf); \
  299. }
  300. /*-------------------------------------------------------------------------*/
  301. #ifdef STUB_DEBUG_FILES
  302. static inline void create_debug_files (struct fusbh200_hcd *bus) { }
  303. static inline void remove_debug_files (struct fusbh200_hcd *bus) { }
  304. #else
  305. /* troubleshooting help: expose state in debugfs */
  306. static int debug_async_open(struct inode *, struct file *);
  307. static int debug_periodic_open(struct inode *, struct file *);
  308. static int debug_registers_open(struct inode *, struct file *);
  309. static int debug_async_open(struct inode *, struct file *);
  310. static ssize_t debug_output(struct file*, char __user*, size_t, loff_t*);
  311. static int debug_close(struct inode *, struct file *);
  312. static const struct file_operations debug_async_fops = {
  313. .owner = THIS_MODULE,
  314. .open = debug_async_open,
  315. .read = debug_output,
  316. .release = debug_close,
  317. .llseek = default_llseek,
  318. };
  319. static const struct file_operations debug_periodic_fops = {
  320. .owner = THIS_MODULE,
  321. .open = debug_periodic_open,
  322. .read = debug_output,
  323. .release = debug_close,
  324. .llseek = default_llseek,
  325. };
  326. static const struct file_operations debug_registers_fops = {
  327. .owner = THIS_MODULE,
  328. .open = debug_registers_open,
  329. .read = debug_output,
  330. .release = debug_close,
  331. .llseek = default_llseek,
  332. };
  333. static struct dentry *fusbh200_debug_root;
  334. struct debug_buffer {
  335. ssize_t (*fill_func)(struct debug_buffer *); /* fill method */
  336. struct usb_bus *bus;
  337. struct mutex mutex; /* protect filling of buffer */
  338. size_t count; /* number of characters filled into buffer */
  339. char *output_buf;
  340. size_t alloc_size;
  341. };
  342. #define speed_char(info1) ({ char tmp; \
  343. switch (info1 & (3 << 12)) { \
  344. case QH_FULL_SPEED: tmp = 'f'; break; \
  345. case QH_LOW_SPEED: tmp = 'l'; break; \
  346. case QH_HIGH_SPEED: tmp = 'h'; break; \
  347. default: tmp = '?'; break; \
  348. }; tmp; })
  349. static inline char token_mark(struct fusbh200_hcd *fusbh200, __hc32 token)
  350. {
  351. __u32 v = hc32_to_cpu(fusbh200, token);
  352. if (v & QTD_STS_ACTIVE)
  353. return '*';
  354. if (v & QTD_STS_HALT)
  355. return '-';
  356. if (!IS_SHORT_READ (v))
  357. return ' ';
  358. /* tries to advance through hw_alt_next */
  359. return '/';
  360. }
  361. static void qh_lines (
  362. struct fusbh200_hcd *fusbh200,
  363. struct fusbh200_qh *qh,
  364. char **nextp,
  365. unsigned *sizep
  366. )
  367. {
  368. u32 scratch;
  369. u32 hw_curr;
  370. struct fusbh200_qtd *td;
  371. unsigned temp;
  372. unsigned size = *sizep;
  373. char *next = *nextp;
  374. char mark;
  375. __le32 list_end = FUSBH200_LIST_END(fusbh200);
  376. struct fusbh200_qh_hw *hw = qh->hw;
  377. if (hw->hw_qtd_next == list_end) /* NEC does this */
  378. mark = '@';
  379. else
  380. mark = token_mark(fusbh200, hw->hw_token);
  381. if (mark == '/') { /* qh_alt_next controls qh advance? */
  382. if ((hw->hw_alt_next & QTD_MASK(fusbh200))
  383. == fusbh200->async->hw->hw_alt_next)
  384. mark = '#'; /* blocked */
  385. else if (hw->hw_alt_next == list_end)
  386. mark = '.'; /* use hw_qtd_next */
  387. /* else alt_next points to some other qtd */
  388. }
  389. scratch = hc32_to_cpup(fusbh200, &hw->hw_info1);
  390. hw_curr = (mark == '*') ? hc32_to_cpup(fusbh200, &hw->hw_current) : 0;
  391. temp = scnprintf (next, size,
  392. "qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)",
  393. qh, scratch & 0x007f,
  394. speed_char (scratch),
  395. (scratch >> 8) & 0x000f,
  396. scratch, hc32_to_cpup(fusbh200, &hw->hw_info2),
  397. hc32_to_cpup(fusbh200, &hw->hw_token), mark,
  398. (cpu_to_hc32(fusbh200, QTD_TOGGLE) & hw->hw_token)
  399. ? "data1" : "data0",
  400. (hc32_to_cpup(fusbh200, &hw->hw_alt_next) >> 1) & 0x0f);
  401. size -= temp;
  402. next += temp;
  403. /* hc may be modifying the list as we read it ... */
  404. list_for_each_entry(td, &qh->qtd_list, qtd_list) {
  405. scratch = hc32_to_cpup(fusbh200, &td->hw_token);
  406. mark = ' ';
  407. if (hw_curr == td->qtd_dma)
  408. mark = '*';
  409. else if (hw->hw_qtd_next == cpu_to_hc32(fusbh200, td->qtd_dma))
  410. mark = '+';
  411. else if (QTD_LENGTH (scratch)) {
  412. if (td->hw_alt_next == fusbh200->async->hw->hw_alt_next)
  413. mark = '#';
  414. else if (td->hw_alt_next != list_end)
  415. mark = '/';
  416. }
  417. temp = snprintf (next, size,
  418. "\n\t%p%c%s len=%d %08x urb %p",
  419. td, mark, ({ char *tmp;
  420. switch ((scratch>>8)&0x03) {
  421. case 0: tmp = "out"; break;
  422. case 1: tmp = "in"; break;
  423. case 2: tmp = "setup"; break;
  424. default: tmp = "?"; break;
  425. } tmp;}),
  426. (scratch >> 16) & 0x7fff,
  427. scratch,
  428. td->urb);
  429. if (size < temp)
  430. temp = size;
  431. size -= temp;
  432. next += temp;
  433. if (temp == size)
  434. goto done;
  435. }
  436. temp = snprintf (next, size, "\n");
  437. if (size < temp)
  438. temp = size;
  439. size -= temp;
  440. next += temp;
  441. done:
  442. *sizep = size;
  443. *nextp = next;
  444. }
  445. static ssize_t fill_async_buffer(struct debug_buffer *buf)
  446. {
  447. struct usb_hcd *hcd;
  448. struct fusbh200_hcd *fusbh200;
  449. unsigned long flags;
  450. unsigned temp, size;
  451. char *next;
  452. struct fusbh200_qh *qh;
  453. hcd = bus_to_hcd(buf->bus);
  454. fusbh200 = hcd_to_fusbh200 (hcd);
  455. next = buf->output_buf;
  456. size = buf->alloc_size;
  457. *next = 0;
  458. /* dumps a snapshot of the async schedule.
  459. * usually empty except for long-term bulk reads, or head.
  460. * one QH per line, and TDs we know about
  461. */
  462. spin_lock_irqsave (&fusbh200->lock, flags);
  463. for (qh = fusbh200->async->qh_next.qh; size > 0 && qh; qh = qh->qh_next.qh)
  464. qh_lines (fusbh200, qh, &next, &size);
  465. if (fusbh200->async_unlink && size > 0) {
  466. temp = scnprintf(next, size, "\nunlink =\n");
  467. size -= temp;
  468. next += temp;
  469. for (qh = fusbh200->async_unlink; size > 0 && qh;
  470. qh = qh->unlink_next)
  471. qh_lines (fusbh200, qh, &next, &size);
  472. }
  473. spin_unlock_irqrestore (&fusbh200->lock, flags);
  474. return strlen(buf->output_buf);
  475. }
  476. #define DBG_SCHED_LIMIT 64
  477. static ssize_t fill_periodic_buffer(struct debug_buffer *buf)
  478. {
  479. struct usb_hcd *hcd;
  480. struct fusbh200_hcd *fusbh200;
  481. unsigned long flags;
  482. union fusbh200_shadow p, *seen;
  483. unsigned temp, size, seen_count;
  484. char *next;
  485. unsigned i;
  486. __hc32 tag;
  487. if (!(seen = kmalloc (DBG_SCHED_LIMIT * sizeof *seen, GFP_ATOMIC)))
  488. return 0;
  489. seen_count = 0;
  490. hcd = bus_to_hcd(buf->bus);
  491. fusbh200 = hcd_to_fusbh200 (hcd);
  492. next = buf->output_buf;
  493. size = buf->alloc_size;
  494. temp = scnprintf (next, size, "size = %d\n", fusbh200->periodic_size);
  495. size -= temp;
  496. next += temp;
  497. /* dump a snapshot of the periodic schedule.
  498. * iso changes, interrupt usually doesn't.
  499. */
  500. spin_lock_irqsave (&fusbh200->lock, flags);
  501. for (i = 0; i < fusbh200->periodic_size; i++) {
  502. p = fusbh200->pshadow [i];
  503. if (likely (!p.ptr))
  504. continue;
  505. tag = Q_NEXT_TYPE(fusbh200, fusbh200->periodic [i]);
  506. temp = scnprintf (next, size, "%4d: ", i);
  507. size -= temp;
  508. next += temp;
  509. do {
  510. struct fusbh200_qh_hw *hw;
  511. switch (hc32_to_cpu(fusbh200, tag)) {
  512. case Q_TYPE_QH:
  513. hw = p.qh->hw;
  514. temp = scnprintf (next, size, " qh%d-%04x/%p",
  515. p.qh->period,
  516. hc32_to_cpup(fusbh200,
  517. &hw->hw_info2)
  518. /* uframe masks */
  519. & (QH_CMASK | QH_SMASK),
  520. p.qh);
  521. size -= temp;
  522. next += temp;
  523. /* don't repeat what follows this qh */
  524. for (temp = 0; temp < seen_count; temp++) {
  525. if (seen [temp].ptr != p.ptr)
  526. continue;
  527. if (p.qh->qh_next.ptr) {
  528. temp = scnprintf (next, size,
  529. " ...");
  530. size -= temp;
  531. next += temp;
  532. }
  533. break;
  534. }
  535. /* show more info the first time around */
  536. if (temp == seen_count) {
  537. u32 scratch = hc32_to_cpup(fusbh200,
  538. &hw->hw_info1);
  539. struct fusbh200_qtd *qtd;
  540. char *type = "";
  541. /* count tds, get ep direction */
  542. temp = 0;
  543. list_for_each_entry (qtd,
  544. &p.qh->qtd_list,
  545. qtd_list) {
  546. temp++;
  547. switch (0x03 & (hc32_to_cpu(
  548. fusbh200,
  549. qtd->hw_token) >> 8)) {
  550. case 0: type = "out"; continue;
  551. case 1: type = "in"; continue;
  552. }
  553. }
  554. temp = scnprintf (next, size,
  555. " (%c%d ep%d%s "
  556. "[%d/%d] q%d p%d)",
  557. speed_char (scratch),
  558. scratch & 0x007f,
  559. (scratch >> 8) & 0x000f, type,
  560. p.qh->usecs, p.qh->c_usecs,
  561. temp,
  562. 0x7ff & (scratch >> 16));
  563. if (seen_count < DBG_SCHED_LIMIT)
  564. seen [seen_count++].qh = p.qh;
  565. } else
  566. temp = 0;
  567. tag = Q_NEXT_TYPE(fusbh200, hw->hw_next);
  568. p = p.qh->qh_next;
  569. break;
  570. case Q_TYPE_FSTN:
  571. temp = scnprintf (next, size,
  572. " fstn-%8x/%p", p.fstn->hw_prev,
  573. p.fstn);
  574. tag = Q_NEXT_TYPE(fusbh200, p.fstn->hw_next);
  575. p = p.fstn->fstn_next;
  576. break;
  577. case Q_TYPE_ITD:
  578. temp = scnprintf (next, size,
  579. " itd/%p", p.itd);
  580. tag = Q_NEXT_TYPE(fusbh200, p.itd->hw_next);
  581. p = p.itd->itd_next;
  582. break;
  583. }
  584. size -= temp;
  585. next += temp;
  586. } while (p.ptr);
  587. temp = scnprintf (next, size, "\n");
  588. size -= temp;
  589. next += temp;
  590. }
  591. spin_unlock_irqrestore (&fusbh200->lock, flags);
  592. kfree (seen);
  593. return buf->alloc_size - size;
  594. }
  595. #undef DBG_SCHED_LIMIT
  596. static const char *rh_state_string(struct fusbh200_hcd *fusbh200)
  597. {
  598. switch (fusbh200->rh_state) {
  599. case FUSBH200_RH_HALTED:
  600. return "halted";
  601. case FUSBH200_RH_SUSPENDED:
  602. return "suspended";
  603. case FUSBH200_RH_RUNNING:
  604. return "running";
  605. case FUSBH200_RH_STOPPING:
  606. return "stopping";
  607. }
  608. return "?";
  609. }
  610. static ssize_t fill_registers_buffer(struct debug_buffer *buf)
  611. {
  612. struct usb_hcd *hcd;
  613. struct fusbh200_hcd *fusbh200;
  614. unsigned long flags;
  615. unsigned temp, size, i;
  616. char *next, scratch [80];
  617. static char fmt [] = "%*s\n";
  618. static char label [] = "";
  619. hcd = bus_to_hcd(buf->bus);
  620. fusbh200 = hcd_to_fusbh200 (hcd);
  621. next = buf->output_buf;
  622. size = buf->alloc_size;
  623. spin_lock_irqsave (&fusbh200->lock, flags);
  624. if (!HCD_HW_ACCESSIBLE(hcd)) {
  625. size = scnprintf (next, size,
  626. "bus %s, device %s\n"
  627. "%s\n"
  628. "SUSPENDED (no register access)\n",
  629. hcd->self.controller->bus->name,
  630. dev_name(hcd->self.controller),
  631. hcd->product_desc);
  632. goto done;
  633. }
  634. /* Capability Registers */
  635. i = HC_VERSION(fusbh200, fusbh200_readl(fusbh200, &fusbh200->caps->hc_capbase));
  636. temp = scnprintf (next, size,
  637. "bus %s, device %s\n"
  638. "%s\n"
  639. "EHCI %x.%02x, rh state %s\n",
  640. hcd->self.controller->bus->name,
  641. dev_name(hcd->self.controller),
  642. hcd->product_desc,
  643. i >> 8, i & 0x0ff, rh_state_string(fusbh200));
  644. size -= temp;
  645. next += temp;
  646. // FIXME interpret both types of params
  647. i = fusbh200_readl(fusbh200, &fusbh200->caps->hcs_params);
  648. temp = scnprintf (next, size, "structural params 0x%08x\n", i);
  649. size -= temp;
  650. next += temp;
  651. i = fusbh200_readl(fusbh200, &fusbh200->caps->hcc_params);
  652. temp = scnprintf (next, size, "capability params 0x%08x\n", i);
  653. size -= temp;
  654. next += temp;
  655. /* Operational Registers */
  656. temp = dbg_status_buf (scratch, sizeof scratch, label,
  657. fusbh200_readl(fusbh200, &fusbh200->regs->status));
  658. temp = scnprintf (next, size, fmt, temp, scratch);
  659. size -= temp;
  660. next += temp;
  661. temp = dbg_command_buf (scratch, sizeof scratch, label,
  662. fusbh200_readl(fusbh200, &fusbh200->regs->command));
  663. temp = scnprintf (next, size, fmt, temp, scratch);
  664. size -= temp;
  665. next += temp;
  666. temp = dbg_intr_buf (scratch, sizeof scratch, label,
  667. fusbh200_readl(fusbh200, &fusbh200->regs->intr_enable));
  668. temp = scnprintf (next, size, fmt, temp, scratch);
  669. size -= temp;
  670. next += temp;
  671. temp = scnprintf (next, size, "uframe %04x\n",
  672. fusbh200_read_frame_index(fusbh200));
  673. size -= temp;
  674. next += temp;
  675. if (fusbh200->async_unlink) {
  676. temp = scnprintf(next, size, "async unlink qh %p\n",
  677. fusbh200->async_unlink);
  678. size -= temp;
  679. next += temp;
  680. }
  681. #ifdef FUSBH200_STATS
  682. temp = scnprintf (next, size,
  683. "irq normal %ld err %ld iaa %ld (lost %ld)\n",
  684. fusbh200->stats.normal, fusbh200->stats.error, fusbh200->stats.iaa,
  685. fusbh200->stats.lost_iaa);
  686. size -= temp;
  687. next += temp;
  688. temp = scnprintf (next, size, "complete %ld unlink %ld\n",
  689. fusbh200->stats.complete, fusbh200->stats.unlink);
  690. size -= temp;
  691. next += temp;
  692. #endif
  693. done:
  694. spin_unlock_irqrestore (&fusbh200->lock, flags);
  695. return buf->alloc_size - size;
  696. }
  697. static struct debug_buffer *alloc_buffer(struct usb_bus *bus,
  698. ssize_t (*fill_func)(struct debug_buffer *))
  699. {
  700. struct debug_buffer *buf;
  701. buf = kzalloc(sizeof(struct debug_buffer), GFP_KERNEL);
  702. if (buf) {
  703. buf->bus = bus;
  704. buf->fill_func = fill_func;
  705. mutex_init(&buf->mutex);
  706. buf->alloc_size = PAGE_SIZE;
  707. }
  708. return buf;
  709. }
  710. static int fill_buffer(struct debug_buffer *buf)
  711. {
  712. int ret = 0;
  713. if (!buf->output_buf)
  714. buf->output_buf = vmalloc(buf->alloc_size);
  715. if (!buf->output_buf) {
  716. ret = -ENOMEM;
  717. goto out;
  718. }
  719. ret = buf->fill_func(buf);
  720. if (ret >= 0) {
  721. buf->count = ret;
  722. ret = 0;
  723. }
  724. out:
  725. return ret;
  726. }
  727. static ssize_t debug_output(struct file *file, char __user *user_buf,
  728. size_t len, loff_t *offset)
  729. {
  730. struct debug_buffer *buf = file->private_data;
  731. int ret = 0;
  732. mutex_lock(&buf->mutex);
  733. if (buf->count == 0) {
  734. ret = fill_buffer(buf);
  735. if (ret != 0) {
  736. mutex_unlock(&buf->mutex);
  737. goto out;
  738. }
  739. }
  740. mutex_unlock(&buf->mutex);
  741. ret = simple_read_from_buffer(user_buf, len, offset,
  742. buf->output_buf, buf->count);
  743. out:
  744. return ret;
  745. }
  746. static int debug_close(struct inode *inode, struct file *file)
  747. {
  748. struct debug_buffer *buf = file->private_data;
  749. if (buf) {
  750. vfree(buf->output_buf);
  751. kfree(buf);
  752. }
  753. return 0;
  754. }
  755. static int debug_async_open(struct inode *inode, struct file *file)
  756. {
  757. file->private_data = alloc_buffer(inode->i_private, fill_async_buffer);
  758. return file->private_data ? 0 : -ENOMEM;
  759. }
  760. static int debug_periodic_open(struct inode *inode, struct file *file)
  761. {
  762. struct debug_buffer *buf;
  763. buf = alloc_buffer(inode->i_private, fill_periodic_buffer);
  764. if (!buf)
  765. return -ENOMEM;
  766. buf->alloc_size = (sizeof(void *) == 4 ? 6 : 8)*PAGE_SIZE;
  767. file->private_data = buf;
  768. return 0;
  769. }
  770. static int debug_registers_open(struct inode *inode, struct file *file)
  771. {
  772. file->private_data = alloc_buffer(inode->i_private,
  773. fill_registers_buffer);
  774. return file->private_data ? 0 : -ENOMEM;
  775. }
  776. static inline void create_debug_files (struct fusbh200_hcd *fusbh200)
  777. {
  778. struct usb_bus *bus = &fusbh200_to_hcd(fusbh200)->self;
  779. fusbh200->debug_dir = debugfs_create_dir(bus->bus_name, fusbh200_debug_root);
  780. if (!fusbh200->debug_dir)
  781. return;
  782. if (!debugfs_create_file("async", S_IRUGO, fusbh200->debug_dir, bus,
  783. &debug_async_fops))
  784. goto file_error;
  785. if (!debugfs_create_file("periodic", S_IRUGO, fusbh200->debug_dir, bus,
  786. &debug_periodic_fops))
  787. goto file_error;
  788. if (!debugfs_create_file("registers", S_IRUGO, fusbh200->debug_dir, bus,
  789. &debug_registers_fops))
  790. goto file_error;
  791. return;
  792. file_error:
  793. debugfs_remove_recursive(fusbh200->debug_dir);
  794. }
  795. static inline void remove_debug_files (struct fusbh200_hcd *fusbh200)
  796. {
  797. debugfs_remove_recursive(fusbh200->debug_dir);
  798. }
  799. #endif /* STUB_DEBUG_FILES */
  800. /*-------------------------------------------------------------------------*/
  801. /*
  802. * handshake - spin reading hc until handshake completes or fails
  803. * @ptr: address of hc register to be read
  804. * @mask: bits to look at in result of read
  805. * @done: value of those bits when handshake succeeds
  806. * @usec: timeout in microseconds
  807. *
  808. * Returns negative errno, or zero on success
  809. *
  810. * Success happens when the "mask" bits have the specified value (hardware
  811. * handshake done). There are two failure modes: "usec" have passed (major
  812. * hardware flakeout), or the register reads as all-ones (hardware removed).
  813. *
  814. * That last failure should_only happen in cases like physical cardbus eject
  815. * before driver shutdown. But it also seems to be caused by bugs in cardbus
  816. * bridge shutdown: shutting down the bridge before the devices using it.
  817. */
  818. static int handshake (struct fusbh200_hcd *fusbh200, void __iomem *ptr,
  819. u32 mask, u32 done, int usec)
  820. {
  821. u32 result;
  822. do {
  823. result = fusbh200_readl(fusbh200, ptr);
  824. if (result == ~(u32)0) /* card removed */
  825. return -ENODEV;
  826. result &= mask;
  827. if (result == done)
  828. return 0;
  829. udelay (1);
  830. usec--;
  831. } while (usec > 0);
  832. return -ETIMEDOUT;
  833. }
  834. /*
  835. * Force HC to halt state from unknown (EHCI spec section 2.3).
  836. * Must be called with interrupts enabled and the lock not held.
  837. */
  838. static int fusbh200_halt (struct fusbh200_hcd *fusbh200)
  839. {
  840. u32 temp;
  841. spin_lock_irq(&fusbh200->lock);
  842. /* disable any irqs left enabled by previous code */
  843. fusbh200_writel(fusbh200, 0, &fusbh200->regs->intr_enable);
  844. /*
  845. * This routine gets called during probe before fusbh200->command
  846. * has been initialized, so we can't rely on its value.
  847. */
  848. fusbh200->command &= ~CMD_RUN;
  849. temp = fusbh200_readl(fusbh200, &fusbh200->regs->command);
  850. temp &= ~(CMD_RUN | CMD_IAAD);
  851. fusbh200_writel(fusbh200, temp, &fusbh200->regs->command);
  852. spin_unlock_irq(&fusbh200->lock);
  853. synchronize_irq(fusbh200_to_hcd(fusbh200)->irq);
  854. return handshake(fusbh200, &fusbh200->regs->status,
  855. STS_HALT, STS_HALT, 16 * 125);
  856. }
  857. /*
  858. * Reset a non-running (STS_HALT == 1) controller.
  859. * Must be called with interrupts enabled and the lock not held.
  860. */
  861. static int fusbh200_reset (struct fusbh200_hcd *fusbh200)
  862. {
  863. int retval;
  864. u32 command = fusbh200_readl(fusbh200, &fusbh200->regs->command);
  865. /* If the EHCI debug controller is active, special care must be
  866. * taken before and after a host controller reset */
  867. if (fusbh200->debug && !dbgp_reset_prep(fusbh200_to_hcd(fusbh200)))
  868. fusbh200->debug = NULL;
  869. command |= CMD_RESET;
  870. dbg_cmd (fusbh200, "reset", command);
  871. fusbh200_writel(fusbh200, command, &fusbh200->regs->command);
  872. fusbh200->rh_state = FUSBH200_RH_HALTED;
  873. fusbh200->next_statechange = jiffies;
  874. retval = handshake (fusbh200, &fusbh200->regs->command,
  875. CMD_RESET, 0, 250 * 1000);
  876. if (retval)
  877. return retval;
  878. if (fusbh200->debug)
  879. dbgp_external_startup(fusbh200_to_hcd(fusbh200));
  880. fusbh200->port_c_suspend = fusbh200->suspended_ports =
  881. fusbh200->resuming_ports = 0;
  882. return retval;
  883. }
  884. /*
  885. * Idle the controller (turn off the schedules).
  886. * Must be called with interrupts enabled and the lock not held.
  887. */
  888. static void fusbh200_quiesce (struct fusbh200_hcd *fusbh200)
  889. {
  890. u32 temp;
  891. if (fusbh200->rh_state != FUSBH200_RH_RUNNING)
  892. return;
  893. /* wait for any schedule enables/disables to take effect */
  894. temp = (fusbh200->command << 10) & (STS_ASS | STS_PSS);
  895. handshake(fusbh200, &fusbh200->regs->status, STS_ASS | STS_PSS, temp, 16 * 125);
  896. /* then disable anything that's still active */
  897. spin_lock_irq(&fusbh200->lock);
  898. fusbh200->command &= ~(CMD_ASE | CMD_PSE);
  899. fusbh200_writel(fusbh200, fusbh200->command, &fusbh200->regs->command);
  900. spin_unlock_irq(&fusbh200->lock);
  901. /* hardware can take 16 microframes to turn off ... */
  902. handshake(fusbh200, &fusbh200->regs->status, STS_ASS | STS_PSS, 0, 16 * 125);
  903. }
  904. /*-------------------------------------------------------------------------*/
  905. static void end_unlink_async(struct fusbh200_hcd *fusbh200);
  906. static void unlink_empty_async(struct fusbh200_hcd *fusbh200);
  907. static void fusbh200_work(struct fusbh200_hcd *fusbh200);
  908. static void start_unlink_intr(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh);
  909. static void end_unlink_intr(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh);
  910. /*-------------------------------------------------------------------------*/
  911. /* Set a bit in the USBCMD register */
  912. static void fusbh200_set_command_bit(struct fusbh200_hcd *fusbh200, u32 bit)
  913. {
  914. fusbh200->command |= bit;
  915. fusbh200_writel(fusbh200, fusbh200->command, &fusbh200->regs->command);
  916. /* unblock posted write */
  917. fusbh200_readl(fusbh200, &fusbh200->regs->command);
  918. }
  919. /* Clear a bit in the USBCMD register */
  920. static void fusbh200_clear_command_bit(struct fusbh200_hcd *fusbh200, u32 bit)
  921. {
  922. fusbh200->command &= ~bit;
  923. fusbh200_writel(fusbh200, fusbh200->command, &fusbh200->regs->command);
  924. /* unblock posted write */
  925. fusbh200_readl(fusbh200, &fusbh200->regs->command);
  926. }
  927. /*-------------------------------------------------------------------------*/
  928. /*
  929. * EHCI timer support... Now using hrtimers.
  930. *
  931. * Lots of different events are triggered from fusbh200->hrtimer. Whenever
  932. * the timer routine runs, it checks each possible event; events that are
  933. * currently enabled and whose expiration time has passed get handled.
  934. * The set of enabled events is stored as a collection of bitflags in
  935. * fusbh200->enabled_hrtimer_events, and they are numbered in order of
  936. * increasing delay values (ranging between 1 ms and 100 ms).
  937. *
  938. * Rather than implementing a sorted list or tree of all pending events,
  939. * we keep track only of the lowest-numbered pending event, in
  940. * fusbh200->next_hrtimer_event. Whenever fusbh200->hrtimer gets restarted, its
  941. * expiration time is set to the timeout value for this event.
  942. *
  943. * As a result, events might not get handled right away; the actual delay
  944. * could be anywhere up to twice the requested delay. This doesn't
  945. * matter, because none of the events are especially time-critical. The
  946. * ones that matter most all have a delay of 1 ms, so they will be
  947. * handled after 2 ms at most, which is okay. In addition to this, we
  948. * allow for an expiration range of 1 ms.
  949. */
  950. /*
  951. * Delay lengths for the hrtimer event types.
  952. * Keep this list sorted by delay length, in the same order as
  953. * the event types indexed by enum fusbh200_hrtimer_event in fusbh200.h.
  954. */
  955. static unsigned event_delays_ns[] = {
  956. 1 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_POLL_ASS */
  957. 1 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_POLL_PSS */
  958. 1 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_POLL_DEAD */
  959. 1125 * NSEC_PER_USEC, /* FUSBH200_HRTIMER_UNLINK_INTR */
  960. 2 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_FREE_ITDS */
  961. 6 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_ASYNC_UNLINKS */
  962. 10 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_IAA_WATCHDOG */
  963. 10 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_DISABLE_PERIODIC */
  964. 15 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_DISABLE_ASYNC */
  965. 100 * NSEC_PER_MSEC, /* FUSBH200_HRTIMER_IO_WATCHDOG */
  966. };
  967. /* Enable a pending hrtimer event */
  968. static void fusbh200_enable_event(struct fusbh200_hcd *fusbh200, unsigned event,
  969. bool resched)
  970. {
  971. ktime_t *timeout = &fusbh200->hr_timeouts[event];
  972. if (resched)
  973. *timeout = ktime_add(ktime_get(),
  974. ktime_set(0, event_delays_ns[event]));
  975. fusbh200->enabled_hrtimer_events |= (1 << event);
  976. /* Track only the lowest-numbered pending event */
  977. if (event < fusbh200->next_hrtimer_event) {
  978. fusbh200->next_hrtimer_event = event;
  979. hrtimer_start_range_ns(&fusbh200->hrtimer, *timeout,
  980. NSEC_PER_MSEC, HRTIMER_MODE_ABS);
  981. }
  982. }
  983. /* Poll the STS_ASS status bit; see when it agrees with CMD_ASE */
  984. static void fusbh200_poll_ASS(struct fusbh200_hcd *fusbh200)
  985. {
  986. unsigned actual, want;
  987. /* Don't enable anything if the controller isn't running (e.g., died) */
  988. if (fusbh200->rh_state != FUSBH200_RH_RUNNING)
  989. return;
  990. want = (fusbh200->command & CMD_ASE) ? STS_ASS : 0;
  991. actual = fusbh200_readl(fusbh200, &fusbh200->regs->status) & STS_ASS;
  992. if (want != actual) {
  993. /* Poll again later, but give up after about 20 ms */
  994. if (fusbh200->ASS_poll_count++ < 20) {
  995. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_POLL_ASS, true);
  996. return;
  997. }
  998. fusbh200_dbg(fusbh200, "Waited too long for the async schedule status (%x/%x), giving up\n",
  999. want, actual);
  1000. }
  1001. fusbh200->ASS_poll_count = 0;
  1002. /* The status is up-to-date; restart or stop the schedule as needed */
  1003. if (want == 0) { /* Stopped */
  1004. if (fusbh200->async_count > 0)
  1005. fusbh200_set_command_bit(fusbh200, CMD_ASE);
  1006. } else { /* Running */
  1007. if (fusbh200->async_count == 0) {
  1008. /* Turn off the schedule after a while */
  1009. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_DISABLE_ASYNC,
  1010. true);
  1011. }
  1012. }
  1013. }
  1014. /* Turn off the async schedule after a brief delay */
  1015. static void fusbh200_disable_ASE(struct fusbh200_hcd *fusbh200)
  1016. {
  1017. fusbh200_clear_command_bit(fusbh200, CMD_ASE);
  1018. }
  1019. /* Poll the STS_PSS status bit; see when it agrees with CMD_PSE */
  1020. static void fusbh200_poll_PSS(struct fusbh200_hcd *fusbh200)
  1021. {
  1022. unsigned actual, want;
  1023. /* Don't do anything if the controller isn't running (e.g., died) */
  1024. if (fusbh200->rh_state != FUSBH200_RH_RUNNING)
  1025. return;
  1026. want = (fusbh200->command & CMD_PSE) ? STS_PSS : 0;
  1027. actual = fusbh200_readl(fusbh200, &fusbh200->regs->status) & STS_PSS;
  1028. if (want != actual) {
  1029. /* Poll again later, but give up after about 20 ms */
  1030. if (fusbh200->PSS_poll_count++ < 20) {
  1031. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_POLL_PSS, true);
  1032. return;
  1033. }
  1034. fusbh200_dbg(fusbh200, "Waited too long for the periodic schedule status (%x/%x), giving up\n",
  1035. want, actual);
  1036. }
  1037. fusbh200->PSS_poll_count = 0;
  1038. /* The status is up-to-date; restart or stop the schedule as needed */
  1039. if (want == 0) { /* Stopped */
  1040. if (fusbh200->periodic_count > 0)
  1041. fusbh200_set_command_bit(fusbh200, CMD_PSE);
  1042. } else { /* Running */
  1043. if (fusbh200->periodic_count == 0) {
  1044. /* Turn off the schedule after a while */
  1045. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_DISABLE_PERIODIC,
  1046. true);
  1047. }
  1048. }
  1049. }
  1050. /* Turn off the periodic schedule after a brief delay */
  1051. static void fusbh200_disable_PSE(struct fusbh200_hcd *fusbh200)
  1052. {
  1053. fusbh200_clear_command_bit(fusbh200, CMD_PSE);
  1054. }
  1055. /* Poll the STS_HALT status bit; see when a dead controller stops */
  1056. static void fusbh200_handle_controller_death(struct fusbh200_hcd *fusbh200)
  1057. {
  1058. if (!(fusbh200_readl(fusbh200, &fusbh200->regs->status) & STS_HALT)) {
  1059. /* Give up after a few milliseconds */
  1060. if (fusbh200->died_poll_count++ < 5) {
  1061. /* Try again later */
  1062. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_POLL_DEAD, true);
  1063. return;
  1064. }
  1065. fusbh200_warn(fusbh200, "Waited too long for the controller to stop, giving up\n");
  1066. }
  1067. /* Clean up the mess */
  1068. fusbh200->rh_state = FUSBH200_RH_HALTED;
  1069. fusbh200_writel(fusbh200, 0, &fusbh200->regs->intr_enable);
  1070. fusbh200_work(fusbh200);
  1071. end_unlink_async(fusbh200);
  1072. /* Not in process context, so don't try to reset the controller */
  1073. }
  1074. /* Handle unlinked interrupt QHs once they are gone from the hardware */
  1075. static void fusbh200_handle_intr_unlinks(struct fusbh200_hcd *fusbh200)
  1076. {
  1077. bool stopped = (fusbh200->rh_state < FUSBH200_RH_RUNNING);
  1078. /*
  1079. * Process all the QHs on the intr_unlink list that were added
  1080. * before the current unlink cycle began. The list is in
  1081. * temporal order, so stop when we reach the first entry in the
  1082. * current cycle. But if the root hub isn't running then
  1083. * process all the QHs on the list.
  1084. */
  1085. fusbh200->intr_unlinking = true;
  1086. while (fusbh200->intr_unlink) {
  1087. struct fusbh200_qh *qh = fusbh200->intr_unlink;
  1088. if (!stopped && qh->unlink_cycle == fusbh200->intr_unlink_cycle)
  1089. break;
  1090. fusbh200->intr_unlink = qh->unlink_next;
  1091. qh->unlink_next = NULL;
  1092. end_unlink_intr(fusbh200, qh);
  1093. }
  1094. /* Handle remaining entries later */
  1095. if (fusbh200->intr_unlink) {
  1096. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_UNLINK_INTR, true);
  1097. ++fusbh200->intr_unlink_cycle;
  1098. }
  1099. fusbh200->intr_unlinking = false;
  1100. }
  1101. /* Start another free-iTDs/siTDs cycle */
  1102. static void start_free_itds(struct fusbh200_hcd *fusbh200)
  1103. {
  1104. if (!(fusbh200->enabled_hrtimer_events & BIT(FUSBH200_HRTIMER_FREE_ITDS))) {
  1105. fusbh200->last_itd_to_free = list_entry(
  1106. fusbh200->cached_itd_list.prev,
  1107. struct fusbh200_itd, itd_list);
  1108. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_FREE_ITDS, true);
  1109. }
  1110. }
  1111. /* Wait for controller to stop using old iTDs and siTDs */
  1112. static void end_free_itds(struct fusbh200_hcd *fusbh200)
  1113. {
  1114. struct fusbh200_itd *itd, *n;
  1115. if (fusbh200->rh_state < FUSBH200_RH_RUNNING) {
  1116. fusbh200->last_itd_to_free = NULL;
  1117. }
  1118. list_for_each_entry_safe(itd, n, &fusbh200->cached_itd_list, itd_list) {
  1119. list_del(&itd->itd_list);
  1120. dma_pool_free(fusbh200->itd_pool, itd, itd->itd_dma);
  1121. if (itd == fusbh200->last_itd_to_free)
  1122. break;
  1123. }
  1124. if (!list_empty(&fusbh200->cached_itd_list))
  1125. start_free_itds(fusbh200);
  1126. }
  1127. /* Handle lost (or very late) IAA interrupts */
  1128. static void fusbh200_iaa_watchdog(struct fusbh200_hcd *fusbh200)
  1129. {
  1130. if (fusbh200->rh_state != FUSBH200_RH_RUNNING)
  1131. return;
  1132. /*
  1133. * Lost IAA irqs wedge things badly; seen first with a vt8235.
  1134. * So we need this watchdog, but must protect it against both
  1135. * (a) SMP races against real IAA firing and retriggering, and
  1136. * (b) clean HC shutdown, when IAA watchdog was pending.
  1137. */
  1138. if (fusbh200->async_iaa) {
  1139. u32 cmd, status;
  1140. /* If we get here, IAA is *REALLY* late. It's barely
  1141. * conceivable that the system is so busy that CMD_IAAD
  1142. * is still legitimately set, so let's be sure it's
  1143. * clear before we read STS_IAA. (The HC should clear
  1144. * CMD_IAAD when it sets STS_IAA.)
  1145. */
  1146. cmd = fusbh200_readl(fusbh200, &fusbh200->regs->command);
  1147. /*
  1148. * If IAA is set here it either legitimately triggered
  1149. * after the watchdog timer expired (_way_ late, so we'll
  1150. * still count it as lost) ... or a silicon erratum:
  1151. * - VIA seems to set IAA without triggering the IRQ;
  1152. * - IAAD potentially cleared without setting IAA.
  1153. */
  1154. status = fusbh200_readl(fusbh200, &fusbh200->regs->status);
  1155. if ((status & STS_IAA) || !(cmd & CMD_IAAD)) {
  1156. COUNT(fusbh200->stats.lost_iaa);
  1157. fusbh200_writel(fusbh200, STS_IAA, &fusbh200->regs->status);
  1158. }
  1159. fusbh200_vdbg(fusbh200, "IAA watchdog: status %x cmd %x\n",
  1160. status, cmd);
  1161. end_unlink_async(fusbh200);
  1162. }
  1163. }
  1164. /* Enable the I/O watchdog, if appropriate */
  1165. static void turn_on_io_watchdog(struct fusbh200_hcd *fusbh200)
  1166. {
  1167. /* Not needed if the controller isn't running or it's already enabled */
  1168. if (fusbh200->rh_state != FUSBH200_RH_RUNNING ||
  1169. (fusbh200->enabled_hrtimer_events &
  1170. BIT(FUSBH200_HRTIMER_IO_WATCHDOG)))
  1171. return;
  1172. /*
  1173. * Isochronous transfers always need the watchdog.
  1174. * For other sorts we use it only if the flag is set.
  1175. */
  1176. if (fusbh200->isoc_count > 0 || (fusbh200->need_io_watchdog &&
  1177. fusbh200->async_count + fusbh200->intr_count > 0))
  1178. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_IO_WATCHDOG, true);
  1179. }
  1180. /*
  1181. * Handler functions for the hrtimer event types.
  1182. * Keep this array in the same order as the event types indexed by
  1183. * enum fusbh200_hrtimer_event in fusbh200.h.
  1184. */
  1185. static void (*event_handlers[])(struct fusbh200_hcd *) = {
  1186. fusbh200_poll_ASS, /* FUSBH200_HRTIMER_POLL_ASS */
  1187. fusbh200_poll_PSS, /* FUSBH200_HRTIMER_POLL_PSS */
  1188. fusbh200_handle_controller_death, /* FUSBH200_HRTIMER_POLL_DEAD */
  1189. fusbh200_handle_intr_unlinks, /* FUSBH200_HRTIMER_UNLINK_INTR */
  1190. end_free_itds, /* FUSBH200_HRTIMER_FREE_ITDS */
  1191. unlink_empty_async, /* FUSBH200_HRTIMER_ASYNC_UNLINKS */
  1192. fusbh200_iaa_watchdog, /* FUSBH200_HRTIMER_IAA_WATCHDOG */
  1193. fusbh200_disable_PSE, /* FUSBH200_HRTIMER_DISABLE_PERIODIC */
  1194. fusbh200_disable_ASE, /* FUSBH200_HRTIMER_DISABLE_ASYNC */
  1195. fusbh200_work, /* FUSBH200_HRTIMER_IO_WATCHDOG */
  1196. };
  1197. static enum hrtimer_restart fusbh200_hrtimer_func(struct hrtimer *t)
  1198. {
  1199. struct fusbh200_hcd *fusbh200 = container_of(t, struct fusbh200_hcd, hrtimer);
  1200. ktime_t now;
  1201. unsigned long events;
  1202. unsigned long flags;
  1203. unsigned e;
  1204. spin_lock_irqsave(&fusbh200->lock, flags);
  1205. events = fusbh200->enabled_hrtimer_events;
  1206. fusbh200->enabled_hrtimer_events = 0;
  1207. fusbh200->next_hrtimer_event = FUSBH200_HRTIMER_NO_EVENT;
  1208. /*
  1209. * Check each pending event. If its time has expired, handle
  1210. * the event; otherwise re-enable it.
  1211. */
  1212. now = ktime_get();
  1213. for_each_set_bit(e, &events, FUSBH200_HRTIMER_NUM_EVENTS) {
  1214. if (now.tv64 >= fusbh200->hr_timeouts[e].tv64)
  1215. event_handlers[e](fusbh200);
  1216. else
  1217. fusbh200_enable_event(fusbh200, e, false);
  1218. }
  1219. spin_unlock_irqrestore(&fusbh200->lock, flags);
  1220. return HRTIMER_NORESTART;
  1221. }
  1222. /*-------------------------------------------------------------------------*/
  1223. #define fusbh200_bus_suspend NULL
  1224. #define fusbh200_bus_resume NULL
  1225. /*-------------------------------------------------------------------------*/
  1226. static int check_reset_complete (
  1227. struct fusbh200_hcd *fusbh200,
  1228. int index,
  1229. u32 __iomem *status_reg,
  1230. int port_status
  1231. ) {
  1232. if (!(port_status & PORT_CONNECT))
  1233. return port_status;
  1234. /* if reset finished and it's still not enabled -- handoff */
  1235. if (!(port_status & PORT_PE)) {
  1236. /* with integrated TT, there's nobody to hand it to! */
  1237. fusbh200_dbg (fusbh200,
  1238. "Failed to enable port %d on root hub TT\n",
  1239. index+1);
  1240. return port_status;
  1241. } else {
  1242. fusbh200_dbg(fusbh200, "port %d reset complete, port enabled\n",
  1243. index + 1);
  1244. }
  1245. return port_status;
  1246. }
  1247. /*-------------------------------------------------------------------------*/
  1248. /* build "status change" packet (one or two bytes) from HC registers */
  1249. static int
  1250. fusbh200_hub_status_data (struct usb_hcd *hcd, char *buf)
  1251. {
  1252. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
  1253. u32 temp, status;
  1254. u32 mask;
  1255. int retval = 1;
  1256. unsigned long flags;
  1257. /* init status to no-changes */
  1258. buf [0] = 0;
  1259. /* Inform the core about resumes-in-progress by returning
  1260. * a non-zero value even if there are no status changes.
  1261. */
  1262. status = fusbh200->resuming_ports;
  1263. mask = PORT_CSC | PORT_PEC;
  1264. // PORT_RESUME from hardware ~= PORT_STAT_C_SUSPEND
  1265. /* no hub change reports (bit 0) for now (power, ...) */
  1266. /* port N changes (bit N)? */
  1267. spin_lock_irqsave (&fusbh200->lock, flags);
  1268. temp = fusbh200_readl(fusbh200, &fusbh200->regs->port_status);
  1269. /*
  1270. * Return status information even for ports with OWNER set.
  1271. * Otherwise khubd wouldn't see the disconnect event when a
  1272. * high-speed device is switched over to the companion
  1273. * controller by the user.
  1274. */
  1275. if ((temp & mask) != 0 || test_bit(0, &fusbh200->port_c_suspend)
  1276. || (fusbh200->reset_done[0] && time_after_eq(
  1277. jiffies, fusbh200->reset_done[0]))) {
  1278. buf [0] |= 1 << 1;
  1279. status = STS_PCD;
  1280. }
  1281. /* FIXME autosuspend idle root hubs */
  1282. spin_unlock_irqrestore (&fusbh200->lock, flags);
  1283. return status ? retval : 0;
  1284. }
  1285. /*-------------------------------------------------------------------------*/
  1286. static void
  1287. fusbh200_hub_descriptor (
  1288. struct fusbh200_hcd *fusbh200,
  1289. struct usb_hub_descriptor *desc
  1290. ) {
  1291. int ports = HCS_N_PORTS (fusbh200->hcs_params);
  1292. u16 temp;
  1293. desc->bDescriptorType = 0x29;
  1294. desc->bPwrOn2PwrGood = 10; /* fusbh200 1.0, 2.3.9 says 20ms max */
  1295. desc->bHubContrCurrent = 0;
  1296. desc->bNbrPorts = ports;
  1297. temp = 1 + (ports / 8);
  1298. desc->bDescLength = 7 + 2 * temp;
  1299. /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */
  1300. memset(&desc->u.hs.DeviceRemovable[0], 0, temp);
  1301. memset(&desc->u.hs.DeviceRemovable[temp], 0xff, temp);
  1302. temp = 0x0008; /* per-port overcurrent reporting */
  1303. temp |= 0x0002; /* no power switching */
  1304. desc->wHubCharacteristics = cpu_to_le16(temp);
  1305. }
  1306. /*-------------------------------------------------------------------------*/
  1307. static int fusbh200_hub_control (
  1308. struct usb_hcd *hcd,
  1309. u16 typeReq,
  1310. u16 wValue,
  1311. u16 wIndex,
  1312. char *buf,
  1313. u16 wLength
  1314. ) {
  1315. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
  1316. int ports = HCS_N_PORTS (fusbh200->hcs_params);
  1317. u32 __iomem *status_reg = &fusbh200->regs->port_status;
  1318. u32 temp, temp1, status;
  1319. unsigned long flags;
  1320. int retval = 0;
  1321. unsigned selector;
  1322. /*
  1323. * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR.
  1324. * HCS_INDICATOR may say we can change LEDs to off/amber/green.
  1325. * (track current state ourselves) ... blink for diagnostics,
  1326. * power, "this is the one", etc. EHCI spec supports this.
  1327. */
  1328. spin_lock_irqsave (&fusbh200->lock, flags);
  1329. switch (typeReq) {
  1330. case ClearHubFeature:
  1331. switch (wValue) {
  1332. case C_HUB_LOCAL_POWER:
  1333. case C_HUB_OVER_CURRENT:
  1334. /* no hub-wide feature/status flags */
  1335. break;
  1336. default:
  1337. goto error;
  1338. }
  1339. break;
  1340. case ClearPortFeature:
  1341. if (!wIndex || wIndex > ports)
  1342. goto error;
  1343. wIndex--;
  1344. temp = fusbh200_readl(fusbh200, status_reg);
  1345. temp &= ~PORT_RWC_BITS;
  1346. /*
  1347. * Even if OWNER is set, so the port is owned by the
  1348. * companion controller, khubd needs to be able to clear
  1349. * the port-change status bits (especially
  1350. * USB_PORT_STAT_C_CONNECTION).
  1351. */
  1352. switch (wValue) {
  1353. case USB_PORT_FEAT_ENABLE:
  1354. fusbh200_writel(fusbh200, temp & ~PORT_PE, status_reg);
  1355. break;
  1356. case USB_PORT_FEAT_C_ENABLE:
  1357. fusbh200_writel(fusbh200, temp | PORT_PEC, status_reg);
  1358. break;
  1359. case USB_PORT_FEAT_SUSPEND:
  1360. if (temp & PORT_RESET)
  1361. goto error;
  1362. if (!(temp & PORT_SUSPEND))
  1363. break;
  1364. if ((temp & PORT_PE) == 0)
  1365. goto error;
  1366. /* resume signaling for 20 msec */
  1367. fusbh200_writel(fusbh200, temp | PORT_RESUME, status_reg);
  1368. fusbh200->reset_done[wIndex] = jiffies
  1369. + msecs_to_jiffies(20);
  1370. break;
  1371. case USB_PORT_FEAT_C_SUSPEND:
  1372. clear_bit(wIndex, &fusbh200->port_c_suspend);
  1373. break;
  1374. case USB_PORT_FEAT_C_CONNECTION:
  1375. fusbh200_writel(fusbh200, temp | PORT_CSC, status_reg);
  1376. break;
  1377. case USB_PORT_FEAT_C_OVER_CURRENT:
  1378. fusbh200_writel(fusbh200, temp | BMISR_OVC, &fusbh200->regs->bmisr);
  1379. break;
  1380. case USB_PORT_FEAT_C_RESET:
  1381. /* GetPortStatus clears reset */
  1382. break;
  1383. default:
  1384. goto error;
  1385. }
  1386. fusbh200_readl(fusbh200, &fusbh200->regs->command); /* unblock posted write */
  1387. break;
  1388. case GetHubDescriptor:
  1389. fusbh200_hub_descriptor (fusbh200, (struct usb_hub_descriptor *)
  1390. buf);
  1391. break;
  1392. case GetHubStatus:
  1393. /* no hub-wide feature/status flags */
  1394. memset (buf, 0, 4);
  1395. //cpu_to_le32s ((u32 *) buf);
  1396. break;
  1397. case GetPortStatus:
  1398. if (!wIndex || wIndex > ports)
  1399. goto error;
  1400. wIndex--;
  1401. status = 0;
  1402. temp = fusbh200_readl(fusbh200, status_reg);
  1403. // wPortChange bits
  1404. if (temp & PORT_CSC)
  1405. status |= USB_PORT_STAT_C_CONNECTION << 16;
  1406. if (temp & PORT_PEC)
  1407. status |= USB_PORT_STAT_C_ENABLE << 16;
  1408. temp1 = fusbh200_readl(fusbh200, &fusbh200->regs->bmisr);
  1409. if (temp1 & BMISR_OVC)
  1410. status |= USB_PORT_STAT_C_OVERCURRENT << 16;
  1411. /* whoever resumes must GetPortStatus to complete it!! */
  1412. if (temp & PORT_RESUME) {
  1413. /* Remote Wakeup received? */
  1414. if (!fusbh200->reset_done[wIndex]) {
  1415. /* resume signaling for 20 msec */
  1416. fusbh200->reset_done[wIndex] = jiffies
  1417. + msecs_to_jiffies(20);
  1418. /* check the port again */
  1419. mod_timer(&fusbh200_to_hcd(fusbh200)->rh_timer,
  1420. fusbh200->reset_done[wIndex]);
  1421. }
  1422. /* resume completed? */
  1423. else if (time_after_eq(jiffies,
  1424. fusbh200->reset_done[wIndex])) {
  1425. clear_bit(wIndex, &fusbh200->suspended_ports);
  1426. set_bit(wIndex, &fusbh200->port_c_suspend);
  1427. fusbh200->reset_done[wIndex] = 0;
  1428. /* stop resume signaling */
  1429. temp = fusbh200_readl(fusbh200, status_reg);
  1430. fusbh200_writel(fusbh200,
  1431. temp & ~(PORT_RWC_BITS | PORT_RESUME),
  1432. status_reg);
  1433. clear_bit(wIndex, &fusbh200->resuming_ports);
  1434. retval = handshake(fusbh200, status_reg,
  1435. PORT_RESUME, 0, 2000 /* 2msec */);
  1436. if (retval != 0) {
  1437. fusbh200_err(fusbh200,
  1438. "port %d resume error %d\n",
  1439. wIndex + 1, retval);
  1440. goto error;
  1441. }
  1442. temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10));
  1443. }
  1444. }
  1445. /* whoever resets must GetPortStatus to complete it!! */
  1446. if ((temp & PORT_RESET)
  1447. && time_after_eq(jiffies,
  1448. fusbh200->reset_done[wIndex])) {
  1449. status |= USB_PORT_STAT_C_RESET << 16;
  1450. fusbh200->reset_done [wIndex] = 0;
  1451. clear_bit(wIndex, &fusbh200->resuming_ports);
  1452. /* force reset to complete */
  1453. fusbh200_writel(fusbh200, temp & ~(PORT_RWC_BITS | PORT_RESET),
  1454. status_reg);
  1455. /* REVISIT: some hardware needs 550+ usec to clear
  1456. * this bit; seems too long to spin routinely...
  1457. */
  1458. retval = handshake(fusbh200, status_reg,
  1459. PORT_RESET, 0, 1000);
  1460. if (retval != 0) {
  1461. fusbh200_err (fusbh200, "port %d reset error %d\n",
  1462. wIndex + 1, retval);
  1463. goto error;
  1464. }
  1465. /* see what we found out */
  1466. temp = check_reset_complete (fusbh200, wIndex, status_reg,
  1467. fusbh200_readl(fusbh200, status_reg));
  1468. }
  1469. if (!(temp & (PORT_RESUME|PORT_RESET))) {
  1470. fusbh200->reset_done[wIndex] = 0;
  1471. clear_bit(wIndex, &fusbh200->resuming_ports);
  1472. }
  1473. /* transfer dedicated ports to the companion hc */
  1474. if ((temp & PORT_CONNECT) &&
  1475. test_bit(wIndex, &fusbh200->companion_ports)) {
  1476. temp &= ~PORT_RWC_BITS;
  1477. fusbh200_writel(fusbh200, temp, status_reg);
  1478. fusbh200_dbg(fusbh200, "port %d --> companion\n", wIndex + 1);
  1479. temp = fusbh200_readl(fusbh200, status_reg);
  1480. }
  1481. /*
  1482. * Even if OWNER is set, there's no harm letting khubd
  1483. * see the wPortStatus values (they should all be 0 except
  1484. * for PORT_POWER anyway).
  1485. */
  1486. if (temp & PORT_CONNECT) {
  1487. status |= USB_PORT_STAT_CONNECTION;
  1488. status |= fusbh200_port_speed(fusbh200, temp);
  1489. }
  1490. if (temp & PORT_PE)
  1491. status |= USB_PORT_STAT_ENABLE;
  1492. /* maybe the port was unsuspended without our knowledge */
  1493. if (temp & (PORT_SUSPEND|PORT_RESUME)) {
  1494. status |= USB_PORT_STAT_SUSPEND;
  1495. } else if (test_bit(wIndex, &fusbh200->suspended_ports)) {
  1496. clear_bit(wIndex, &fusbh200->suspended_ports);
  1497. clear_bit(wIndex, &fusbh200->resuming_ports);
  1498. fusbh200->reset_done[wIndex] = 0;
  1499. if (temp & PORT_PE)
  1500. set_bit(wIndex, &fusbh200->port_c_suspend);
  1501. }
  1502. temp1 = fusbh200_readl(fusbh200, &fusbh200->regs->bmisr);
  1503. if (temp1 & BMISR_OVC)
  1504. status |= USB_PORT_STAT_OVERCURRENT;
  1505. if (temp & PORT_RESET)
  1506. status |= USB_PORT_STAT_RESET;
  1507. if (test_bit(wIndex, &fusbh200->port_c_suspend))
  1508. status |= USB_PORT_STAT_C_SUSPEND << 16;
  1509. #ifndef VERBOSE_DEBUG
  1510. if (status & ~0xffff) /* only if wPortChange is interesting */
  1511. #endif
  1512. dbg_port (fusbh200, "GetStatus", wIndex + 1, temp);
  1513. put_unaligned_le32(status, buf);
  1514. break;
  1515. case SetHubFeature:
  1516. switch (wValue) {
  1517. case C_HUB_LOCAL_POWER:
  1518. case C_HUB_OVER_CURRENT:
  1519. /* no hub-wide feature/status flags */
  1520. break;
  1521. default:
  1522. goto error;
  1523. }
  1524. break;
  1525. case SetPortFeature:
  1526. selector = wIndex >> 8;
  1527. wIndex &= 0xff;
  1528. if (!wIndex || wIndex > ports)
  1529. goto error;
  1530. wIndex--;
  1531. temp = fusbh200_readl(fusbh200, status_reg);
  1532. temp &= ~PORT_RWC_BITS;
  1533. switch (wValue) {
  1534. case USB_PORT_FEAT_SUSPEND:
  1535. if ((temp & PORT_PE) == 0
  1536. || (temp & PORT_RESET) != 0)
  1537. goto error;
  1538. /* After above check the port must be connected.
  1539. * Set appropriate bit thus could put phy into low power
  1540. * mode if we have hostpc feature
  1541. */
  1542. fusbh200_writel(fusbh200, temp | PORT_SUSPEND, status_reg);
  1543. set_bit(wIndex, &fusbh200->suspended_ports);
  1544. break;
  1545. case USB_PORT_FEAT_RESET:
  1546. if (temp & PORT_RESUME)
  1547. goto error;
  1548. /* line status bits may report this as low speed,
  1549. * which can be fine if this root hub has a
  1550. * transaction translator built in.
  1551. */
  1552. fusbh200_vdbg (fusbh200, "port %d reset\n", wIndex + 1);
  1553. temp |= PORT_RESET;
  1554. temp &= ~PORT_PE;
  1555. /*
  1556. * caller must wait, then call GetPortStatus
  1557. * usb 2.0 spec says 50 ms resets on root
  1558. */
  1559. fusbh200->reset_done [wIndex] = jiffies
  1560. + msecs_to_jiffies (50);
  1561. fusbh200_writel(fusbh200, temp, status_reg);
  1562. break;
  1563. /* For downstream facing ports (these): one hub port is put
  1564. * into test mode according to USB2 11.24.2.13, then the hub
  1565. * must be reset (which for root hub now means rmmod+modprobe,
  1566. * or else system reboot). See EHCI 2.3.9 and 4.14 for info
  1567. * about the EHCI-specific stuff.
  1568. */
  1569. case USB_PORT_FEAT_TEST:
  1570. if (!selector || selector > 5)
  1571. goto error;
  1572. spin_unlock_irqrestore(&fusbh200->lock, flags);
  1573. fusbh200_quiesce(fusbh200);
  1574. spin_lock_irqsave(&fusbh200->lock, flags);
  1575. /* Put all enabled ports into suspend */
  1576. temp = fusbh200_readl(fusbh200, status_reg) & ~PORT_RWC_BITS;
  1577. if (temp & PORT_PE)
  1578. fusbh200_writel(fusbh200, temp | PORT_SUSPEND,
  1579. status_reg);
  1580. spin_unlock_irqrestore(&fusbh200->lock, flags);
  1581. fusbh200_halt(fusbh200);
  1582. spin_lock_irqsave(&fusbh200->lock, flags);
  1583. temp = fusbh200_readl(fusbh200, status_reg);
  1584. temp |= selector << 16;
  1585. fusbh200_writel(fusbh200, temp, status_reg);
  1586. break;
  1587. default:
  1588. goto error;
  1589. }
  1590. fusbh200_readl(fusbh200, &fusbh200->regs->command); /* unblock posted writes */
  1591. break;
  1592. default:
  1593. error:
  1594. /* "stall" on error */
  1595. retval = -EPIPE;
  1596. }
  1597. spin_unlock_irqrestore (&fusbh200->lock, flags);
  1598. return retval;
  1599. }
  1600. static void __maybe_unused fusbh200_relinquish_port(struct usb_hcd *hcd,
  1601. int portnum)
  1602. {
  1603. return;
  1604. }
  1605. static int __maybe_unused fusbh200_port_handed_over(struct usb_hcd *hcd,
  1606. int portnum)
  1607. {
  1608. return 0;
  1609. }
  1610. /*-------------------------------------------------------------------------*/
  1611. /*
  1612. * There's basically three types of memory:
  1613. * - data used only by the HCD ... kmalloc is fine
  1614. * - async and periodic schedules, shared by HC and HCD ... these
  1615. * need to use dma_pool or dma_alloc_coherent
  1616. * - driver buffers, read/written by HC ... single shot DMA mapped
  1617. *
  1618. * There's also "register" data (e.g. PCI or SOC), which is memory mapped.
  1619. * No memory seen by this driver is pageable.
  1620. */
  1621. /*-------------------------------------------------------------------------*/
  1622. /* Allocate the key transfer structures from the previously allocated pool */
  1623. static inline void fusbh200_qtd_init(struct fusbh200_hcd *fusbh200, struct fusbh200_qtd *qtd,
  1624. dma_addr_t dma)
  1625. {
  1626. memset (qtd, 0, sizeof *qtd);
  1627. qtd->qtd_dma = dma;
  1628. qtd->hw_token = cpu_to_hc32(fusbh200, QTD_STS_HALT);
  1629. qtd->hw_next = FUSBH200_LIST_END(fusbh200);
  1630. qtd->hw_alt_next = FUSBH200_LIST_END(fusbh200);
  1631. INIT_LIST_HEAD (&qtd->qtd_list);
  1632. }
  1633. static struct fusbh200_qtd *fusbh200_qtd_alloc (struct fusbh200_hcd *fusbh200, gfp_t flags)
  1634. {
  1635. struct fusbh200_qtd *qtd;
  1636. dma_addr_t dma;
  1637. qtd = dma_pool_alloc (fusbh200->qtd_pool, flags, &dma);
  1638. if (qtd != NULL) {
  1639. fusbh200_qtd_init(fusbh200, qtd, dma);
  1640. }
  1641. return qtd;
  1642. }
  1643. static inline void fusbh200_qtd_free (struct fusbh200_hcd *fusbh200, struct fusbh200_qtd *qtd)
  1644. {
  1645. dma_pool_free (fusbh200->qtd_pool, qtd, qtd->qtd_dma);
  1646. }
  1647. static void qh_destroy(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  1648. {
  1649. /* clean qtds first, and know this is not linked */
  1650. if (!list_empty (&qh->qtd_list) || qh->qh_next.ptr) {
  1651. fusbh200_dbg (fusbh200, "unused qh not empty!\n");
  1652. BUG ();
  1653. }
  1654. if (qh->dummy)
  1655. fusbh200_qtd_free (fusbh200, qh->dummy);
  1656. dma_pool_free(fusbh200->qh_pool, qh->hw, qh->qh_dma);
  1657. kfree(qh);
  1658. }
  1659. static struct fusbh200_qh *fusbh200_qh_alloc (struct fusbh200_hcd *fusbh200, gfp_t flags)
  1660. {
  1661. struct fusbh200_qh *qh;
  1662. dma_addr_t dma;
  1663. qh = kzalloc(sizeof *qh, GFP_ATOMIC);
  1664. if (!qh)
  1665. goto done;
  1666. qh->hw = (struct fusbh200_qh_hw *)
  1667. dma_pool_alloc(fusbh200->qh_pool, flags, &dma);
  1668. if (!qh->hw)
  1669. goto fail;
  1670. memset(qh->hw, 0, sizeof *qh->hw);
  1671. qh->qh_dma = dma;
  1672. // INIT_LIST_HEAD (&qh->qh_list);
  1673. INIT_LIST_HEAD (&qh->qtd_list);
  1674. /* dummy td enables safe urb queuing */
  1675. qh->dummy = fusbh200_qtd_alloc (fusbh200, flags);
  1676. if (qh->dummy == NULL) {
  1677. fusbh200_dbg (fusbh200, "no dummy td\n");
  1678. goto fail1;
  1679. }
  1680. done:
  1681. return qh;
  1682. fail1:
  1683. dma_pool_free(fusbh200->qh_pool, qh->hw, qh->qh_dma);
  1684. fail:
  1685. kfree(qh);
  1686. return NULL;
  1687. }
  1688. /*-------------------------------------------------------------------------*/
  1689. /* The queue heads and transfer descriptors are managed from pools tied
  1690. * to each of the "per device" structures.
  1691. * This is the initialisation and cleanup code.
  1692. */
  1693. static void fusbh200_mem_cleanup (struct fusbh200_hcd *fusbh200)
  1694. {
  1695. if (fusbh200->async)
  1696. qh_destroy(fusbh200, fusbh200->async);
  1697. fusbh200->async = NULL;
  1698. if (fusbh200->dummy)
  1699. qh_destroy(fusbh200, fusbh200->dummy);
  1700. fusbh200->dummy = NULL;
  1701. /* DMA consistent memory and pools */
  1702. if (fusbh200->qtd_pool)
  1703. dma_pool_destroy (fusbh200->qtd_pool);
  1704. fusbh200->qtd_pool = NULL;
  1705. if (fusbh200->qh_pool) {
  1706. dma_pool_destroy (fusbh200->qh_pool);
  1707. fusbh200->qh_pool = NULL;
  1708. }
  1709. if (fusbh200->itd_pool)
  1710. dma_pool_destroy (fusbh200->itd_pool);
  1711. fusbh200->itd_pool = NULL;
  1712. if (fusbh200->periodic)
  1713. dma_free_coherent (fusbh200_to_hcd(fusbh200)->self.controller,
  1714. fusbh200->periodic_size * sizeof (u32),
  1715. fusbh200->periodic, fusbh200->periodic_dma);
  1716. fusbh200->periodic = NULL;
  1717. /* shadow periodic table */
  1718. kfree(fusbh200->pshadow);
  1719. fusbh200->pshadow = NULL;
  1720. }
  1721. /* remember to add cleanup code (above) if you add anything here */
  1722. static int fusbh200_mem_init (struct fusbh200_hcd *fusbh200, gfp_t flags)
  1723. {
  1724. int i;
  1725. /* QTDs for control/bulk/intr transfers */
  1726. fusbh200->qtd_pool = dma_pool_create ("fusbh200_qtd",
  1727. fusbh200_to_hcd(fusbh200)->self.controller,
  1728. sizeof (struct fusbh200_qtd),
  1729. 32 /* byte alignment (for hw parts) */,
  1730. 4096 /* can't cross 4K */);
  1731. if (!fusbh200->qtd_pool) {
  1732. goto fail;
  1733. }
  1734. /* QHs for control/bulk/intr transfers */
  1735. fusbh200->qh_pool = dma_pool_create ("fusbh200_qh",
  1736. fusbh200_to_hcd(fusbh200)->self.controller,
  1737. sizeof(struct fusbh200_qh_hw),
  1738. 32 /* byte alignment (for hw parts) */,
  1739. 4096 /* can't cross 4K */);
  1740. if (!fusbh200->qh_pool) {
  1741. goto fail;
  1742. }
  1743. fusbh200->async = fusbh200_qh_alloc (fusbh200, flags);
  1744. if (!fusbh200->async) {
  1745. goto fail;
  1746. }
  1747. /* ITD for high speed ISO transfers */
  1748. fusbh200->itd_pool = dma_pool_create ("fusbh200_itd",
  1749. fusbh200_to_hcd(fusbh200)->self.controller,
  1750. sizeof (struct fusbh200_itd),
  1751. 64 /* byte alignment (for hw parts) */,
  1752. 4096 /* can't cross 4K */);
  1753. if (!fusbh200->itd_pool) {
  1754. goto fail;
  1755. }
  1756. /* Hardware periodic table */
  1757. fusbh200->periodic = (__le32 *)
  1758. dma_alloc_coherent (fusbh200_to_hcd(fusbh200)->self.controller,
  1759. fusbh200->periodic_size * sizeof(__le32),
  1760. &fusbh200->periodic_dma, 0);
  1761. if (fusbh200->periodic == NULL) {
  1762. goto fail;
  1763. }
  1764. for (i = 0; i < fusbh200->periodic_size; i++)
  1765. fusbh200->periodic[i] = FUSBH200_LIST_END(fusbh200);
  1766. /* software shadow of hardware table */
  1767. fusbh200->pshadow = kcalloc(fusbh200->periodic_size, sizeof(void *), flags);
  1768. if (fusbh200->pshadow != NULL)
  1769. return 0;
  1770. fail:
  1771. fusbh200_dbg (fusbh200, "couldn't init memory\n");
  1772. fusbh200_mem_cleanup (fusbh200);
  1773. return -ENOMEM;
  1774. }
  1775. /*-------------------------------------------------------------------------*/
  1776. /*
  1777. * EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
  1778. *
  1779. * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
  1780. * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
  1781. * buffers needed for the larger number). We use one QH per endpoint, queue
  1782. * multiple urbs (all three types) per endpoint. URBs may need several qtds.
  1783. *
  1784. * ISO traffic uses "ISO TD" (itd) records, and (along with
  1785. * interrupts) needs careful scheduling. Performance improvements can be
  1786. * an ongoing challenge. That's in "ehci-sched.c".
  1787. *
  1788. * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
  1789. * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
  1790. * (b) special fields in qh entries or (c) split iso entries. TTs will
  1791. * buffer low/full speed data so the host collects it at high speed.
  1792. */
  1793. /*-------------------------------------------------------------------------*/
  1794. /* fill a qtd, returning how much of the buffer we were able to queue up */
  1795. static int
  1796. qtd_fill(struct fusbh200_hcd *fusbh200, struct fusbh200_qtd *qtd, dma_addr_t buf,
  1797. size_t len, int token, int maxpacket)
  1798. {
  1799. int i, count;
  1800. u64 addr = buf;
  1801. /* one buffer entry per 4K ... first might be short or unaligned */
  1802. qtd->hw_buf[0] = cpu_to_hc32(fusbh200, (u32)addr);
  1803. qtd->hw_buf_hi[0] = cpu_to_hc32(fusbh200, (u32)(addr >> 32));
  1804. count = 0x1000 - (buf & 0x0fff); /* rest of that page */
  1805. if (likely (len < count)) /* ... iff needed */
  1806. count = len;
  1807. else {
  1808. buf += 0x1000;
  1809. buf &= ~0x0fff;
  1810. /* per-qtd limit: from 16K to 20K (best alignment) */
  1811. for (i = 1; count < len && i < 5; i++) {
  1812. addr = buf;
  1813. qtd->hw_buf[i] = cpu_to_hc32(fusbh200, (u32)addr);
  1814. qtd->hw_buf_hi[i] = cpu_to_hc32(fusbh200,
  1815. (u32)(addr >> 32));
  1816. buf += 0x1000;
  1817. if ((count + 0x1000) < len)
  1818. count += 0x1000;
  1819. else
  1820. count = len;
  1821. }
  1822. /* short packets may only terminate transfers */
  1823. if (count != len)
  1824. count -= (count % maxpacket);
  1825. }
  1826. qtd->hw_token = cpu_to_hc32(fusbh200, (count << 16) | token);
  1827. qtd->length = count;
  1828. return count;
  1829. }
  1830. /*-------------------------------------------------------------------------*/
  1831. static inline void
  1832. qh_update (struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh, struct fusbh200_qtd *qtd)
  1833. {
  1834. struct fusbh200_qh_hw *hw = qh->hw;
  1835. /* writes to an active overlay are unsafe */
  1836. BUG_ON(qh->qh_state != QH_STATE_IDLE);
  1837. hw->hw_qtd_next = QTD_NEXT(fusbh200, qtd->qtd_dma);
  1838. hw->hw_alt_next = FUSBH200_LIST_END(fusbh200);
  1839. /* Except for control endpoints, we make hardware maintain data
  1840. * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
  1841. * and set the pseudo-toggle in udev. Only usb_clear_halt() will
  1842. * ever clear it.
  1843. */
  1844. if (!(hw->hw_info1 & cpu_to_hc32(fusbh200, QH_TOGGLE_CTL))) {
  1845. unsigned is_out, epnum;
  1846. is_out = qh->is_out;
  1847. epnum = (hc32_to_cpup(fusbh200, &hw->hw_info1) >> 8) & 0x0f;
  1848. if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) {
  1849. hw->hw_token &= ~cpu_to_hc32(fusbh200, QTD_TOGGLE);
  1850. usb_settoggle (qh->dev, epnum, is_out, 1);
  1851. }
  1852. }
  1853. hw->hw_token &= cpu_to_hc32(fusbh200, QTD_TOGGLE | QTD_STS_PING);
  1854. }
  1855. /* if it weren't for a common silicon quirk (writing the dummy into the qh
  1856. * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
  1857. * recovery (including urb dequeue) would need software changes to a QH...
  1858. */
  1859. static void
  1860. qh_refresh (struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  1861. {
  1862. struct fusbh200_qtd *qtd;
  1863. if (list_empty (&qh->qtd_list))
  1864. qtd = qh->dummy;
  1865. else {
  1866. qtd = list_entry (qh->qtd_list.next,
  1867. struct fusbh200_qtd, qtd_list);
  1868. /*
  1869. * first qtd may already be partially processed.
  1870. * If we come here during unlink, the QH overlay region
  1871. * might have reference to the just unlinked qtd. The
  1872. * qtd is updated in qh_completions(). Update the QH
  1873. * overlay here.
  1874. */
  1875. if (cpu_to_hc32(fusbh200, qtd->qtd_dma) == qh->hw->hw_current) {
  1876. qh->hw->hw_qtd_next = qtd->hw_next;
  1877. qtd = NULL;
  1878. }
  1879. }
  1880. if (qtd)
  1881. qh_update (fusbh200, qh, qtd);
  1882. }
  1883. /*-------------------------------------------------------------------------*/
  1884. static void qh_link_async(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh);
  1885. static void fusbh200_clear_tt_buffer_complete(struct usb_hcd *hcd,
  1886. struct usb_host_endpoint *ep)
  1887. {
  1888. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200(hcd);
  1889. struct fusbh200_qh *qh = ep->hcpriv;
  1890. unsigned long flags;
  1891. spin_lock_irqsave(&fusbh200->lock, flags);
  1892. qh->clearing_tt = 0;
  1893. if (qh->qh_state == QH_STATE_IDLE && !list_empty(&qh->qtd_list)
  1894. && fusbh200->rh_state == FUSBH200_RH_RUNNING)
  1895. qh_link_async(fusbh200, qh);
  1896. spin_unlock_irqrestore(&fusbh200->lock, flags);
  1897. }
  1898. static void fusbh200_clear_tt_buffer(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh,
  1899. struct urb *urb, u32 token)
  1900. {
  1901. /* If an async split transaction gets an error or is unlinked,
  1902. * the TT buffer may be left in an indeterminate state. We
  1903. * have to clear the TT buffer.
  1904. *
  1905. * Note: this routine is never called for Isochronous transfers.
  1906. */
  1907. if (urb->dev->tt && !usb_pipeint(urb->pipe) && !qh->clearing_tt) {
  1908. #ifdef DEBUG
  1909. struct usb_device *tt = urb->dev->tt->hub;
  1910. dev_dbg(&tt->dev,
  1911. "clear tt buffer port %d, a%d ep%d t%08x\n",
  1912. urb->dev->ttport, urb->dev->devnum,
  1913. usb_pipeendpoint(urb->pipe), token);
  1914. #endif /* DEBUG */
  1915. if (urb->dev->tt->hub !=
  1916. fusbh200_to_hcd(fusbh200)->self.root_hub) {
  1917. if (usb_hub_clear_tt_buffer(urb) == 0)
  1918. qh->clearing_tt = 1;
  1919. }
  1920. }
  1921. }
  1922. static int qtd_copy_status (
  1923. struct fusbh200_hcd *fusbh200,
  1924. struct urb *urb,
  1925. size_t length,
  1926. u32 token
  1927. )
  1928. {
  1929. int status = -EINPROGRESS;
  1930. /* count IN/OUT bytes, not SETUP (even short packets) */
  1931. if (likely (QTD_PID (token) != 2))
  1932. urb->actual_length += length - QTD_LENGTH (token);
  1933. /* don't modify error codes */
  1934. if (unlikely(urb->unlinked))
  1935. return status;
  1936. /* force cleanup after short read; not always an error */
  1937. if (unlikely (IS_SHORT_READ (token)))
  1938. status = -EREMOTEIO;
  1939. /* serious "can't proceed" faults reported by the hardware */
  1940. if (token & QTD_STS_HALT) {
  1941. if (token & QTD_STS_BABBLE) {
  1942. /* FIXME "must" disable babbling device's port too */
  1943. status = -EOVERFLOW;
  1944. /* CERR nonzero + halt --> stall */
  1945. } else if (QTD_CERR(token)) {
  1946. status = -EPIPE;
  1947. /* In theory, more than one of the following bits can be set
  1948. * since they are sticky and the transaction is retried.
  1949. * Which to test first is rather arbitrary.
  1950. */
  1951. } else if (token & QTD_STS_MMF) {
  1952. /* fs/ls interrupt xfer missed the complete-split */
  1953. status = -EPROTO;
  1954. } else if (token & QTD_STS_DBE) {
  1955. status = (QTD_PID (token) == 1) /* IN ? */
  1956. ? -ENOSR /* hc couldn't read data */
  1957. : -ECOMM; /* hc couldn't write data */
  1958. } else if (token & QTD_STS_XACT) {
  1959. /* timeout, bad CRC, wrong PID, etc */
  1960. fusbh200_dbg(fusbh200, "devpath %s ep%d%s 3strikes\n",
  1961. urb->dev->devpath,
  1962. usb_pipeendpoint(urb->pipe),
  1963. usb_pipein(urb->pipe) ? "in" : "out");
  1964. status = -EPROTO;
  1965. } else { /* unknown */
  1966. status = -EPROTO;
  1967. }
  1968. fusbh200_vdbg (fusbh200,
  1969. "dev%d ep%d%s qtd token %08x --> status %d\n",
  1970. usb_pipedevice (urb->pipe),
  1971. usb_pipeendpoint (urb->pipe),
  1972. usb_pipein (urb->pipe) ? "in" : "out",
  1973. token, status);
  1974. }
  1975. return status;
  1976. }
  1977. static void
  1978. fusbh200_urb_done(struct fusbh200_hcd *fusbh200, struct urb *urb, int status)
  1979. __releases(fusbh200->lock)
  1980. __acquires(fusbh200->lock)
  1981. {
  1982. if (likely (urb->hcpriv != NULL)) {
  1983. struct fusbh200_qh *qh = (struct fusbh200_qh *) urb->hcpriv;
  1984. /* S-mask in a QH means it's an interrupt urb */
  1985. if ((qh->hw->hw_info2 & cpu_to_hc32(fusbh200, QH_SMASK)) != 0) {
  1986. /* ... update hc-wide periodic stats (for usbfs) */
  1987. fusbh200_to_hcd(fusbh200)->self.bandwidth_int_reqs--;
  1988. }
  1989. }
  1990. if (unlikely(urb->unlinked)) {
  1991. COUNT(fusbh200->stats.unlink);
  1992. } else {
  1993. /* report non-error and short read status as zero */
  1994. if (status == -EINPROGRESS || status == -EREMOTEIO)
  1995. status = 0;
  1996. COUNT(fusbh200->stats.complete);
  1997. }
  1998. #ifdef FUSBH200_URB_TRACE
  1999. fusbh200_dbg (fusbh200,
  2000. "%s %s urb %p ep%d%s status %d len %d/%d\n",
  2001. __func__, urb->dev->devpath, urb,
  2002. usb_pipeendpoint (urb->pipe),
  2003. usb_pipein (urb->pipe) ? "in" : "out",
  2004. status,
  2005. urb->actual_length, urb->transfer_buffer_length);
  2006. #endif
  2007. /* complete() can reenter this HCD */
  2008. usb_hcd_unlink_urb_from_ep(fusbh200_to_hcd(fusbh200), urb);
  2009. spin_unlock (&fusbh200->lock);
  2010. usb_hcd_giveback_urb(fusbh200_to_hcd(fusbh200), urb, status);
  2011. spin_lock (&fusbh200->lock);
  2012. }
  2013. static int qh_schedule (struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh);
  2014. /*
  2015. * Process and free completed qtds for a qh, returning URBs to drivers.
  2016. * Chases up to qh->hw_current. Returns number of completions called,
  2017. * indicating how much "real" work we did.
  2018. */
  2019. static unsigned
  2020. qh_completions (struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  2021. {
  2022. struct fusbh200_qtd *last, *end = qh->dummy;
  2023. struct list_head *entry, *tmp;
  2024. int last_status;
  2025. int stopped;
  2026. unsigned count = 0;
  2027. u8 state;
  2028. struct fusbh200_qh_hw *hw = qh->hw;
  2029. if (unlikely (list_empty (&qh->qtd_list)))
  2030. return count;
  2031. /* completions (or tasks on other cpus) must never clobber HALT
  2032. * till we've gone through and cleaned everything up, even when
  2033. * they add urbs to this qh's queue or mark them for unlinking.
  2034. *
  2035. * NOTE: unlinking expects to be done in queue order.
  2036. *
  2037. * It's a bug for qh->qh_state to be anything other than
  2038. * QH_STATE_IDLE, unless our caller is scan_async() or
  2039. * scan_intr().
  2040. */
  2041. state = qh->qh_state;
  2042. qh->qh_state = QH_STATE_COMPLETING;
  2043. stopped = (state == QH_STATE_IDLE);
  2044. rescan:
  2045. last = NULL;
  2046. last_status = -EINPROGRESS;
  2047. qh->needs_rescan = 0;
  2048. /* remove de-activated QTDs from front of queue.
  2049. * after faults (including short reads), cleanup this urb
  2050. * then let the queue advance.
  2051. * if queue is stopped, handles unlinks.
  2052. */
  2053. list_for_each_safe (entry, tmp, &qh->qtd_list) {
  2054. struct fusbh200_qtd *qtd;
  2055. struct urb *urb;
  2056. u32 token = 0;
  2057. qtd = list_entry (entry, struct fusbh200_qtd, qtd_list);
  2058. urb = qtd->urb;
  2059. /* clean up any state from previous QTD ...*/
  2060. if (last) {
  2061. if (likely (last->urb != urb)) {
  2062. fusbh200_urb_done(fusbh200, last->urb, last_status);
  2063. count++;
  2064. last_status = -EINPROGRESS;
  2065. }
  2066. fusbh200_qtd_free (fusbh200, last);
  2067. last = NULL;
  2068. }
  2069. /* ignore urbs submitted during completions we reported */
  2070. if (qtd == end)
  2071. break;
  2072. /* hardware copies qtd out of qh overlay */
  2073. rmb ();
  2074. token = hc32_to_cpu(fusbh200, qtd->hw_token);
  2075. /* always clean up qtds the hc de-activated */
  2076. retry_xacterr:
  2077. if ((token & QTD_STS_ACTIVE) == 0) {
  2078. /* Report Data Buffer Error: non-fatal but useful */
  2079. if (token & QTD_STS_DBE)
  2080. fusbh200_dbg(fusbh200,
  2081. "detected DataBufferErr for urb %p ep%d%s len %d, qtd %p [qh %p]\n",
  2082. urb,
  2083. usb_endpoint_num(&urb->ep->desc),
  2084. usb_endpoint_dir_in(&urb->ep->desc) ? "in" : "out",
  2085. urb->transfer_buffer_length,
  2086. qtd,
  2087. qh);
  2088. /* on STALL, error, and short reads this urb must
  2089. * complete and all its qtds must be recycled.
  2090. */
  2091. if ((token & QTD_STS_HALT) != 0) {
  2092. /* retry transaction errors until we
  2093. * reach the software xacterr limit
  2094. */
  2095. if ((token & QTD_STS_XACT) &&
  2096. QTD_CERR(token) == 0 &&
  2097. ++qh->xacterrs < QH_XACTERR_MAX &&
  2098. !urb->unlinked) {
  2099. fusbh200_dbg(fusbh200,
  2100. "detected XactErr len %zu/%zu retry %d\n",
  2101. qtd->length - QTD_LENGTH(token), qtd->length, qh->xacterrs);
  2102. /* reset the token in the qtd and the
  2103. * qh overlay (which still contains
  2104. * the qtd) so that we pick up from
  2105. * where we left off
  2106. */
  2107. token &= ~QTD_STS_HALT;
  2108. token |= QTD_STS_ACTIVE |
  2109. (FUSBH200_TUNE_CERR << 10);
  2110. qtd->hw_token = cpu_to_hc32(fusbh200,
  2111. token);
  2112. wmb();
  2113. hw->hw_token = cpu_to_hc32(fusbh200,
  2114. token);
  2115. goto retry_xacterr;
  2116. }
  2117. stopped = 1;
  2118. /* magic dummy for some short reads; qh won't advance.
  2119. * that silicon quirk can kick in with this dummy too.
  2120. *
  2121. * other short reads won't stop the queue, including
  2122. * control transfers (status stage handles that) or
  2123. * most other single-qtd reads ... the queue stops if
  2124. * URB_SHORT_NOT_OK was set so the driver submitting
  2125. * the urbs could clean it up.
  2126. */
  2127. } else if (IS_SHORT_READ (token)
  2128. && !(qtd->hw_alt_next
  2129. & FUSBH200_LIST_END(fusbh200))) {
  2130. stopped = 1;
  2131. }
  2132. /* stop scanning when we reach qtds the hc is using */
  2133. } else if (likely (!stopped
  2134. && fusbh200->rh_state >= FUSBH200_RH_RUNNING)) {
  2135. break;
  2136. /* scan the whole queue for unlinks whenever it stops */
  2137. } else {
  2138. stopped = 1;
  2139. /* cancel everything if we halt, suspend, etc */
  2140. if (fusbh200->rh_state < FUSBH200_RH_RUNNING)
  2141. last_status = -ESHUTDOWN;
  2142. /* this qtd is active; skip it unless a previous qtd
  2143. * for its urb faulted, or its urb was canceled.
  2144. */
  2145. else if (last_status == -EINPROGRESS && !urb->unlinked)
  2146. continue;
  2147. /* qh unlinked; token in overlay may be most current */
  2148. if (state == QH_STATE_IDLE
  2149. && cpu_to_hc32(fusbh200, qtd->qtd_dma)
  2150. == hw->hw_current) {
  2151. token = hc32_to_cpu(fusbh200, hw->hw_token);
  2152. /* An unlink may leave an incomplete
  2153. * async transaction in the TT buffer.
  2154. * We have to clear it.
  2155. */
  2156. fusbh200_clear_tt_buffer(fusbh200, qh, urb, token);
  2157. }
  2158. }
  2159. /* unless we already know the urb's status, collect qtd status
  2160. * and update count of bytes transferred. in common short read
  2161. * cases with only one data qtd (including control transfers),
  2162. * queue processing won't halt. but with two or more qtds (for
  2163. * example, with a 32 KB transfer), when the first qtd gets a
  2164. * short read the second must be removed by hand.
  2165. */
  2166. if (last_status == -EINPROGRESS) {
  2167. last_status = qtd_copy_status(fusbh200, urb,
  2168. qtd->length, token);
  2169. if (last_status == -EREMOTEIO
  2170. && (qtd->hw_alt_next
  2171. & FUSBH200_LIST_END(fusbh200)))
  2172. last_status = -EINPROGRESS;
  2173. /* As part of low/full-speed endpoint-halt processing
  2174. * we must clear the TT buffer (11.17.5).
  2175. */
  2176. if (unlikely(last_status != -EINPROGRESS &&
  2177. last_status != -EREMOTEIO)) {
  2178. /* The TT's in some hubs malfunction when they
  2179. * receive this request following a STALL (they
  2180. * stop sending isochronous packets). Since a
  2181. * STALL can't leave the TT buffer in a busy
  2182. * state (if you believe Figures 11-48 - 11-51
  2183. * in the USB 2.0 spec), we won't clear the TT
  2184. * buffer in this case. Strictly speaking this
  2185. * is a violation of the spec.
  2186. */
  2187. if (last_status != -EPIPE)
  2188. fusbh200_clear_tt_buffer(fusbh200, qh, urb,
  2189. token);
  2190. }
  2191. }
  2192. /* if we're removing something not at the queue head,
  2193. * patch the hardware queue pointer.
  2194. */
  2195. if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
  2196. last = list_entry (qtd->qtd_list.prev,
  2197. struct fusbh200_qtd, qtd_list);
  2198. last->hw_next = qtd->hw_next;
  2199. }
  2200. /* remove qtd; it's recycled after possible urb completion */
  2201. list_del (&qtd->qtd_list);
  2202. last = qtd;
  2203. /* reinit the xacterr counter for the next qtd */
  2204. qh->xacterrs = 0;
  2205. }
  2206. /* last urb's completion might still need calling */
  2207. if (likely (last != NULL)) {
  2208. fusbh200_urb_done(fusbh200, last->urb, last_status);
  2209. count++;
  2210. fusbh200_qtd_free (fusbh200, last);
  2211. }
  2212. /* Do we need to rescan for URBs dequeued during a giveback? */
  2213. if (unlikely(qh->needs_rescan)) {
  2214. /* If the QH is already unlinked, do the rescan now. */
  2215. if (state == QH_STATE_IDLE)
  2216. goto rescan;
  2217. /* Otherwise we have to wait until the QH is fully unlinked.
  2218. * Our caller will start an unlink if qh->needs_rescan is
  2219. * set. But if an unlink has already started, nothing needs
  2220. * to be done.
  2221. */
  2222. if (state != QH_STATE_LINKED)
  2223. qh->needs_rescan = 0;
  2224. }
  2225. /* restore original state; caller must unlink or relink */
  2226. qh->qh_state = state;
  2227. /* be sure the hardware's done with the qh before refreshing
  2228. * it after fault cleanup, or recovering from silicon wrongly
  2229. * overlaying the dummy qtd (which reduces DMA chatter).
  2230. */
  2231. if (stopped != 0 || hw->hw_qtd_next == FUSBH200_LIST_END(fusbh200)) {
  2232. switch (state) {
  2233. case QH_STATE_IDLE:
  2234. qh_refresh(fusbh200, qh);
  2235. break;
  2236. case QH_STATE_LINKED:
  2237. /* We won't refresh a QH that's linked (after the HC
  2238. * stopped the queue). That avoids a race:
  2239. * - HC reads first part of QH;
  2240. * - CPU updates that first part and the token;
  2241. * - HC reads rest of that QH, including token
  2242. * Result: HC gets an inconsistent image, and then
  2243. * DMAs to/from the wrong memory (corrupting it).
  2244. *
  2245. * That should be rare for interrupt transfers,
  2246. * except maybe high bandwidth ...
  2247. */
  2248. /* Tell the caller to start an unlink */
  2249. qh->needs_rescan = 1;
  2250. break;
  2251. /* otherwise, unlink already started */
  2252. }
  2253. }
  2254. return count;
  2255. }
  2256. /*-------------------------------------------------------------------------*/
  2257. // high bandwidth multiplier, as encoded in highspeed endpoint descriptors
  2258. #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
  2259. // ... and packet size, for any kind of endpoint descriptor
  2260. #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
  2261. /*
  2262. * reverse of qh_urb_transaction: free a list of TDs.
  2263. * used for cleanup after errors, before HC sees an URB's TDs.
  2264. */
  2265. static void qtd_list_free (
  2266. struct fusbh200_hcd *fusbh200,
  2267. struct urb *urb,
  2268. struct list_head *qtd_list
  2269. ) {
  2270. struct list_head *entry, *temp;
  2271. list_for_each_safe (entry, temp, qtd_list) {
  2272. struct fusbh200_qtd *qtd;
  2273. qtd = list_entry (entry, struct fusbh200_qtd, qtd_list);
  2274. list_del (&qtd->qtd_list);
  2275. fusbh200_qtd_free (fusbh200, qtd);
  2276. }
  2277. }
  2278. /*
  2279. * create a list of filled qtds for this URB; won't link into qh.
  2280. */
  2281. static struct list_head *
  2282. qh_urb_transaction (
  2283. struct fusbh200_hcd *fusbh200,
  2284. struct urb *urb,
  2285. struct list_head *head,
  2286. gfp_t flags
  2287. ) {
  2288. struct fusbh200_qtd *qtd, *qtd_prev;
  2289. dma_addr_t buf;
  2290. int len, this_sg_len, maxpacket;
  2291. int is_input;
  2292. u32 token;
  2293. int i;
  2294. struct scatterlist *sg;
  2295. /*
  2296. * URBs map to sequences of QTDs: one logical transaction
  2297. */
  2298. qtd = fusbh200_qtd_alloc (fusbh200, flags);
  2299. if (unlikely (!qtd))
  2300. return NULL;
  2301. list_add_tail (&qtd->qtd_list, head);
  2302. qtd->urb = urb;
  2303. token = QTD_STS_ACTIVE;
  2304. token |= (FUSBH200_TUNE_CERR << 10);
  2305. /* for split transactions, SplitXState initialized to zero */
  2306. len = urb->transfer_buffer_length;
  2307. is_input = usb_pipein (urb->pipe);
  2308. if (usb_pipecontrol (urb->pipe)) {
  2309. /* SETUP pid */
  2310. qtd_fill(fusbh200, qtd, urb->setup_dma,
  2311. sizeof (struct usb_ctrlrequest),
  2312. token | (2 /* "setup" */ << 8), 8);
  2313. /* ... and always at least one more pid */
  2314. token ^= QTD_TOGGLE;
  2315. qtd_prev = qtd;
  2316. qtd = fusbh200_qtd_alloc (fusbh200, flags);
  2317. if (unlikely (!qtd))
  2318. goto cleanup;
  2319. qtd->urb = urb;
  2320. qtd_prev->hw_next = QTD_NEXT(fusbh200, qtd->qtd_dma);
  2321. list_add_tail (&qtd->qtd_list, head);
  2322. /* for zero length DATA stages, STATUS is always IN */
  2323. if (len == 0)
  2324. token |= (1 /* "in" */ << 8);
  2325. }
  2326. /*
  2327. * data transfer stage: buffer setup
  2328. */
  2329. i = urb->num_mapped_sgs;
  2330. if (len > 0 && i > 0) {
  2331. sg = urb->sg;
  2332. buf = sg_dma_address(sg);
  2333. /* urb->transfer_buffer_length may be smaller than the
  2334. * size of the scatterlist (or vice versa)
  2335. */
  2336. this_sg_len = min_t(int, sg_dma_len(sg), len);
  2337. } else {
  2338. sg = NULL;
  2339. buf = urb->transfer_dma;
  2340. this_sg_len = len;
  2341. }
  2342. if (is_input)
  2343. token |= (1 /* "in" */ << 8);
  2344. /* else it's already initted to "out" pid (0 << 8) */
  2345. maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
  2346. /*
  2347. * buffer gets wrapped in one or more qtds;
  2348. * last one may be "short" (including zero len)
  2349. * and may serve as a control status ack
  2350. */
  2351. for (;;) {
  2352. int this_qtd_len;
  2353. this_qtd_len = qtd_fill(fusbh200, qtd, buf, this_sg_len, token,
  2354. maxpacket);
  2355. this_sg_len -= this_qtd_len;
  2356. len -= this_qtd_len;
  2357. buf += this_qtd_len;
  2358. /*
  2359. * short reads advance to a "magic" dummy instead of the next
  2360. * qtd ... that forces the queue to stop, for manual cleanup.
  2361. * (this will usually be overridden later.)
  2362. */
  2363. if (is_input)
  2364. qtd->hw_alt_next = fusbh200->async->hw->hw_alt_next;
  2365. /* qh makes control packets use qtd toggle; maybe switch it */
  2366. if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
  2367. token ^= QTD_TOGGLE;
  2368. if (likely(this_sg_len <= 0)) {
  2369. if (--i <= 0 || len <= 0)
  2370. break;
  2371. sg = sg_next(sg);
  2372. buf = sg_dma_address(sg);
  2373. this_sg_len = min_t(int, sg_dma_len(sg), len);
  2374. }
  2375. qtd_prev = qtd;
  2376. qtd = fusbh200_qtd_alloc (fusbh200, flags);
  2377. if (unlikely (!qtd))
  2378. goto cleanup;
  2379. qtd->urb = urb;
  2380. qtd_prev->hw_next = QTD_NEXT(fusbh200, qtd->qtd_dma);
  2381. list_add_tail (&qtd->qtd_list, head);
  2382. }
  2383. /*
  2384. * unless the caller requires manual cleanup after short reads,
  2385. * have the alt_next mechanism keep the queue running after the
  2386. * last data qtd (the only one, for control and most other cases).
  2387. */
  2388. if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
  2389. || usb_pipecontrol (urb->pipe)))
  2390. qtd->hw_alt_next = FUSBH200_LIST_END(fusbh200);
  2391. /*
  2392. * control requests may need a terminating data "status" ack;
  2393. * other OUT ones may need a terminating short packet
  2394. * (zero length).
  2395. */
  2396. if (likely (urb->transfer_buffer_length != 0)) {
  2397. int one_more = 0;
  2398. if (usb_pipecontrol (urb->pipe)) {
  2399. one_more = 1;
  2400. token ^= 0x0100; /* "in" <--> "out" */
  2401. token |= QTD_TOGGLE; /* force DATA1 */
  2402. } else if (usb_pipeout(urb->pipe)
  2403. && (urb->transfer_flags & URB_ZERO_PACKET)
  2404. && !(urb->transfer_buffer_length % maxpacket)) {
  2405. one_more = 1;
  2406. }
  2407. if (one_more) {
  2408. qtd_prev = qtd;
  2409. qtd = fusbh200_qtd_alloc (fusbh200, flags);
  2410. if (unlikely (!qtd))
  2411. goto cleanup;
  2412. qtd->urb = urb;
  2413. qtd_prev->hw_next = QTD_NEXT(fusbh200, qtd->qtd_dma);
  2414. list_add_tail (&qtd->qtd_list, head);
  2415. /* never any data in such packets */
  2416. qtd_fill(fusbh200, qtd, 0, 0, token, 0);
  2417. }
  2418. }
  2419. /* by default, enable interrupt on urb completion */
  2420. if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
  2421. qtd->hw_token |= cpu_to_hc32(fusbh200, QTD_IOC);
  2422. return head;
  2423. cleanup:
  2424. qtd_list_free (fusbh200, urb, head);
  2425. return NULL;
  2426. }
  2427. /*-------------------------------------------------------------------------*/
  2428. // Would be best to create all qh's from config descriptors,
  2429. // when each interface/altsetting is established. Unlink
  2430. // any previous qh and cancel its urbs first; endpoints are
  2431. // implicitly reset then (data toggle too).
  2432. // That'd mean updating how usbcore talks to HCDs. (2.7?)
  2433. /*
  2434. * Each QH holds a qtd list; a QH is used for everything except iso.
  2435. *
  2436. * For interrupt urbs, the scheduler must set the microframe scheduling
  2437. * mask(s) each time the QH gets scheduled. For highspeed, that's
  2438. * just one microframe in the s-mask. For split interrupt transactions
  2439. * there are additional complications: c-mask, maybe FSTNs.
  2440. */
  2441. static struct fusbh200_qh *
  2442. qh_make (
  2443. struct fusbh200_hcd *fusbh200,
  2444. struct urb *urb,
  2445. gfp_t flags
  2446. ) {
  2447. struct fusbh200_qh *qh = fusbh200_qh_alloc (fusbh200, flags);
  2448. u32 info1 = 0, info2 = 0;
  2449. int is_input, type;
  2450. int maxp = 0;
  2451. struct usb_tt *tt = urb->dev->tt;
  2452. struct fusbh200_qh_hw *hw;
  2453. if (!qh)
  2454. return qh;
  2455. /*
  2456. * init endpoint/device data for this QH
  2457. */
  2458. info1 |= usb_pipeendpoint (urb->pipe) << 8;
  2459. info1 |= usb_pipedevice (urb->pipe) << 0;
  2460. is_input = usb_pipein (urb->pipe);
  2461. type = usb_pipetype (urb->pipe);
  2462. maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
  2463. /* 1024 byte maxpacket is a hardware ceiling. High bandwidth
  2464. * acts like up to 3KB, but is built from smaller packets.
  2465. */
  2466. if (max_packet(maxp) > 1024) {
  2467. fusbh200_dbg(fusbh200, "bogus qh maxpacket %d\n", max_packet(maxp));
  2468. goto done;
  2469. }
  2470. /* Compute interrupt scheduling parameters just once, and save.
  2471. * - allowing for high bandwidth, how many nsec/uframe are used?
  2472. * - split transactions need a second CSPLIT uframe; same question
  2473. * - splits also need a schedule gap (for full/low speed I/O)
  2474. * - qh has a polling interval
  2475. *
  2476. * For control/bulk requests, the HC or TT handles these.
  2477. */
  2478. if (type == PIPE_INTERRUPT) {
  2479. qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
  2480. is_input, 0,
  2481. hb_mult(maxp) * max_packet(maxp)));
  2482. qh->start = NO_FRAME;
  2483. if (urb->dev->speed == USB_SPEED_HIGH) {
  2484. qh->c_usecs = 0;
  2485. qh->gap_uf = 0;
  2486. qh->period = urb->interval >> 3;
  2487. if (qh->period == 0 && urb->interval != 1) {
  2488. /* NOTE interval 2 or 4 uframes could work.
  2489. * But interval 1 scheduling is simpler, and
  2490. * includes high bandwidth.
  2491. */
  2492. urb->interval = 1;
  2493. } else if (qh->period > fusbh200->periodic_size) {
  2494. qh->period = fusbh200->periodic_size;
  2495. urb->interval = qh->period << 3;
  2496. }
  2497. } else {
  2498. int think_time;
  2499. /* gap is f(FS/LS transfer times) */
  2500. qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
  2501. is_input, 0, maxp) / (125 * 1000);
  2502. /* FIXME this just approximates SPLIT/CSPLIT times */
  2503. if (is_input) { // SPLIT, gap, CSPLIT+DATA
  2504. qh->c_usecs = qh->usecs + HS_USECS (0);
  2505. qh->usecs = HS_USECS (1);
  2506. } else { // SPLIT+DATA, gap, CSPLIT
  2507. qh->usecs += HS_USECS (1);
  2508. qh->c_usecs = HS_USECS (0);
  2509. }
  2510. think_time = tt ? tt->think_time : 0;
  2511. qh->tt_usecs = NS_TO_US (think_time +
  2512. usb_calc_bus_time (urb->dev->speed,
  2513. is_input, 0, max_packet (maxp)));
  2514. qh->period = urb->interval;
  2515. if (qh->period > fusbh200->periodic_size) {
  2516. qh->period = fusbh200->periodic_size;
  2517. urb->interval = qh->period;
  2518. }
  2519. }
  2520. }
  2521. /* support for tt scheduling, and access to toggles */
  2522. qh->dev = urb->dev;
  2523. /* using TT? */
  2524. switch (urb->dev->speed) {
  2525. case USB_SPEED_LOW:
  2526. info1 |= QH_LOW_SPEED;
  2527. /* FALL THROUGH */
  2528. case USB_SPEED_FULL:
  2529. /* EPS 0 means "full" */
  2530. if (type != PIPE_INTERRUPT)
  2531. info1 |= (FUSBH200_TUNE_RL_TT << 28);
  2532. if (type == PIPE_CONTROL) {
  2533. info1 |= QH_CONTROL_EP; /* for TT */
  2534. info1 |= QH_TOGGLE_CTL; /* toggle from qtd */
  2535. }
  2536. info1 |= maxp << 16;
  2537. info2 |= (FUSBH200_TUNE_MULT_TT << 30);
  2538. /* Some Freescale processors have an erratum in which the
  2539. * port number in the queue head was 0..N-1 instead of 1..N.
  2540. */
  2541. if (fusbh200_has_fsl_portno_bug(fusbh200))
  2542. info2 |= (urb->dev->ttport-1) << 23;
  2543. else
  2544. info2 |= urb->dev->ttport << 23;
  2545. /* set the address of the TT; for TDI's integrated
  2546. * root hub tt, leave it zeroed.
  2547. */
  2548. if (tt && tt->hub != fusbh200_to_hcd(fusbh200)->self.root_hub)
  2549. info2 |= tt->hub->devnum << 16;
  2550. /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
  2551. break;
  2552. case USB_SPEED_HIGH: /* no TT involved */
  2553. info1 |= QH_HIGH_SPEED;
  2554. if (type == PIPE_CONTROL) {
  2555. info1 |= (FUSBH200_TUNE_RL_HS << 28);
  2556. info1 |= 64 << 16; /* usb2 fixed maxpacket */
  2557. info1 |= QH_TOGGLE_CTL; /* toggle from qtd */
  2558. info2 |= (FUSBH200_TUNE_MULT_HS << 30);
  2559. } else if (type == PIPE_BULK) {
  2560. info1 |= (FUSBH200_TUNE_RL_HS << 28);
  2561. /* The USB spec says that high speed bulk endpoints
  2562. * always use 512 byte maxpacket. But some device
  2563. * vendors decided to ignore that, and MSFT is happy
  2564. * to help them do so. So now people expect to use
  2565. * such nonconformant devices with Linux too; sigh.
  2566. */
  2567. info1 |= max_packet(maxp) << 16;
  2568. info2 |= (FUSBH200_TUNE_MULT_HS << 30);
  2569. } else { /* PIPE_INTERRUPT */
  2570. info1 |= max_packet (maxp) << 16;
  2571. info2 |= hb_mult (maxp) << 30;
  2572. }
  2573. break;
  2574. default:
  2575. fusbh200_dbg(fusbh200, "bogus dev %p speed %d\n", urb->dev,
  2576. urb->dev->speed);
  2577. done:
  2578. qh_destroy(fusbh200, qh);
  2579. return NULL;
  2580. }
  2581. /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
  2582. /* init as live, toggle clear, advance to dummy */
  2583. qh->qh_state = QH_STATE_IDLE;
  2584. hw = qh->hw;
  2585. hw->hw_info1 = cpu_to_hc32(fusbh200, info1);
  2586. hw->hw_info2 = cpu_to_hc32(fusbh200, info2);
  2587. qh->is_out = !is_input;
  2588. usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
  2589. qh_refresh (fusbh200, qh);
  2590. return qh;
  2591. }
  2592. /*-------------------------------------------------------------------------*/
  2593. static void enable_async(struct fusbh200_hcd *fusbh200)
  2594. {
  2595. if (fusbh200->async_count++)
  2596. return;
  2597. /* Stop waiting to turn off the async schedule */
  2598. fusbh200->enabled_hrtimer_events &= ~BIT(FUSBH200_HRTIMER_DISABLE_ASYNC);
  2599. /* Don't start the schedule until ASS is 0 */
  2600. fusbh200_poll_ASS(fusbh200);
  2601. turn_on_io_watchdog(fusbh200);
  2602. }
  2603. static void disable_async(struct fusbh200_hcd *fusbh200)
  2604. {
  2605. if (--fusbh200->async_count)
  2606. return;
  2607. /* The async schedule and async_unlink list are supposed to be empty */
  2608. WARN_ON(fusbh200->async->qh_next.qh || fusbh200->async_unlink);
  2609. /* Don't turn off the schedule until ASS is 1 */
  2610. fusbh200_poll_ASS(fusbh200);
  2611. }
  2612. /* move qh (and its qtds) onto async queue; maybe enable queue. */
  2613. static void qh_link_async (struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  2614. {
  2615. __hc32 dma = QH_NEXT(fusbh200, qh->qh_dma);
  2616. struct fusbh200_qh *head;
  2617. /* Don't link a QH if there's a Clear-TT-Buffer pending */
  2618. if (unlikely(qh->clearing_tt))
  2619. return;
  2620. WARN_ON(qh->qh_state != QH_STATE_IDLE);
  2621. /* clear halt and/or toggle; and maybe recover from silicon quirk */
  2622. qh_refresh(fusbh200, qh);
  2623. /* splice right after start */
  2624. head = fusbh200->async;
  2625. qh->qh_next = head->qh_next;
  2626. qh->hw->hw_next = head->hw->hw_next;
  2627. wmb ();
  2628. head->qh_next.qh = qh;
  2629. head->hw->hw_next = dma;
  2630. qh->xacterrs = 0;
  2631. qh->qh_state = QH_STATE_LINKED;
  2632. /* qtd completions reported later by interrupt */
  2633. enable_async(fusbh200);
  2634. }
  2635. /*-------------------------------------------------------------------------*/
  2636. /*
  2637. * For control/bulk/interrupt, return QH with these TDs appended.
  2638. * Allocates and initializes the QH if necessary.
  2639. * Returns null if it can't allocate a QH it needs to.
  2640. * If the QH has TDs (urbs) already, that's great.
  2641. */
  2642. static struct fusbh200_qh *qh_append_tds (
  2643. struct fusbh200_hcd *fusbh200,
  2644. struct urb *urb,
  2645. struct list_head *qtd_list,
  2646. int epnum,
  2647. void **ptr
  2648. )
  2649. {
  2650. struct fusbh200_qh *qh = NULL;
  2651. __hc32 qh_addr_mask = cpu_to_hc32(fusbh200, 0x7f);
  2652. qh = (struct fusbh200_qh *) *ptr;
  2653. if (unlikely (qh == NULL)) {
  2654. /* can't sleep here, we have fusbh200->lock... */
  2655. qh = qh_make (fusbh200, urb, GFP_ATOMIC);
  2656. *ptr = qh;
  2657. }
  2658. if (likely (qh != NULL)) {
  2659. struct fusbh200_qtd *qtd;
  2660. if (unlikely (list_empty (qtd_list)))
  2661. qtd = NULL;
  2662. else
  2663. qtd = list_entry (qtd_list->next, struct fusbh200_qtd,
  2664. qtd_list);
  2665. /* control qh may need patching ... */
  2666. if (unlikely (epnum == 0)) {
  2667. /* usb_reset_device() briefly reverts to address 0 */
  2668. if (usb_pipedevice (urb->pipe) == 0)
  2669. qh->hw->hw_info1 &= ~qh_addr_mask;
  2670. }
  2671. /* just one way to queue requests: swap with the dummy qtd.
  2672. * only hc or qh_refresh() ever modify the overlay.
  2673. */
  2674. if (likely (qtd != NULL)) {
  2675. struct fusbh200_qtd *dummy;
  2676. dma_addr_t dma;
  2677. __hc32 token;
  2678. /* to avoid racing the HC, use the dummy td instead of
  2679. * the first td of our list (becomes new dummy). both
  2680. * tds stay deactivated until we're done, when the
  2681. * HC is allowed to fetch the old dummy (4.10.2).
  2682. */
  2683. token = qtd->hw_token;
  2684. qtd->hw_token = HALT_BIT(fusbh200);
  2685. dummy = qh->dummy;
  2686. dma = dummy->qtd_dma;
  2687. *dummy = *qtd;
  2688. dummy->qtd_dma = dma;
  2689. list_del (&qtd->qtd_list);
  2690. list_add (&dummy->qtd_list, qtd_list);
  2691. list_splice_tail(qtd_list, &qh->qtd_list);
  2692. fusbh200_qtd_init(fusbh200, qtd, qtd->qtd_dma);
  2693. qh->dummy = qtd;
  2694. /* hc must see the new dummy at list end */
  2695. dma = qtd->qtd_dma;
  2696. qtd = list_entry (qh->qtd_list.prev,
  2697. struct fusbh200_qtd, qtd_list);
  2698. qtd->hw_next = QTD_NEXT(fusbh200, dma);
  2699. /* let the hc process these next qtds */
  2700. wmb ();
  2701. dummy->hw_token = token;
  2702. urb->hcpriv = qh;
  2703. }
  2704. }
  2705. return qh;
  2706. }
  2707. /*-------------------------------------------------------------------------*/
  2708. static int
  2709. submit_async (
  2710. struct fusbh200_hcd *fusbh200,
  2711. struct urb *urb,
  2712. struct list_head *qtd_list,
  2713. gfp_t mem_flags
  2714. ) {
  2715. int epnum;
  2716. unsigned long flags;
  2717. struct fusbh200_qh *qh = NULL;
  2718. int rc;
  2719. epnum = urb->ep->desc.bEndpointAddress;
  2720. #ifdef FUSBH200_URB_TRACE
  2721. {
  2722. struct fusbh200_qtd *qtd;
  2723. qtd = list_entry(qtd_list->next, struct fusbh200_qtd, qtd_list);
  2724. fusbh200_dbg(fusbh200,
  2725. "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
  2726. __func__, urb->dev->devpath, urb,
  2727. epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
  2728. urb->transfer_buffer_length,
  2729. qtd, urb->ep->hcpriv);
  2730. }
  2731. #endif
  2732. spin_lock_irqsave (&fusbh200->lock, flags);
  2733. if (unlikely(!HCD_HW_ACCESSIBLE(fusbh200_to_hcd(fusbh200)))) {
  2734. rc = -ESHUTDOWN;
  2735. goto done;
  2736. }
  2737. rc = usb_hcd_link_urb_to_ep(fusbh200_to_hcd(fusbh200), urb);
  2738. if (unlikely(rc))
  2739. goto done;
  2740. qh = qh_append_tds(fusbh200, urb, qtd_list, epnum, &urb->ep->hcpriv);
  2741. if (unlikely(qh == NULL)) {
  2742. usb_hcd_unlink_urb_from_ep(fusbh200_to_hcd(fusbh200), urb);
  2743. rc = -ENOMEM;
  2744. goto done;
  2745. }
  2746. /* Control/bulk operations through TTs don't need scheduling,
  2747. * the HC and TT handle it when the TT has a buffer ready.
  2748. */
  2749. if (likely (qh->qh_state == QH_STATE_IDLE))
  2750. qh_link_async(fusbh200, qh);
  2751. done:
  2752. spin_unlock_irqrestore (&fusbh200->lock, flags);
  2753. if (unlikely (qh == NULL))
  2754. qtd_list_free (fusbh200, urb, qtd_list);
  2755. return rc;
  2756. }
  2757. /*-------------------------------------------------------------------------*/
  2758. static void single_unlink_async(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  2759. {
  2760. struct fusbh200_qh *prev;
  2761. /* Add to the end of the list of QHs waiting for the next IAAD */
  2762. qh->qh_state = QH_STATE_UNLINK;
  2763. if (fusbh200->async_unlink)
  2764. fusbh200->async_unlink_last->unlink_next = qh;
  2765. else
  2766. fusbh200->async_unlink = qh;
  2767. fusbh200->async_unlink_last = qh;
  2768. /* Unlink it from the schedule */
  2769. prev = fusbh200->async;
  2770. while (prev->qh_next.qh != qh)
  2771. prev = prev->qh_next.qh;
  2772. prev->hw->hw_next = qh->hw->hw_next;
  2773. prev->qh_next = qh->qh_next;
  2774. if (fusbh200->qh_scan_next == qh)
  2775. fusbh200->qh_scan_next = qh->qh_next.qh;
  2776. }
  2777. static void start_iaa_cycle(struct fusbh200_hcd *fusbh200, bool nested)
  2778. {
  2779. /*
  2780. * Do nothing if an IAA cycle is already running or
  2781. * if one will be started shortly.
  2782. */
  2783. if (fusbh200->async_iaa || fusbh200->async_unlinking)
  2784. return;
  2785. /* Do all the waiting QHs at once */
  2786. fusbh200->async_iaa = fusbh200->async_unlink;
  2787. fusbh200->async_unlink = NULL;
  2788. /* If the controller isn't running, we don't have to wait for it */
  2789. if (unlikely(fusbh200->rh_state < FUSBH200_RH_RUNNING)) {
  2790. if (!nested) /* Avoid recursion */
  2791. end_unlink_async(fusbh200);
  2792. /* Otherwise start a new IAA cycle */
  2793. } else if (likely(fusbh200->rh_state == FUSBH200_RH_RUNNING)) {
  2794. /* Make sure the unlinks are all visible to the hardware */
  2795. wmb();
  2796. fusbh200_writel(fusbh200, fusbh200->command | CMD_IAAD,
  2797. &fusbh200->regs->command);
  2798. fusbh200_readl(fusbh200, &fusbh200->regs->command);
  2799. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_IAA_WATCHDOG, true);
  2800. }
  2801. }
  2802. /* the async qh for the qtds being unlinked are now gone from the HC */
  2803. static void end_unlink_async(struct fusbh200_hcd *fusbh200)
  2804. {
  2805. struct fusbh200_qh *qh;
  2806. /* Process the idle QHs */
  2807. restart:
  2808. fusbh200->async_unlinking = true;
  2809. while (fusbh200->async_iaa) {
  2810. qh = fusbh200->async_iaa;
  2811. fusbh200->async_iaa = qh->unlink_next;
  2812. qh->unlink_next = NULL;
  2813. qh->qh_state = QH_STATE_IDLE;
  2814. qh->qh_next.qh = NULL;
  2815. qh_completions(fusbh200, qh);
  2816. if (!list_empty(&qh->qtd_list) &&
  2817. fusbh200->rh_state == FUSBH200_RH_RUNNING)
  2818. qh_link_async(fusbh200, qh);
  2819. disable_async(fusbh200);
  2820. }
  2821. fusbh200->async_unlinking = false;
  2822. /* Start a new IAA cycle if any QHs are waiting for it */
  2823. if (fusbh200->async_unlink) {
  2824. start_iaa_cycle(fusbh200, true);
  2825. if (unlikely(fusbh200->rh_state < FUSBH200_RH_RUNNING))
  2826. goto restart;
  2827. }
  2828. }
  2829. static void unlink_empty_async(struct fusbh200_hcd *fusbh200)
  2830. {
  2831. struct fusbh200_qh *qh, *next;
  2832. bool stopped = (fusbh200->rh_state < FUSBH200_RH_RUNNING);
  2833. bool check_unlinks_later = false;
  2834. /* Unlink all the async QHs that have been empty for a timer cycle */
  2835. next = fusbh200->async->qh_next.qh;
  2836. while (next) {
  2837. qh = next;
  2838. next = qh->qh_next.qh;
  2839. if (list_empty(&qh->qtd_list) &&
  2840. qh->qh_state == QH_STATE_LINKED) {
  2841. if (!stopped && qh->unlink_cycle ==
  2842. fusbh200->async_unlink_cycle)
  2843. check_unlinks_later = true;
  2844. else
  2845. single_unlink_async(fusbh200, qh);
  2846. }
  2847. }
  2848. /* Start a new IAA cycle if any QHs are waiting for it */
  2849. if (fusbh200->async_unlink)
  2850. start_iaa_cycle(fusbh200, false);
  2851. /* QHs that haven't been empty for long enough will be handled later */
  2852. if (check_unlinks_later) {
  2853. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_ASYNC_UNLINKS, true);
  2854. ++fusbh200->async_unlink_cycle;
  2855. }
  2856. }
  2857. /* makes sure the async qh will become idle */
  2858. /* caller must own fusbh200->lock */
  2859. static void start_unlink_async(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  2860. {
  2861. /*
  2862. * If the QH isn't linked then there's nothing we can do
  2863. * unless we were called during a giveback, in which case
  2864. * qh_completions() has to deal with it.
  2865. */
  2866. if (qh->qh_state != QH_STATE_LINKED) {
  2867. if (qh->qh_state == QH_STATE_COMPLETING)
  2868. qh->needs_rescan = 1;
  2869. return;
  2870. }
  2871. single_unlink_async(fusbh200, qh);
  2872. start_iaa_cycle(fusbh200, false);
  2873. }
  2874. /*-------------------------------------------------------------------------*/
  2875. static void scan_async (struct fusbh200_hcd *fusbh200)
  2876. {
  2877. struct fusbh200_qh *qh;
  2878. bool check_unlinks_later = false;
  2879. fusbh200->qh_scan_next = fusbh200->async->qh_next.qh;
  2880. while (fusbh200->qh_scan_next) {
  2881. qh = fusbh200->qh_scan_next;
  2882. fusbh200->qh_scan_next = qh->qh_next.qh;
  2883. rescan:
  2884. /* clean any finished work for this qh */
  2885. if (!list_empty(&qh->qtd_list)) {
  2886. int temp;
  2887. /*
  2888. * Unlinks could happen here; completion reporting
  2889. * drops the lock. That's why fusbh200->qh_scan_next
  2890. * always holds the next qh to scan; if the next qh
  2891. * gets unlinked then fusbh200->qh_scan_next is adjusted
  2892. * in single_unlink_async().
  2893. */
  2894. temp = qh_completions(fusbh200, qh);
  2895. if (qh->needs_rescan) {
  2896. start_unlink_async(fusbh200, qh);
  2897. } else if (list_empty(&qh->qtd_list)
  2898. && qh->qh_state == QH_STATE_LINKED) {
  2899. qh->unlink_cycle = fusbh200->async_unlink_cycle;
  2900. check_unlinks_later = true;
  2901. } else if (temp != 0)
  2902. goto rescan;
  2903. }
  2904. }
  2905. /*
  2906. * Unlink empty entries, reducing DMA usage as well
  2907. * as HCD schedule-scanning costs. Delay for any qh
  2908. * we just scanned, there's a not-unusual case that it
  2909. * doesn't stay idle for long.
  2910. */
  2911. if (check_unlinks_later && fusbh200->rh_state == FUSBH200_RH_RUNNING &&
  2912. !(fusbh200->enabled_hrtimer_events &
  2913. BIT(FUSBH200_HRTIMER_ASYNC_UNLINKS))) {
  2914. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_ASYNC_UNLINKS, true);
  2915. ++fusbh200->async_unlink_cycle;
  2916. }
  2917. }
  2918. /*-------------------------------------------------------------------------*/
  2919. /*
  2920. * EHCI scheduled transaction support: interrupt, iso, split iso
  2921. * These are called "periodic" transactions in the EHCI spec.
  2922. *
  2923. * Note that for interrupt transfers, the QH/QTD manipulation is shared
  2924. * with the "asynchronous" transaction support (control/bulk transfers).
  2925. * The only real difference is in how interrupt transfers are scheduled.
  2926. *
  2927. * For ISO, we make an "iso_stream" head to serve the same role as a QH.
  2928. * It keeps track of every ITD (or SITD) that's linked, and holds enough
  2929. * pre-calculated schedule data to make appending to the queue be quick.
  2930. */
  2931. static int fusbh200_get_frame (struct usb_hcd *hcd);
  2932. /*-------------------------------------------------------------------------*/
  2933. /*
  2934. * periodic_next_shadow - return "next" pointer on shadow list
  2935. * @periodic: host pointer to qh/itd
  2936. * @tag: hardware tag for type of this record
  2937. */
  2938. static union fusbh200_shadow *
  2939. periodic_next_shadow(struct fusbh200_hcd *fusbh200, union fusbh200_shadow *periodic,
  2940. __hc32 tag)
  2941. {
  2942. switch (hc32_to_cpu(fusbh200, tag)) {
  2943. case Q_TYPE_QH:
  2944. return &periodic->qh->qh_next;
  2945. case Q_TYPE_FSTN:
  2946. return &periodic->fstn->fstn_next;
  2947. default:
  2948. return &periodic->itd->itd_next;
  2949. }
  2950. }
  2951. static __hc32 *
  2952. shadow_next_periodic(struct fusbh200_hcd *fusbh200, union fusbh200_shadow *periodic,
  2953. __hc32 tag)
  2954. {
  2955. switch (hc32_to_cpu(fusbh200, tag)) {
  2956. /* our fusbh200_shadow.qh is actually software part */
  2957. case Q_TYPE_QH:
  2958. return &periodic->qh->hw->hw_next;
  2959. /* others are hw parts */
  2960. default:
  2961. return periodic->hw_next;
  2962. }
  2963. }
  2964. /* caller must hold fusbh200->lock */
  2965. static void periodic_unlink (struct fusbh200_hcd *fusbh200, unsigned frame, void *ptr)
  2966. {
  2967. union fusbh200_shadow *prev_p = &fusbh200->pshadow[frame];
  2968. __hc32 *hw_p = &fusbh200->periodic[frame];
  2969. union fusbh200_shadow here = *prev_p;
  2970. /* find predecessor of "ptr"; hw and shadow lists are in sync */
  2971. while (here.ptr && here.ptr != ptr) {
  2972. prev_p = periodic_next_shadow(fusbh200, prev_p,
  2973. Q_NEXT_TYPE(fusbh200, *hw_p));
  2974. hw_p = shadow_next_periodic(fusbh200, &here,
  2975. Q_NEXT_TYPE(fusbh200, *hw_p));
  2976. here = *prev_p;
  2977. }
  2978. /* an interrupt entry (at list end) could have been shared */
  2979. if (!here.ptr)
  2980. return;
  2981. /* update shadow and hardware lists ... the old "next" pointers
  2982. * from ptr may still be in use, the caller updates them.
  2983. */
  2984. *prev_p = *periodic_next_shadow(fusbh200, &here,
  2985. Q_NEXT_TYPE(fusbh200, *hw_p));
  2986. *hw_p = *shadow_next_periodic(fusbh200, &here,
  2987. Q_NEXT_TYPE(fusbh200, *hw_p));
  2988. }
  2989. /* how many of the uframe's 125 usecs are allocated? */
  2990. static unsigned short
  2991. periodic_usecs (struct fusbh200_hcd *fusbh200, unsigned frame, unsigned uframe)
  2992. {
  2993. __hc32 *hw_p = &fusbh200->periodic [frame];
  2994. union fusbh200_shadow *q = &fusbh200->pshadow [frame];
  2995. unsigned usecs = 0;
  2996. struct fusbh200_qh_hw *hw;
  2997. while (q->ptr) {
  2998. switch (hc32_to_cpu(fusbh200, Q_NEXT_TYPE(fusbh200, *hw_p))) {
  2999. case Q_TYPE_QH:
  3000. hw = q->qh->hw;
  3001. /* is it in the S-mask? */
  3002. if (hw->hw_info2 & cpu_to_hc32(fusbh200, 1 << uframe))
  3003. usecs += q->qh->usecs;
  3004. /* ... or C-mask? */
  3005. if (hw->hw_info2 & cpu_to_hc32(fusbh200,
  3006. 1 << (8 + uframe)))
  3007. usecs += q->qh->c_usecs;
  3008. hw_p = &hw->hw_next;
  3009. q = &q->qh->qh_next;
  3010. break;
  3011. // case Q_TYPE_FSTN:
  3012. default:
  3013. /* for "save place" FSTNs, count the relevant INTR
  3014. * bandwidth from the previous frame
  3015. */
  3016. if (q->fstn->hw_prev != FUSBH200_LIST_END(fusbh200)) {
  3017. fusbh200_dbg (fusbh200, "ignoring FSTN cost ...\n");
  3018. }
  3019. hw_p = &q->fstn->hw_next;
  3020. q = &q->fstn->fstn_next;
  3021. break;
  3022. case Q_TYPE_ITD:
  3023. if (q->itd->hw_transaction[uframe])
  3024. usecs += q->itd->stream->usecs;
  3025. hw_p = &q->itd->hw_next;
  3026. q = &q->itd->itd_next;
  3027. break;
  3028. }
  3029. }
  3030. #ifdef DEBUG
  3031. if (usecs > fusbh200->uframe_periodic_max)
  3032. fusbh200_err (fusbh200, "uframe %d sched overrun: %d usecs\n",
  3033. frame * 8 + uframe, usecs);
  3034. #endif
  3035. return usecs;
  3036. }
  3037. /*-------------------------------------------------------------------------*/
  3038. static int same_tt (struct usb_device *dev1, struct usb_device *dev2)
  3039. {
  3040. if (!dev1->tt || !dev2->tt)
  3041. return 0;
  3042. if (dev1->tt != dev2->tt)
  3043. return 0;
  3044. if (dev1->tt->multi)
  3045. return dev1->ttport == dev2->ttport;
  3046. else
  3047. return 1;
  3048. }
  3049. /* return true iff the device's transaction translator is available
  3050. * for a periodic transfer starting at the specified frame, using
  3051. * all the uframes in the mask.
  3052. */
  3053. static int tt_no_collision (
  3054. struct fusbh200_hcd *fusbh200,
  3055. unsigned period,
  3056. struct usb_device *dev,
  3057. unsigned frame,
  3058. u32 uf_mask
  3059. )
  3060. {
  3061. if (period == 0) /* error */
  3062. return 0;
  3063. /* note bandwidth wastage: split never follows csplit
  3064. * (different dev or endpoint) until the next uframe.
  3065. * calling convention doesn't make that distinction.
  3066. */
  3067. for (; frame < fusbh200->periodic_size; frame += period) {
  3068. union fusbh200_shadow here;
  3069. __hc32 type;
  3070. struct fusbh200_qh_hw *hw;
  3071. here = fusbh200->pshadow [frame];
  3072. type = Q_NEXT_TYPE(fusbh200, fusbh200->periodic [frame]);
  3073. while (here.ptr) {
  3074. switch (hc32_to_cpu(fusbh200, type)) {
  3075. case Q_TYPE_ITD:
  3076. type = Q_NEXT_TYPE(fusbh200, here.itd->hw_next);
  3077. here = here.itd->itd_next;
  3078. continue;
  3079. case Q_TYPE_QH:
  3080. hw = here.qh->hw;
  3081. if (same_tt (dev, here.qh->dev)) {
  3082. u32 mask;
  3083. mask = hc32_to_cpu(fusbh200,
  3084. hw->hw_info2);
  3085. /* "knows" no gap is needed */
  3086. mask |= mask >> 8;
  3087. if (mask & uf_mask)
  3088. break;
  3089. }
  3090. type = Q_NEXT_TYPE(fusbh200, hw->hw_next);
  3091. here = here.qh->qh_next;
  3092. continue;
  3093. // case Q_TYPE_FSTN:
  3094. default:
  3095. fusbh200_dbg (fusbh200,
  3096. "periodic frame %d bogus type %d\n",
  3097. frame, type);
  3098. }
  3099. /* collision or error */
  3100. return 0;
  3101. }
  3102. }
  3103. /* no collision */
  3104. return 1;
  3105. }
  3106. /*-------------------------------------------------------------------------*/
  3107. static void enable_periodic(struct fusbh200_hcd *fusbh200)
  3108. {
  3109. if (fusbh200->periodic_count++)
  3110. return;
  3111. /* Stop waiting to turn off the periodic schedule */
  3112. fusbh200->enabled_hrtimer_events &= ~BIT(FUSBH200_HRTIMER_DISABLE_PERIODIC);
  3113. /* Don't start the schedule until PSS is 0 */
  3114. fusbh200_poll_PSS(fusbh200);
  3115. turn_on_io_watchdog(fusbh200);
  3116. }
  3117. static void disable_periodic(struct fusbh200_hcd *fusbh200)
  3118. {
  3119. if (--fusbh200->periodic_count)
  3120. return;
  3121. /* Don't turn off the schedule until PSS is 1 */
  3122. fusbh200_poll_PSS(fusbh200);
  3123. }
  3124. /*-------------------------------------------------------------------------*/
  3125. /* periodic schedule slots have iso tds (normal or split) first, then a
  3126. * sparse tree for active interrupt transfers.
  3127. *
  3128. * this just links in a qh; caller guarantees uframe masks are set right.
  3129. * no FSTN support (yet; fusbh200 0.96+)
  3130. */
  3131. static void qh_link_periodic(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  3132. {
  3133. unsigned i;
  3134. unsigned period = qh->period;
  3135. dev_dbg (&qh->dev->dev,
  3136. "link qh%d-%04x/%p start %d [%d/%d us]\n",
  3137. period, hc32_to_cpup(fusbh200, &qh->hw->hw_info2)
  3138. & (QH_CMASK | QH_SMASK),
  3139. qh, qh->start, qh->usecs, qh->c_usecs);
  3140. /* high bandwidth, or otherwise every microframe */
  3141. if (period == 0)
  3142. period = 1;
  3143. for (i = qh->start; i < fusbh200->periodic_size; i += period) {
  3144. union fusbh200_shadow *prev = &fusbh200->pshadow[i];
  3145. __hc32 *hw_p = &fusbh200->periodic[i];
  3146. union fusbh200_shadow here = *prev;
  3147. __hc32 type = 0;
  3148. /* skip the iso nodes at list head */
  3149. while (here.ptr) {
  3150. type = Q_NEXT_TYPE(fusbh200, *hw_p);
  3151. if (type == cpu_to_hc32(fusbh200, Q_TYPE_QH))
  3152. break;
  3153. prev = periodic_next_shadow(fusbh200, prev, type);
  3154. hw_p = shadow_next_periodic(fusbh200, &here, type);
  3155. here = *prev;
  3156. }
  3157. /* sorting each branch by period (slow-->fast)
  3158. * enables sharing interior tree nodes
  3159. */
  3160. while (here.ptr && qh != here.qh) {
  3161. if (qh->period > here.qh->period)
  3162. break;
  3163. prev = &here.qh->qh_next;
  3164. hw_p = &here.qh->hw->hw_next;
  3165. here = *prev;
  3166. }
  3167. /* link in this qh, unless some earlier pass did that */
  3168. if (qh != here.qh) {
  3169. qh->qh_next = here;
  3170. if (here.qh)
  3171. qh->hw->hw_next = *hw_p;
  3172. wmb ();
  3173. prev->qh = qh;
  3174. *hw_p = QH_NEXT (fusbh200, qh->qh_dma);
  3175. }
  3176. }
  3177. qh->qh_state = QH_STATE_LINKED;
  3178. qh->xacterrs = 0;
  3179. /* update per-qh bandwidth for usbfs */
  3180. fusbh200_to_hcd(fusbh200)->self.bandwidth_allocated += qh->period
  3181. ? ((qh->usecs + qh->c_usecs) / qh->period)
  3182. : (qh->usecs * 8);
  3183. list_add(&qh->intr_node, &fusbh200->intr_qh_list);
  3184. /* maybe enable periodic schedule processing */
  3185. ++fusbh200->intr_count;
  3186. enable_periodic(fusbh200);
  3187. }
  3188. static void qh_unlink_periodic(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  3189. {
  3190. unsigned i;
  3191. unsigned period;
  3192. /*
  3193. * If qh is for a low/full-speed device, simply unlinking it
  3194. * could interfere with an ongoing split transaction. To unlink
  3195. * it safely would require setting the QH_INACTIVATE bit and
  3196. * waiting at least one frame, as described in EHCI 4.12.2.5.
  3197. *
  3198. * We won't bother with any of this. Instead, we assume that the
  3199. * only reason for unlinking an interrupt QH while the current URB
  3200. * is still active is to dequeue all the URBs (flush the whole
  3201. * endpoint queue).
  3202. *
  3203. * If rebalancing the periodic schedule is ever implemented, this
  3204. * approach will no longer be valid.
  3205. */
  3206. /* high bandwidth, or otherwise part of every microframe */
  3207. if ((period = qh->period) == 0)
  3208. period = 1;
  3209. for (i = qh->start; i < fusbh200->periodic_size; i += period)
  3210. periodic_unlink (fusbh200, i, qh);
  3211. /* update per-qh bandwidth for usbfs */
  3212. fusbh200_to_hcd(fusbh200)->self.bandwidth_allocated -= qh->period
  3213. ? ((qh->usecs + qh->c_usecs) / qh->period)
  3214. : (qh->usecs * 8);
  3215. dev_dbg (&qh->dev->dev,
  3216. "unlink qh%d-%04x/%p start %d [%d/%d us]\n",
  3217. qh->period,
  3218. hc32_to_cpup(fusbh200, &qh->hw->hw_info2) & (QH_CMASK | QH_SMASK),
  3219. qh, qh->start, qh->usecs, qh->c_usecs);
  3220. /* qh->qh_next still "live" to HC */
  3221. qh->qh_state = QH_STATE_UNLINK;
  3222. qh->qh_next.ptr = NULL;
  3223. if (fusbh200->qh_scan_next == qh)
  3224. fusbh200->qh_scan_next = list_entry(qh->intr_node.next,
  3225. struct fusbh200_qh, intr_node);
  3226. list_del(&qh->intr_node);
  3227. }
  3228. static void start_unlink_intr(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  3229. {
  3230. /* If the QH isn't linked then there's nothing we can do
  3231. * unless we were called during a giveback, in which case
  3232. * qh_completions() has to deal with it.
  3233. */
  3234. if (qh->qh_state != QH_STATE_LINKED) {
  3235. if (qh->qh_state == QH_STATE_COMPLETING)
  3236. qh->needs_rescan = 1;
  3237. return;
  3238. }
  3239. qh_unlink_periodic (fusbh200, qh);
  3240. /* Make sure the unlinks are visible before starting the timer */
  3241. wmb();
  3242. /*
  3243. * The EHCI spec doesn't say how long it takes the controller to
  3244. * stop accessing an unlinked interrupt QH. The timer delay is
  3245. * 9 uframes; presumably that will be long enough.
  3246. */
  3247. qh->unlink_cycle = fusbh200->intr_unlink_cycle;
  3248. /* New entries go at the end of the intr_unlink list */
  3249. if (fusbh200->intr_unlink)
  3250. fusbh200->intr_unlink_last->unlink_next = qh;
  3251. else
  3252. fusbh200->intr_unlink = qh;
  3253. fusbh200->intr_unlink_last = qh;
  3254. if (fusbh200->intr_unlinking)
  3255. ; /* Avoid recursive calls */
  3256. else if (fusbh200->rh_state < FUSBH200_RH_RUNNING)
  3257. fusbh200_handle_intr_unlinks(fusbh200);
  3258. else if (fusbh200->intr_unlink == qh) {
  3259. fusbh200_enable_event(fusbh200, FUSBH200_HRTIMER_UNLINK_INTR, true);
  3260. ++fusbh200->intr_unlink_cycle;
  3261. }
  3262. }
  3263. static void end_unlink_intr(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  3264. {
  3265. struct fusbh200_qh_hw *hw = qh->hw;
  3266. int rc;
  3267. qh->qh_state = QH_STATE_IDLE;
  3268. hw->hw_next = FUSBH200_LIST_END(fusbh200);
  3269. qh_completions(fusbh200, qh);
  3270. /* reschedule QH iff another request is queued */
  3271. if (!list_empty(&qh->qtd_list) && fusbh200->rh_state == FUSBH200_RH_RUNNING) {
  3272. rc = qh_schedule(fusbh200, qh);
  3273. /* An error here likely indicates handshake failure
  3274. * or no space left in the schedule. Neither fault
  3275. * should happen often ...
  3276. *
  3277. * FIXME kill the now-dysfunctional queued urbs
  3278. */
  3279. if (rc != 0)
  3280. fusbh200_err(fusbh200, "can't reschedule qh %p, err %d\n",
  3281. qh, rc);
  3282. }
  3283. /* maybe turn off periodic schedule */
  3284. --fusbh200->intr_count;
  3285. disable_periodic(fusbh200);
  3286. }
  3287. /*-------------------------------------------------------------------------*/
  3288. static int check_period (
  3289. struct fusbh200_hcd *fusbh200,
  3290. unsigned frame,
  3291. unsigned uframe,
  3292. unsigned period,
  3293. unsigned usecs
  3294. ) {
  3295. int claimed;
  3296. /* complete split running into next frame?
  3297. * given FSTN support, we could sometimes check...
  3298. */
  3299. if (uframe >= 8)
  3300. return 0;
  3301. /* convert "usecs we need" to "max already claimed" */
  3302. usecs = fusbh200->uframe_periodic_max - usecs;
  3303. /* we "know" 2 and 4 uframe intervals were rejected; so
  3304. * for period 0, check _every_ microframe in the schedule.
  3305. */
  3306. if (unlikely (period == 0)) {
  3307. do {
  3308. for (uframe = 0; uframe < 7; uframe++) {
  3309. claimed = periodic_usecs (fusbh200, frame, uframe);
  3310. if (claimed > usecs)
  3311. return 0;
  3312. }
  3313. } while ((frame += 1) < fusbh200->periodic_size);
  3314. /* just check the specified uframe, at that period */
  3315. } else {
  3316. do {
  3317. claimed = periodic_usecs (fusbh200, frame, uframe);
  3318. if (claimed > usecs)
  3319. return 0;
  3320. } while ((frame += period) < fusbh200->periodic_size);
  3321. }
  3322. // success!
  3323. return 1;
  3324. }
  3325. static int check_intr_schedule (
  3326. struct fusbh200_hcd *fusbh200,
  3327. unsigned frame,
  3328. unsigned uframe,
  3329. const struct fusbh200_qh *qh,
  3330. __hc32 *c_maskp
  3331. )
  3332. {
  3333. int retval = -ENOSPC;
  3334. u8 mask = 0;
  3335. if (qh->c_usecs && uframe >= 6) /* FSTN territory? */
  3336. goto done;
  3337. if (!check_period (fusbh200, frame, uframe, qh->period, qh->usecs))
  3338. goto done;
  3339. if (!qh->c_usecs) {
  3340. retval = 0;
  3341. *c_maskp = 0;
  3342. goto done;
  3343. }
  3344. /* Make sure this tt's buffer is also available for CSPLITs.
  3345. * We pessimize a bit; probably the typical full speed case
  3346. * doesn't need the second CSPLIT.
  3347. *
  3348. * NOTE: both SPLIT and CSPLIT could be checked in just
  3349. * one smart pass...
  3350. */
  3351. mask = 0x03 << (uframe + qh->gap_uf);
  3352. *c_maskp = cpu_to_hc32(fusbh200, mask << 8);
  3353. mask |= 1 << uframe;
  3354. if (tt_no_collision (fusbh200, qh->period, qh->dev, frame, mask)) {
  3355. if (!check_period (fusbh200, frame, uframe + qh->gap_uf + 1,
  3356. qh->period, qh->c_usecs))
  3357. goto done;
  3358. if (!check_period (fusbh200, frame, uframe + qh->gap_uf,
  3359. qh->period, qh->c_usecs))
  3360. goto done;
  3361. retval = 0;
  3362. }
  3363. done:
  3364. return retval;
  3365. }
  3366. /* "first fit" scheduling policy used the first time through,
  3367. * or when the previous schedule slot can't be re-used.
  3368. */
  3369. static int qh_schedule(struct fusbh200_hcd *fusbh200, struct fusbh200_qh *qh)
  3370. {
  3371. int status;
  3372. unsigned uframe;
  3373. __hc32 c_mask;
  3374. unsigned frame; /* 0..(qh->period - 1), or NO_FRAME */
  3375. struct fusbh200_qh_hw *hw = qh->hw;
  3376. qh_refresh(fusbh200, qh);
  3377. hw->hw_next = FUSBH200_LIST_END(fusbh200);
  3378. frame = qh->start;
  3379. /* reuse the previous schedule slots, if we can */
  3380. if (frame < qh->period) {
  3381. uframe = ffs(hc32_to_cpup(fusbh200, &hw->hw_info2) & QH_SMASK);
  3382. status = check_intr_schedule (fusbh200, frame, --uframe,
  3383. qh, &c_mask);
  3384. } else {
  3385. uframe = 0;
  3386. c_mask = 0;
  3387. status = -ENOSPC;
  3388. }
  3389. /* else scan the schedule to find a group of slots such that all
  3390. * uframes have enough periodic bandwidth available.
  3391. */
  3392. if (status) {
  3393. /* "normal" case, uframing flexible except with splits */
  3394. if (qh->period) {
  3395. int i;
  3396. for (i = qh->period; status && i > 0; --i) {
  3397. frame = ++fusbh200->random_frame % qh->period;
  3398. for (uframe = 0; uframe < 8; uframe++) {
  3399. status = check_intr_schedule (fusbh200,
  3400. frame, uframe, qh,
  3401. &c_mask);
  3402. if (status == 0)
  3403. break;
  3404. }
  3405. }
  3406. /* qh->period == 0 means every uframe */
  3407. } else {
  3408. frame = 0;
  3409. status = check_intr_schedule (fusbh200, 0, 0, qh, &c_mask);
  3410. }
  3411. if (status)
  3412. goto done;
  3413. qh->start = frame;
  3414. /* reset S-frame and (maybe) C-frame masks */
  3415. hw->hw_info2 &= cpu_to_hc32(fusbh200, ~(QH_CMASK | QH_SMASK));
  3416. hw->hw_info2 |= qh->period
  3417. ? cpu_to_hc32(fusbh200, 1 << uframe)
  3418. : cpu_to_hc32(fusbh200, QH_SMASK);
  3419. hw->hw_info2 |= c_mask;
  3420. } else
  3421. fusbh200_dbg (fusbh200, "reused qh %p schedule\n", qh);
  3422. /* stuff into the periodic schedule */
  3423. qh_link_periodic(fusbh200, qh);
  3424. done:
  3425. return status;
  3426. }
  3427. static int intr_submit (
  3428. struct fusbh200_hcd *fusbh200,
  3429. struct urb *urb,
  3430. struct list_head *qtd_list,
  3431. gfp_t mem_flags
  3432. ) {
  3433. unsigned epnum;
  3434. unsigned long flags;
  3435. struct fusbh200_qh *qh;
  3436. int status;
  3437. struct list_head empty;
  3438. /* get endpoint and transfer/schedule data */
  3439. epnum = urb->ep->desc.bEndpointAddress;
  3440. spin_lock_irqsave (&fusbh200->lock, flags);
  3441. if (unlikely(!HCD_HW_ACCESSIBLE(fusbh200_to_hcd(fusbh200)))) {
  3442. status = -ESHUTDOWN;
  3443. goto done_not_linked;
  3444. }
  3445. status = usb_hcd_link_urb_to_ep(fusbh200_to_hcd(fusbh200), urb);
  3446. if (unlikely(status))
  3447. goto done_not_linked;
  3448. /* get qh and force any scheduling errors */
  3449. INIT_LIST_HEAD (&empty);
  3450. qh = qh_append_tds(fusbh200, urb, &empty, epnum, &urb->ep->hcpriv);
  3451. if (qh == NULL) {
  3452. status = -ENOMEM;
  3453. goto done;
  3454. }
  3455. if (qh->qh_state == QH_STATE_IDLE) {
  3456. if ((status = qh_schedule (fusbh200, qh)) != 0)
  3457. goto done;
  3458. }
  3459. /* then queue the urb's tds to the qh */
  3460. qh = qh_append_tds(fusbh200, urb, qtd_list, epnum, &urb->ep->hcpriv);
  3461. BUG_ON (qh == NULL);
  3462. /* ... update usbfs periodic stats */
  3463. fusbh200_to_hcd(fusbh200)->self.bandwidth_int_reqs++;
  3464. done:
  3465. if (unlikely(status))
  3466. usb_hcd_unlink_urb_from_ep(fusbh200_to_hcd(fusbh200), urb);
  3467. done_not_linked:
  3468. spin_unlock_irqrestore (&fusbh200->lock, flags);
  3469. if (status)
  3470. qtd_list_free (fusbh200, urb, qtd_list);
  3471. return status;
  3472. }
  3473. static void scan_intr(struct fusbh200_hcd *fusbh200)
  3474. {
  3475. struct fusbh200_qh *qh;
  3476. list_for_each_entry_safe(qh, fusbh200->qh_scan_next, &fusbh200->intr_qh_list,
  3477. intr_node) {
  3478. rescan:
  3479. /* clean any finished work for this qh */
  3480. if (!list_empty(&qh->qtd_list)) {
  3481. int temp;
  3482. /*
  3483. * Unlinks could happen here; completion reporting
  3484. * drops the lock. That's why fusbh200->qh_scan_next
  3485. * always holds the next qh to scan; if the next qh
  3486. * gets unlinked then fusbh200->qh_scan_next is adjusted
  3487. * in qh_unlink_periodic().
  3488. */
  3489. temp = qh_completions(fusbh200, qh);
  3490. if (unlikely(qh->needs_rescan ||
  3491. (list_empty(&qh->qtd_list) &&
  3492. qh->qh_state == QH_STATE_LINKED)))
  3493. start_unlink_intr(fusbh200, qh);
  3494. else if (temp != 0)
  3495. goto rescan;
  3496. }
  3497. }
  3498. }
  3499. /*-------------------------------------------------------------------------*/
  3500. /* fusbh200_iso_stream ops work with both ITD and SITD */
  3501. static struct fusbh200_iso_stream *
  3502. iso_stream_alloc (gfp_t mem_flags)
  3503. {
  3504. struct fusbh200_iso_stream *stream;
  3505. stream = kzalloc(sizeof *stream, mem_flags);
  3506. if (likely (stream != NULL)) {
  3507. INIT_LIST_HEAD(&stream->td_list);
  3508. INIT_LIST_HEAD(&stream->free_list);
  3509. stream->next_uframe = -1;
  3510. }
  3511. return stream;
  3512. }
  3513. static void
  3514. iso_stream_init (
  3515. struct fusbh200_hcd *fusbh200,
  3516. struct fusbh200_iso_stream *stream,
  3517. struct usb_device *dev,
  3518. int pipe,
  3519. unsigned interval
  3520. )
  3521. {
  3522. u32 buf1;
  3523. unsigned epnum, maxp;
  3524. int is_input;
  3525. long bandwidth;
  3526. unsigned multi;
  3527. /*
  3528. * this might be a "high bandwidth" highspeed endpoint,
  3529. * as encoded in the ep descriptor's wMaxPacket field
  3530. */
  3531. epnum = usb_pipeendpoint (pipe);
  3532. is_input = usb_pipein (pipe) ? USB_DIR_IN : 0;
  3533. maxp = usb_maxpacket(dev, pipe, !is_input);
  3534. if (is_input) {
  3535. buf1 = (1 << 11);
  3536. } else {
  3537. buf1 = 0;
  3538. }
  3539. maxp = max_packet(maxp);
  3540. multi = hb_mult(maxp);
  3541. buf1 |= maxp;
  3542. maxp *= multi;
  3543. stream->buf0 = cpu_to_hc32(fusbh200, (epnum << 8) | dev->devnum);
  3544. stream->buf1 = cpu_to_hc32(fusbh200, buf1);
  3545. stream->buf2 = cpu_to_hc32(fusbh200, multi);
  3546. /* usbfs wants to report the average usecs per frame tied up
  3547. * when transfers on this endpoint are scheduled ...
  3548. */
  3549. if (dev->speed == USB_SPEED_FULL) {
  3550. interval <<= 3;
  3551. stream->usecs = NS_TO_US(usb_calc_bus_time(dev->speed,
  3552. is_input, 1, maxp));
  3553. stream->usecs /= 8;
  3554. } else {
  3555. stream->highspeed = 1;
  3556. stream->usecs = HS_USECS_ISO (maxp);
  3557. }
  3558. bandwidth = stream->usecs * 8;
  3559. bandwidth /= interval;
  3560. stream->bandwidth = bandwidth;
  3561. stream->udev = dev;
  3562. stream->bEndpointAddress = is_input | epnum;
  3563. stream->interval = interval;
  3564. stream->maxp = maxp;
  3565. }
  3566. static struct fusbh200_iso_stream *
  3567. iso_stream_find (struct fusbh200_hcd *fusbh200, struct urb *urb)
  3568. {
  3569. unsigned epnum;
  3570. struct fusbh200_iso_stream *stream;
  3571. struct usb_host_endpoint *ep;
  3572. unsigned long flags;
  3573. epnum = usb_pipeendpoint (urb->pipe);
  3574. if (usb_pipein(urb->pipe))
  3575. ep = urb->dev->ep_in[epnum];
  3576. else
  3577. ep = urb->dev->ep_out[epnum];
  3578. spin_lock_irqsave (&fusbh200->lock, flags);
  3579. stream = ep->hcpriv;
  3580. if (unlikely (stream == NULL)) {
  3581. stream = iso_stream_alloc(GFP_ATOMIC);
  3582. if (likely (stream != NULL)) {
  3583. ep->hcpriv = stream;
  3584. stream->ep = ep;
  3585. iso_stream_init(fusbh200, stream, urb->dev, urb->pipe,
  3586. urb->interval);
  3587. }
  3588. /* if dev->ep [epnum] is a QH, hw is set */
  3589. } else if (unlikely (stream->hw != NULL)) {
  3590. fusbh200_dbg (fusbh200, "dev %s ep%d%s, not iso??\n",
  3591. urb->dev->devpath, epnum,
  3592. usb_pipein(urb->pipe) ? "in" : "out");
  3593. stream = NULL;
  3594. }
  3595. spin_unlock_irqrestore (&fusbh200->lock, flags);
  3596. return stream;
  3597. }
  3598. /*-------------------------------------------------------------------------*/
  3599. /* fusbh200_iso_sched ops can be ITD-only or SITD-only */
  3600. static struct fusbh200_iso_sched *
  3601. iso_sched_alloc (unsigned packets, gfp_t mem_flags)
  3602. {
  3603. struct fusbh200_iso_sched *iso_sched;
  3604. int size = sizeof *iso_sched;
  3605. size += packets * sizeof (struct fusbh200_iso_packet);
  3606. iso_sched = kzalloc(size, mem_flags);
  3607. if (likely (iso_sched != NULL)) {
  3608. INIT_LIST_HEAD (&iso_sched->td_list);
  3609. }
  3610. return iso_sched;
  3611. }
  3612. static inline void
  3613. itd_sched_init(
  3614. struct fusbh200_hcd *fusbh200,
  3615. struct fusbh200_iso_sched *iso_sched,
  3616. struct fusbh200_iso_stream *stream,
  3617. struct urb *urb
  3618. )
  3619. {
  3620. unsigned i;
  3621. dma_addr_t dma = urb->transfer_dma;
  3622. /* how many uframes are needed for these transfers */
  3623. iso_sched->span = urb->number_of_packets * stream->interval;
  3624. /* figure out per-uframe itd fields that we'll need later
  3625. * when we fit new itds into the schedule.
  3626. */
  3627. for (i = 0; i < urb->number_of_packets; i++) {
  3628. struct fusbh200_iso_packet *uframe = &iso_sched->packet [i];
  3629. unsigned length;
  3630. dma_addr_t buf;
  3631. u32 trans;
  3632. length = urb->iso_frame_desc [i].length;
  3633. buf = dma + urb->iso_frame_desc [i].offset;
  3634. trans = FUSBH200_ISOC_ACTIVE;
  3635. trans |= buf & 0x0fff;
  3636. if (unlikely (((i + 1) == urb->number_of_packets))
  3637. && !(urb->transfer_flags & URB_NO_INTERRUPT))
  3638. trans |= FUSBH200_ITD_IOC;
  3639. trans |= length << 16;
  3640. uframe->transaction = cpu_to_hc32(fusbh200, trans);
  3641. /* might need to cross a buffer page within a uframe */
  3642. uframe->bufp = (buf & ~(u64)0x0fff);
  3643. buf += length;
  3644. if (unlikely ((uframe->bufp != (buf & ~(u64)0x0fff))))
  3645. uframe->cross = 1;
  3646. }
  3647. }
  3648. static void
  3649. iso_sched_free (
  3650. struct fusbh200_iso_stream *stream,
  3651. struct fusbh200_iso_sched *iso_sched
  3652. )
  3653. {
  3654. if (!iso_sched)
  3655. return;
  3656. // caller must hold fusbh200->lock!
  3657. list_splice (&iso_sched->td_list, &stream->free_list);
  3658. kfree (iso_sched);
  3659. }
  3660. static int
  3661. itd_urb_transaction (
  3662. struct fusbh200_iso_stream *stream,
  3663. struct fusbh200_hcd *fusbh200,
  3664. struct urb *urb,
  3665. gfp_t mem_flags
  3666. )
  3667. {
  3668. struct fusbh200_itd *itd;
  3669. dma_addr_t itd_dma;
  3670. int i;
  3671. unsigned num_itds;
  3672. struct fusbh200_iso_sched *sched;
  3673. unsigned long flags;
  3674. sched = iso_sched_alloc (urb->number_of_packets, mem_flags);
  3675. if (unlikely (sched == NULL))
  3676. return -ENOMEM;
  3677. itd_sched_init(fusbh200, sched, stream, urb);
  3678. if (urb->interval < 8)
  3679. num_itds = 1 + (sched->span + 7) / 8;
  3680. else
  3681. num_itds = urb->number_of_packets;
  3682. /* allocate/init ITDs */
  3683. spin_lock_irqsave (&fusbh200->lock, flags);
  3684. for (i = 0; i < num_itds; i++) {
  3685. /*
  3686. * Use iTDs from the free list, but not iTDs that may
  3687. * still be in use by the hardware.
  3688. */
  3689. if (likely(!list_empty(&stream->free_list))) {
  3690. itd = list_first_entry(&stream->free_list,
  3691. struct fusbh200_itd, itd_list);
  3692. if (itd->frame == fusbh200->now_frame)
  3693. goto alloc_itd;
  3694. list_del (&itd->itd_list);
  3695. itd_dma = itd->itd_dma;
  3696. } else {
  3697. alloc_itd:
  3698. spin_unlock_irqrestore (&fusbh200->lock, flags);
  3699. itd = dma_pool_alloc (fusbh200->itd_pool, mem_flags,
  3700. &itd_dma);
  3701. spin_lock_irqsave (&fusbh200->lock, flags);
  3702. if (!itd) {
  3703. iso_sched_free(stream, sched);
  3704. spin_unlock_irqrestore(&fusbh200->lock, flags);
  3705. return -ENOMEM;
  3706. }
  3707. }
  3708. memset (itd, 0, sizeof *itd);
  3709. itd->itd_dma = itd_dma;
  3710. list_add (&itd->itd_list, &sched->td_list);
  3711. }
  3712. spin_unlock_irqrestore (&fusbh200->lock, flags);
  3713. /* temporarily store schedule info in hcpriv */
  3714. urb->hcpriv = sched;
  3715. urb->error_count = 0;
  3716. return 0;
  3717. }
  3718. /*-------------------------------------------------------------------------*/
  3719. static inline int
  3720. itd_slot_ok (
  3721. struct fusbh200_hcd *fusbh200,
  3722. u32 mod,
  3723. u32 uframe,
  3724. u8 usecs,
  3725. u32 period
  3726. )
  3727. {
  3728. uframe %= period;
  3729. do {
  3730. /* can't commit more than uframe_periodic_max usec */
  3731. if (periodic_usecs (fusbh200, uframe >> 3, uframe & 0x7)
  3732. > (fusbh200->uframe_periodic_max - usecs))
  3733. return 0;
  3734. /* we know urb->interval is 2^N uframes */
  3735. uframe += period;
  3736. } while (uframe < mod);
  3737. return 1;
  3738. }
  3739. /*
  3740. * This scheduler plans almost as far into the future as it has actual
  3741. * periodic schedule slots. (Affected by TUNE_FLS, which defaults to
  3742. * "as small as possible" to be cache-friendlier.) That limits the size
  3743. * transfers you can stream reliably; avoid more than 64 msec per urb.
  3744. * Also avoid queue depths of less than fusbh200's worst irq latency (affected
  3745. * by the per-urb URB_NO_INTERRUPT hint, the log2_irq_thresh module parameter,
  3746. * and other factors); or more than about 230 msec total (for portability,
  3747. * given FUSBH200_TUNE_FLS and the slop). Or, write a smarter scheduler!
  3748. */
  3749. #define SCHEDULE_SLOP 80 /* microframes */
  3750. static int
  3751. iso_stream_schedule (
  3752. struct fusbh200_hcd *fusbh200,
  3753. struct urb *urb,
  3754. struct fusbh200_iso_stream *stream
  3755. )
  3756. {
  3757. u32 now, next, start, period, span;
  3758. int status;
  3759. unsigned mod = fusbh200->periodic_size << 3;
  3760. struct fusbh200_iso_sched *sched = urb->hcpriv;
  3761. period = urb->interval;
  3762. span = sched->span;
  3763. if (span > mod - SCHEDULE_SLOP) {
  3764. fusbh200_dbg (fusbh200, "iso request %p too long\n", urb);
  3765. status = -EFBIG;
  3766. goto fail;
  3767. }
  3768. now = fusbh200_read_frame_index(fusbh200) & (mod - 1);
  3769. /* Typical case: reuse current schedule, stream is still active.
  3770. * Hopefully there are no gaps from the host falling behind
  3771. * (irq delays etc), but if there are we'll take the next
  3772. * slot in the schedule, implicitly assuming URB_ISO_ASAP.
  3773. */
  3774. if (likely (!list_empty (&stream->td_list))) {
  3775. u32 excess;
  3776. /* For high speed devices, allow scheduling within the
  3777. * isochronous scheduling threshold. For full speed devices
  3778. * and Intel PCI-based controllers, don't (work around for
  3779. * Intel ICH9 bug).
  3780. */
  3781. if (!stream->highspeed && fusbh200->fs_i_thresh)
  3782. next = now + fusbh200->i_thresh;
  3783. else
  3784. next = now;
  3785. /* Fell behind (by up to twice the slop amount)?
  3786. * We decide based on the time of the last currently-scheduled
  3787. * slot, not the time of the next available slot.
  3788. */
  3789. excess = (stream->next_uframe - period - next) & (mod - 1);
  3790. if (excess >= mod - 2 * SCHEDULE_SLOP)
  3791. start = next + excess - mod + period *
  3792. DIV_ROUND_UP(mod - excess, period);
  3793. else
  3794. start = next + excess + period;
  3795. if (start - now >= mod) {
  3796. fusbh200_dbg(fusbh200, "request %p would overflow (%d+%d >= %d)\n",
  3797. urb, start - now - period, period,
  3798. mod);
  3799. status = -EFBIG;
  3800. goto fail;
  3801. }
  3802. }
  3803. /* need to schedule; when's the next (u)frame we could start?
  3804. * this is bigger than fusbh200->i_thresh allows; scheduling itself
  3805. * isn't free, the slop should handle reasonably slow cpus. it
  3806. * can also help high bandwidth if the dma and irq loads don't
  3807. * jump until after the queue is primed.
  3808. */
  3809. else {
  3810. int done = 0;
  3811. start = SCHEDULE_SLOP + (now & ~0x07);
  3812. /* NOTE: assumes URB_ISO_ASAP, to limit complexity/bugs */
  3813. /* find a uframe slot with enough bandwidth.
  3814. * Early uframes are more precious because full-speed
  3815. * iso IN transfers can't use late uframes,
  3816. * and therefore they should be allocated last.
  3817. */
  3818. next = start;
  3819. start += period;
  3820. do {
  3821. start--;
  3822. /* check schedule: enough space? */
  3823. if (itd_slot_ok(fusbh200, mod, start,
  3824. stream->usecs, period))
  3825. done = 1;
  3826. } while (start > next && !done);
  3827. /* no room in the schedule */
  3828. if (!done) {
  3829. fusbh200_dbg(fusbh200, "iso resched full %p (now %d max %d)\n",
  3830. urb, now, now + mod);
  3831. status = -ENOSPC;
  3832. goto fail;
  3833. }
  3834. }
  3835. /* Tried to schedule too far into the future? */
  3836. if (unlikely(start - now + span - period
  3837. >= mod - 2 * SCHEDULE_SLOP)) {
  3838. fusbh200_dbg(fusbh200, "request %p would overflow (%d+%d >= %d)\n",
  3839. urb, start - now, span - period,
  3840. mod - 2 * SCHEDULE_SLOP);
  3841. status = -EFBIG;
  3842. goto fail;
  3843. }
  3844. stream->next_uframe = start & (mod - 1);
  3845. /* report high speed start in uframes; full speed, in frames */
  3846. urb->start_frame = stream->next_uframe;
  3847. if (!stream->highspeed)
  3848. urb->start_frame >>= 3;
  3849. /* Make sure scan_isoc() sees these */
  3850. if (fusbh200->isoc_count == 0)
  3851. fusbh200->next_frame = now >> 3;
  3852. return 0;
  3853. fail:
  3854. iso_sched_free(stream, sched);
  3855. urb->hcpriv = NULL;
  3856. return status;
  3857. }
  3858. /*-------------------------------------------------------------------------*/
  3859. static inline void
  3860. itd_init(struct fusbh200_hcd *fusbh200, struct fusbh200_iso_stream *stream,
  3861. struct fusbh200_itd *itd)
  3862. {
  3863. int i;
  3864. /* it's been recently zeroed */
  3865. itd->hw_next = FUSBH200_LIST_END(fusbh200);
  3866. itd->hw_bufp [0] = stream->buf0;
  3867. itd->hw_bufp [1] = stream->buf1;
  3868. itd->hw_bufp [2] = stream->buf2;
  3869. for (i = 0; i < 8; i++)
  3870. itd->index[i] = -1;
  3871. /* All other fields are filled when scheduling */
  3872. }
  3873. static inline void
  3874. itd_patch(
  3875. struct fusbh200_hcd *fusbh200,
  3876. struct fusbh200_itd *itd,
  3877. struct fusbh200_iso_sched *iso_sched,
  3878. unsigned index,
  3879. u16 uframe
  3880. )
  3881. {
  3882. struct fusbh200_iso_packet *uf = &iso_sched->packet [index];
  3883. unsigned pg = itd->pg;
  3884. // BUG_ON (pg == 6 && uf->cross);
  3885. uframe &= 0x07;
  3886. itd->index [uframe] = index;
  3887. itd->hw_transaction[uframe] = uf->transaction;
  3888. itd->hw_transaction[uframe] |= cpu_to_hc32(fusbh200, pg << 12);
  3889. itd->hw_bufp[pg] |= cpu_to_hc32(fusbh200, uf->bufp & ~(u32)0);
  3890. itd->hw_bufp_hi[pg] |= cpu_to_hc32(fusbh200, (u32)(uf->bufp >> 32));
  3891. /* iso_frame_desc[].offset must be strictly increasing */
  3892. if (unlikely (uf->cross)) {
  3893. u64 bufp = uf->bufp + 4096;
  3894. itd->pg = ++pg;
  3895. itd->hw_bufp[pg] |= cpu_to_hc32(fusbh200, bufp & ~(u32)0);
  3896. itd->hw_bufp_hi[pg] |= cpu_to_hc32(fusbh200, (u32)(bufp >> 32));
  3897. }
  3898. }
  3899. static inline void
  3900. itd_link (struct fusbh200_hcd *fusbh200, unsigned frame, struct fusbh200_itd *itd)
  3901. {
  3902. union fusbh200_shadow *prev = &fusbh200->pshadow[frame];
  3903. __hc32 *hw_p = &fusbh200->periodic[frame];
  3904. union fusbh200_shadow here = *prev;
  3905. __hc32 type = 0;
  3906. /* skip any iso nodes which might belong to previous microframes */
  3907. while (here.ptr) {
  3908. type = Q_NEXT_TYPE(fusbh200, *hw_p);
  3909. if (type == cpu_to_hc32(fusbh200, Q_TYPE_QH))
  3910. break;
  3911. prev = periodic_next_shadow(fusbh200, prev, type);
  3912. hw_p = shadow_next_periodic(fusbh200, &here, type);
  3913. here = *prev;
  3914. }
  3915. itd->itd_next = here;
  3916. itd->hw_next = *hw_p;
  3917. prev->itd = itd;
  3918. itd->frame = frame;
  3919. wmb ();
  3920. *hw_p = cpu_to_hc32(fusbh200, itd->itd_dma | Q_TYPE_ITD);
  3921. }
  3922. /* fit urb's itds into the selected schedule slot; activate as needed */
  3923. static void itd_link_urb(
  3924. struct fusbh200_hcd *fusbh200,
  3925. struct urb *urb,
  3926. unsigned mod,
  3927. struct fusbh200_iso_stream *stream
  3928. )
  3929. {
  3930. int packet;
  3931. unsigned next_uframe, uframe, frame;
  3932. struct fusbh200_iso_sched *iso_sched = urb->hcpriv;
  3933. struct fusbh200_itd *itd;
  3934. next_uframe = stream->next_uframe & (mod - 1);
  3935. if (unlikely (list_empty(&stream->td_list))) {
  3936. fusbh200_to_hcd(fusbh200)->self.bandwidth_allocated
  3937. += stream->bandwidth;
  3938. fusbh200_vdbg (fusbh200,
  3939. "schedule devp %s ep%d%s-iso period %d start %d.%d\n",
  3940. urb->dev->devpath, stream->bEndpointAddress & 0x0f,
  3941. (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out",
  3942. urb->interval,
  3943. next_uframe >> 3, next_uframe & 0x7);
  3944. }
  3945. /* fill iTDs uframe by uframe */
  3946. for (packet = 0, itd = NULL; packet < urb->number_of_packets; ) {
  3947. if (itd == NULL) {
  3948. /* ASSERT: we have all necessary itds */
  3949. // BUG_ON (list_empty (&iso_sched->td_list));
  3950. /* ASSERT: no itds for this endpoint in this uframe */
  3951. itd = list_entry (iso_sched->td_list.next,
  3952. struct fusbh200_itd, itd_list);
  3953. list_move_tail (&itd->itd_list, &stream->td_list);
  3954. itd->stream = stream;
  3955. itd->urb = urb;
  3956. itd_init (fusbh200, stream, itd);
  3957. }
  3958. uframe = next_uframe & 0x07;
  3959. frame = next_uframe >> 3;
  3960. itd_patch(fusbh200, itd, iso_sched, packet, uframe);
  3961. next_uframe += stream->interval;
  3962. next_uframe &= mod - 1;
  3963. packet++;
  3964. /* link completed itds into the schedule */
  3965. if (((next_uframe >> 3) != frame)
  3966. || packet == urb->number_of_packets) {
  3967. itd_link(fusbh200, frame & (fusbh200->periodic_size - 1), itd);
  3968. itd = NULL;
  3969. }
  3970. }
  3971. stream->next_uframe = next_uframe;
  3972. /* don't need that schedule data any more */
  3973. iso_sched_free (stream, iso_sched);
  3974. urb->hcpriv = NULL;
  3975. ++fusbh200->isoc_count;
  3976. enable_periodic(fusbh200);
  3977. }
  3978. #define ISO_ERRS (FUSBH200_ISOC_BUF_ERR | FUSBH200_ISOC_BABBLE | FUSBH200_ISOC_XACTERR)
  3979. /* Process and recycle a completed ITD. Return true iff its urb completed,
  3980. * and hence its completion callback probably added things to the hardware
  3981. * schedule.
  3982. *
  3983. * Note that we carefully avoid recycling this descriptor until after any
  3984. * completion callback runs, so that it won't be reused quickly. That is,
  3985. * assuming (a) no more than two urbs per frame on this endpoint, and also
  3986. * (b) only this endpoint's completions submit URBs. It seems some silicon
  3987. * corrupts things if you reuse completed descriptors very quickly...
  3988. */
  3989. static bool itd_complete(struct fusbh200_hcd *fusbh200, struct fusbh200_itd *itd)
  3990. {
  3991. struct urb *urb = itd->urb;
  3992. struct usb_iso_packet_descriptor *desc;
  3993. u32 t;
  3994. unsigned uframe;
  3995. int urb_index = -1;
  3996. struct fusbh200_iso_stream *stream = itd->stream;
  3997. struct usb_device *dev;
  3998. bool retval = false;
  3999. /* for each uframe with a packet */
  4000. for (uframe = 0; uframe < 8; uframe++) {
  4001. if (likely (itd->index[uframe] == -1))
  4002. continue;
  4003. urb_index = itd->index[uframe];
  4004. desc = &urb->iso_frame_desc [urb_index];
  4005. t = hc32_to_cpup(fusbh200, &itd->hw_transaction [uframe]);
  4006. itd->hw_transaction [uframe] = 0;
  4007. /* report transfer status */
  4008. if (unlikely (t & ISO_ERRS)) {
  4009. urb->error_count++;
  4010. if (t & FUSBH200_ISOC_BUF_ERR)
  4011. desc->status = usb_pipein (urb->pipe)
  4012. ? -ENOSR /* hc couldn't read */
  4013. : -ECOMM; /* hc couldn't write */
  4014. else if (t & FUSBH200_ISOC_BABBLE)
  4015. desc->status = -EOVERFLOW;
  4016. else /* (t & FUSBH200_ISOC_XACTERR) */
  4017. desc->status = -EPROTO;
  4018. /* HC need not update length with this error */
  4019. if (!(t & FUSBH200_ISOC_BABBLE)) {
  4020. desc->actual_length = fusbh200_itdlen(urb, desc, t);
  4021. urb->actual_length += desc->actual_length;
  4022. }
  4023. } else if (likely ((t & FUSBH200_ISOC_ACTIVE) == 0)) {
  4024. desc->status = 0;
  4025. desc->actual_length = fusbh200_itdlen(urb, desc, t);
  4026. urb->actual_length += desc->actual_length;
  4027. } else {
  4028. /* URB was too late */
  4029. desc->status = -EXDEV;
  4030. }
  4031. }
  4032. /* handle completion now? */
  4033. if (likely ((urb_index + 1) != urb->number_of_packets))
  4034. goto done;
  4035. /* ASSERT: it's really the last itd for this urb
  4036. list_for_each_entry (itd, &stream->td_list, itd_list)
  4037. BUG_ON (itd->urb == urb);
  4038. */
  4039. /* give urb back to the driver; completion often (re)submits */
  4040. dev = urb->dev;
  4041. fusbh200_urb_done(fusbh200, urb, 0);
  4042. retval = true;
  4043. urb = NULL;
  4044. --fusbh200->isoc_count;
  4045. disable_periodic(fusbh200);
  4046. if (unlikely(list_is_singular(&stream->td_list))) {
  4047. fusbh200_to_hcd(fusbh200)->self.bandwidth_allocated
  4048. -= stream->bandwidth;
  4049. fusbh200_vdbg (fusbh200,
  4050. "deschedule devp %s ep%d%s-iso\n",
  4051. dev->devpath, stream->bEndpointAddress & 0x0f,
  4052. (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out");
  4053. }
  4054. done:
  4055. itd->urb = NULL;
  4056. /* Add to the end of the free list for later reuse */
  4057. list_move_tail(&itd->itd_list, &stream->free_list);
  4058. /* Recycle the iTDs when the pipeline is empty (ep no longer in use) */
  4059. if (list_empty(&stream->td_list)) {
  4060. list_splice_tail_init(&stream->free_list,
  4061. &fusbh200->cached_itd_list);
  4062. start_free_itds(fusbh200);
  4063. }
  4064. return retval;
  4065. }
  4066. /*-------------------------------------------------------------------------*/
  4067. static int itd_submit (struct fusbh200_hcd *fusbh200, struct urb *urb,
  4068. gfp_t mem_flags)
  4069. {
  4070. int status = -EINVAL;
  4071. unsigned long flags;
  4072. struct fusbh200_iso_stream *stream;
  4073. /* Get iso_stream head */
  4074. stream = iso_stream_find (fusbh200, urb);
  4075. if (unlikely (stream == NULL)) {
  4076. fusbh200_dbg (fusbh200, "can't get iso stream\n");
  4077. return -ENOMEM;
  4078. }
  4079. if (unlikely (urb->interval != stream->interval &&
  4080. fusbh200_port_speed(fusbh200, 0) == USB_PORT_STAT_HIGH_SPEED)) {
  4081. fusbh200_dbg (fusbh200, "can't change iso interval %d --> %d\n",
  4082. stream->interval, urb->interval);
  4083. goto done;
  4084. }
  4085. #ifdef FUSBH200_URB_TRACE
  4086. fusbh200_dbg (fusbh200,
  4087. "%s %s urb %p ep%d%s len %d, %d pkts %d uframes [%p]\n",
  4088. __func__, urb->dev->devpath, urb,
  4089. usb_pipeendpoint (urb->pipe),
  4090. usb_pipein (urb->pipe) ? "in" : "out",
  4091. urb->transfer_buffer_length,
  4092. urb->number_of_packets, urb->interval,
  4093. stream);
  4094. #endif
  4095. /* allocate ITDs w/o locking anything */
  4096. status = itd_urb_transaction (stream, fusbh200, urb, mem_flags);
  4097. if (unlikely (status < 0)) {
  4098. fusbh200_dbg (fusbh200, "can't init itds\n");
  4099. goto done;
  4100. }
  4101. /* schedule ... need to lock */
  4102. spin_lock_irqsave (&fusbh200->lock, flags);
  4103. if (unlikely(!HCD_HW_ACCESSIBLE(fusbh200_to_hcd(fusbh200)))) {
  4104. status = -ESHUTDOWN;
  4105. goto done_not_linked;
  4106. }
  4107. status = usb_hcd_link_urb_to_ep(fusbh200_to_hcd(fusbh200), urb);
  4108. if (unlikely(status))
  4109. goto done_not_linked;
  4110. status = iso_stream_schedule(fusbh200, urb, stream);
  4111. if (likely (status == 0))
  4112. itd_link_urb (fusbh200, urb, fusbh200->periodic_size << 3, stream);
  4113. else
  4114. usb_hcd_unlink_urb_from_ep(fusbh200_to_hcd(fusbh200), urb);
  4115. done_not_linked:
  4116. spin_unlock_irqrestore (&fusbh200->lock, flags);
  4117. done:
  4118. return status;
  4119. }
  4120. /*-------------------------------------------------------------------------*/
  4121. static void scan_isoc(struct fusbh200_hcd *fusbh200)
  4122. {
  4123. unsigned uf, now_frame, frame;
  4124. unsigned fmask = fusbh200->periodic_size - 1;
  4125. bool modified, live;
  4126. /*
  4127. * When running, scan from last scan point up to "now"
  4128. * else clean up by scanning everything that's left.
  4129. * Touches as few pages as possible: cache-friendly.
  4130. */
  4131. if (fusbh200->rh_state >= FUSBH200_RH_RUNNING) {
  4132. uf = fusbh200_read_frame_index(fusbh200);
  4133. now_frame = (uf >> 3) & fmask;
  4134. live = true;
  4135. } else {
  4136. now_frame = (fusbh200->next_frame - 1) & fmask;
  4137. live = false;
  4138. }
  4139. fusbh200->now_frame = now_frame;
  4140. frame = fusbh200->next_frame;
  4141. for (;;) {
  4142. union fusbh200_shadow q, *q_p;
  4143. __hc32 type, *hw_p;
  4144. restart:
  4145. /* scan each element in frame's queue for completions */
  4146. q_p = &fusbh200->pshadow [frame];
  4147. hw_p = &fusbh200->periodic [frame];
  4148. q.ptr = q_p->ptr;
  4149. type = Q_NEXT_TYPE(fusbh200, *hw_p);
  4150. modified = false;
  4151. while (q.ptr != NULL) {
  4152. switch (hc32_to_cpu(fusbh200, type)) {
  4153. case Q_TYPE_ITD:
  4154. /* If this ITD is still active, leave it for
  4155. * later processing ... check the next entry.
  4156. * No need to check for activity unless the
  4157. * frame is current.
  4158. */
  4159. if (frame == now_frame && live) {
  4160. rmb();
  4161. for (uf = 0; uf < 8; uf++) {
  4162. if (q.itd->hw_transaction[uf] &
  4163. ITD_ACTIVE(fusbh200))
  4164. break;
  4165. }
  4166. if (uf < 8) {
  4167. q_p = &q.itd->itd_next;
  4168. hw_p = &q.itd->hw_next;
  4169. type = Q_NEXT_TYPE(fusbh200,
  4170. q.itd->hw_next);
  4171. q = *q_p;
  4172. break;
  4173. }
  4174. }
  4175. /* Take finished ITDs out of the schedule
  4176. * and process them: recycle, maybe report
  4177. * URB completion. HC won't cache the
  4178. * pointer for much longer, if at all.
  4179. */
  4180. *q_p = q.itd->itd_next;
  4181. *hw_p = q.itd->hw_next;
  4182. type = Q_NEXT_TYPE(fusbh200, q.itd->hw_next);
  4183. wmb();
  4184. modified = itd_complete (fusbh200, q.itd);
  4185. q = *q_p;
  4186. break;
  4187. default:
  4188. fusbh200_dbg(fusbh200, "corrupt type %d frame %d shadow %p\n",
  4189. type, frame, q.ptr);
  4190. // BUG ();
  4191. /* FALL THROUGH */
  4192. case Q_TYPE_QH:
  4193. case Q_TYPE_FSTN:
  4194. /* End of the iTDs and siTDs */
  4195. q.ptr = NULL;
  4196. break;
  4197. }
  4198. /* assume completion callbacks modify the queue */
  4199. if (unlikely(modified && fusbh200->isoc_count > 0))
  4200. goto restart;
  4201. }
  4202. /* Stop when we have reached the current frame */
  4203. if (frame == now_frame)
  4204. break;
  4205. frame = (frame + 1) & fmask;
  4206. }
  4207. fusbh200->next_frame = now_frame;
  4208. }
  4209. /*-------------------------------------------------------------------------*/
  4210. /*
  4211. * Display / Set uframe_periodic_max
  4212. */
  4213. static ssize_t show_uframe_periodic_max(struct device *dev,
  4214. struct device_attribute *attr,
  4215. char *buf)
  4216. {
  4217. struct fusbh200_hcd *fusbh200;
  4218. int n;
  4219. fusbh200 = hcd_to_fusbh200(bus_to_hcd(dev_get_drvdata(dev)));
  4220. n = scnprintf(buf, PAGE_SIZE, "%d\n", fusbh200->uframe_periodic_max);
  4221. return n;
  4222. }
  4223. static ssize_t store_uframe_periodic_max(struct device *dev,
  4224. struct device_attribute *attr,
  4225. const char *buf, size_t count)
  4226. {
  4227. struct fusbh200_hcd *fusbh200;
  4228. unsigned uframe_periodic_max;
  4229. unsigned frame, uframe;
  4230. unsigned short allocated_max;
  4231. unsigned long flags;
  4232. ssize_t ret;
  4233. fusbh200 = hcd_to_fusbh200(bus_to_hcd(dev_get_drvdata(dev)));
  4234. if (kstrtouint(buf, 0, &uframe_periodic_max) < 0)
  4235. return -EINVAL;
  4236. if (uframe_periodic_max < 100 || uframe_periodic_max >= 125) {
  4237. fusbh200_info(fusbh200, "rejecting invalid request for "
  4238. "uframe_periodic_max=%u\n", uframe_periodic_max);
  4239. return -EINVAL;
  4240. }
  4241. ret = -EINVAL;
  4242. /*
  4243. * lock, so that our checking does not race with possible periodic
  4244. * bandwidth allocation through submitting new urbs.
  4245. */
  4246. spin_lock_irqsave (&fusbh200->lock, flags);
  4247. /*
  4248. * for request to decrease max periodic bandwidth, we have to check
  4249. * every microframe in the schedule to see whether the decrease is
  4250. * possible.
  4251. */
  4252. if (uframe_periodic_max < fusbh200->uframe_periodic_max) {
  4253. allocated_max = 0;
  4254. for (frame = 0; frame < fusbh200->periodic_size; ++frame)
  4255. for (uframe = 0; uframe < 7; ++uframe)
  4256. allocated_max = max(allocated_max,
  4257. periodic_usecs (fusbh200, frame, uframe));
  4258. if (allocated_max > uframe_periodic_max) {
  4259. fusbh200_info(fusbh200,
  4260. "cannot decrease uframe_periodic_max becase "
  4261. "periodic bandwidth is already allocated "
  4262. "(%u > %u)\n",
  4263. allocated_max, uframe_periodic_max);
  4264. goto out_unlock;
  4265. }
  4266. }
  4267. /* increasing is always ok */
  4268. fusbh200_info(fusbh200, "setting max periodic bandwidth to %u%% "
  4269. "(== %u usec/uframe)\n",
  4270. 100*uframe_periodic_max/125, uframe_periodic_max);
  4271. if (uframe_periodic_max != 100)
  4272. fusbh200_warn(fusbh200, "max periodic bandwidth set is non-standard\n");
  4273. fusbh200->uframe_periodic_max = uframe_periodic_max;
  4274. ret = count;
  4275. out_unlock:
  4276. spin_unlock_irqrestore (&fusbh200->lock, flags);
  4277. return ret;
  4278. }
  4279. static DEVICE_ATTR(uframe_periodic_max, 0644, show_uframe_periodic_max, store_uframe_periodic_max);
  4280. static inline int create_sysfs_files(struct fusbh200_hcd *fusbh200)
  4281. {
  4282. struct device *controller = fusbh200_to_hcd(fusbh200)->self.controller;
  4283. int i = 0;
  4284. if (i)
  4285. goto out;
  4286. i = device_create_file(controller, &dev_attr_uframe_periodic_max);
  4287. out:
  4288. return i;
  4289. }
  4290. static inline void remove_sysfs_files(struct fusbh200_hcd *fusbh200)
  4291. {
  4292. struct device *controller = fusbh200_to_hcd(fusbh200)->self.controller;
  4293. device_remove_file(controller, &dev_attr_uframe_periodic_max);
  4294. }
  4295. /*-------------------------------------------------------------------------*/
  4296. /* On some systems, leaving remote wakeup enabled prevents system shutdown.
  4297. * The firmware seems to think that powering off is a wakeup event!
  4298. * This routine turns off remote wakeup and everything else, on all ports.
  4299. */
  4300. static void fusbh200_turn_off_all_ports(struct fusbh200_hcd *fusbh200)
  4301. {
  4302. u32 __iomem *status_reg = &fusbh200->regs->port_status;
  4303. fusbh200_writel(fusbh200, PORT_RWC_BITS, status_reg);
  4304. }
  4305. /*
  4306. * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
  4307. * Must be called with interrupts enabled and the lock not held.
  4308. */
  4309. static void fusbh200_silence_controller(struct fusbh200_hcd *fusbh200)
  4310. {
  4311. fusbh200_halt(fusbh200);
  4312. spin_lock_irq(&fusbh200->lock);
  4313. fusbh200->rh_state = FUSBH200_RH_HALTED;
  4314. fusbh200_turn_off_all_ports(fusbh200);
  4315. spin_unlock_irq(&fusbh200->lock);
  4316. }
  4317. /* fusbh200_shutdown kick in for silicon on any bus (not just pci, etc).
  4318. * This forcibly disables dma and IRQs, helping kexec and other cases
  4319. * where the next system software may expect clean state.
  4320. */
  4321. static void fusbh200_shutdown(struct usb_hcd *hcd)
  4322. {
  4323. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200(hcd);
  4324. spin_lock_irq(&fusbh200->lock);
  4325. fusbh200->shutdown = true;
  4326. fusbh200->rh_state = FUSBH200_RH_STOPPING;
  4327. fusbh200->enabled_hrtimer_events = 0;
  4328. spin_unlock_irq(&fusbh200->lock);
  4329. fusbh200_silence_controller(fusbh200);
  4330. hrtimer_cancel(&fusbh200->hrtimer);
  4331. }
  4332. /*-------------------------------------------------------------------------*/
  4333. /*
  4334. * fusbh200_work is called from some interrupts, timers, and so on.
  4335. * it calls driver completion functions, after dropping fusbh200->lock.
  4336. */
  4337. static void fusbh200_work (struct fusbh200_hcd *fusbh200)
  4338. {
  4339. /* another CPU may drop fusbh200->lock during a schedule scan while
  4340. * it reports urb completions. this flag guards against bogus
  4341. * attempts at re-entrant schedule scanning.
  4342. */
  4343. if (fusbh200->scanning) {
  4344. fusbh200->need_rescan = true;
  4345. return;
  4346. }
  4347. fusbh200->scanning = true;
  4348. rescan:
  4349. fusbh200->need_rescan = false;
  4350. if (fusbh200->async_count)
  4351. scan_async(fusbh200);
  4352. if (fusbh200->intr_count > 0)
  4353. scan_intr(fusbh200);
  4354. if (fusbh200->isoc_count > 0)
  4355. scan_isoc(fusbh200);
  4356. if (fusbh200->need_rescan)
  4357. goto rescan;
  4358. fusbh200->scanning = false;
  4359. /* the IO watchdog guards against hardware or driver bugs that
  4360. * misplace IRQs, and should let us run completely without IRQs.
  4361. * such lossage has been observed on both VT6202 and VT8235.
  4362. */
  4363. turn_on_io_watchdog(fusbh200);
  4364. }
  4365. /*
  4366. * Called when the fusbh200_hcd module is removed.
  4367. */
  4368. static void fusbh200_stop (struct usb_hcd *hcd)
  4369. {
  4370. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
  4371. fusbh200_dbg (fusbh200, "stop\n");
  4372. /* no more interrupts ... */
  4373. spin_lock_irq(&fusbh200->lock);
  4374. fusbh200->enabled_hrtimer_events = 0;
  4375. spin_unlock_irq(&fusbh200->lock);
  4376. fusbh200_quiesce(fusbh200);
  4377. fusbh200_silence_controller(fusbh200);
  4378. fusbh200_reset (fusbh200);
  4379. hrtimer_cancel(&fusbh200->hrtimer);
  4380. remove_sysfs_files(fusbh200);
  4381. remove_debug_files (fusbh200);
  4382. /* root hub is shut down separately (first, when possible) */
  4383. spin_lock_irq (&fusbh200->lock);
  4384. end_free_itds(fusbh200);
  4385. spin_unlock_irq (&fusbh200->lock);
  4386. fusbh200_mem_cleanup (fusbh200);
  4387. #ifdef FUSBH200_STATS
  4388. fusbh200_dbg(fusbh200, "irq normal %ld err %ld iaa %ld (lost %ld)\n",
  4389. fusbh200->stats.normal, fusbh200->stats.error, fusbh200->stats.iaa,
  4390. fusbh200->stats.lost_iaa);
  4391. fusbh200_dbg (fusbh200, "complete %ld unlink %ld\n",
  4392. fusbh200->stats.complete, fusbh200->stats.unlink);
  4393. #endif
  4394. dbg_status (fusbh200, "fusbh200_stop completed",
  4395. fusbh200_readl(fusbh200, &fusbh200->regs->status));
  4396. }
  4397. /* one-time init, only for memory state */
  4398. static int hcd_fusbh200_init(struct usb_hcd *hcd)
  4399. {
  4400. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200(hcd);
  4401. u32 temp;
  4402. int retval;
  4403. u32 hcc_params;
  4404. struct fusbh200_qh_hw *hw;
  4405. spin_lock_init(&fusbh200->lock);
  4406. /*
  4407. * keep io watchdog by default, those good HCDs could turn off it later
  4408. */
  4409. fusbh200->need_io_watchdog = 1;
  4410. hrtimer_init(&fusbh200->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
  4411. fusbh200->hrtimer.function = fusbh200_hrtimer_func;
  4412. fusbh200->next_hrtimer_event = FUSBH200_HRTIMER_NO_EVENT;
  4413. hcc_params = fusbh200_readl(fusbh200, &fusbh200->caps->hcc_params);
  4414. /*
  4415. * by default set standard 80% (== 100 usec/uframe) max periodic
  4416. * bandwidth as required by USB 2.0
  4417. */
  4418. fusbh200->uframe_periodic_max = 100;
  4419. /*
  4420. * hw default: 1K periodic list heads, one per frame.
  4421. * periodic_size can shrink by USBCMD update if hcc_params allows.
  4422. */
  4423. fusbh200->periodic_size = DEFAULT_I_TDPS;
  4424. INIT_LIST_HEAD(&fusbh200->intr_qh_list);
  4425. INIT_LIST_HEAD(&fusbh200->cached_itd_list);
  4426. if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
  4427. /* periodic schedule size can be smaller than default */
  4428. switch (FUSBH200_TUNE_FLS) {
  4429. case 0: fusbh200->periodic_size = 1024; break;
  4430. case 1: fusbh200->periodic_size = 512; break;
  4431. case 2: fusbh200->periodic_size = 256; break;
  4432. default: BUG();
  4433. }
  4434. }
  4435. if ((retval = fusbh200_mem_init(fusbh200, GFP_KERNEL)) < 0)
  4436. return retval;
  4437. /* controllers may cache some of the periodic schedule ... */
  4438. fusbh200->i_thresh = 2;
  4439. /*
  4440. * dedicate a qh for the async ring head, since we couldn't unlink
  4441. * a 'real' qh without stopping the async schedule [4.8]. use it
  4442. * as the 'reclamation list head' too.
  4443. * its dummy is used in hw_alt_next of many tds, to prevent the qh
  4444. * from automatically advancing to the next td after short reads.
  4445. */
  4446. fusbh200->async->qh_next.qh = NULL;
  4447. hw = fusbh200->async->hw;
  4448. hw->hw_next = QH_NEXT(fusbh200, fusbh200->async->qh_dma);
  4449. hw->hw_info1 = cpu_to_hc32(fusbh200, QH_HEAD);
  4450. hw->hw_token = cpu_to_hc32(fusbh200, QTD_STS_HALT);
  4451. hw->hw_qtd_next = FUSBH200_LIST_END(fusbh200);
  4452. fusbh200->async->qh_state = QH_STATE_LINKED;
  4453. hw->hw_alt_next = QTD_NEXT(fusbh200, fusbh200->async->dummy->qtd_dma);
  4454. /* clear interrupt enables, set irq latency */
  4455. if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
  4456. log2_irq_thresh = 0;
  4457. temp = 1 << (16 + log2_irq_thresh);
  4458. if (HCC_CANPARK(hcc_params)) {
  4459. /* HW default park == 3, on hardware that supports it (like
  4460. * NVidia and ALI silicon), maximizes throughput on the async
  4461. * schedule by avoiding QH fetches between transfers.
  4462. *
  4463. * With fast usb storage devices and NForce2, "park" seems to
  4464. * make problems: throughput reduction (!), data errors...
  4465. */
  4466. if (park) {
  4467. park = min(park, (unsigned) 3);
  4468. temp |= CMD_PARK;
  4469. temp |= park << 8;
  4470. }
  4471. fusbh200_dbg(fusbh200, "park %d\n", park);
  4472. }
  4473. if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
  4474. /* periodic schedule size can be smaller than default */
  4475. temp &= ~(3 << 2);
  4476. temp |= (FUSBH200_TUNE_FLS << 2);
  4477. }
  4478. fusbh200->command = temp;
  4479. /* Accept arbitrarily long scatter-gather lists */
  4480. if (!(hcd->driver->flags & HCD_LOCAL_MEM))
  4481. hcd->self.sg_tablesize = ~0;
  4482. return 0;
  4483. }
  4484. /* start HC running; it's halted, hcd_fusbh200_init() has been run (once) */
  4485. static int fusbh200_run (struct usb_hcd *hcd)
  4486. {
  4487. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
  4488. u32 temp;
  4489. u32 hcc_params;
  4490. hcd->uses_new_polling = 1;
  4491. /* EHCI spec section 4.1 */
  4492. fusbh200_writel(fusbh200, fusbh200->periodic_dma, &fusbh200->regs->frame_list);
  4493. fusbh200_writel(fusbh200, (u32)fusbh200->async->qh_dma, &fusbh200->regs->async_next);
  4494. /*
  4495. * hcc_params controls whether fusbh200->regs->segment must (!!!)
  4496. * be used; it constrains QH/ITD/SITD and QTD locations.
  4497. * pci_pool consistent memory always uses segment zero.
  4498. * streaming mappings for I/O buffers, like pci_map_single(),
  4499. * can return segments above 4GB, if the device allows.
  4500. *
  4501. * NOTE: the dma mask is visible through dma_supported(), so
  4502. * drivers can pass this info along ... like NETIF_F_HIGHDMA,
  4503. * Scsi_Host.highmem_io, and so forth. It's readonly to all
  4504. * host side drivers though.
  4505. */
  4506. hcc_params = fusbh200_readl(fusbh200, &fusbh200->caps->hcc_params);
  4507. // Philips, Intel, and maybe others need CMD_RUN before the
  4508. // root hub will detect new devices (why?); NEC doesn't
  4509. fusbh200->command &= ~(CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
  4510. fusbh200->command |= CMD_RUN;
  4511. fusbh200_writel(fusbh200, fusbh200->command, &fusbh200->regs->command);
  4512. dbg_cmd (fusbh200, "init", fusbh200->command);
  4513. /*
  4514. * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
  4515. * are explicitly handed to companion controller(s), so no TT is
  4516. * involved with the root hub. (Except where one is integrated,
  4517. * and there's no companion controller unless maybe for USB OTG.)
  4518. *
  4519. * Turning on the CF flag will transfer ownership of all ports
  4520. * from the companions to the EHCI controller. If any of the
  4521. * companions are in the middle of a port reset at the time, it
  4522. * could cause trouble. Write-locking ehci_cf_port_reset_rwsem
  4523. * guarantees that no resets are in progress. After we set CF,
  4524. * a short delay lets the hardware catch up; new resets shouldn't
  4525. * be started before the port switching actions could complete.
  4526. */
  4527. down_write(&ehci_cf_port_reset_rwsem);
  4528. fusbh200->rh_state = FUSBH200_RH_RUNNING;
  4529. fusbh200_readl(fusbh200, &fusbh200->regs->command); /* unblock posted writes */
  4530. msleep(5);
  4531. up_write(&ehci_cf_port_reset_rwsem);
  4532. fusbh200->last_periodic_enable = ktime_get_real();
  4533. temp = HC_VERSION(fusbh200, fusbh200_readl(fusbh200, &fusbh200->caps->hc_capbase));
  4534. fusbh200_info (fusbh200,
  4535. "USB %x.%x started, EHCI %x.%02x\n",
  4536. ((fusbh200->sbrn & 0xf0)>>4), (fusbh200->sbrn & 0x0f),
  4537. temp >> 8, temp & 0xff);
  4538. fusbh200_writel(fusbh200, INTR_MASK,
  4539. &fusbh200->regs->intr_enable); /* Turn On Interrupts */
  4540. /* GRR this is run-once init(), being done every time the HC starts.
  4541. * So long as they're part of class devices, we can't do it init()
  4542. * since the class device isn't created that early.
  4543. */
  4544. create_debug_files(fusbh200);
  4545. create_sysfs_files(fusbh200);
  4546. return 0;
  4547. }
  4548. static int fusbh200_setup(struct usb_hcd *hcd)
  4549. {
  4550. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200(hcd);
  4551. int retval;
  4552. fusbh200->regs = (void __iomem *)fusbh200->caps +
  4553. HC_LENGTH(fusbh200, fusbh200_readl(fusbh200, &fusbh200->caps->hc_capbase));
  4554. dbg_hcs_params(fusbh200, "reset");
  4555. dbg_hcc_params(fusbh200, "reset");
  4556. /* cache this readonly data; minimize chip reads */
  4557. fusbh200->hcs_params = fusbh200_readl(fusbh200, &fusbh200->caps->hcs_params);
  4558. fusbh200->sbrn = HCD_USB2;
  4559. /* data structure init */
  4560. retval = hcd_fusbh200_init(hcd);
  4561. if (retval)
  4562. return retval;
  4563. retval = fusbh200_halt(fusbh200);
  4564. if (retval)
  4565. return retval;
  4566. fusbh200_reset(fusbh200);
  4567. return 0;
  4568. }
  4569. /*-------------------------------------------------------------------------*/
  4570. static irqreturn_t fusbh200_irq (struct usb_hcd *hcd)
  4571. {
  4572. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
  4573. u32 status, masked_status, pcd_status = 0, cmd;
  4574. int bh;
  4575. spin_lock (&fusbh200->lock);
  4576. status = fusbh200_readl(fusbh200, &fusbh200->regs->status);
  4577. /* e.g. cardbus physical eject */
  4578. if (status == ~(u32) 0) {
  4579. fusbh200_dbg (fusbh200, "device removed\n");
  4580. goto dead;
  4581. }
  4582. /*
  4583. * We don't use STS_FLR, but some controllers don't like it to
  4584. * remain on, so mask it out along with the other status bits.
  4585. */
  4586. masked_status = status & (INTR_MASK | STS_FLR);
  4587. /* Shared IRQ? */
  4588. if (!masked_status || unlikely(fusbh200->rh_state == FUSBH200_RH_HALTED)) {
  4589. spin_unlock(&fusbh200->lock);
  4590. return IRQ_NONE;
  4591. }
  4592. /* clear (just) interrupts */
  4593. fusbh200_writel(fusbh200, masked_status, &fusbh200->regs->status);
  4594. cmd = fusbh200_readl(fusbh200, &fusbh200->regs->command);
  4595. bh = 0;
  4596. #ifdef VERBOSE_DEBUG
  4597. /* unrequested/ignored: Frame List Rollover */
  4598. dbg_status (fusbh200, "irq", status);
  4599. #endif
  4600. /* INT, ERR, and IAA interrupt rates can be throttled */
  4601. /* normal [4.15.1.2] or error [4.15.1.1] completion */
  4602. if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
  4603. if (likely ((status & STS_ERR) == 0))
  4604. COUNT (fusbh200->stats.normal);
  4605. else
  4606. COUNT (fusbh200->stats.error);
  4607. bh = 1;
  4608. }
  4609. /* complete the unlinking of some qh [4.15.2.3] */
  4610. if (status & STS_IAA) {
  4611. /* Turn off the IAA watchdog */
  4612. fusbh200->enabled_hrtimer_events &= ~BIT(FUSBH200_HRTIMER_IAA_WATCHDOG);
  4613. /*
  4614. * Mild optimization: Allow another IAAD to reset the
  4615. * hrtimer, if one occurs before the next expiration.
  4616. * In theory we could always cancel the hrtimer, but
  4617. * tests show that about half the time it will be reset
  4618. * for some other event anyway.
  4619. */
  4620. if (fusbh200->next_hrtimer_event == FUSBH200_HRTIMER_IAA_WATCHDOG)
  4621. ++fusbh200->next_hrtimer_event;
  4622. /* guard against (alleged) silicon errata */
  4623. if (cmd & CMD_IAAD)
  4624. fusbh200_dbg(fusbh200, "IAA with IAAD still set?\n");
  4625. if (fusbh200->async_iaa) {
  4626. COUNT(fusbh200->stats.iaa);
  4627. end_unlink_async(fusbh200);
  4628. } else
  4629. fusbh200_dbg(fusbh200, "IAA with nothing unlinked?\n");
  4630. }
  4631. /* remote wakeup [4.3.1] */
  4632. if (status & STS_PCD) {
  4633. int pstatus;
  4634. u32 __iomem *status_reg = &fusbh200->regs->port_status;
  4635. /* kick root hub later */
  4636. pcd_status = status;
  4637. /* resume root hub? */
  4638. if (fusbh200->rh_state == FUSBH200_RH_SUSPENDED)
  4639. usb_hcd_resume_root_hub(hcd);
  4640. pstatus = fusbh200_readl(fusbh200, status_reg);
  4641. if (test_bit(0, &fusbh200->suspended_ports) &&
  4642. ((pstatus & PORT_RESUME) ||
  4643. !(pstatus & PORT_SUSPEND)) &&
  4644. (pstatus & PORT_PE) &&
  4645. fusbh200->reset_done[0] == 0) {
  4646. /* start 20 msec resume signaling from this port,
  4647. * and make khubd collect PORT_STAT_C_SUSPEND to
  4648. * stop that signaling. Use 5 ms extra for safety,
  4649. * like usb_port_resume() does.
  4650. */
  4651. fusbh200->reset_done[0] = jiffies + msecs_to_jiffies(25);
  4652. set_bit(0, &fusbh200->resuming_ports);
  4653. fusbh200_dbg (fusbh200, "port 1 remote wakeup\n");
  4654. mod_timer(&hcd->rh_timer, fusbh200->reset_done[0]);
  4655. }
  4656. }
  4657. /* PCI errors [4.15.2.4] */
  4658. if (unlikely ((status & STS_FATAL) != 0)) {
  4659. fusbh200_err(fusbh200, "fatal error\n");
  4660. dbg_cmd(fusbh200, "fatal", cmd);
  4661. dbg_status(fusbh200, "fatal", status);
  4662. dead:
  4663. usb_hc_died(hcd);
  4664. /* Don't let the controller do anything more */
  4665. fusbh200->shutdown = true;
  4666. fusbh200->rh_state = FUSBH200_RH_STOPPING;
  4667. fusbh200->command &= ~(CMD_RUN | CMD_ASE | CMD_PSE);
  4668. fusbh200_writel(fusbh200, fusbh200->command, &fusbh200->regs->command);
  4669. fusbh200_writel(fusbh200, 0, &fusbh200->regs->intr_enable);
  4670. fusbh200_handle_controller_death(fusbh200);
  4671. /* Handle completions when the controller stops */
  4672. bh = 0;
  4673. }
  4674. if (bh)
  4675. fusbh200_work (fusbh200);
  4676. spin_unlock (&fusbh200->lock);
  4677. if (pcd_status)
  4678. usb_hcd_poll_rh_status(hcd);
  4679. return IRQ_HANDLED;
  4680. }
  4681. /*-------------------------------------------------------------------------*/
  4682. /*
  4683. * non-error returns are a promise to giveback() the urb later
  4684. * we drop ownership so next owner (or urb unlink) can get it
  4685. *
  4686. * urb + dev is in hcd.self.controller.urb_list
  4687. * we're queueing TDs onto software and hardware lists
  4688. *
  4689. * hcd-specific init for hcpriv hasn't been done yet
  4690. *
  4691. * NOTE: control, bulk, and interrupt share the same code to append TDs
  4692. * to a (possibly active) QH, and the same QH scanning code.
  4693. */
  4694. static int fusbh200_urb_enqueue (
  4695. struct usb_hcd *hcd,
  4696. struct urb *urb,
  4697. gfp_t mem_flags
  4698. ) {
  4699. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
  4700. struct list_head qtd_list;
  4701. INIT_LIST_HEAD (&qtd_list);
  4702. switch (usb_pipetype (urb->pipe)) {
  4703. case PIPE_CONTROL:
  4704. /* qh_completions() code doesn't handle all the fault cases
  4705. * in multi-TD control transfers. Even 1KB is rare anyway.
  4706. */
  4707. if (urb->transfer_buffer_length > (16 * 1024))
  4708. return -EMSGSIZE;
  4709. /* FALLTHROUGH */
  4710. /* case PIPE_BULK: */
  4711. default:
  4712. if (!qh_urb_transaction (fusbh200, urb, &qtd_list, mem_flags))
  4713. return -ENOMEM;
  4714. return submit_async(fusbh200, urb, &qtd_list, mem_flags);
  4715. case PIPE_INTERRUPT:
  4716. if (!qh_urb_transaction (fusbh200, urb, &qtd_list, mem_flags))
  4717. return -ENOMEM;
  4718. return intr_submit(fusbh200, urb, &qtd_list, mem_flags);
  4719. case PIPE_ISOCHRONOUS:
  4720. return itd_submit (fusbh200, urb, mem_flags);
  4721. }
  4722. }
  4723. /* remove from hardware lists
  4724. * completions normally happen asynchronously
  4725. */
  4726. static int fusbh200_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
  4727. {
  4728. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
  4729. struct fusbh200_qh *qh;
  4730. unsigned long flags;
  4731. int rc;
  4732. spin_lock_irqsave (&fusbh200->lock, flags);
  4733. rc = usb_hcd_check_unlink_urb(hcd, urb, status);
  4734. if (rc)
  4735. goto done;
  4736. switch (usb_pipetype (urb->pipe)) {
  4737. // case PIPE_CONTROL:
  4738. // case PIPE_BULK:
  4739. default:
  4740. qh = (struct fusbh200_qh *) urb->hcpriv;
  4741. if (!qh)
  4742. break;
  4743. switch (qh->qh_state) {
  4744. case QH_STATE_LINKED:
  4745. case QH_STATE_COMPLETING:
  4746. start_unlink_async(fusbh200, qh);
  4747. break;
  4748. case QH_STATE_UNLINK:
  4749. case QH_STATE_UNLINK_WAIT:
  4750. /* already started */
  4751. break;
  4752. case QH_STATE_IDLE:
  4753. /* QH might be waiting for a Clear-TT-Buffer */
  4754. qh_completions(fusbh200, qh);
  4755. break;
  4756. }
  4757. break;
  4758. case PIPE_INTERRUPT:
  4759. qh = (struct fusbh200_qh *) urb->hcpriv;
  4760. if (!qh)
  4761. break;
  4762. switch (qh->qh_state) {
  4763. case QH_STATE_LINKED:
  4764. case QH_STATE_COMPLETING:
  4765. start_unlink_intr(fusbh200, qh);
  4766. break;
  4767. case QH_STATE_IDLE:
  4768. qh_completions (fusbh200, qh);
  4769. break;
  4770. default:
  4771. fusbh200_dbg (fusbh200, "bogus qh %p state %d\n",
  4772. qh, qh->qh_state);
  4773. goto done;
  4774. }
  4775. break;
  4776. case PIPE_ISOCHRONOUS:
  4777. // itd...
  4778. // wait till next completion, do it then.
  4779. // completion irqs can wait up to 1024 msec,
  4780. break;
  4781. }
  4782. done:
  4783. spin_unlock_irqrestore (&fusbh200->lock, flags);
  4784. return rc;
  4785. }
  4786. /*-------------------------------------------------------------------------*/
  4787. // bulk qh holds the data toggle
  4788. static void
  4789. fusbh200_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
  4790. {
  4791. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
  4792. unsigned long flags;
  4793. struct fusbh200_qh *qh, *tmp;
  4794. /* ASSERT: any requests/urbs are being unlinked */
  4795. /* ASSERT: nobody can be submitting urbs for this any more */
  4796. rescan:
  4797. spin_lock_irqsave (&fusbh200->lock, flags);
  4798. qh = ep->hcpriv;
  4799. if (!qh)
  4800. goto done;
  4801. /* endpoints can be iso streams. for now, we don't
  4802. * accelerate iso completions ... so spin a while.
  4803. */
  4804. if (qh->hw == NULL) {
  4805. struct fusbh200_iso_stream *stream = ep->hcpriv;
  4806. if (!list_empty(&stream->td_list))
  4807. goto idle_timeout;
  4808. /* BUG_ON(!list_empty(&stream->free_list)); */
  4809. kfree(stream);
  4810. goto done;
  4811. }
  4812. if (fusbh200->rh_state < FUSBH200_RH_RUNNING)
  4813. qh->qh_state = QH_STATE_IDLE;
  4814. switch (qh->qh_state) {
  4815. case QH_STATE_LINKED:
  4816. case QH_STATE_COMPLETING:
  4817. for (tmp = fusbh200->async->qh_next.qh;
  4818. tmp && tmp != qh;
  4819. tmp = tmp->qh_next.qh)
  4820. continue;
  4821. /* periodic qh self-unlinks on empty, and a COMPLETING qh
  4822. * may already be unlinked.
  4823. */
  4824. if (tmp)
  4825. start_unlink_async(fusbh200, qh);
  4826. /* FALL THROUGH */
  4827. case QH_STATE_UNLINK: /* wait for hw to finish? */
  4828. case QH_STATE_UNLINK_WAIT:
  4829. idle_timeout:
  4830. spin_unlock_irqrestore (&fusbh200->lock, flags);
  4831. schedule_timeout_uninterruptible(1);
  4832. goto rescan;
  4833. case QH_STATE_IDLE: /* fully unlinked */
  4834. if (qh->clearing_tt)
  4835. goto idle_timeout;
  4836. if (list_empty (&qh->qtd_list)) {
  4837. qh_destroy(fusbh200, qh);
  4838. break;
  4839. }
  4840. /* else FALL THROUGH */
  4841. default:
  4842. /* caller was supposed to have unlinked any requests;
  4843. * that's not our job. just leak this memory.
  4844. */
  4845. fusbh200_err (fusbh200, "qh %p (#%02x) state %d%s\n",
  4846. qh, ep->desc.bEndpointAddress, qh->qh_state,
  4847. list_empty (&qh->qtd_list) ? "" : "(has tds)");
  4848. break;
  4849. }
  4850. done:
  4851. ep->hcpriv = NULL;
  4852. spin_unlock_irqrestore (&fusbh200->lock, flags);
  4853. }
  4854. static void
  4855. fusbh200_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
  4856. {
  4857. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200(hcd);
  4858. struct fusbh200_qh *qh;
  4859. int eptype = usb_endpoint_type(&ep->desc);
  4860. int epnum = usb_endpoint_num(&ep->desc);
  4861. int is_out = usb_endpoint_dir_out(&ep->desc);
  4862. unsigned long flags;
  4863. if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
  4864. return;
  4865. spin_lock_irqsave(&fusbh200->lock, flags);
  4866. qh = ep->hcpriv;
  4867. /* For Bulk and Interrupt endpoints we maintain the toggle state
  4868. * in the hardware; the toggle bits in udev aren't used at all.
  4869. * When an endpoint is reset by usb_clear_halt() we must reset
  4870. * the toggle bit in the QH.
  4871. */
  4872. if (qh) {
  4873. usb_settoggle(qh->dev, epnum, is_out, 0);
  4874. if (!list_empty(&qh->qtd_list)) {
  4875. WARN_ONCE(1, "clear_halt for a busy endpoint\n");
  4876. } else if (qh->qh_state == QH_STATE_LINKED ||
  4877. qh->qh_state == QH_STATE_COMPLETING) {
  4878. /* The toggle value in the QH can't be updated
  4879. * while the QH is active. Unlink it now;
  4880. * re-linking will call qh_refresh().
  4881. */
  4882. if (eptype == USB_ENDPOINT_XFER_BULK)
  4883. start_unlink_async(fusbh200, qh);
  4884. else
  4885. start_unlink_intr(fusbh200, qh);
  4886. }
  4887. }
  4888. spin_unlock_irqrestore(&fusbh200->lock, flags);
  4889. }
  4890. static int fusbh200_get_frame (struct usb_hcd *hcd)
  4891. {
  4892. struct fusbh200_hcd *fusbh200 = hcd_to_fusbh200 (hcd);
  4893. return (fusbh200_read_frame_index(fusbh200) >> 3) % fusbh200->periodic_size;
  4894. }
  4895. /*-------------------------------------------------------------------------*/
  4896. /*
  4897. * The EHCI in ChipIdea HDRC cannot be a separate module or device,
  4898. * because its registers (and irq) are shared between host/gadget/otg
  4899. * functions and in order to facilitate role switching we cannot
  4900. * give the fusbh200 driver exclusive access to those.
  4901. */
  4902. MODULE_DESCRIPTION(DRIVER_DESC);
  4903. MODULE_AUTHOR (DRIVER_AUTHOR);
  4904. MODULE_LICENSE ("GPL");
  4905. static const struct hc_driver fusbh200_fusbh200_hc_driver = {
  4906. .description = hcd_name,
  4907. .product_desc = "Faraday USB2.0 Host Controller",
  4908. .hcd_priv_size = sizeof(struct fusbh200_hcd),
  4909. /*
  4910. * generic hardware linkage
  4911. */
  4912. .irq = fusbh200_irq,
  4913. .flags = HCD_MEMORY | HCD_USB2,
  4914. /*
  4915. * basic lifecycle operations
  4916. */
  4917. .reset = hcd_fusbh200_init,
  4918. .start = fusbh200_run,
  4919. .stop = fusbh200_stop,
  4920. .shutdown = fusbh200_shutdown,
  4921. /*
  4922. * managing i/o requests and associated device resources
  4923. */
  4924. .urb_enqueue = fusbh200_urb_enqueue,
  4925. .urb_dequeue = fusbh200_urb_dequeue,
  4926. .endpoint_disable = fusbh200_endpoint_disable,
  4927. .endpoint_reset = fusbh200_endpoint_reset,
  4928. /*
  4929. * scheduling support
  4930. */
  4931. .get_frame_number = fusbh200_get_frame,
  4932. /*
  4933. * root hub support
  4934. */
  4935. .hub_status_data = fusbh200_hub_status_data,
  4936. .hub_control = fusbh200_hub_control,
  4937. .bus_suspend = fusbh200_bus_suspend,
  4938. .bus_resume = fusbh200_bus_resume,
  4939. .relinquish_port = fusbh200_relinquish_port,
  4940. .port_handed_over = fusbh200_port_handed_over,
  4941. .clear_tt_buffer_complete = fusbh200_clear_tt_buffer_complete,
  4942. };
  4943. static void fusbh200_init(struct fusbh200_hcd *fusbh200)
  4944. {
  4945. u32 reg;
  4946. reg = fusbh200_readl(fusbh200, &fusbh200->regs->bmcsr);
  4947. reg |= BMCSR_INT_POLARITY;
  4948. reg &= ~BMCSR_VBUS_OFF;
  4949. fusbh200_writel(fusbh200, reg, &fusbh200->regs->bmcsr);
  4950. reg = fusbh200_readl(fusbh200, &fusbh200->regs->bmier);
  4951. fusbh200_writel(fusbh200, reg | BMIER_OVC_EN | BMIER_VBUS_ERR_EN,
  4952. &fusbh200->regs->bmier);
  4953. }
  4954. /**
  4955. * fusbh200_hcd_probe - initialize faraday FUSBH200 HCDs
  4956. *
  4957. * Allocates basic resources for this USB host controller, and
  4958. * then invokes the start() method for the HCD associated with it
  4959. * through the hotplug entry's driver_data.
  4960. */
  4961. static int fusbh200_hcd_probe(struct platform_device *pdev)
  4962. {
  4963. struct device *dev = &pdev->dev;
  4964. struct usb_hcd *hcd;
  4965. struct resource *res;
  4966. int irq;
  4967. int retval = -ENODEV;
  4968. struct fusbh200_hcd *fusbh200;
  4969. if (usb_disabled())
  4970. return -ENODEV;
  4971. pdev->dev.power.power_state = PMSG_ON;
  4972. res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  4973. if (!res) {
  4974. dev_err(dev,
  4975. "Found HC with no IRQ. Check %s setup!\n",
  4976. dev_name(dev));
  4977. return -ENODEV;
  4978. }
  4979. irq = res->start;
  4980. hcd = usb_create_hcd(&fusbh200_fusbh200_hc_driver, dev,
  4981. dev_name(dev));
  4982. if (!hcd) {
  4983. dev_err(dev, "failed to create hcd with err %d\n", retval);
  4984. retval = -ENOMEM;
  4985. goto fail_create_hcd;
  4986. }
  4987. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  4988. if (!res) {
  4989. dev_err(dev,
  4990. "Found HC with no register addr. Check %s setup!\n",
  4991. dev_name(dev));
  4992. retval = -ENODEV;
  4993. goto fail_request_resource;
  4994. }
  4995. hcd->rsrc_start = res->start;
  4996. hcd->rsrc_len = resource_size(res);
  4997. hcd->has_tt = 1;
  4998. if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len,
  4999. fusbh200_fusbh200_hc_driver.description)) {
  5000. dev_dbg(dev, "controller already in use\n");
  5001. retval = -EBUSY;
  5002. goto fail_request_resource;
  5003. }
  5004. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  5005. if (!res) {
  5006. dev_err(dev,
  5007. "Found HC with no register addr. Check %s setup!\n",
  5008. dev_name(dev));
  5009. retval = -ENODEV;
  5010. goto fail_request_resource;
  5011. }
  5012. hcd->regs = ioremap_nocache(res->start, resource_size(res));
  5013. if (hcd->regs == NULL) {
  5014. dev_dbg(dev, "error mapping memory\n");
  5015. retval = -EFAULT;
  5016. goto fail_ioremap;
  5017. }
  5018. fusbh200 = hcd_to_fusbh200(hcd);
  5019. fusbh200->caps = hcd->regs;
  5020. retval = fusbh200_setup(hcd);
  5021. if (retval)
  5022. goto fail_add_hcd;
  5023. fusbh200_init(fusbh200);
  5024. retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
  5025. if (retval) {
  5026. dev_err(dev, "failed to add hcd with err %d\n", retval);
  5027. goto fail_add_hcd;
  5028. }
  5029. return retval;
  5030. fail_add_hcd:
  5031. iounmap(hcd->regs);
  5032. fail_ioremap:
  5033. release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
  5034. fail_request_resource:
  5035. usb_put_hcd(hcd);
  5036. fail_create_hcd:
  5037. dev_err(dev, "init %s fail, %d\n", dev_name(dev), retval);
  5038. return retval;
  5039. }
  5040. /**
  5041. * fusbh200_hcd_remove - shutdown processing for EHCI HCDs
  5042. * @dev: USB Host Controller being removed
  5043. *
  5044. * Reverses the effect of fotg2xx_usb_hcd_probe(), first invoking
  5045. * the HCD's stop() method. It is always called from a thread
  5046. * context, normally "rmmod", "apmd", or something similar.
  5047. */
  5048. static int fusbh200_hcd_remove(struct platform_device *pdev)
  5049. {
  5050. struct device *dev = &pdev->dev;
  5051. struct usb_hcd *hcd = dev_get_drvdata(dev);
  5052. if (!hcd)
  5053. return 0;
  5054. usb_remove_hcd(hcd);
  5055. iounmap(hcd->regs);
  5056. release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
  5057. usb_put_hcd(hcd);
  5058. return 0;
  5059. }
  5060. static struct platform_driver fusbh200_hcd_fusbh200_driver = {
  5061. .driver = {
  5062. .name = "fusbh200",
  5063. },
  5064. .probe = fusbh200_hcd_probe,
  5065. .remove = fusbh200_hcd_remove,
  5066. };
  5067. static int __init fusbh200_hcd_init(void)
  5068. {
  5069. int retval = 0;
  5070. if (usb_disabled())
  5071. return -ENODEV;
  5072. printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
  5073. set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
  5074. if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
  5075. test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
  5076. printk(KERN_WARNING "Warning! fusbh200_hcd should always be loaded"
  5077. " before uhci_hcd and ohci_hcd, not after\n");
  5078. pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd\n",
  5079. hcd_name,
  5080. sizeof(struct fusbh200_qh), sizeof(struct fusbh200_qtd),
  5081. sizeof(struct fusbh200_itd));
  5082. #ifdef DEBUG
  5083. fusbh200_debug_root = debugfs_create_dir("fusbh200", usb_debug_root);
  5084. if (!fusbh200_debug_root) {
  5085. retval = -ENOENT;
  5086. goto err_debug;
  5087. }
  5088. #endif
  5089. retval = platform_driver_register(&fusbh200_hcd_fusbh200_driver);
  5090. if (retval < 0)
  5091. goto clean;
  5092. return retval;
  5093. platform_driver_unregister(&fusbh200_hcd_fusbh200_driver);
  5094. clean:
  5095. #ifdef DEBUG
  5096. debugfs_remove(fusbh200_debug_root);
  5097. fusbh200_debug_root = NULL;
  5098. err_debug:
  5099. #endif
  5100. clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
  5101. return retval;
  5102. }
  5103. module_init(fusbh200_hcd_init);
  5104. static void __exit fusbh200_hcd_cleanup(void)
  5105. {
  5106. platform_driver_unregister(&fusbh200_hcd_fusbh200_driver);
  5107. #ifdef DEBUG
  5108. debugfs_remove(fusbh200_debug_root);
  5109. #endif
  5110. clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
  5111. }
  5112. module_exit(fusbh200_hcd_cleanup);