udc.c 45 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891
  1. /*
  2. * udc.c - ChipIdea UDC driver
  3. *
  4. * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
  5. *
  6. * Author: David Lopo
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/device.h>
  14. #include <linux/dmapool.h>
  15. #include <linux/err.h>
  16. #include <linux/irqreturn.h>
  17. #include <linux/kernel.h>
  18. #include <linux/slab.h>
  19. #include <linux/pm_runtime.h>
  20. #include <linux/usb/ch9.h>
  21. #include <linux/usb/gadget.h>
  22. #include <linux/usb/otg.h>
  23. #include <linux/usb/chipidea.h>
  24. #include "ci.h"
  25. #include "udc.h"
  26. #include "bits.h"
  27. #include "debug.h"
  28. /* control endpoint description */
  29. static const struct usb_endpoint_descriptor
  30. ctrl_endpt_out_desc = {
  31. .bLength = USB_DT_ENDPOINT_SIZE,
  32. .bDescriptorType = USB_DT_ENDPOINT,
  33. .bEndpointAddress = USB_DIR_OUT,
  34. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  35. .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
  36. };
  37. static const struct usb_endpoint_descriptor
  38. ctrl_endpt_in_desc = {
  39. .bLength = USB_DT_ENDPOINT_SIZE,
  40. .bDescriptorType = USB_DT_ENDPOINT,
  41. .bEndpointAddress = USB_DIR_IN,
  42. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  43. .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
  44. };
  45. /**
  46. * hw_ep_bit: calculates the bit number
  47. * @num: endpoint number
  48. * @dir: endpoint direction
  49. *
  50. * This function returns bit number
  51. */
  52. static inline int hw_ep_bit(int num, int dir)
  53. {
  54. return num + (dir ? 16 : 0);
  55. }
  56. static inline int ep_to_bit(struct ci_hdrc *ci, int n)
  57. {
  58. int fill = 16 - ci->hw_ep_max / 2;
  59. if (n >= ci->hw_ep_max / 2)
  60. n += fill;
  61. return n;
  62. }
  63. /**
  64. * hw_device_state: enables/disables interrupts (execute without interruption)
  65. * @dma: 0 => disable, !0 => enable and set dma engine
  66. *
  67. * This function returns an error code
  68. */
  69. static int hw_device_state(struct ci_hdrc *ci, u32 dma)
  70. {
  71. if (dma) {
  72. hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
  73. /* interrupt, error, port change, reset, sleep/suspend */
  74. hw_write(ci, OP_USBINTR, ~0,
  75. USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
  76. } else {
  77. hw_write(ci, OP_USBINTR, ~0, 0);
  78. }
  79. return 0;
  80. }
  81. /**
  82. * hw_ep_flush: flush endpoint fifo (execute without interruption)
  83. * @num: endpoint number
  84. * @dir: endpoint direction
  85. *
  86. * This function returns an error code
  87. */
  88. static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
  89. {
  90. int n = hw_ep_bit(num, dir);
  91. do {
  92. /* flush any pending transfer */
  93. hw_write(ci, OP_ENDPTFLUSH, BIT(n), BIT(n));
  94. while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
  95. cpu_relax();
  96. } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
  97. return 0;
  98. }
  99. /**
  100. * hw_ep_disable: disables endpoint (execute without interruption)
  101. * @num: endpoint number
  102. * @dir: endpoint direction
  103. *
  104. * This function returns an error code
  105. */
  106. static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
  107. {
  108. hw_ep_flush(ci, num, dir);
  109. hw_write(ci, OP_ENDPTCTRL + num,
  110. dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
  111. return 0;
  112. }
  113. /**
  114. * hw_ep_enable: enables endpoint (execute without interruption)
  115. * @num: endpoint number
  116. * @dir: endpoint direction
  117. * @type: endpoint type
  118. *
  119. * This function returns an error code
  120. */
  121. static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
  122. {
  123. u32 mask, data;
  124. if (dir) {
  125. mask = ENDPTCTRL_TXT; /* type */
  126. data = type << __ffs(mask);
  127. mask |= ENDPTCTRL_TXS; /* unstall */
  128. mask |= ENDPTCTRL_TXR; /* reset data toggle */
  129. data |= ENDPTCTRL_TXR;
  130. mask |= ENDPTCTRL_TXE; /* enable */
  131. data |= ENDPTCTRL_TXE;
  132. } else {
  133. mask = ENDPTCTRL_RXT; /* type */
  134. data = type << __ffs(mask);
  135. mask |= ENDPTCTRL_RXS; /* unstall */
  136. mask |= ENDPTCTRL_RXR; /* reset data toggle */
  137. data |= ENDPTCTRL_RXR;
  138. mask |= ENDPTCTRL_RXE; /* enable */
  139. data |= ENDPTCTRL_RXE;
  140. }
  141. hw_write(ci, OP_ENDPTCTRL + num, mask, data);
  142. return 0;
  143. }
  144. /**
  145. * hw_ep_get_halt: return endpoint halt status
  146. * @num: endpoint number
  147. * @dir: endpoint direction
  148. *
  149. * This function returns 1 if endpoint halted
  150. */
  151. static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
  152. {
  153. u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
  154. return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
  155. }
  156. /**
  157. * hw_test_and_clear_setup_status: test & clear setup status (execute without
  158. * interruption)
  159. * @n: endpoint number
  160. *
  161. * This function returns setup status
  162. */
  163. static int hw_test_and_clear_setup_status(struct ci_hdrc *ci, int n)
  164. {
  165. n = ep_to_bit(ci, n);
  166. return hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(n));
  167. }
  168. /**
  169. * hw_ep_prime: primes endpoint (execute without interruption)
  170. * @num: endpoint number
  171. * @dir: endpoint direction
  172. * @is_ctrl: true if control endpoint
  173. *
  174. * This function returns an error code
  175. */
  176. static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
  177. {
  178. int n = hw_ep_bit(num, dir);
  179. if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
  180. return -EAGAIN;
  181. hw_write(ci, OP_ENDPTPRIME, BIT(n), BIT(n));
  182. while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
  183. cpu_relax();
  184. if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
  185. return -EAGAIN;
  186. /* status shoult be tested according with manual but it doesn't work */
  187. return 0;
  188. }
  189. /**
  190. * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
  191. * without interruption)
  192. * @num: endpoint number
  193. * @dir: endpoint direction
  194. * @value: true => stall, false => unstall
  195. *
  196. * This function returns an error code
  197. */
  198. static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
  199. {
  200. if (value != 0 && value != 1)
  201. return -EINVAL;
  202. do {
  203. enum ci_hw_regs reg = OP_ENDPTCTRL + num;
  204. u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
  205. u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
  206. /* data toggle - reserved for EP0 but it's in ESS */
  207. hw_write(ci, reg, mask_xs|mask_xr,
  208. value ? mask_xs : mask_xr);
  209. } while (value != hw_ep_get_halt(ci, num, dir));
  210. return 0;
  211. }
  212. /**
  213. * hw_is_port_high_speed: test if port is high speed
  214. *
  215. * This function returns true if high speed port
  216. */
  217. static int hw_port_is_high_speed(struct ci_hdrc *ci)
  218. {
  219. return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
  220. hw_read(ci, OP_PORTSC, PORTSC_HSP);
  221. }
  222. /**
  223. * hw_read_intr_enable: returns interrupt enable register
  224. *
  225. * This function returns register data
  226. */
  227. static u32 hw_read_intr_enable(struct ci_hdrc *ci)
  228. {
  229. return hw_read(ci, OP_USBINTR, ~0);
  230. }
  231. /**
  232. * hw_read_intr_status: returns interrupt status register
  233. *
  234. * This function returns register data
  235. */
  236. static u32 hw_read_intr_status(struct ci_hdrc *ci)
  237. {
  238. return hw_read(ci, OP_USBSTS, ~0);
  239. }
  240. /**
  241. * hw_test_and_clear_complete: test & clear complete status (execute without
  242. * interruption)
  243. * @n: endpoint number
  244. *
  245. * This function returns complete status
  246. */
  247. static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
  248. {
  249. n = ep_to_bit(ci, n);
  250. return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
  251. }
  252. /**
  253. * hw_test_and_clear_intr_active: test & clear active interrupts (execute
  254. * without interruption)
  255. *
  256. * This function returns active interrutps
  257. */
  258. static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
  259. {
  260. u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
  261. hw_write(ci, OP_USBSTS, ~0, reg);
  262. return reg;
  263. }
  264. /**
  265. * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
  266. * interruption)
  267. *
  268. * This function returns guard value
  269. */
  270. static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
  271. {
  272. return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
  273. }
  274. /**
  275. * hw_test_and_set_setup_guard: test & set setup guard (execute without
  276. * interruption)
  277. *
  278. * This function returns guard value
  279. */
  280. static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
  281. {
  282. return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
  283. }
  284. /**
  285. * hw_usb_set_address: configures USB address (execute without interruption)
  286. * @value: new USB address
  287. *
  288. * This function explicitly sets the address, without the "USBADRA" (advance)
  289. * feature, which is not supported by older versions of the controller.
  290. */
  291. static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
  292. {
  293. hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
  294. value << __ffs(DEVICEADDR_USBADR));
  295. }
  296. /**
  297. * hw_usb_reset: restart device after a bus reset (execute without
  298. * interruption)
  299. *
  300. * This function returns an error code
  301. */
  302. static int hw_usb_reset(struct ci_hdrc *ci)
  303. {
  304. hw_usb_set_address(ci, 0);
  305. /* ESS flushes only at end?!? */
  306. hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
  307. /* clear setup token semaphores */
  308. hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
  309. /* clear complete status */
  310. hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
  311. /* wait until all bits cleared */
  312. while (hw_read(ci, OP_ENDPTPRIME, ~0))
  313. udelay(10); /* not RTOS friendly */
  314. /* reset all endpoints ? */
  315. /* reset internal status and wait for further instructions
  316. no need to verify the port reset status (ESS does it) */
  317. return 0;
  318. }
  319. /******************************************************************************
  320. * UTIL block
  321. *****************************************************************************/
  322. static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
  323. unsigned length)
  324. {
  325. int i;
  326. u32 temp;
  327. struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
  328. GFP_ATOMIC);
  329. if (node == NULL)
  330. return -ENOMEM;
  331. node->ptr = dma_pool_alloc(hwep->td_pool, GFP_ATOMIC,
  332. &node->dma);
  333. if (node->ptr == NULL) {
  334. kfree(node);
  335. return -ENOMEM;
  336. }
  337. memset(node->ptr, 0, sizeof(struct ci_hw_td));
  338. node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
  339. node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
  340. node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
  341. temp = (u32) (hwreq->req.dma + hwreq->req.actual);
  342. if (length) {
  343. node->ptr->page[0] = cpu_to_le32(temp);
  344. for (i = 1; i < TD_PAGE_COUNT; i++) {
  345. u32 page = temp + i * CI_HDRC_PAGE_SIZE;
  346. page &= ~TD_RESERVED_MASK;
  347. node->ptr->page[i] = cpu_to_le32(page);
  348. }
  349. }
  350. hwreq->req.actual += length;
  351. if (!list_empty(&hwreq->tds)) {
  352. /* get the last entry */
  353. lastnode = list_entry(hwreq->tds.prev,
  354. struct td_node, td);
  355. lastnode->ptr->next = cpu_to_le32(node->dma);
  356. }
  357. INIT_LIST_HEAD(&node->td);
  358. list_add_tail(&node->td, &hwreq->tds);
  359. return 0;
  360. }
  361. /**
  362. * _usb_addr: calculates endpoint address from direction & number
  363. * @ep: endpoint
  364. */
  365. static inline u8 _usb_addr(struct ci_hw_ep *ep)
  366. {
  367. return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
  368. }
  369. /**
  370. * _hardware_queue: configures a request at hardware level
  371. * @gadget: gadget
  372. * @hwep: endpoint
  373. *
  374. * This function returns an error code
  375. */
  376. static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
  377. {
  378. struct ci_hdrc *ci = hwep->ci;
  379. int ret = 0;
  380. unsigned rest = hwreq->req.length;
  381. int pages = TD_PAGE_COUNT;
  382. struct td_node *firstnode, *lastnode;
  383. /* don't queue twice */
  384. if (hwreq->req.status == -EALREADY)
  385. return -EALREADY;
  386. hwreq->req.status = -EALREADY;
  387. ret = usb_gadget_map_request(&ci->gadget, &hwreq->req, hwep->dir);
  388. if (ret)
  389. return ret;
  390. /*
  391. * The first buffer could be not page aligned.
  392. * In that case we have to span into one extra td.
  393. */
  394. if (hwreq->req.dma % PAGE_SIZE)
  395. pages--;
  396. if (rest == 0)
  397. add_td_to_list(hwep, hwreq, 0);
  398. while (rest > 0) {
  399. unsigned count = min(hwreq->req.length - hwreq->req.actual,
  400. (unsigned)(pages * CI_HDRC_PAGE_SIZE));
  401. add_td_to_list(hwep, hwreq, count);
  402. rest -= count;
  403. }
  404. if (hwreq->req.zero && hwreq->req.length
  405. && (hwreq->req.length % hwep->ep.maxpacket == 0))
  406. add_td_to_list(hwep, hwreq, 0);
  407. firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
  408. lastnode = list_entry(hwreq->tds.prev,
  409. struct td_node, td);
  410. lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
  411. if (!hwreq->req.no_interrupt)
  412. lastnode->ptr->token |= cpu_to_le32(TD_IOC);
  413. wmb();
  414. hwreq->req.actual = 0;
  415. if (!list_empty(&hwep->qh.queue)) {
  416. struct ci_hw_req *hwreqprev;
  417. int n = hw_ep_bit(hwep->num, hwep->dir);
  418. int tmp_stat;
  419. struct td_node *prevlastnode;
  420. u32 next = firstnode->dma & TD_ADDR_MASK;
  421. hwreqprev = list_entry(hwep->qh.queue.prev,
  422. struct ci_hw_req, queue);
  423. prevlastnode = list_entry(hwreqprev->tds.prev,
  424. struct td_node, td);
  425. prevlastnode->ptr->next = cpu_to_le32(next);
  426. wmb();
  427. if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
  428. goto done;
  429. do {
  430. hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
  431. tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
  432. } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
  433. hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
  434. if (tmp_stat)
  435. goto done;
  436. }
  437. /* QH configuration */
  438. hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
  439. hwep->qh.ptr->td.token &=
  440. cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
  441. if (hwep->type == USB_ENDPOINT_XFER_ISOC) {
  442. u32 mul = hwreq->req.length / hwep->ep.maxpacket;
  443. if (hwreq->req.length % hwep->ep.maxpacket)
  444. mul++;
  445. hwep->qh.ptr->cap |= mul << __ffs(QH_MULT);
  446. }
  447. wmb(); /* synchronize before ep prime */
  448. ret = hw_ep_prime(ci, hwep->num, hwep->dir,
  449. hwep->type == USB_ENDPOINT_XFER_CONTROL);
  450. done:
  451. return ret;
  452. }
  453. /*
  454. * free_pending_td: remove a pending request for the endpoint
  455. * @hwep: endpoint
  456. */
  457. static void free_pending_td(struct ci_hw_ep *hwep)
  458. {
  459. struct td_node *pending = hwep->pending_td;
  460. dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
  461. hwep->pending_td = NULL;
  462. kfree(pending);
  463. }
  464. /**
  465. * _hardware_dequeue: handles a request at hardware level
  466. * @gadget: gadget
  467. * @hwep: endpoint
  468. *
  469. * This function returns an error code
  470. */
  471. static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
  472. {
  473. u32 tmptoken;
  474. struct td_node *node, *tmpnode;
  475. unsigned remaining_length;
  476. unsigned actual = hwreq->req.length;
  477. if (hwreq->req.status != -EALREADY)
  478. return -EINVAL;
  479. hwreq->req.status = 0;
  480. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  481. tmptoken = le32_to_cpu(node->ptr->token);
  482. if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
  483. hwreq->req.status = -EALREADY;
  484. return -EBUSY;
  485. }
  486. remaining_length = (tmptoken & TD_TOTAL_BYTES);
  487. remaining_length >>= __ffs(TD_TOTAL_BYTES);
  488. actual -= remaining_length;
  489. hwreq->req.status = tmptoken & TD_STATUS;
  490. if ((TD_STATUS_HALTED & hwreq->req.status)) {
  491. hwreq->req.status = -EPIPE;
  492. break;
  493. } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
  494. hwreq->req.status = -EPROTO;
  495. break;
  496. } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
  497. hwreq->req.status = -EILSEQ;
  498. break;
  499. }
  500. if (remaining_length) {
  501. if (hwep->dir) {
  502. hwreq->req.status = -EPROTO;
  503. break;
  504. }
  505. }
  506. /*
  507. * As the hardware could still address the freed td
  508. * which will run the udc unusable, the cleanup of the
  509. * td has to be delayed by one.
  510. */
  511. if (hwep->pending_td)
  512. free_pending_td(hwep);
  513. hwep->pending_td = node;
  514. list_del_init(&node->td);
  515. }
  516. usb_gadget_unmap_request(&hwep->ci->gadget, &hwreq->req, hwep->dir);
  517. hwreq->req.actual += actual;
  518. if (hwreq->req.status)
  519. return hwreq->req.status;
  520. return hwreq->req.actual;
  521. }
  522. /**
  523. * _ep_nuke: dequeues all endpoint requests
  524. * @hwep: endpoint
  525. *
  526. * This function returns an error code
  527. * Caller must hold lock
  528. */
  529. static int _ep_nuke(struct ci_hw_ep *hwep)
  530. __releases(hwep->lock)
  531. __acquires(hwep->lock)
  532. {
  533. struct td_node *node, *tmpnode;
  534. if (hwep == NULL)
  535. return -EINVAL;
  536. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  537. while (!list_empty(&hwep->qh.queue)) {
  538. /* pop oldest request */
  539. struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
  540. struct ci_hw_req, queue);
  541. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  542. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  543. list_del_init(&node->td);
  544. node->ptr = NULL;
  545. kfree(node);
  546. }
  547. list_del_init(&hwreq->queue);
  548. hwreq->req.status = -ESHUTDOWN;
  549. if (hwreq->req.complete != NULL) {
  550. spin_unlock(hwep->lock);
  551. hwreq->req.complete(&hwep->ep, &hwreq->req);
  552. spin_lock(hwep->lock);
  553. }
  554. }
  555. if (hwep->pending_td)
  556. free_pending_td(hwep);
  557. return 0;
  558. }
  559. /**
  560. * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
  561. * @gadget: gadget
  562. *
  563. * This function returns an error code
  564. */
  565. static int _gadget_stop_activity(struct usb_gadget *gadget)
  566. {
  567. struct usb_ep *ep;
  568. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  569. unsigned long flags;
  570. spin_lock_irqsave(&ci->lock, flags);
  571. ci->gadget.speed = USB_SPEED_UNKNOWN;
  572. ci->remote_wakeup = 0;
  573. ci->suspended = 0;
  574. spin_unlock_irqrestore(&ci->lock, flags);
  575. /* flush all endpoints */
  576. gadget_for_each_ep(ep, gadget) {
  577. usb_ep_fifo_flush(ep);
  578. }
  579. usb_ep_fifo_flush(&ci->ep0out->ep);
  580. usb_ep_fifo_flush(&ci->ep0in->ep);
  581. if (ci->driver)
  582. ci->driver->disconnect(gadget);
  583. /* make sure to disable all endpoints */
  584. gadget_for_each_ep(ep, gadget) {
  585. usb_ep_disable(ep);
  586. }
  587. if (ci->status != NULL) {
  588. usb_ep_free_request(&ci->ep0in->ep, ci->status);
  589. ci->status = NULL;
  590. }
  591. return 0;
  592. }
  593. /******************************************************************************
  594. * ISR block
  595. *****************************************************************************/
  596. /**
  597. * isr_reset_handler: USB reset interrupt handler
  598. * @ci: UDC device
  599. *
  600. * This function resets USB engine after a bus reset occurred
  601. */
  602. static void isr_reset_handler(struct ci_hdrc *ci)
  603. __releases(ci->lock)
  604. __acquires(ci->lock)
  605. {
  606. int retval;
  607. spin_unlock(&ci->lock);
  608. retval = _gadget_stop_activity(&ci->gadget);
  609. if (retval)
  610. goto done;
  611. retval = hw_usb_reset(ci);
  612. if (retval)
  613. goto done;
  614. ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
  615. if (ci->status == NULL)
  616. retval = -ENOMEM;
  617. done:
  618. spin_lock(&ci->lock);
  619. if (retval)
  620. dev_err(ci->dev, "error: %i\n", retval);
  621. }
  622. /**
  623. * isr_get_status_complete: get_status request complete function
  624. * @ep: endpoint
  625. * @req: request handled
  626. *
  627. * Caller must release lock
  628. */
  629. static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
  630. {
  631. if (ep == NULL || req == NULL)
  632. return;
  633. kfree(req->buf);
  634. usb_ep_free_request(ep, req);
  635. }
  636. /**
  637. * _ep_queue: queues (submits) an I/O request to an endpoint
  638. *
  639. * Caller must hold lock
  640. */
  641. static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
  642. gfp_t __maybe_unused gfp_flags)
  643. {
  644. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  645. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  646. struct ci_hdrc *ci = hwep->ci;
  647. int retval = 0;
  648. if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
  649. return -EINVAL;
  650. if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  651. if (req->length)
  652. hwep = (ci->ep0_dir == RX) ?
  653. ci->ep0out : ci->ep0in;
  654. if (!list_empty(&hwep->qh.queue)) {
  655. _ep_nuke(hwep);
  656. retval = -EOVERFLOW;
  657. dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
  658. _usb_addr(hwep));
  659. }
  660. }
  661. if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
  662. hwreq->req.length > (1 + hwep->ep.mult) * hwep->ep.maxpacket) {
  663. dev_err(hwep->ci->dev, "request length too big for isochronous\n");
  664. return -EMSGSIZE;
  665. }
  666. /* first nuke then test link, e.g. previous status has not sent */
  667. if (!list_empty(&hwreq->queue)) {
  668. dev_err(hwep->ci->dev, "request already in queue\n");
  669. return -EBUSY;
  670. }
  671. /* push request */
  672. hwreq->req.status = -EINPROGRESS;
  673. hwreq->req.actual = 0;
  674. retval = _hardware_enqueue(hwep, hwreq);
  675. if (retval == -EALREADY)
  676. retval = 0;
  677. if (!retval)
  678. list_add_tail(&hwreq->queue, &hwep->qh.queue);
  679. return retval;
  680. }
  681. /**
  682. * isr_get_status_response: get_status request response
  683. * @ci: ci struct
  684. * @setup: setup request packet
  685. *
  686. * This function returns an error code
  687. */
  688. static int isr_get_status_response(struct ci_hdrc *ci,
  689. struct usb_ctrlrequest *setup)
  690. __releases(hwep->lock)
  691. __acquires(hwep->lock)
  692. {
  693. struct ci_hw_ep *hwep = ci->ep0in;
  694. struct usb_request *req = NULL;
  695. gfp_t gfp_flags = GFP_ATOMIC;
  696. int dir, num, retval;
  697. if (hwep == NULL || setup == NULL)
  698. return -EINVAL;
  699. spin_unlock(hwep->lock);
  700. req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
  701. spin_lock(hwep->lock);
  702. if (req == NULL)
  703. return -ENOMEM;
  704. req->complete = isr_get_status_complete;
  705. req->length = 2;
  706. req->buf = kzalloc(req->length, gfp_flags);
  707. if (req->buf == NULL) {
  708. retval = -ENOMEM;
  709. goto err_free_req;
  710. }
  711. if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
  712. /* Assume that device is bus powered for now. */
  713. *(u16 *)req->buf = ci->remote_wakeup << 1;
  714. retval = 0;
  715. } else if ((setup->bRequestType & USB_RECIP_MASK) \
  716. == USB_RECIP_ENDPOINT) {
  717. dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
  718. TX : RX;
  719. num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
  720. *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
  721. }
  722. /* else do nothing; reserved for future use */
  723. retval = _ep_queue(&hwep->ep, req, gfp_flags);
  724. if (retval)
  725. goto err_free_buf;
  726. return 0;
  727. err_free_buf:
  728. kfree(req->buf);
  729. err_free_req:
  730. spin_unlock(hwep->lock);
  731. usb_ep_free_request(&hwep->ep, req);
  732. spin_lock(hwep->lock);
  733. return retval;
  734. }
  735. /**
  736. * isr_setup_status_complete: setup_status request complete function
  737. * @ep: endpoint
  738. * @req: request handled
  739. *
  740. * Caller must release lock. Put the port in test mode if test mode
  741. * feature is selected.
  742. */
  743. static void
  744. isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
  745. {
  746. struct ci_hdrc *ci = req->context;
  747. unsigned long flags;
  748. if (ci->setaddr) {
  749. hw_usb_set_address(ci, ci->address);
  750. ci->setaddr = false;
  751. }
  752. spin_lock_irqsave(&ci->lock, flags);
  753. if (ci->test_mode)
  754. hw_port_test_set(ci, ci->test_mode);
  755. spin_unlock_irqrestore(&ci->lock, flags);
  756. }
  757. /**
  758. * isr_setup_status_phase: queues the status phase of a setup transation
  759. * @ci: ci struct
  760. *
  761. * This function returns an error code
  762. */
  763. static int isr_setup_status_phase(struct ci_hdrc *ci)
  764. {
  765. int retval;
  766. struct ci_hw_ep *hwep;
  767. hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
  768. ci->status->context = ci;
  769. ci->status->complete = isr_setup_status_complete;
  770. retval = _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
  771. return retval;
  772. }
  773. /**
  774. * isr_tr_complete_low: transaction complete low level handler
  775. * @hwep: endpoint
  776. *
  777. * This function returns an error code
  778. * Caller must hold lock
  779. */
  780. static int isr_tr_complete_low(struct ci_hw_ep *hwep)
  781. __releases(hwep->lock)
  782. __acquires(hwep->lock)
  783. {
  784. struct ci_hw_req *hwreq, *hwreqtemp;
  785. struct ci_hw_ep *hweptemp = hwep;
  786. int retval = 0;
  787. list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
  788. queue) {
  789. retval = _hardware_dequeue(hwep, hwreq);
  790. if (retval < 0)
  791. break;
  792. list_del_init(&hwreq->queue);
  793. if (hwreq->req.complete != NULL) {
  794. spin_unlock(hwep->lock);
  795. if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
  796. hwreq->req.length)
  797. hweptemp = hwep->ci->ep0in;
  798. hwreq->req.complete(&hweptemp->ep, &hwreq->req);
  799. spin_lock(hwep->lock);
  800. }
  801. }
  802. if (retval == -EBUSY)
  803. retval = 0;
  804. return retval;
  805. }
  806. /**
  807. * isr_tr_complete_handler: transaction complete interrupt handler
  808. * @ci: UDC descriptor
  809. *
  810. * This function handles traffic events
  811. */
  812. static void isr_tr_complete_handler(struct ci_hdrc *ci)
  813. __releases(ci->lock)
  814. __acquires(ci->lock)
  815. {
  816. unsigned i;
  817. u8 tmode = 0;
  818. for (i = 0; i < ci->hw_ep_max; i++) {
  819. struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
  820. int type, num, dir, err = -EINVAL;
  821. struct usb_ctrlrequest req;
  822. if (hwep->ep.desc == NULL)
  823. continue; /* not configured */
  824. if (hw_test_and_clear_complete(ci, i)) {
  825. err = isr_tr_complete_low(hwep);
  826. if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  827. if (err > 0) /* needs status phase */
  828. err = isr_setup_status_phase(ci);
  829. if (err < 0) {
  830. spin_unlock(&ci->lock);
  831. if (usb_ep_set_halt(&hwep->ep))
  832. dev_err(ci->dev,
  833. "error: ep_set_halt\n");
  834. spin_lock(&ci->lock);
  835. }
  836. }
  837. }
  838. if (hwep->type != USB_ENDPOINT_XFER_CONTROL ||
  839. !hw_test_and_clear_setup_status(ci, i))
  840. continue;
  841. if (i != 0) {
  842. dev_warn(ci->dev, "ctrl traffic at endpoint %d\n", i);
  843. continue;
  844. }
  845. /*
  846. * Flush data and handshake transactions of previous
  847. * setup packet.
  848. */
  849. _ep_nuke(ci->ep0out);
  850. _ep_nuke(ci->ep0in);
  851. /* read_setup_packet */
  852. do {
  853. hw_test_and_set_setup_guard(ci);
  854. memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
  855. } while (!hw_test_and_clear_setup_guard(ci));
  856. type = req.bRequestType;
  857. ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
  858. switch (req.bRequest) {
  859. case USB_REQ_CLEAR_FEATURE:
  860. if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
  861. le16_to_cpu(req.wValue) ==
  862. USB_ENDPOINT_HALT) {
  863. if (req.wLength != 0)
  864. break;
  865. num = le16_to_cpu(req.wIndex);
  866. dir = num & USB_ENDPOINT_DIR_MASK;
  867. num &= USB_ENDPOINT_NUMBER_MASK;
  868. if (dir) /* TX */
  869. num += ci->hw_ep_max/2;
  870. if (!ci->ci_hw_ep[num].wedge) {
  871. spin_unlock(&ci->lock);
  872. err = usb_ep_clear_halt(
  873. &ci->ci_hw_ep[num].ep);
  874. spin_lock(&ci->lock);
  875. if (err)
  876. break;
  877. }
  878. err = isr_setup_status_phase(ci);
  879. } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
  880. le16_to_cpu(req.wValue) ==
  881. USB_DEVICE_REMOTE_WAKEUP) {
  882. if (req.wLength != 0)
  883. break;
  884. ci->remote_wakeup = 0;
  885. err = isr_setup_status_phase(ci);
  886. } else {
  887. goto delegate;
  888. }
  889. break;
  890. case USB_REQ_GET_STATUS:
  891. if (type != (USB_DIR_IN|USB_RECIP_DEVICE) &&
  892. type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
  893. type != (USB_DIR_IN|USB_RECIP_INTERFACE))
  894. goto delegate;
  895. if (le16_to_cpu(req.wLength) != 2 ||
  896. le16_to_cpu(req.wValue) != 0)
  897. break;
  898. err = isr_get_status_response(ci, &req);
  899. break;
  900. case USB_REQ_SET_ADDRESS:
  901. if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
  902. goto delegate;
  903. if (le16_to_cpu(req.wLength) != 0 ||
  904. le16_to_cpu(req.wIndex) != 0)
  905. break;
  906. ci->address = (u8)le16_to_cpu(req.wValue);
  907. ci->setaddr = true;
  908. err = isr_setup_status_phase(ci);
  909. break;
  910. case USB_REQ_SET_FEATURE:
  911. if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
  912. le16_to_cpu(req.wValue) ==
  913. USB_ENDPOINT_HALT) {
  914. if (req.wLength != 0)
  915. break;
  916. num = le16_to_cpu(req.wIndex);
  917. dir = num & USB_ENDPOINT_DIR_MASK;
  918. num &= USB_ENDPOINT_NUMBER_MASK;
  919. if (dir) /* TX */
  920. num += ci->hw_ep_max/2;
  921. spin_unlock(&ci->lock);
  922. err = usb_ep_set_halt(&ci->ci_hw_ep[num].ep);
  923. spin_lock(&ci->lock);
  924. if (!err)
  925. isr_setup_status_phase(ci);
  926. } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
  927. if (req.wLength != 0)
  928. break;
  929. switch (le16_to_cpu(req.wValue)) {
  930. case USB_DEVICE_REMOTE_WAKEUP:
  931. ci->remote_wakeup = 1;
  932. err = isr_setup_status_phase(ci);
  933. break;
  934. case USB_DEVICE_TEST_MODE:
  935. tmode = le16_to_cpu(req.wIndex) >> 8;
  936. switch (tmode) {
  937. case TEST_J:
  938. case TEST_K:
  939. case TEST_SE0_NAK:
  940. case TEST_PACKET:
  941. case TEST_FORCE_EN:
  942. ci->test_mode = tmode;
  943. err = isr_setup_status_phase(
  944. ci);
  945. break;
  946. default:
  947. break;
  948. }
  949. default:
  950. goto delegate;
  951. }
  952. } else {
  953. goto delegate;
  954. }
  955. break;
  956. default:
  957. delegate:
  958. if (req.wLength == 0) /* no data phase */
  959. ci->ep0_dir = TX;
  960. spin_unlock(&ci->lock);
  961. err = ci->driver->setup(&ci->gadget, &req);
  962. spin_lock(&ci->lock);
  963. break;
  964. }
  965. if (err < 0) {
  966. spin_unlock(&ci->lock);
  967. if (usb_ep_set_halt(&hwep->ep))
  968. dev_err(ci->dev, "error: ep_set_halt\n");
  969. spin_lock(&ci->lock);
  970. }
  971. }
  972. }
  973. /******************************************************************************
  974. * ENDPT block
  975. *****************************************************************************/
  976. /**
  977. * ep_enable: configure endpoint, making it usable
  978. *
  979. * Check usb_ep_enable() at "usb_gadget.h" for details
  980. */
  981. static int ep_enable(struct usb_ep *ep,
  982. const struct usb_endpoint_descriptor *desc)
  983. {
  984. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  985. int retval = 0;
  986. unsigned long flags;
  987. u32 cap = 0;
  988. if (ep == NULL || desc == NULL)
  989. return -EINVAL;
  990. spin_lock_irqsave(hwep->lock, flags);
  991. /* only internal SW should enable ctrl endpts */
  992. hwep->ep.desc = desc;
  993. if (!list_empty(&hwep->qh.queue))
  994. dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
  995. hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
  996. hwep->num = usb_endpoint_num(desc);
  997. hwep->type = usb_endpoint_type(desc);
  998. hwep->ep.maxpacket = usb_endpoint_maxp(desc) & 0x07ff;
  999. hwep->ep.mult = QH_ISO_MULT(usb_endpoint_maxp(desc));
  1000. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  1001. cap |= QH_IOS;
  1002. if (hwep->num)
  1003. cap |= QH_ZLT;
  1004. cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
  1005. hwep->qh.ptr->cap = cpu_to_le32(cap);
  1006. hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
  1007. /*
  1008. * Enable endpoints in the HW other than ep0 as ep0
  1009. * is always enabled
  1010. */
  1011. if (hwep->num)
  1012. retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
  1013. hwep->type);
  1014. spin_unlock_irqrestore(hwep->lock, flags);
  1015. return retval;
  1016. }
  1017. /**
  1018. * ep_disable: endpoint is no longer usable
  1019. *
  1020. * Check usb_ep_disable() at "usb_gadget.h" for details
  1021. */
  1022. static int ep_disable(struct usb_ep *ep)
  1023. {
  1024. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1025. int direction, retval = 0;
  1026. unsigned long flags;
  1027. if (ep == NULL)
  1028. return -EINVAL;
  1029. else if (hwep->ep.desc == NULL)
  1030. return -EBUSY;
  1031. spin_lock_irqsave(hwep->lock, flags);
  1032. /* only internal SW should disable ctrl endpts */
  1033. direction = hwep->dir;
  1034. do {
  1035. retval |= _ep_nuke(hwep);
  1036. retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
  1037. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  1038. hwep->dir = (hwep->dir == TX) ? RX : TX;
  1039. } while (hwep->dir != direction);
  1040. hwep->ep.desc = NULL;
  1041. spin_unlock_irqrestore(hwep->lock, flags);
  1042. return retval;
  1043. }
  1044. /**
  1045. * ep_alloc_request: allocate a request object to use with this endpoint
  1046. *
  1047. * Check usb_ep_alloc_request() at "usb_gadget.h" for details
  1048. */
  1049. static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
  1050. {
  1051. struct ci_hw_req *hwreq = NULL;
  1052. if (ep == NULL)
  1053. return NULL;
  1054. hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
  1055. if (hwreq != NULL) {
  1056. INIT_LIST_HEAD(&hwreq->queue);
  1057. INIT_LIST_HEAD(&hwreq->tds);
  1058. }
  1059. return (hwreq == NULL) ? NULL : &hwreq->req;
  1060. }
  1061. /**
  1062. * ep_free_request: frees a request object
  1063. *
  1064. * Check usb_ep_free_request() at "usb_gadget.h" for details
  1065. */
  1066. static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
  1067. {
  1068. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1069. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  1070. struct td_node *node, *tmpnode;
  1071. unsigned long flags;
  1072. if (ep == NULL || req == NULL) {
  1073. return;
  1074. } else if (!list_empty(&hwreq->queue)) {
  1075. dev_err(hwep->ci->dev, "freeing queued request\n");
  1076. return;
  1077. }
  1078. spin_lock_irqsave(hwep->lock, flags);
  1079. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  1080. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  1081. list_del_init(&node->td);
  1082. node->ptr = NULL;
  1083. kfree(node);
  1084. }
  1085. kfree(hwreq);
  1086. spin_unlock_irqrestore(hwep->lock, flags);
  1087. }
  1088. /**
  1089. * ep_queue: queues (submits) an I/O request to an endpoint
  1090. *
  1091. * Check usb_ep_queue()* at usb_gadget.h" for details
  1092. */
  1093. static int ep_queue(struct usb_ep *ep, struct usb_request *req,
  1094. gfp_t __maybe_unused gfp_flags)
  1095. {
  1096. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1097. int retval = 0;
  1098. unsigned long flags;
  1099. if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
  1100. return -EINVAL;
  1101. spin_lock_irqsave(hwep->lock, flags);
  1102. retval = _ep_queue(ep, req, gfp_flags);
  1103. spin_unlock_irqrestore(hwep->lock, flags);
  1104. return retval;
  1105. }
  1106. /**
  1107. * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
  1108. *
  1109. * Check usb_ep_dequeue() at "usb_gadget.h" for details
  1110. */
  1111. static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
  1112. {
  1113. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1114. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  1115. unsigned long flags;
  1116. if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
  1117. hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
  1118. list_empty(&hwep->qh.queue))
  1119. return -EINVAL;
  1120. spin_lock_irqsave(hwep->lock, flags);
  1121. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  1122. /* pop request */
  1123. list_del_init(&hwreq->queue);
  1124. usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
  1125. req->status = -ECONNRESET;
  1126. if (hwreq->req.complete != NULL) {
  1127. spin_unlock(hwep->lock);
  1128. hwreq->req.complete(&hwep->ep, &hwreq->req);
  1129. spin_lock(hwep->lock);
  1130. }
  1131. spin_unlock_irqrestore(hwep->lock, flags);
  1132. return 0;
  1133. }
  1134. /**
  1135. * ep_set_halt: sets the endpoint halt feature
  1136. *
  1137. * Check usb_ep_set_halt() at "usb_gadget.h" for details
  1138. */
  1139. static int ep_set_halt(struct usb_ep *ep, int value)
  1140. {
  1141. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1142. int direction, retval = 0;
  1143. unsigned long flags;
  1144. if (ep == NULL || hwep->ep.desc == NULL)
  1145. return -EINVAL;
  1146. if (usb_endpoint_xfer_isoc(hwep->ep.desc))
  1147. return -EOPNOTSUPP;
  1148. spin_lock_irqsave(hwep->lock, flags);
  1149. #ifndef STALL_IN
  1150. /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */
  1151. if (value && hwep->type == USB_ENDPOINT_XFER_BULK && hwep->dir == TX &&
  1152. !list_empty(&hwep->qh.queue)) {
  1153. spin_unlock_irqrestore(hwep->lock, flags);
  1154. return -EAGAIN;
  1155. }
  1156. #endif
  1157. direction = hwep->dir;
  1158. do {
  1159. retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
  1160. if (!value)
  1161. hwep->wedge = 0;
  1162. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  1163. hwep->dir = (hwep->dir == TX) ? RX : TX;
  1164. } while (hwep->dir != direction);
  1165. spin_unlock_irqrestore(hwep->lock, flags);
  1166. return retval;
  1167. }
  1168. /**
  1169. * ep_set_wedge: sets the halt feature and ignores clear requests
  1170. *
  1171. * Check usb_ep_set_wedge() at "usb_gadget.h" for details
  1172. */
  1173. static int ep_set_wedge(struct usb_ep *ep)
  1174. {
  1175. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1176. unsigned long flags;
  1177. if (ep == NULL || hwep->ep.desc == NULL)
  1178. return -EINVAL;
  1179. spin_lock_irqsave(hwep->lock, flags);
  1180. hwep->wedge = 1;
  1181. spin_unlock_irqrestore(hwep->lock, flags);
  1182. return usb_ep_set_halt(ep);
  1183. }
  1184. /**
  1185. * ep_fifo_flush: flushes contents of a fifo
  1186. *
  1187. * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
  1188. */
  1189. static void ep_fifo_flush(struct usb_ep *ep)
  1190. {
  1191. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1192. unsigned long flags;
  1193. if (ep == NULL) {
  1194. dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
  1195. return;
  1196. }
  1197. spin_lock_irqsave(hwep->lock, flags);
  1198. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  1199. spin_unlock_irqrestore(hwep->lock, flags);
  1200. }
  1201. /**
  1202. * Endpoint-specific part of the API to the USB controller hardware
  1203. * Check "usb_gadget.h" for details
  1204. */
  1205. static const struct usb_ep_ops usb_ep_ops = {
  1206. .enable = ep_enable,
  1207. .disable = ep_disable,
  1208. .alloc_request = ep_alloc_request,
  1209. .free_request = ep_free_request,
  1210. .queue = ep_queue,
  1211. .dequeue = ep_dequeue,
  1212. .set_halt = ep_set_halt,
  1213. .set_wedge = ep_set_wedge,
  1214. .fifo_flush = ep_fifo_flush,
  1215. };
  1216. /******************************************************************************
  1217. * GADGET block
  1218. *****************************************************************************/
  1219. static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
  1220. {
  1221. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1222. unsigned long flags;
  1223. int gadget_ready = 0;
  1224. if (!(ci->platdata->flags & CI_HDRC_PULLUP_ON_VBUS))
  1225. return -EOPNOTSUPP;
  1226. spin_lock_irqsave(&ci->lock, flags);
  1227. ci->vbus_active = is_active;
  1228. if (ci->driver)
  1229. gadget_ready = 1;
  1230. spin_unlock_irqrestore(&ci->lock, flags);
  1231. if (gadget_ready) {
  1232. if (is_active) {
  1233. pm_runtime_get_sync(&_gadget->dev);
  1234. hw_device_reset(ci, USBMODE_CM_DC);
  1235. hw_device_state(ci, ci->ep0out->qh.dma);
  1236. } else {
  1237. hw_device_state(ci, 0);
  1238. if (ci->platdata->notify_event)
  1239. ci->platdata->notify_event(ci,
  1240. CI_HDRC_CONTROLLER_STOPPED_EVENT);
  1241. _gadget_stop_activity(&ci->gadget);
  1242. pm_runtime_put_sync(&_gadget->dev);
  1243. }
  1244. }
  1245. return 0;
  1246. }
  1247. static int ci_udc_wakeup(struct usb_gadget *_gadget)
  1248. {
  1249. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1250. unsigned long flags;
  1251. int ret = 0;
  1252. spin_lock_irqsave(&ci->lock, flags);
  1253. if (!ci->remote_wakeup) {
  1254. ret = -EOPNOTSUPP;
  1255. goto out;
  1256. }
  1257. if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
  1258. ret = -EINVAL;
  1259. goto out;
  1260. }
  1261. hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
  1262. out:
  1263. spin_unlock_irqrestore(&ci->lock, flags);
  1264. return ret;
  1265. }
  1266. static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
  1267. {
  1268. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1269. if (ci->transceiver)
  1270. return usb_phy_set_power(ci->transceiver, ma);
  1271. return -ENOTSUPP;
  1272. }
  1273. /* Change Data+ pullup status
  1274. * this func is used by usb_gadget_connect/disconnet
  1275. */
  1276. static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
  1277. {
  1278. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1279. if (is_on)
  1280. hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
  1281. else
  1282. hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
  1283. return 0;
  1284. }
  1285. static int ci_udc_start(struct usb_gadget *gadget,
  1286. struct usb_gadget_driver *driver);
  1287. static int ci_udc_stop(struct usb_gadget *gadget,
  1288. struct usb_gadget_driver *driver);
  1289. /**
  1290. * Device operations part of the API to the USB controller hardware,
  1291. * which don't involve endpoints (or i/o)
  1292. * Check "usb_gadget.h" for details
  1293. */
  1294. static const struct usb_gadget_ops usb_gadget_ops = {
  1295. .vbus_session = ci_udc_vbus_session,
  1296. .wakeup = ci_udc_wakeup,
  1297. .pullup = ci_udc_pullup,
  1298. .vbus_draw = ci_udc_vbus_draw,
  1299. .udc_start = ci_udc_start,
  1300. .udc_stop = ci_udc_stop,
  1301. };
  1302. static int init_eps(struct ci_hdrc *ci)
  1303. {
  1304. int retval = 0, i, j;
  1305. for (i = 0; i < ci->hw_ep_max/2; i++)
  1306. for (j = RX; j <= TX; j++) {
  1307. int k = i + j * ci->hw_ep_max/2;
  1308. struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
  1309. scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
  1310. (j == TX) ? "in" : "out");
  1311. hwep->ci = ci;
  1312. hwep->lock = &ci->lock;
  1313. hwep->td_pool = ci->td_pool;
  1314. hwep->ep.name = hwep->name;
  1315. hwep->ep.ops = &usb_ep_ops;
  1316. /*
  1317. * for ep0: maxP defined in desc, for other
  1318. * eps, maxP is set by epautoconfig() called
  1319. * by gadget layer
  1320. */
  1321. hwep->ep.maxpacket = (unsigned short)~0;
  1322. INIT_LIST_HEAD(&hwep->qh.queue);
  1323. hwep->qh.ptr = dma_pool_alloc(ci->qh_pool, GFP_KERNEL,
  1324. &hwep->qh.dma);
  1325. if (hwep->qh.ptr == NULL)
  1326. retval = -ENOMEM;
  1327. else
  1328. memset(hwep->qh.ptr, 0, sizeof(*hwep->qh.ptr));
  1329. /*
  1330. * set up shorthands for ep0 out and in endpoints,
  1331. * don't add to gadget's ep_list
  1332. */
  1333. if (i == 0) {
  1334. if (j == RX)
  1335. ci->ep0out = hwep;
  1336. else
  1337. ci->ep0in = hwep;
  1338. hwep->ep.maxpacket = CTRL_PAYLOAD_MAX;
  1339. continue;
  1340. }
  1341. list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
  1342. }
  1343. return retval;
  1344. }
  1345. static void destroy_eps(struct ci_hdrc *ci)
  1346. {
  1347. int i;
  1348. for (i = 0; i < ci->hw_ep_max; i++) {
  1349. struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
  1350. dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
  1351. }
  1352. }
  1353. /**
  1354. * ci_udc_start: register a gadget driver
  1355. * @gadget: our gadget
  1356. * @driver: the driver being registered
  1357. *
  1358. * Interrupts are enabled here.
  1359. */
  1360. static int ci_udc_start(struct usb_gadget *gadget,
  1361. struct usb_gadget_driver *driver)
  1362. {
  1363. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  1364. unsigned long flags;
  1365. int retval = -ENOMEM;
  1366. if (driver->disconnect == NULL)
  1367. return -EINVAL;
  1368. ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
  1369. retval = usb_ep_enable(&ci->ep0out->ep);
  1370. if (retval)
  1371. return retval;
  1372. ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
  1373. retval = usb_ep_enable(&ci->ep0in->ep);
  1374. if (retval)
  1375. return retval;
  1376. spin_lock_irqsave(&ci->lock, flags);
  1377. ci->driver = driver;
  1378. pm_runtime_get_sync(&ci->gadget.dev);
  1379. if (ci->platdata->flags & CI_HDRC_PULLUP_ON_VBUS) {
  1380. if (ci->vbus_active) {
  1381. if (ci->platdata->flags & CI_HDRC_REGS_SHARED)
  1382. hw_device_reset(ci, USBMODE_CM_DC);
  1383. } else {
  1384. pm_runtime_put_sync(&ci->gadget.dev);
  1385. goto done;
  1386. }
  1387. }
  1388. retval = hw_device_state(ci, ci->ep0out->qh.dma);
  1389. if (retval)
  1390. pm_runtime_put_sync(&ci->gadget.dev);
  1391. done:
  1392. spin_unlock_irqrestore(&ci->lock, flags);
  1393. return retval;
  1394. }
  1395. /**
  1396. * ci_udc_stop: unregister a gadget driver
  1397. */
  1398. static int ci_udc_stop(struct usb_gadget *gadget,
  1399. struct usb_gadget_driver *driver)
  1400. {
  1401. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  1402. unsigned long flags;
  1403. spin_lock_irqsave(&ci->lock, flags);
  1404. if (!(ci->platdata->flags & CI_HDRC_PULLUP_ON_VBUS) ||
  1405. ci->vbus_active) {
  1406. hw_device_state(ci, 0);
  1407. if (ci->platdata->notify_event)
  1408. ci->platdata->notify_event(ci,
  1409. CI_HDRC_CONTROLLER_STOPPED_EVENT);
  1410. ci->driver = NULL;
  1411. spin_unlock_irqrestore(&ci->lock, flags);
  1412. _gadget_stop_activity(&ci->gadget);
  1413. spin_lock_irqsave(&ci->lock, flags);
  1414. pm_runtime_put(&ci->gadget.dev);
  1415. }
  1416. spin_unlock_irqrestore(&ci->lock, flags);
  1417. return 0;
  1418. }
  1419. /******************************************************************************
  1420. * BUS block
  1421. *****************************************************************************/
  1422. /**
  1423. * udc_irq: ci interrupt handler
  1424. *
  1425. * This function returns IRQ_HANDLED if the IRQ has been handled
  1426. * It locks access to registers
  1427. */
  1428. static irqreturn_t udc_irq(struct ci_hdrc *ci)
  1429. {
  1430. irqreturn_t retval;
  1431. u32 intr;
  1432. if (ci == NULL)
  1433. return IRQ_HANDLED;
  1434. spin_lock(&ci->lock);
  1435. if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
  1436. if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
  1437. USBMODE_CM_DC) {
  1438. spin_unlock(&ci->lock);
  1439. return IRQ_NONE;
  1440. }
  1441. }
  1442. intr = hw_test_and_clear_intr_active(ci);
  1443. if (intr) {
  1444. /* order defines priority - do NOT change it */
  1445. if (USBi_URI & intr)
  1446. isr_reset_handler(ci);
  1447. if (USBi_PCI & intr) {
  1448. ci->gadget.speed = hw_port_is_high_speed(ci) ?
  1449. USB_SPEED_HIGH : USB_SPEED_FULL;
  1450. if (ci->suspended && ci->driver->resume) {
  1451. spin_unlock(&ci->lock);
  1452. ci->driver->resume(&ci->gadget);
  1453. spin_lock(&ci->lock);
  1454. ci->suspended = 0;
  1455. }
  1456. }
  1457. if (USBi_UI & intr)
  1458. isr_tr_complete_handler(ci);
  1459. if (USBi_SLI & intr) {
  1460. if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
  1461. ci->driver->suspend) {
  1462. ci->suspended = 1;
  1463. spin_unlock(&ci->lock);
  1464. ci->driver->suspend(&ci->gadget);
  1465. spin_lock(&ci->lock);
  1466. }
  1467. }
  1468. retval = IRQ_HANDLED;
  1469. } else {
  1470. retval = IRQ_NONE;
  1471. }
  1472. spin_unlock(&ci->lock);
  1473. return retval;
  1474. }
  1475. /**
  1476. * udc_start: initialize gadget role
  1477. * @ci: chipidea controller
  1478. */
  1479. static int udc_start(struct ci_hdrc *ci)
  1480. {
  1481. struct device *dev = ci->dev;
  1482. int retval = 0;
  1483. spin_lock_init(&ci->lock);
  1484. ci->gadget.ops = &usb_gadget_ops;
  1485. ci->gadget.speed = USB_SPEED_UNKNOWN;
  1486. ci->gadget.max_speed = USB_SPEED_HIGH;
  1487. ci->gadget.is_otg = 0;
  1488. ci->gadget.name = ci->platdata->name;
  1489. INIT_LIST_HEAD(&ci->gadget.ep_list);
  1490. /* alloc resources */
  1491. ci->qh_pool = dma_pool_create("ci_hw_qh", dev,
  1492. sizeof(struct ci_hw_qh),
  1493. 64, CI_HDRC_PAGE_SIZE);
  1494. if (ci->qh_pool == NULL)
  1495. return -ENOMEM;
  1496. ci->td_pool = dma_pool_create("ci_hw_td", dev,
  1497. sizeof(struct ci_hw_td),
  1498. 64, CI_HDRC_PAGE_SIZE);
  1499. if (ci->td_pool == NULL) {
  1500. retval = -ENOMEM;
  1501. goto free_qh_pool;
  1502. }
  1503. retval = init_eps(ci);
  1504. if (retval)
  1505. goto free_pools;
  1506. ci->gadget.ep0 = &ci->ep0in->ep;
  1507. if (ci->global_phy) {
  1508. ci->transceiver = usb_get_phy(USB_PHY_TYPE_USB2);
  1509. if (IS_ERR(ci->transceiver))
  1510. ci->transceiver = NULL;
  1511. }
  1512. if (ci->platdata->flags & CI_HDRC_REQUIRE_TRANSCEIVER) {
  1513. if (ci->transceiver == NULL) {
  1514. retval = -ENODEV;
  1515. goto destroy_eps;
  1516. }
  1517. }
  1518. if (!(ci->platdata->flags & CI_HDRC_REGS_SHARED)) {
  1519. retval = hw_device_reset(ci, USBMODE_CM_DC);
  1520. if (retval)
  1521. goto put_transceiver;
  1522. }
  1523. if (ci->transceiver) {
  1524. retval = otg_set_peripheral(ci->transceiver->otg,
  1525. &ci->gadget);
  1526. if (retval)
  1527. goto put_transceiver;
  1528. }
  1529. retval = usb_add_gadget_udc(dev, &ci->gadget);
  1530. if (retval)
  1531. goto remove_trans;
  1532. pm_runtime_no_callbacks(&ci->gadget.dev);
  1533. pm_runtime_enable(&ci->gadget.dev);
  1534. return retval;
  1535. remove_trans:
  1536. if (ci->transceiver) {
  1537. otg_set_peripheral(ci->transceiver->otg, NULL);
  1538. if (ci->global_phy)
  1539. usb_put_phy(ci->transceiver);
  1540. }
  1541. dev_err(dev, "error = %i\n", retval);
  1542. put_transceiver:
  1543. if (ci->transceiver && ci->global_phy)
  1544. usb_put_phy(ci->transceiver);
  1545. destroy_eps:
  1546. destroy_eps(ci);
  1547. free_pools:
  1548. dma_pool_destroy(ci->td_pool);
  1549. free_qh_pool:
  1550. dma_pool_destroy(ci->qh_pool);
  1551. return retval;
  1552. }
  1553. /**
  1554. * udc_remove: parent remove must call this to remove UDC
  1555. *
  1556. * No interrupts active, the IRQ has been released
  1557. */
  1558. static void udc_stop(struct ci_hdrc *ci)
  1559. {
  1560. if (ci == NULL)
  1561. return;
  1562. usb_del_gadget_udc(&ci->gadget);
  1563. destroy_eps(ci);
  1564. dma_pool_destroy(ci->td_pool);
  1565. dma_pool_destroy(ci->qh_pool);
  1566. if (ci->transceiver) {
  1567. otg_set_peripheral(ci->transceiver->otg, NULL);
  1568. if (ci->global_phy)
  1569. usb_put_phy(ci->transceiver);
  1570. }
  1571. /* my kobject is dynamic, I swear! */
  1572. memset(&ci->gadget, 0, sizeof(ci->gadget));
  1573. }
  1574. /**
  1575. * ci_hdrc_gadget_init - initialize device related bits
  1576. * ci: the controller
  1577. *
  1578. * This function enables the gadget role, if the device is "device capable".
  1579. */
  1580. int ci_hdrc_gadget_init(struct ci_hdrc *ci)
  1581. {
  1582. struct ci_role_driver *rdrv;
  1583. if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
  1584. return -ENXIO;
  1585. rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
  1586. if (!rdrv)
  1587. return -ENOMEM;
  1588. rdrv->start = udc_start;
  1589. rdrv->stop = udc_stop;
  1590. rdrv->irq = udc_irq;
  1591. rdrv->name = "gadget";
  1592. ci->roles[CI_ROLE_GADGET] = rdrv;
  1593. return 0;
  1594. }