events.c 41 KB

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  1. /*
  2. * Xen event channels
  3. *
  4. * Xen models interrupts with abstract event channels. Because each
  5. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  6. * must dynamically map irqs<->event channels. The event channels
  7. * interface with the rest of the kernel by defining a xen interrupt
  8. * chip. When an event is received, it is mapped to an irq and sent
  9. * through the normal interrupt processing path.
  10. *
  11. * There are four kinds of events which can be mapped to an event
  12. * channel:
  13. *
  14. * 1. Inter-domain notifications. This includes all the virtual
  15. * device events, since they're driven by front-ends in another domain
  16. * (typically dom0).
  17. * 2. VIRQs, typically used for timers. These are per-cpu events.
  18. * 3. IPIs.
  19. * 4. PIRQs - Hardware interrupts.
  20. *
  21. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  22. */
  23. #include <linux/linkage.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/module.h>
  27. #include <linux/string.h>
  28. #include <linux/bootmem.h>
  29. #include <linux/slab.h>
  30. #include <linux/irqnr.h>
  31. #include <linux/pci.h>
  32. #include <asm/desc.h>
  33. #include <asm/ptrace.h>
  34. #include <asm/irq.h>
  35. #include <asm/idle.h>
  36. #include <asm/io_apic.h>
  37. #include <asm/sync_bitops.h>
  38. #include <asm/xen/pci.h>
  39. #include <asm/xen/hypercall.h>
  40. #include <asm/xen/hypervisor.h>
  41. #include <xen/xen.h>
  42. #include <xen/hvm.h>
  43. #include <xen/xen-ops.h>
  44. #include <xen/events.h>
  45. #include <xen/interface/xen.h>
  46. #include <xen/interface/event_channel.h>
  47. #include <xen/interface/hvm/hvm_op.h>
  48. #include <xen/interface/hvm/params.h>
  49. /*
  50. * This lock protects updates to the following mapping and reference-count
  51. * arrays. The lock does not need to be acquired to read the mapping tables.
  52. */
  53. static DEFINE_MUTEX(irq_mapping_update_lock);
  54. static LIST_HEAD(xen_irq_list_head);
  55. /* IRQ <-> VIRQ mapping. */
  56. static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
  57. /* IRQ <-> IPI mapping */
  58. static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
  59. /* Interrupt types. */
  60. enum xen_irq_type {
  61. IRQT_UNBOUND = 0,
  62. IRQT_PIRQ,
  63. IRQT_VIRQ,
  64. IRQT_IPI,
  65. IRQT_EVTCHN
  66. };
  67. /*
  68. * Packed IRQ information:
  69. * type - enum xen_irq_type
  70. * event channel - irq->event channel mapping
  71. * cpu - cpu this event channel is bound to
  72. * index - type-specific information:
  73. * PIRQ - vector, with MSB being "needs EIO", or physical IRQ of the HVM
  74. * guest, or GSI (real passthrough IRQ) of the device.
  75. * VIRQ - virq number
  76. * IPI - IPI vector
  77. * EVTCHN -
  78. */
  79. struct irq_info {
  80. struct list_head list;
  81. int refcnt;
  82. enum xen_irq_type type; /* type */
  83. unsigned irq;
  84. unsigned short evtchn; /* event channel */
  85. unsigned short cpu; /* cpu bound */
  86. union {
  87. unsigned short virq;
  88. enum ipi_vector ipi;
  89. struct {
  90. unsigned short pirq;
  91. unsigned short gsi;
  92. unsigned char vector;
  93. unsigned char flags;
  94. uint16_t domid;
  95. } pirq;
  96. } u;
  97. };
  98. #define PIRQ_NEEDS_EOI (1 << 0)
  99. #define PIRQ_SHAREABLE (1 << 1)
  100. static int *evtchn_to_irq;
  101. static DEFINE_PER_CPU(unsigned long [NR_EVENT_CHANNELS/BITS_PER_LONG],
  102. cpu_evtchn_mask);
  103. /* Xen will never allocate port zero for any purpose. */
  104. #define VALID_EVTCHN(chn) ((chn) != 0)
  105. static struct irq_chip xen_dynamic_chip;
  106. static struct irq_chip xen_percpu_chip;
  107. static struct irq_chip xen_pirq_chip;
  108. static void enable_dynirq(struct irq_data *data);
  109. static void disable_dynirq(struct irq_data *data);
  110. /* Get info for IRQ */
  111. static struct irq_info *info_for_irq(unsigned irq)
  112. {
  113. return irq_get_handler_data(irq);
  114. }
  115. /* Constructors for packed IRQ information. */
  116. static void xen_irq_info_common_init(struct irq_info *info,
  117. unsigned irq,
  118. enum xen_irq_type type,
  119. unsigned short evtchn,
  120. unsigned short cpu)
  121. {
  122. BUG_ON(info->type != IRQT_UNBOUND && info->type != type);
  123. info->type = type;
  124. info->irq = irq;
  125. info->evtchn = evtchn;
  126. info->cpu = cpu;
  127. evtchn_to_irq[evtchn] = irq;
  128. }
  129. static void xen_irq_info_evtchn_init(unsigned irq,
  130. unsigned short evtchn)
  131. {
  132. struct irq_info *info = info_for_irq(irq);
  133. xen_irq_info_common_init(info, irq, IRQT_EVTCHN, evtchn, 0);
  134. }
  135. static void xen_irq_info_ipi_init(unsigned cpu,
  136. unsigned irq,
  137. unsigned short evtchn,
  138. enum ipi_vector ipi)
  139. {
  140. struct irq_info *info = info_for_irq(irq);
  141. xen_irq_info_common_init(info, irq, IRQT_IPI, evtchn, 0);
  142. info->u.ipi = ipi;
  143. per_cpu(ipi_to_irq, cpu)[ipi] = irq;
  144. }
  145. static void xen_irq_info_virq_init(unsigned cpu,
  146. unsigned irq,
  147. unsigned short evtchn,
  148. unsigned short virq)
  149. {
  150. struct irq_info *info = info_for_irq(irq);
  151. xen_irq_info_common_init(info, irq, IRQT_VIRQ, evtchn, 0);
  152. info->u.virq = virq;
  153. per_cpu(virq_to_irq, cpu)[virq] = irq;
  154. }
  155. static void xen_irq_info_pirq_init(unsigned irq,
  156. unsigned short evtchn,
  157. unsigned short pirq,
  158. unsigned short gsi,
  159. unsigned short vector,
  160. uint16_t domid,
  161. unsigned char flags)
  162. {
  163. struct irq_info *info = info_for_irq(irq);
  164. xen_irq_info_common_init(info, irq, IRQT_PIRQ, evtchn, 0);
  165. info->u.pirq.pirq = pirq;
  166. info->u.pirq.gsi = gsi;
  167. info->u.pirq.vector = vector;
  168. info->u.pirq.domid = domid;
  169. info->u.pirq.flags = flags;
  170. }
  171. /*
  172. * Accessors for packed IRQ information.
  173. */
  174. static unsigned int evtchn_from_irq(unsigned irq)
  175. {
  176. if (unlikely(WARN(irq < 0 || irq >= nr_irqs, "Invalid irq %d!\n", irq)))
  177. return 0;
  178. return info_for_irq(irq)->evtchn;
  179. }
  180. unsigned irq_from_evtchn(unsigned int evtchn)
  181. {
  182. return evtchn_to_irq[evtchn];
  183. }
  184. EXPORT_SYMBOL_GPL(irq_from_evtchn);
  185. static enum ipi_vector ipi_from_irq(unsigned irq)
  186. {
  187. struct irq_info *info = info_for_irq(irq);
  188. BUG_ON(info == NULL);
  189. BUG_ON(info->type != IRQT_IPI);
  190. return info->u.ipi;
  191. }
  192. static unsigned virq_from_irq(unsigned irq)
  193. {
  194. struct irq_info *info = info_for_irq(irq);
  195. BUG_ON(info == NULL);
  196. BUG_ON(info->type != IRQT_VIRQ);
  197. return info->u.virq;
  198. }
  199. static unsigned pirq_from_irq(unsigned irq)
  200. {
  201. struct irq_info *info = info_for_irq(irq);
  202. BUG_ON(info == NULL);
  203. BUG_ON(info->type != IRQT_PIRQ);
  204. return info->u.pirq.pirq;
  205. }
  206. static enum xen_irq_type type_from_irq(unsigned irq)
  207. {
  208. return info_for_irq(irq)->type;
  209. }
  210. static unsigned cpu_from_irq(unsigned irq)
  211. {
  212. return info_for_irq(irq)->cpu;
  213. }
  214. static unsigned int cpu_from_evtchn(unsigned int evtchn)
  215. {
  216. int irq = evtchn_to_irq[evtchn];
  217. unsigned ret = 0;
  218. if (irq != -1)
  219. ret = cpu_from_irq(irq);
  220. return ret;
  221. }
  222. static bool pirq_needs_eoi(unsigned irq)
  223. {
  224. struct irq_info *info = info_for_irq(irq);
  225. BUG_ON(info->type != IRQT_PIRQ);
  226. return info->u.pirq.flags & PIRQ_NEEDS_EOI;
  227. }
  228. static inline unsigned long active_evtchns(unsigned int cpu,
  229. struct shared_info *sh,
  230. unsigned int idx)
  231. {
  232. return sh->evtchn_pending[idx] &
  233. per_cpu(cpu_evtchn_mask, cpu)[idx] &
  234. ~sh->evtchn_mask[idx];
  235. }
  236. static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
  237. {
  238. int irq = evtchn_to_irq[chn];
  239. BUG_ON(irq == -1);
  240. #ifdef CONFIG_SMP
  241. cpumask_copy(irq_to_desc(irq)->irq_data.affinity, cpumask_of(cpu));
  242. #endif
  243. clear_bit(chn, per_cpu(cpu_evtchn_mask, cpu_from_irq(irq)));
  244. set_bit(chn, per_cpu(cpu_evtchn_mask, cpu));
  245. info_for_irq(irq)->cpu = cpu;
  246. }
  247. static void init_evtchn_cpu_bindings(void)
  248. {
  249. int i;
  250. #ifdef CONFIG_SMP
  251. struct irq_info *info;
  252. /* By default all event channels notify CPU#0. */
  253. list_for_each_entry(info, &xen_irq_list_head, list) {
  254. struct irq_desc *desc = irq_to_desc(info->irq);
  255. cpumask_copy(desc->irq_data.affinity, cpumask_of(0));
  256. }
  257. #endif
  258. for_each_possible_cpu(i)
  259. memset(per_cpu(cpu_evtchn_mask, i),
  260. (i == 0) ? ~0 : 0, sizeof(*per_cpu(cpu_evtchn_mask, i)));
  261. }
  262. static inline void clear_evtchn(int port)
  263. {
  264. struct shared_info *s = HYPERVISOR_shared_info;
  265. sync_clear_bit(port, &s->evtchn_pending[0]);
  266. }
  267. static inline void set_evtchn(int port)
  268. {
  269. struct shared_info *s = HYPERVISOR_shared_info;
  270. sync_set_bit(port, &s->evtchn_pending[0]);
  271. }
  272. static inline int test_evtchn(int port)
  273. {
  274. struct shared_info *s = HYPERVISOR_shared_info;
  275. return sync_test_bit(port, &s->evtchn_pending[0]);
  276. }
  277. /**
  278. * notify_remote_via_irq - send event to remote end of event channel via irq
  279. * @irq: irq of event channel to send event to
  280. *
  281. * Unlike notify_remote_via_evtchn(), this is safe to use across
  282. * save/restore. Notifications on a broken connection are silently
  283. * dropped.
  284. */
  285. void notify_remote_via_irq(int irq)
  286. {
  287. int evtchn = evtchn_from_irq(irq);
  288. if (VALID_EVTCHN(evtchn))
  289. notify_remote_via_evtchn(evtchn);
  290. }
  291. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  292. static void mask_evtchn(int port)
  293. {
  294. struct shared_info *s = HYPERVISOR_shared_info;
  295. sync_set_bit(port, &s->evtchn_mask[0]);
  296. }
  297. static void unmask_evtchn(int port)
  298. {
  299. struct shared_info *s = HYPERVISOR_shared_info;
  300. unsigned int cpu = get_cpu();
  301. BUG_ON(!irqs_disabled());
  302. /* Slow path (hypercall) if this is a non-local port. */
  303. if (unlikely(cpu != cpu_from_evtchn(port))) {
  304. struct evtchn_unmask unmask = { .port = port };
  305. (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
  306. } else {
  307. struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
  308. sync_clear_bit(port, &s->evtchn_mask[0]);
  309. /*
  310. * The following is basically the equivalent of
  311. * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
  312. * the interrupt edge' if the channel is masked.
  313. */
  314. if (sync_test_bit(port, &s->evtchn_pending[0]) &&
  315. !sync_test_and_set_bit(port / BITS_PER_LONG,
  316. &vcpu_info->evtchn_pending_sel))
  317. vcpu_info->evtchn_upcall_pending = 1;
  318. }
  319. put_cpu();
  320. }
  321. static void xen_irq_init(unsigned irq)
  322. {
  323. struct irq_info *info;
  324. #ifdef CONFIG_SMP
  325. struct irq_desc *desc = irq_to_desc(irq);
  326. /* By default all event channels notify CPU#0. */
  327. cpumask_copy(desc->irq_data.affinity, cpumask_of(0));
  328. #endif
  329. info = kzalloc(sizeof(*info), GFP_KERNEL);
  330. if (info == NULL)
  331. panic("Unable to allocate metadata for IRQ%d\n", irq);
  332. info->type = IRQT_UNBOUND;
  333. info->refcnt = -1;
  334. irq_set_handler_data(irq, info);
  335. list_add_tail(&info->list, &xen_irq_list_head);
  336. }
  337. static int __must_check xen_allocate_irq_dynamic(void)
  338. {
  339. int first = 0;
  340. int irq;
  341. #ifdef CONFIG_X86_IO_APIC
  342. /*
  343. * For an HVM guest or domain 0 which see "real" (emulated or
  344. * actual respectively) GSIs we allocate dynamic IRQs
  345. * e.g. those corresponding to event channels or MSIs
  346. * etc. from the range above those "real" GSIs to avoid
  347. * collisions.
  348. */
  349. if (xen_initial_domain() || xen_hvm_domain())
  350. first = get_nr_irqs_gsi();
  351. #endif
  352. irq = irq_alloc_desc_from(first, -1);
  353. if (irq >= 0)
  354. xen_irq_init(irq);
  355. return irq;
  356. }
  357. static int __must_check xen_allocate_irq_gsi(unsigned gsi)
  358. {
  359. int irq;
  360. /*
  361. * A PV guest has no concept of a GSI (since it has no ACPI
  362. * nor access to/knowledge of the physical APICs). Therefore
  363. * all IRQs are dynamically allocated from the entire IRQ
  364. * space.
  365. */
  366. if (xen_pv_domain() && !xen_initial_domain())
  367. return xen_allocate_irq_dynamic();
  368. /* Legacy IRQ descriptors are already allocated by the arch. */
  369. if (gsi < NR_IRQS_LEGACY)
  370. irq = gsi;
  371. else
  372. irq = irq_alloc_desc_at(gsi, -1);
  373. xen_irq_init(irq);
  374. return irq;
  375. }
  376. static void xen_free_irq(unsigned irq)
  377. {
  378. struct irq_info *info = irq_get_handler_data(irq);
  379. list_del(&info->list);
  380. irq_set_handler_data(irq, NULL);
  381. WARN_ON(info->refcnt > 0);
  382. kfree(info);
  383. /* Legacy IRQ descriptors are managed by the arch. */
  384. if (irq < NR_IRQS_LEGACY)
  385. return;
  386. irq_free_desc(irq);
  387. }
  388. static void pirq_query_unmask(int irq)
  389. {
  390. struct physdev_irq_status_query irq_status;
  391. struct irq_info *info = info_for_irq(irq);
  392. BUG_ON(info->type != IRQT_PIRQ);
  393. irq_status.irq = pirq_from_irq(irq);
  394. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  395. irq_status.flags = 0;
  396. info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
  397. if (irq_status.flags & XENIRQSTAT_needs_eoi)
  398. info->u.pirq.flags |= PIRQ_NEEDS_EOI;
  399. }
  400. static bool probing_irq(int irq)
  401. {
  402. struct irq_desc *desc = irq_to_desc(irq);
  403. return desc && desc->action == NULL;
  404. }
  405. static void eoi_pirq(struct irq_data *data)
  406. {
  407. int evtchn = evtchn_from_irq(data->irq);
  408. struct physdev_eoi eoi = { .irq = pirq_from_irq(data->irq) };
  409. int rc = 0;
  410. irq_move_irq(data);
  411. if (VALID_EVTCHN(evtchn))
  412. clear_evtchn(evtchn);
  413. if (pirq_needs_eoi(data->irq)) {
  414. rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
  415. WARN_ON(rc);
  416. }
  417. }
  418. static void mask_ack_pirq(struct irq_data *data)
  419. {
  420. disable_dynirq(data);
  421. eoi_pirq(data);
  422. }
  423. static unsigned int __startup_pirq(unsigned int irq)
  424. {
  425. struct evtchn_bind_pirq bind_pirq;
  426. struct irq_info *info = info_for_irq(irq);
  427. int evtchn = evtchn_from_irq(irq);
  428. int rc;
  429. BUG_ON(info->type != IRQT_PIRQ);
  430. if (VALID_EVTCHN(evtchn))
  431. goto out;
  432. bind_pirq.pirq = pirq_from_irq(irq);
  433. /* NB. We are happy to share unless we are probing. */
  434. bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ?
  435. BIND_PIRQ__WILL_SHARE : 0;
  436. rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq);
  437. if (rc != 0) {
  438. if (!probing_irq(irq))
  439. printk(KERN_INFO "Failed to obtain physical IRQ %d\n",
  440. irq);
  441. return 0;
  442. }
  443. evtchn = bind_pirq.port;
  444. pirq_query_unmask(irq);
  445. evtchn_to_irq[evtchn] = irq;
  446. bind_evtchn_to_cpu(evtchn, 0);
  447. info->evtchn = evtchn;
  448. out:
  449. unmask_evtchn(evtchn);
  450. eoi_pirq(irq_get_irq_data(irq));
  451. return 0;
  452. }
  453. static unsigned int startup_pirq(struct irq_data *data)
  454. {
  455. return __startup_pirq(data->irq);
  456. }
  457. static void shutdown_pirq(struct irq_data *data)
  458. {
  459. struct evtchn_close close;
  460. unsigned int irq = data->irq;
  461. struct irq_info *info = info_for_irq(irq);
  462. int evtchn = evtchn_from_irq(irq);
  463. BUG_ON(info->type != IRQT_PIRQ);
  464. if (!VALID_EVTCHN(evtchn))
  465. return;
  466. mask_evtchn(evtchn);
  467. close.port = evtchn;
  468. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  469. BUG();
  470. bind_evtchn_to_cpu(evtchn, 0);
  471. evtchn_to_irq[evtchn] = -1;
  472. info->evtchn = 0;
  473. }
  474. static void enable_pirq(struct irq_data *data)
  475. {
  476. startup_pirq(data);
  477. }
  478. static void disable_pirq(struct irq_data *data)
  479. {
  480. disable_dynirq(data);
  481. }
  482. static int find_irq_by_gsi(unsigned gsi)
  483. {
  484. struct irq_info *info;
  485. list_for_each_entry(info, &xen_irq_list_head, list) {
  486. if (info->type != IRQT_PIRQ)
  487. continue;
  488. if (info->u.pirq.gsi == gsi)
  489. return info->irq;
  490. }
  491. return -1;
  492. }
  493. /*
  494. * Do not make any assumptions regarding the relationship between the
  495. * IRQ number returned here and the Xen pirq argument.
  496. *
  497. * Note: We don't assign an event channel until the irq actually started
  498. * up. Return an existing irq if we've already got one for the gsi.
  499. *
  500. * Shareable implies level triggered, not shareable implies edge
  501. * triggered here.
  502. */
  503. int xen_bind_pirq_gsi_to_irq(unsigned gsi,
  504. unsigned pirq, int shareable, char *name)
  505. {
  506. int irq = -1;
  507. struct physdev_irq irq_op;
  508. mutex_lock(&irq_mapping_update_lock);
  509. irq = find_irq_by_gsi(gsi);
  510. if (irq != -1) {
  511. printk(KERN_INFO "xen_map_pirq_gsi: returning irq %d for gsi %u\n",
  512. irq, gsi);
  513. goto out;
  514. }
  515. irq = xen_allocate_irq_gsi(gsi);
  516. if (irq < 0)
  517. goto out;
  518. irq_op.irq = irq;
  519. irq_op.vector = 0;
  520. /* Only the privileged domain can do this. For non-priv, the pcifront
  521. * driver provides a PCI bus that does the call to do exactly
  522. * this in the priv domain. */
  523. if (xen_initial_domain() &&
  524. HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
  525. xen_free_irq(irq);
  526. irq = -ENOSPC;
  527. goto out;
  528. }
  529. xen_irq_info_pirq_init(irq, 0, pirq, gsi, irq_op.vector, DOMID_SELF,
  530. shareable ? PIRQ_SHAREABLE : 0);
  531. pirq_query_unmask(irq);
  532. /* We try to use the handler with the appropriate semantic for the
  533. * type of interrupt: if the interrupt is an edge triggered
  534. * interrupt we use handle_edge_irq.
  535. *
  536. * On the other hand if the interrupt is level triggered we use
  537. * handle_fasteoi_irq like the native code does for this kind of
  538. * interrupts.
  539. *
  540. * Depending on the Xen version, pirq_needs_eoi might return true
  541. * not only for level triggered interrupts but for edge triggered
  542. * interrupts too. In any case Xen always honors the eoi mechanism,
  543. * not injecting any more pirqs of the same kind if the first one
  544. * hasn't received an eoi yet. Therefore using the fasteoi handler
  545. * is the right choice either way.
  546. */
  547. if (shareable)
  548. irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
  549. handle_fasteoi_irq, name);
  550. else
  551. irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
  552. handle_edge_irq, name);
  553. out:
  554. mutex_unlock(&irq_mapping_update_lock);
  555. return irq;
  556. }
  557. #ifdef CONFIG_PCI_MSI
  558. int xen_allocate_pirq_msi(struct pci_dev *dev, struct msi_desc *msidesc)
  559. {
  560. int rc;
  561. struct physdev_get_free_pirq op_get_free_pirq;
  562. op_get_free_pirq.type = MAP_PIRQ_TYPE_MSI;
  563. rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_free_pirq, &op_get_free_pirq);
  564. WARN_ONCE(rc == -ENOSYS,
  565. "hypervisor does not support the PHYSDEVOP_get_free_pirq interface\n");
  566. return rc ? -1 : op_get_free_pirq.pirq;
  567. }
  568. int xen_bind_pirq_msi_to_irq(struct pci_dev *dev, struct msi_desc *msidesc,
  569. int pirq, int vector, const char *name,
  570. domid_t domid)
  571. {
  572. int irq, ret;
  573. mutex_lock(&irq_mapping_update_lock);
  574. irq = xen_allocate_irq_dynamic();
  575. if (irq < 0)
  576. goto out;
  577. irq_set_chip_and_handler_name(irq, &xen_pirq_chip, handle_edge_irq,
  578. name);
  579. xen_irq_info_pirq_init(irq, 0, pirq, 0, vector, domid, 0);
  580. ret = irq_set_msi_desc(irq, msidesc);
  581. if (ret < 0)
  582. goto error_irq;
  583. out:
  584. mutex_unlock(&irq_mapping_update_lock);
  585. return irq;
  586. error_irq:
  587. mutex_unlock(&irq_mapping_update_lock);
  588. xen_free_irq(irq);
  589. return ret;
  590. }
  591. #endif
  592. int xen_destroy_irq(int irq)
  593. {
  594. struct irq_desc *desc;
  595. struct physdev_unmap_pirq unmap_irq;
  596. struct irq_info *info = info_for_irq(irq);
  597. int rc = -ENOENT;
  598. mutex_lock(&irq_mapping_update_lock);
  599. desc = irq_to_desc(irq);
  600. if (!desc)
  601. goto out;
  602. if (xen_initial_domain()) {
  603. unmap_irq.pirq = info->u.pirq.pirq;
  604. unmap_irq.domid = info->u.pirq.domid;
  605. rc = HYPERVISOR_physdev_op(PHYSDEVOP_unmap_pirq, &unmap_irq);
  606. /* If another domain quits without making the pci_disable_msix
  607. * call, the Xen hypervisor takes care of freeing the PIRQs
  608. * (free_domain_pirqs).
  609. */
  610. if ((rc == -ESRCH && info->u.pirq.domid != DOMID_SELF))
  611. printk(KERN_INFO "domain %d does not have %d anymore\n",
  612. info->u.pirq.domid, info->u.pirq.pirq);
  613. else if (rc) {
  614. printk(KERN_WARNING "unmap irq failed %d\n", rc);
  615. goto out;
  616. }
  617. }
  618. xen_free_irq(irq);
  619. out:
  620. mutex_unlock(&irq_mapping_update_lock);
  621. return rc;
  622. }
  623. int xen_irq_from_pirq(unsigned pirq)
  624. {
  625. int irq;
  626. struct irq_info *info;
  627. mutex_lock(&irq_mapping_update_lock);
  628. list_for_each_entry(info, &xen_irq_list_head, list) {
  629. if (info->type != IRQT_PIRQ)
  630. continue;
  631. irq = info->irq;
  632. if (info->u.pirq.pirq == pirq)
  633. goto out;
  634. }
  635. irq = -1;
  636. out:
  637. mutex_unlock(&irq_mapping_update_lock);
  638. return irq;
  639. }
  640. int xen_pirq_from_irq(unsigned irq)
  641. {
  642. return pirq_from_irq(irq);
  643. }
  644. EXPORT_SYMBOL_GPL(xen_pirq_from_irq);
  645. int bind_evtchn_to_irq(unsigned int evtchn)
  646. {
  647. int irq;
  648. mutex_lock(&irq_mapping_update_lock);
  649. irq = evtchn_to_irq[evtchn];
  650. if (irq == -1) {
  651. irq = xen_allocate_irq_dynamic();
  652. if (irq == -1)
  653. goto out;
  654. irq_set_chip_and_handler_name(irq, &xen_dynamic_chip,
  655. handle_edge_irq, "event");
  656. xen_irq_info_evtchn_init(irq, evtchn);
  657. }
  658. out:
  659. mutex_unlock(&irq_mapping_update_lock);
  660. return irq;
  661. }
  662. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
  663. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  664. {
  665. struct evtchn_bind_ipi bind_ipi;
  666. int evtchn, irq;
  667. mutex_lock(&irq_mapping_update_lock);
  668. irq = per_cpu(ipi_to_irq, cpu)[ipi];
  669. if (irq == -1) {
  670. irq = xen_allocate_irq_dynamic();
  671. if (irq < 0)
  672. goto out;
  673. irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
  674. handle_percpu_irq, "ipi");
  675. bind_ipi.vcpu = cpu;
  676. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  677. &bind_ipi) != 0)
  678. BUG();
  679. evtchn = bind_ipi.port;
  680. xen_irq_info_ipi_init(cpu, irq, evtchn, ipi);
  681. bind_evtchn_to_cpu(evtchn, cpu);
  682. }
  683. out:
  684. mutex_unlock(&irq_mapping_update_lock);
  685. return irq;
  686. }
  687. static int bind_interdomain_evtchn_to_irq(unsigned int remote_domain,
  688. unsigned int remote_port)
  689. {
  690. struct evtchn_bind_interdomain bind_interdomain;
  691. int err;
  692. bind_interdomain.remote_dom = remote_domain;
  693. bind_interdomain.remote_port = remote_port;
  694. err = HYPERVISOR_event_channel_op(EVTCHNOP_bind_interdomain,
  695. &bind_interdomain);
  696. return err ? : bind_evtchn_to_irq(bind_interdomain.local_port);
  697. }
  698. static int find_virq(unsigned int virq, unsigned int cpu)
  699. {
  700. struct evtchn_status status;
  701. int port, rc = -ENOENT;
  702. memset(&status, 0, sizeof(status));
  703. for (port = 0; port <= NR_EVENT_CHANNELS; port++) {
  704. status.dom = DOMID_SELF;
  705. status.port = port;
  706. rc = HYPERVISOR_event_channel_op(EVTCHNOP_status, &status);
  707. if (rc < 0)
  708. continue;
  709. if (status.status != EVTCHNSTAT_virq)
  710. continue;
  711. if (status.u.virq == virq && status.vcpu == cpu) {
  712. rc = port;
  713. break;
  714. }
  715. }
  716. return rc;
  717. }
  718. int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
  719. {
  720. struct evtchn_bind_virq bind_virq;
  721. int evtchn, irq, ret;
  722. mutex_lock(&irq_mapping_update_lock);
  723. irq = per_cpu(virq_to_irq, cpu)[virq];
  724. if (irq == -1) {
  725. irq = xen_allocate_irq_dynamic();
  726. if (irq == -1)
  727. goto out;
  728. irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
  729. handle_percpu_irq, "virq");
  730. bind_virq.virq = virq;
  731. bind_virq.vcpu = cpu;
  732. ret = HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  733. &bind_virq);
  734. if (ret == 0)
  735. evtchn = bind_virq.port;
  736. else {
  737. if (ret == -EEXIST)
  738. ret = find_virq(virq, cpu);
  739. BUG_ON(ret < 0);
  740. evtchn = ret;
  741. }
  742. xen_irq_info_virq_init(cpu, irq, evtchn, virq);
  743. bind_evtchn_to_cpu(evtchn, cpu);
  744. }
  745. out:
  746. mutex_unlock(&irq_mapping_update_lock);
  747. return irq;
  748. }
  749. static void unbind_from_irq(unsigned int irq)
  750. {
  751. struct evtchn_close close;
  752. int evtchn = evtchn_from_irq(irq);
  753. struct irq_info *info = irq_get_handler_data(irq);
  754. mutex_lock(&irq_mapping_update_lock);
  755. if (info->refcnt > 0) {
  756. info->refcnt--;
  757. if (info->refcnt != 0)
  758. goto done;
  759. }
  760. if (VALID_EVTCHN(evtchn)) {
  761. close.port = evtchn;
  762. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  763. BUG();
  764. switch (type_from_irq(irq)) {
  765. case IRQT_VIRQ:
  766. per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
  767. [virq_from_irq(irq)] = -1;
  768. break;
  769. case IRQT_IPI:
  770. per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
  771. [ipi_from_irq(irq)] = -1;
  772. break;
  773. default:
  774. break;
  775. }
  776. /* Closed ports are implicitly re-bound to VCPU0. */
  777. bind_evtchn_to_cpu(evtchn, 0);
  778. evtchn_to_irq[evtchn] = -1;
  779. }
  780. BUG_ON(info_for_irq(irq)->type == IRQT_UNBOUND);
  781. xen_free_irq(irq);
  782. done:
  783. mutex_unlock(&irq_mapping_update_lock);
  784. }
  785. int bind_evtchn_to_irqhandler(unsigned int evtchn,
  786. irq_handler_t handler,
  787. unsigned long irqflags,
  788. const char *devname, void *dev_id)
  789. {
  790. int irq, retval;
  791. irq = bind_evtchn_to_irq(evtchn);
  792. if (irq < 0)
  793. return irq;
  794. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  795. if (retval != 0) {
  796. unbind_from_irq(irq);
  797. return retval;
  798. }
  799. return irq;
  800. }
  801. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  802. int bind_interdomain_evtchn_to_irqhandler(unsigned int remote_domain,
  803. unsigned int remote_port,
  804. irq_handler_t handler,
  805. unsigned long irqflags,
  806. const char *devname,
  807. void *dev_id)
  808. {
  809. int irq, retval;
  810. irq = bind_interdomain_evtchn_to_irq(remote_domain, remote_port);
  811. if (irq < 0)
  812. return irq;
  813. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  814. if (retval != 0) {
  815. unbind_from_irq(irq);
  816. return retval;
  817. }
  818. return irq;
  819. }
  820. EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irqhandler);
  821. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  822. irq_handler_t handler,
  823. unsigned long irqflags, const char *devname, void *dev_id)
  824. {
  825. int irq, retval;
  826. irq = bind_virq_to_irq(virq, cpu);
  827. if (irq < 0)
  828. return irq;
  829. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  830. if (retval != 0) {
  831. unbind_from_irq(irq);
  832. return retval;
  833. }
  834. return irq;
  835. }
  836. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  837. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  838. unsigned int cpu,
  839. irq_handler_t handler,
  840. unsigned long irqflags,
  841. const char *devname,
  842. void *dev_id)
  843. {
  844. int irq, retval;
  845. irq = bind_ipi_to_irq(ipi, cpu);
  846. if (irq < 0)
  847. return irq;
  848. irqflags |= IRQF_NO_SUSPEND | IRQF_FORCE_RESUME | IRQF_EARLY_RESUME;
  849. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  850. if (retval != 0) {
  851. unbind_from_irq(irq);
  852. return retval;
  853. }
  854. return irq;
  855. }
  856. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  857. {
  858. free_irq(irq, dev_id);
  859. unbind_from_irq(irq);
  860. }
  861. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  862. int evtchn_make_refcounted(unsigned int evtchn)
  863. {
  864. int irq = evtchn_to_irq[evtchn];
  865. struct irq_info *info;
  866. if (irq == -1)
  867. return -ENOENT;
  868. info = irq_get_handler_data(irq);
  869. if (!info)
  870. return -ENOENT;
  871. WARN_ON(info->refcnt != -1);
  872. info->refcnt = 1;
  873. return 0;
  874. }
  875. EXPORT_SYMBOL_GPL(evtchn_make_refcounted);
  876. int evtchn_get(unsigned int evtchn)
  877. {
  878. int irq;
  879. struct irq_info *info;
  880. int err = -ENOENT;
  881. if (evtchn >= NR_EVENT_CHANNELS)
  882. return -EINVAL;
  883. mutex_lock(&irq_mapping_update_lock);
  884. irq = evtchn_to_irq[evtchn];
  885. if (irq == -1)
  886. goto done;
  887. info = irq_get_handler_data(irq);
  888. if (!info)
  889. goto done;
  890. err = -EINVAL;
  891. if (info->refcnt <= 0)
  892. goto done;
  893. info->refcnt++;
  894. err = 0;
  895. done:
  896. mutex_unlock(&irq_mapping_update_lock);
  897. return err;
  898. }
  899. EXPORT_SYMBOL_GPL(evtchn_get);
  900. void evtchn_put(unsigned int evtchn)
  901. {
  902. int irq = evtchn_to_irq[evtchn];
  903. if (WARN_ON(irq == -1))
  904. return;
  905. unbind_from_irq(irq);
  906. }
  907. EXPORT_SYMBOL_GPL(evtchn_put);
  908. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  909. {
  910. int irq = per_cpu(ipi_to_irq, cpu)[vector];
  911. BUG_ON(irq < 0);
  912. notify_remote_via_irq(irq);
  913. }
  914. irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
  915. {
  916. struct shared_info *sh = HYPERVISOR_shared_info;
  917. int cpu = smp_processor_id();
  918. unsigned long *cpu_evtchn = per_cpu(cpu_evtchn_mask, cpu);
  919. int i;
  920. unsigned long flags;
  921. static DEFINE_SPINLOCK(debug_lock);
  922. struct vcpu_info *v;
  923. spin_lock_irqsave(&debug_lock, flags);
  924. printk("\nvcpu %d\n ", cpu);
  925. for_each_online_cpu(i) {
  926. int pending;
  927. v = per_cpu(xen_vcpu, i);
  928. pending = (get_irq_regs() && i == cpu)
  929. ? xen_irqs_disabled(get_irq_regs())
  930. : v->evtchn_upcall_mask;
  931. printk("%d: masked=%d pending=%d event_sel %0*lx\n ", i,
  932. pending, v->evtchn_upcall_pending,
  933. (int)(sizeof(v->evtchn_pending_sel)*2),
  934. v->evtchn_pending_sel);
  935. }
  936. v = per_cpu(xen_vcpu, cpu);
  937. printk("\npending:\n ");
  938. for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
  939. printk("%0*lx%s", (int)sizeof(sh->evtchn_pending[0])*2,
  940. sh->evtchn_pending[i],
  941. i % 8 == 0 ? "\n " : " ");
  942. printk("\nglobal mask:\n ");
  943. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  944. printk("%0*lx%s",
  945. (int)(sizeof(sh->evtchn_mask[0])*2),
  946. sh->evtchn_mask[i],
  947. i % 8 == 0 ? "\n " : " ");
  948. printk("\nglobally unmasked:\n ");
  949. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  950. printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
  951. sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
  952. i % 8 == 0 ? "\n " : " ");
  953. printk("\nlocal cpu%d mask:\n ", cpu);
  954. for (i = (NR_EVENT_CHANNELS/BITS_PER_LONG)-1; i >= 0; i--)
  955. printk("%0*lx%s", (int)(sizeof(cpu_evtchn[0])*2),
  956. cpu_evtchn[i],
  957. i % 8 == 0 ? "\n " : " ");
  958. printk("\nlocally unmasked:\n ");
  959. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) {
  960. unsigned long pending = sh->evtchn_pending[i]
  961. & ~sh->evtchn_mask[i]
  962. & cpu_evtchn[i];
  963. printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
  964. pending, i % 8 == 0 ? "\n " : " ");
  965. }
  966. printk("\npending list:\n");
  967. for (i = 0; i < NR_EVENT_CHANNELS; i++) {
  968. if (sync_test_bit(i, sh->evtchn_pending)) {
  969. int word_idx = i / BITS_PER_LONG;
  970. printk(" %d: event %d -> irq %d%s%s%s\n",
  971. cpu_from_evtchn(i), i,
  972. evtchn_to_irq[i],
  973. sync_test_bit(word_idx, &v->evtchn_pending_sel)
  974. ? "" : " l2-clear",
  975. !sync_test_bit(i, sh->evtchn_mask)
  976. ? "" : " globally-masked",
  977. sync_test_bit(i, cpu_evtchn)
  978. ? "" : " locally-masked");
  979. }
  980. }
  981. spin_unlock_irqrestore(&debug_lock, flags);
  982. return IRQ_HANDLED;
  983. }
  984. static DEFINE_PER_CPU(unsigned, xed_nesting_count);
  985. static DEFINE_PER_CPU(unsigned int, current_word_idx);
  986. static DEFINE_PER_CPU(unsigned int, current_bit_idx);
  987. /*
  988. * Mask out the i least significant bits of w
  989. */
  990. #define MASK_LSBS(w, i) (w & ((~0UL) << i))
  991. /*
  992. * Search the CPUs pending events bitmasks. For each one found, map
  993. * the event number to an irq, and feed it into do_IRQ() for
  994. * handling.
  995. *
  996. * Xen uses a two-level bitmap to speed searching. The first level is
  997. * a bitset of words which contain pending event bits. The second
  998. * level is a bitset of pending events themselves.
  999. */
  1000. static void __xen_evtchn_do_upcall(void)
  1001. {
  1002. int start_word_idx, start_bit_idx;
  1003. int word_idx, bit_idx;
  1004. int i;
  1005. int cpu = get_cpu();
  1006. struct shared_info *s = HYPERVISOR_shared_info;
  1007. struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
  1008. unsigned count;
  1009. do {
  1010. unsigned long pending_words;
  1011. vcpu_info->evtchn_upcall_pending = 0;
  1012. if (__this_cpu_inc_return(xed_nesting_count) - 1)
  1013. goto out;
  1014. #ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
  1015. /* Clear master flag /before/ clearing selector flag. */
  1016. wmb();
  1017. #endif
  1018. pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
  1019. start_word_idx = __this_cpu_read(current_word_idx);
  1020. start_bit_idx = __this_cpu_read(current_bit_idx);
  1021. word_idx = start_word_idx;
  1022. for (i = 0; pending_words != 0; i++) {
  1023. unsigned long pending_bits;
  1024. unsigned long words;
  1025. words = MASK_LSBS(pending_words, word_idx);
  1026. /*
  1027. * If we masked out all events, wrap to beginning.
  1028. */
  1029. if (words == 0) {
  1030. word_idx = 0;
  1031. bit_idx = 0;
  1032. continue;
  1033. }
  1034. word_idx = __ffs(words);
  1035. pending_bits = active_evtchns(cpu, s, word_idx);
  1036. bit_idx = 0; /* usually scan entire word from start */
  1037. if (word_idx == start_word_idx) {
  1038. /* We scan the starting word in two parts */
  1039. if (i == 0)
  1040. /* 1st time: start in the middle */
  1041. bit_idx = start_bit_idx;
  1042. else
  1043. /* 2nd time: mask bits done already */
  1044. bit_idx &= (1UL << start_bit_idx) - 1;
  1045. }
  1046. do {
  1047. unsigned long bits;
  1048. int port, irq;
  1049. struct irq_desc *desc;
  1050. bits = MASK_LSBS(pending_bits, bit_idx);
  1051. /* If we masked out all events, move on. */
  1052. if (bits == 0)
  1053. break;
  1054. bit_idx = __ffs(bits);
  1055. /* Process port. */
  1056. port = (word_idx * BITS_PER_LONG) + bit_idx;
  1057. irq = evtchn_to_irq[port];
  1058. if (irq != -1) {
  1059. desc = irq_to_desc(irq);
  1060. if (desc)
  1061. generic_handle_irq_desc(irq, desc);
  1062. }
  1063. bit_idx = (bit_idx + 1) % BITS_PER_LONG;
  1064. /* Next caller starts at last processed + 1 */
  1065. __this_cpu_write(current_word_idx,
  1066. bit_idx ? word_idx :
  1067. (word_idx+1) % BITS_PER_LONG);
  1068. __this_cpu_write(current_bit_idx, bit_idx);
  1069. } while (bit_idx != 0);
  1070. /* Scan start_l1i twice; all others once. */
  1071. if ((word_idx != start_word_idx) || (i != 0))
  1072. pending_words &= ~(1UL << word_idx);
  1073. word_idx = (word_idx + 1) % BITS_PER_LONG;
  1074. }
  1075. BUG_ON(!irqs_disabled());
  1076. count = __this_cpu_read(xed_nesting_count);
  1077. __this_cpu_write(xed_nesting_count, 0);
  1078. } while (count != 1 || vcpu_info->evtchn_upcall_pending);
  1079. out:
  1080. put_cpu();
  1081. }
  1082. void xen_evtchn_do_upcall(struct pt_regs *regs)
  1083. {
  1084. struct pt_regs *old_regs = set_irq_regs(regs);
  1085. exit_idle();
  1086. irq_enter();
  1087. __xen_evtchn_do_upcall();
  1088. irq_exit();
  1089. set_irq_regs(old_regs);
  1090. }
  1091. void xen_hvm_evtchn_do_upcall(void)
  1092. {
  1093. __xen_evtchn_do_upcall();
  1094. }
  1095. EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
  1096. /* Rebind a new event channel to an existing irq. */
  1097. void rebind_evtchn_irq(int evtchn, int irq)
  1098. {
  1099. struct irq_info *info = info_for_irq(irq);
  1100. /* Make sure the irq is masked, since the new event channel
  1101. will also be masked. */
  1102. disable_irq(irq);
  1103. mutex_lock(&irq_mapping_update_lock);
  1104. /* After resume the irq<->evtchn mappings are all cleared out */
  1105. BUG_ON(evtchn_to_irq[evtchn] != -1);
  1106. /* Expect irq to have been bound before,
  1107. so there should be a proper type */
  1108. BUG_ON(info->type == IRQT_UNBOUND);
  1109. xen_irq_info_evtchn_init(irq, evtchn);
  1110. mutex_unlock(&irq_mapping_update_lock);
  1111. /* new event channels are always bound to cpu 0 */
  1112. irq_set_affinity(irq, cpumask_of(0));
  1113. /* Unmask the event channel. */
  1114. enable_irq(irq);
  1115. }
  1116. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  1117. static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
  1118. {
  1119. struct evtchn_bind_vcpu bind_vcpu;
  1120. int evtchn = evtchn_from_irq(irq);
  1121. if (!VALID_EVTCHN(evtchn))
  1122. return -1;
  1123. /*
  1124. * Events delivered via platform PCI interrupts are always
  1125. * routed to vcpu 0 and hence cannot be rebound.
  1126. */
  1127. if (xen_hvm_domain() && !xen_have_vector_callback)
  1128. return -1;
  1129. /* Send future instances of this interrupt to other vcpu. */
  1130. bind_vcpu.port = evtchn;
  1131. bind_vcpu.vcpu = tcpu;
  1132. /*
  1133. * If this fails, it usually just indicates that we're dealing with a
  1134. * virq or IPI channel, which don't actually need to be rebound. Ignore
  1135. * it, but don't do the xenlinux-level rebind in that case.
  1136. */
  1137. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
  1138. bind_evtchn_to_cpu(evtchn, tcpu);
  1139. return 0;
  1140. }
  1141. static int set_affinity_irq(struct irq_data *data, const struct cpumask *dest,
  1142. bool force)
  1143. {
  1144. unsigned tcpu = cpumask_first(dest);
  1145. return rebind_irq_to_cpu(data->irq, tcpu);
  1146. }
  1147. int resend_irq_on_evtchn(unsigned int irq)
  1148. {
  1149. int masked, evtchn = evtchn_from_irq(irq);
  1150. struct shared_info *s = HYPERVISOR_shared_info;
  1151. if (!VALID_EVTCHN(evtchn))
  1152. return 1;
  1153. masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
  1154. sync_set_bit(evtchn, s->evtchn_pending);
  1155. if (!masked)
  1156. unmask_evtchn(evtchn);
  1157. return 1;
  1158. }
  1159. static void enable_dynirq(struct irq_data *data)
  1160. {
  1161. int evtchn = evtchn_from_irq(data->irq);
  1162. if (VALID_EVTCHN(evtchn))
  1163. unmask_evtchn(evtchn);
  1164. }
  1165. static void disable_dynirq(struct irq_data *data)
  1166. {
  1167. int evtchn = evtchn_from_irq(data->irq);
  1168. if (VALID_EVTCHN(evtchn))
  1169. mask_evtchn(evtchn);
  1170. }
  1171. static void ack_dynirq(struct irq_data *data)
  1172. {
  1173. int evtchn = evtchn_from_irq(data->irq);
  1174. irq_move_irq(data);
  1175. if (VALID_EVTCHN(evtchn))
  1176. clear_evtchn(evtchn);
  1177. }
  1178. static void mask_ack_dynirq(struct irq_data *data)
  1179. {
  1180. disable_dynirq(data);
  1181. ack_dynirq(data);
  1182. }
  1183. static int retrigger_dynirq(struct irq_data *data)
  1184. {
  1185. int evtchn = evtchn_from_irq(data->irq);
  1186. struct shared_info *sh = HYPERVISOR_shared_info;
  1187. int ret = 0;
  1188. if (VALID_EVTCHN(evtchn)) {
  1189. int masked;
  1190. masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
  1191. sync_set_bit(evtchn, sh->evtchn_pending);
  1192. if (!masked)
  1193. unmask_evtchn(evtchn);
  1194. ret = 1;
  1195. }
  1196. return ret;
  1197. }
  1198. static void restore_pirqs(void)
  1199. {
  1200. int pirq, rc, irq, gsi;
  1201. struct physdev_map_pirq map_irq;
  1202. struct irq_info *info;
  1203. list_for_each_entry(info, &xen_irq_list_head, list) {
  1204. if (info->type != IRQT_PIRQ)
  1205. continue;
  1206. pirq = info->u.pirq.pirq;
  1207. gsi = info->u.pirq.gsi;
  1208. irq = info->irq;
  1209. /* save/restore of PT devices doesn't work, so at this point the
  1210. * only devices present are GSI based emulated devices */
  1211. if (!gsi)
  1212. continue;
  1213. map_irq.domid = DOMID_SELF;
  1214. map_irq.type = MAP_PIRQ_TYPE_GSI;
  1215. map_irq.index = gsi;
  1216. map_irq.pirq = pirq;
  1217. rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
  1218. if (rc) {
  1219. printk(KERN_WARNING "xen map irq failed gsi=%d irq=%d pirq=%d rc=%d\n",
  1220. gsi, irq, pirq, rc);
  1221. xen_free_irq(irq);
  1222. continue;
  1223. }
  1224. printk(KERN_DEBUG "xen: --> irq=%d, pirq=%d\n", irq, map_irq.pirq);
  1225. __startup_pirq(irq);
  1226. }
  1227. }
  1228. static void restore_cpu_virqs(unsigned int cpu)
  1229. {
  1230. struct evtchn_bind_virq bind_virq;
  1231. int virq, irq, evtchn;
  1232. for (virq = 0; virq < NR_VIRQS; virq++) {
  1233. if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
  1234. continue;
  1235. BUG_ON(virq_from_irq(irq) != virq);
  1236. /* Get a new binding from Xen. */
  1237. bind_virq.virq = virq;
  1238. bind_virq.vcpu = cpu;
  1239. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  1240. &bind_virq) != 0)
  1241. BUG();
  1242. evtchn = bind_virq.port;
  1243. /* Record the new mapping. */
  1244. xen_irq_info_virq_init(cpu, irq, evtchn, virq);
  1245. bind_evtchn_to_cpu(evtchn, cpu);
  1246. }
  1247. }
  1248. static void restore_cpu_ipis(unsigned int cpu)
  1249. {
  1250. struct evtchn_bind_ipi bind_ipi;
  1251. int ipi, irq, evtchn;
  1252. for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
  1253. if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
  1254. continue;
  1255. BUG_ON(ipi_from_irq(irq) != ipi);
  1256. /* Get a new binding from Xen. */
  1257. bind_ipi.vcpu = cpu;
  1258. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  1259. &bind_ipi) != 0)
  1260. BUG();
  1261. evtchn = bind_ipi.port;
  1262. /* Record the new mapping. */
  1263. xen_irq_info_ipi_init(cpu, irq, evtchn, ipi);
  1264. bind_evtchn_to_cpu(evtchn, cpu);
  1265. }
  1266. }
  1267. /* Clear an irq's pending state, in preparation for polling on it */
  1268. void xen_clear_irq_pending(int irq)
  1269. {
  1270. int evtchn = evtchn_from_irq(irq);
  1271. if (VALID_EVTCHN(evtchn))
  1272. clear_evtchn(evtchn);
  1273. }
  1274. EXPORT_SYMBOL(xen_clear_irq_pending);
  1275. void xen_set_irq_pending(int irq)
  1276. {
  1277. int evtchn = evtchn_from_irq(irq);
  1278. if (VALID_EVTCHN(evtchn))
  1279. set_evtchn(evtchn);
  1280. }
  1281. bool xen_test_irq_pending(int irq)
  1282. {
  1283. int evtchn = evtchn_from_irq(irq);
  1284. bool ret = false;
  1285. if (VALID_EVTCHN(evtchn))
  1286. ret = test_evtchn(evtchn);
  1287. return ret;
  1288. }
  1289. /* Poll waiting for an irq to become pending with timeout. In the usual case,
  1290. * the irq will be disabled so it won't deliver an interrupt. */
  1291. void xen_poll_irq_timeout(int irq, u64 timeout)
  1292. {
  1293. evtchn_port_t evtchn = evtchn_from_irq(irq);
  1294. if (VALID_EVTCHN(evtchn)) {
  1295. struct sched_poll poll;
  1296. poll.nr_ports = 1;
  1297. poll.timeout = timeout;
  1298. set_xen_guest_handle(poll.ports, &evtchn);
  1299. if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
  1300. BUG();
  1301. }
  1302. }
  1303. EXPORT_SYMBOL(xen_poll_irq_timeout);
  1304. /* Poll waiting for an irq to become pending. In the usual case, the
  1305. * irq will be disabled so it won't deliver an interrupt. */
  1306. void xen_poll_irq(int irq)
  1307. {
  1308. xen_poll_irq_timeout(irq, 0 /* no timeout */);
  1309. }
  1310. /* Check whether the IRQ line is shared with other guests. */
  1311. int xen_test_irq_shared(int irq)
  1312. {
  1313. struct irq_info *info = info_for_irq(irq);
  1314. struct physdev_irq_status_query irq_status = { .irq = info->u.pirq.pirq };
  1315. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  1316. return 0;
  1317. return !(irq_status.flags & XENIRQSTAT_shared);
  1318. }
  1319. EXPORT_SYMBOL_GPL(xen_test_irq_shared);
  1320. void xen_irq_resume(void)
  1321. {
  1322. unsigned int cpu, evtchn;
  1323. struct irq_info *info;
  1324. init_evtchn_cpu_bindings();
  1325. /* New event-channel space is not 'live' yet. */
  1326. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  1327. mask_evtchn(evtchn);
  1328. /* No IRQ <-> event-channel mappings. */
  1329. list_for_each_entry(info, &xen_irq_list_head, list)
  1330. info->evtchn = 0; /* zap event-channel binding */
  1331. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  1332. evtchn_to_irq[evtchn] = -1;
  1333. for_each_possible_cpu(cpu) {
  1334. restore_cpu_virqs(cpu);
  1335. restore_cpu_ipis(cpu);
  1336. }
  1337. restore_pirqs();
  1338. }
  1339. static struct irq_chip xen_dynamic_chip __read_mostly = {
  1340. .name = "xen-dyn",
  1341. .irq_disable = disable_dynirq,
  1342. .irq_mask = disable_dynirq,
  1343. .irq_unmask = enable_dynirq,
  1344. .irq_ack = ack_dynirq,
  1345. .irq_mask_ack = mask_ack_dynirq,
  1346. .irq_set_affinity = set_affinity_irq,
  1347. .irq_retrigger = retrigger_dynirq,
  1348. };
  1349. static struct irq_chip xen_pirq_chip __read_mostly = {
  1350. .name = "xen-pirq",
  1351. .irq_startup = startup_pirq,
  1352. .irq_shutdown = shutdown_pirq,
  1353. .irq_enable = enable_pirq,
  1354. .irq_disable = disable_pirq,
  1355. .irq_mask = disable_dynirq,
  1356. .irq_unmask = enable_dynirq,
  1357. .irq_ack = eoi_pirq,
  1358. .irq_eoi = eoi_pirq,
  1359. .irq_mask_ack = mask_ack_pirq,
  1360. .irq_set_affinity = set_affinity_irq,
  1361. .irq_retrigger = retrigger_dynirq,
  1362. };
  1363. static struct irq_chip xen_percpu_chip __read_mostly = {
  1364. .name = "xen-percpu",
  1365. .irq_disable = disable_dynirq,
  1366. .irq_mask = disable_dynirq,
  1367. .irq_unmask = enable_dynirq,
  1368. .irq_ack = ack_dynirq,
  1369. };
  1370. int xen_set_callback_via(uint64_t via)
  1371. {
  1372. struct xen_hvm_param a;
  1373. a.domid = DOMID_SELF;
  1374. a.index = HVM_PARAM_CALLBACK_IRQ;
  1375. a.value = via;
  1376. return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
  1377. }
  1378. EXPORT_SYMBOL_GPL(xen_set_callback_via);
  1379. #ifdef CONFIG_XEN_PVHVM
  1380. /* Vector callbacks are better than PCI interrupts to receive event
  1381. * channel notifications because we can receive vector callbacks on any
  1382. * vcpu and we don't need PCI support or APIC interactions. */
  1383. void xen_callback_vector(void)
  1384. {
  1385. int rc;
  1386. uint64_t callback_via;
  1387. if (xen_have_vector_callback) {
  1388. callback_via = HVM_CALLBACK_VECTOR(XEN_HVM_EVTCHN_CALLBACK);
  1389. rc = xen_set_callback_via(callback_via);
  1390. if (rc) {
  1391. printk(KERN_ERR "Request for Xen HVM callback vector"
  1392. " failed.\n");
  1393. xen_have_vector_callback = 0;
  1394. return;
  1395. }
  1396. printk(KERN_INFO "Xen HVM callback vector for event delivery is "
  1397. "enabled\n");
  1398. /* in the restore case the vector has already been allocated */
  1399. if (!test_bit(XEN_HVM_EVTCHN_CALLBACK, used_vectors))
  1400. alloc_intr_gate(XEN_HVM_EVTCHN_CALLBACK, xen_hvm_callback_vector);
  1401. }
  1402. }
  1403. #else
  1404. void xen_callback_vector(void) {}
  1405. #endif
  1406. void __init xen_init_IRQ(void)
  1407. {
  1408. int i;
  1409. evtchn_to_irq = kcalloc(NR_EVENT_CHANNELS, sizeof(*evtchn_to_irq),
  1410. GFP_KERNEL);
  1411. BUG_ON(!evtchn_to_irq);
  1412. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1413. evtchn_to_irq[i] = -1;
  1414. init_evtchn_cpu_bindings();
  1415. /* No event channels are 'live' right now. */
  1416. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1417. mask_evtchn(i);
  1418. if (xen_hvm_domain()) {
  1419. xen_callback_vector();
  1420. native_init_IRQ();
  1421. /* pci_xen_hvm_init must be called after native_init_IRQ so that
  1422. * __acpi_register_gsi can point at the right function */
  1423. pci_xen_hvm_init();
  1424. } else {
  1425. irq_ctx_init(smp_processor_id());
  1426. if (xen_initial_domain())
  1427. pci_xen_initial_domain();
  1428. }
  1429. }