omap_wdt.c 11 KB

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  1. /*
  2. * omap_wdt.c
  3. *
  4. * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog
  5. *
  6. * Author: MontaVista Software, Inc.
  7. * <gdavis@mvista.com> or <source@mvista.com>
  8. *
  9. * 2003 (c) MontaVista Software, Inc. This file is licensed under the
  10. * terms of the GNU General Public License version 2. This program is
  11. * licensed "as is" without any warranty of any kind, whether express
  12. * or implied.
  13. *
  14. * History:
  15. *
  16. * 20030527: George G. Davis <gdavis@mvista.com>
  17. * Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
  18. * (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
  19. * Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk>
  20. *
  21. * Copyright (c) 2004 Texas Instruments.
  22. * 1. Modified to support OMAP1610 32-KHz watchdog timer
  23. * 2. Ported to 2.6 kernel
  24. *
  25. * Copyright (c) 2005 David Brownell
  26. * Use the driver model and standard identifiers; handle bigger timeouts.
  27. */
  28. #include <linux/module.h>
  29. #include <linux/types.h>
  30. #include <linux/kernel.h>
  31. #include <linux/fs.h>
  32. #include <linux/mm.h>
  33. #include <linux/miscdevice.h>
  34. #include <linux/watchdog.h>
  35. #include <linux/reboot.h>
  36. #include <linux/init.h>
  37. #include <linux/err.h>
  38. #include <linux/platform_device.h>
  39. #include <linux/moduleparam.h>
  40. #include <linux/bitops.h>
  41. #include <linux/io.h>
  42. #include <linux/uaccess.h>
  43. #include <linux/slab.h>
  44. #include <linux/pm_runtime.h>
  45. #include <mach/hardware.h>
  46. #include <plat/prcm.h>
  47. #include "omap_wdt.h"
  48. static struct platform_device *omap_wdt_dev;
  49. static unsigned timer_margin;
  50. module_param(timer_margin, uint, 0);
  51. MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
  52. static unsigned int wdt_trgr_pattern = 0x1234;
  53. static DEFINE_SPINLOCK(wdt_lock);
  54. struct omap_wdt_dev {
  55. void __iomem *base; /* physical */
  56. struct device *dev;
  57. int omap_wdt_users;
  58. struct resource *mem;
  59. struct miscdevice omap_wdt_miscdev;
  60. };
  61. static void omap_wdt_ping(struct omap_wdt_dev *wdev)
  62. {
  63. void __iomem *base = wdev->base;
  64. /* wait for posted write to complete */
  65. while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
  66. cpu_relax();
  67. wdt_trgr_pattern = ~wdt_trgr_pattern;
  68. __raw_writel(wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR));
  69. /* wait for posted write to complete */
  70. while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
  71. cpu_relax();
  72. /* reloaded WCRR from WLDR */
  73. }
  74. static void omap_wdt_enable(struct omap_wdt_dev *wdev)
  75. {
  76. void __iomem *base = wdev->base;
  77. /* Sequence to enable the watchdog */
  78. __raw_writel(0xBBBB, base + OMAP_WATCHDOG_SPR);
  79. while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
  80. cpu_relax();
  81. __raw_writel(0x4444, base + OMAP_WATCHDOG_SPR);
  82. while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
  83. cpu_relax();
  84. }
  85. static void omap_wdt_disable(struct omap_wdt_dev *wdev)
  86. {
  87. void __iomem *base = wdev->base;
  88. /* sequence required to disable watchdog */
  89. __raw_writel(0xAAAA, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
  90. while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
  91. cpu_relax();
  92. __raw_writel(0x5555, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
  93. while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
  94. cpu_relax();
  95. }
  96. static void omap_wdt_adjust_timeout(unsigned new_timeout)
  97. {
  98. if (new_timeout < TIMER_MARGIN_MIN)
  99. new_timeout = TIMER_MARGIN_DEFAULT;
  100. if (new_timeout > TIMER_MARGIN_MAX)
  101. new_timeout = TIMER_MARGIN_MAX;
  102. timer_margin = new_timeout;
  103. }
  104. static void omap_wdt_set_timeout(struct omap_wdt_dev *wdev)
  105. {
  106. u32 pre_margin = GET_WLDR_VAL(timer_margin);
  107. void __iomem *base = wdev->base;
  108. pm_runtime_get_sync(wdev->dev);
  109. /* just count up at 32 KHz */
  110. while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
  111. cpu_relax();
  112. __raw_writel(pre_margin, base + OMAP_WATCHDOG_LDR);
  113. while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
  114. cpu_relax();
  115. pm_runtime_put_sync(wdev->dev);
  116. }
  117. /*
  118. * Allow only one task to hold it open
  119. */
  120. static int omap_wdt_open(struct inode *inode, struct file *file)
  121. {
  122. struct omap_wdt_dev *wdev = platform_get_drvdata(omap_wdt_dev);
  123. void __iomem *base = wdev->base;
  124. if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users)))
  125. return -EBUSY;
  126. pm_runtime_get_sync(wdev->dev);
  127. /* initialize prescaler */
  128. while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
  129. cpu_relax();
  130. __raw_writel((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
  131. while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
  132. cpu_relax();
  133. file->private_data = (void *) wdev;
  134. omap_wdt_set_timeout(wdev);
  135. omap_wdt_ping(wdev); /* trigger loading of new timeout value */
  136. omap_wdt_enable(wdev);
  137. pm_runtime_put_sync(wdev->dev);
  138. return nonseekable_open(inode, file);
  139. }
  140. static int omap_wdt_release(struct inode *inode, struct file *file)
  141. {
  142. struct omap_wdt_dev *wdev = file->private_data;
  143. /*
  144. * Shut off the timer unless NOWAYOUT is defined.
  145. */
  146. #ifndef CONFIG_WATCHDOG_NOWAYOUT
  147. pm_runtime_get_sync(wdev->dev);
  148. omap_wdt_disable(wdev);
  149. pm_runtime_put_sync(wdev->dev);
  150. #else
  151. printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n");
  152. #endif
  153. wdev->omap_wdt_users = 0;
  154. return 0;
  155. }
  156. static ssize_t omap_wdt_write(struct file *file, const char __user *data,
  157. size_t len, loff_t *ppos)
  158. {
  159. struct omap_wdt_dev *wdev = file->private_data;
  160. /* Refresh LOAD_TIME. */
  161. if (len) {
  162. pm_runtime_get_sync(wdev->dev);
  163. spin_lock(&wdt_lock);
  164. omap_wdt_ping(wdev);
  165. spin_unlock(&wdt_lock);
  166. pm_runtime_put_sync(wdev->dev);
  167. }
  168. return len;
  169. }
  170. static long omap_wdt_ioctl(struct file *file, unsigned int cmd,
  171. unsigned long arg)
  172. {
  173. struct omap_wdt_dev *wdev;
  174. int new_margin;
  175. static const struct watchdog_info ident = {
  176. .identity = "OMAP Watchdog",
  177. .options = WDIOF_SETTIMEOUT,
  178. .firmware_version = 0,
  179. };
  180. wdev = file->private_data;
  181. switch (cmd) {
  182. case WDIOC_GETSUPPORT:
  183. return copy_to_user((struct watchdog_info __user *)arg, &ident,
  184. sizeof(ident));
  185. case WDIOC_GETSTATUS:
  186. return put_user(0, (int __user *)arg);
  187. case WDIOC_GETBOOTSTATUS:
  188. if (cpu_is_omap16xx())
  189. return put_user(__raw_readw(ARM_SYSST),
  190. (int __user *)arg);
  191. if (cpu_is_omap24xx())
  192. return put_user(omap_prcm_get_reset_sources(),
  193. (int __user *)arg);
  194. return put_user(0, (int __user *)arg);
  195. case WDIOC_KEEPALIVE:
  196. pm_runtime_get_sync(wdev->dev);
  197. spin_lock(&wdt_lock);
  198. omap_wdt_ping(wdev);
  199. spin_unlock(&wdt_lock);
  200. pm_runtime_put_sync(wdev->dev);
  201. return 0;
  202. case WDIOC_SETTIMEOUT:
  203. if (get_user(new_margin, (int __user *)arg))
  204. return -EFAULT;
  205. omap_wdt_adjust_timeout(new_margin);
  206. pm_runtime_get_sync(wdev->dev);
  207. spin_lock(&wdt_lock);
  208. omap_wdt_disable(wdev);
  209. omap_wdt_set_timeout(wdev);
  210. omap_wdt_enable(wdev);
  211. omap_wdt_ping(wdev);
  212. spin_unlock(&wdt_lock);
  213. pm_runtime_put_sync(wdev->dev);
  214. /* Fall */
  215. case WDIOC_GETTIMEOUT:
  216. return put_user(timer_margin, (int __user *)arg);
  217. default:
  218. return -ENOTTY;
  219. }
  220. }
  221. static const struct file_operations omap_wdt_fops = {
  222. .owner = THIS_MODULE,
  223. .write = omap_wdt_write,
  224. .unlocked_ioctl = omap_wdt_ioctl,
  225. .open = omap_wdt_open,
  226. .release = omap_wdt_release,
  227. .llseek = no_llseek,
  228. };
  229. static int __devinit omap_wdt_probe(struct platform_device *pdev)
  230. {
  231. struct resource *res, *mem;
  232. struct omap_wdt_dev *wdev;
  233. int ret;
  234. /* reserve static register mappings */
  235. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  236. if (!res) {
  237. ret = -ENOENT;
  238. goto err_get_resource;
  239. }
  240. if (omap_wdt_dev) {
  241. ret = -EBUSY;
  242. goto err_busy;
  243. }
  244. mem = request_mem_region(res->start, resource_size(res), pdev->name);
  245. if (!mem) {
  246. ret = -EBUSY;
  247. goto err_busy;
  248. }
  249. wdev = kzalloc(sizeof(struct omap_wdt_dev), GFP_KERNEL);
  250. if (!wdev) {
  251. ret = -ENOMEM;
  252. goto err_kzalloc;
  253. }
  254. wdev->omap_wdt_users = 0;
  255. wdev->mem = mem;
  256. wdev->dev = &pdev->dev;
  257. wdev->base = ioremap(res->start, resource_size(res));
  258. if (!wdev->base) {
  259. ret = -ENOMEM;
  260. goto err_ioremap;
  261. }
  262. platform_set_drvdata(pdev, wdev);
  263. pm_runtime_enable(wdev->dev);
  264. pm_runtime_get_sync(wdev->dev);
  265. omap_wdt_disable(wdev);
  266. omap_wdt_adjust_timeout(timer_margin);
  267. wdev->omap_wdt_miscdev.parent = &pdev->dev;
  268. wdev->omap_wdt_miscdev.minor = WATCHDOG_MINOR;
  269. wdev->omap_wdt_miscdev.name = "watchdog";
  270. wdev->omap_wdt_miscdev.fops = &omap_wdt_fops;
  271. ret = misc_register(&(wdev->omap_wdt_miscdev));
  272. if (ret)
  273. goto err_misc;
  274. pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
  275. __raw_readl(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
  276. timer_margin);
  277. pm_runtime_put_sync(wdev->dev);
  278. omap_wdt_dev = pdev;
  279. return 0;
  280. err_misc:
  281. pm_runtime_disable(wdev->dev);
  282. platform_set_drvdata(pdev, NULL);
  283. iounmap(wdev->base);
  284. err_ioremap:
  285. wdev->base = NULL;
  286. kfree(wdev);
  287. err_kzalloc:
  288. release_mem_region(res->start, resource_size(res));
  289. err_busy:
  290. err_get_resource:
  291. return ret;
  292. }
  293. static void omap_wdt_shutdown(struct platform_device *pdev)
  294. {
  295. struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
  296. if (wdev->omap_wdt_users) {
  297. pm_runtime_get_sync(wdev->dev);
  298. omap_wdt_disable(wdev);
  299. pm_runtime_put_sync(wdev->dev);
  300. }
  301. }
  302. static int __devexit omap_wdt_remove(struct platform_device *pdev)
  303. {
  304. struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
  305. struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  306. pm_runtime_disable(wdev->dev);
  307. if (!res)
  308. return -ENOENT;
  309. misc_deregister(&(wdev->omap_wdt_miscdev));
  310. release_mem_region(res->start, resource_size(res));
  311. platform_set_drvdata(pdev, NULL);
  312. iounmap(wdev->base);
  313. kfree(wdev);
  314. omap_wdt_dev = NULL;
  315. return 0;
  316. }
  317. #ifdef CONFIG_PM
  318. /* REVISIT ... not clear this is the best way to handle system suspend; and
  319. * it's very inappropriate for selective device suspend (e.g. suspending this
  320. * through sysfs rather than by stopping the watchdog daemon). Also, this
  321. * may not play well enough with NOWAYOUT...
  322. */
  323. static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
  324. {
  325. struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
  326. if (wdev->omap_wdt_users) {
  327. pm_runtime_get_sync(wdev->dev);
  328. omap_wdt_disable(wdev);
  329. pm_runtime_put_sync(wdev->dev);
  330. }
  331. return 0;
  332. }
  333. static int omap_wdt_resume(struct platform_device *pdev)
  334. {
  335. struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
  336. if (wdev->omap_wdt_users) {
  337. pm_runtime_get_sync(wdev->dev);
  338. omap_wdt_enable(wdev);
  339. omap_wdt_ping(wdev);
  340. pm_runtime_put_sync(wdev->dev);
  341. }
  342. return 0;
  343. }
  344. #else
  345. #define omap_wdt_suspend NULL
  346. #define omap_wdt_resume NULL
  347. #endif
  348. static struct platform_driver omap_wdt_driver = {
  349. .probe = omap_wdt_probe,
  350. .remove = __devexit_p(omap_wdt_remove),
  351. .shutdown = omap_wdt_shutdown,
  352. .suspend = omap_wdt_suspend,
  353. .resume = omap_wdt_resume,
  354. .driver = {
  355. .owner = THIS_MODULE,
  356. .name = "omap_wdt",
  357. },
  358. };
  359. module_platform_driver(omap_wdt_driver);
  360. MODULE_AUTHOR("George G. Davis");
  361. MODULE_LICENSE("GPL");
  362. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
  363. MODULE_ALIAS("platform:omap_wdt");