at91sam9_wdt.c 7.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327
  1. /*
  2. * Watchdog driver for Atmel AT91SAM9x processors.
  3. *
  4. * Copyright (C) 2008 Renaud CERRATO r.cerrato@til-technologies.fr
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the License, or (at your option) any later version.
  10. */
  11. /*
  12. * The Watchdog Timer Mode Register can be only written to once. If the
  13. * timeout need to be set from Linux, be sure that the bootstrap or the
  14. * bootloader doesn't write to this register.
  15. */
  16. #include <linux/errno.h>
  17. #include <linux/fs.h>
  18. #include <linux/init.h>
  19. #include <linux/io.h>
  20. #include <linux/kernel.h>
  21. #include <linux/miscdevice.h>
  22. #include <linux/module.h>
  23. #include <linux/moduleparam.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/types.h>
  26. #include <linux/watchdog.h>
  27. #include <linux/jiffies.h>
  28. #include <linux/timer.h>
  29. #include <linux/bitops.h>
  30. #include <linux/uaccess.h>
  31. #include "at91sam9_wdt.h"
  32. #define DRV_NAME "AT91SAM9 Watchdog"
  33. #define wdt_read(field) \
  34. __raw_readl(at91wdt_private.base + field)
  35. #define wdt_write(field, val) \
  36. __raw_writel((val), at91wdt_private.base + field)
  37. /* AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
  38. * use this to convert a watchdog
  39. * value from/to milliseconds.
  40. */
  41. #define ms_to_ticks(t) (((t << 8) / 1000) - 1)
  42. #define ticks_to_ms(t) (((t + 1) * 1000) >> 8)
  43. /* Hardware timeout in seconds */
  44. #define WDT_HW_TIMEOUT 2
  45. /* Timer heartbeat (500ms) */
  46. #define WDT_TIMEOUT (HZ/2)
  47. /* User land timeout */
  48. #define WDT_HEARTBEAT 15
  49. static int heartbeat = WDT_HEARTBEAT;
  50. module_param(heartbeat, int, 0);
  51. MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds. "
  52. "(default = " __MODULE_STRING(WDT_HEARTBEAT) ")");
  53. static int nowayout = WATCHDOG_NOWAYOUT;
  54. module_param(nowayout, int, 0);
  55. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
  56. "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  57. static void at91_ping(unsigned long data);
  58. static struct {
  59. void __iomem *base;
  60. unsigned long next_heartbeat; /* the next_heartbeat for the timer */
  61. unsigned long open;
  62. char expect_close;
  63. struct timer_list timer; /* The timer that pings the watchdog */
  64. } at91wdt_private;
  65. /* ......................................................................... */
  66. /*
  67. * Reload the watchdog timer. (ie, pat the watchdog)
  68. */
  69. static inline void at91_wdt_reset(void)
  70. {
  71. wdt_write(AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
  72. }
  73. /*
  74. * Timer tick
  75. */
  76. static void at91_ping(unsigned long data)
  77. {
  78. if (time_before(jiffies, at91wdt_private.next_heartbeat) ||
  79. (!nowayout && !at91wdt_private.open)) {
  80. at91_wdt_reset();
  81. mod_timer(&at91wdt_private.timer, jiffies + WDT_TIMEOUT);
  82. } else
  83. printk(KERN_CRIT DRV_NAME": I will reset your machine !\n");
  84. }
  85. /*
  86. * Watchdog device is opened, and watchdog starts running.
  87. */
  88. static int at91_wdt_open(struct inode *inode, struct file *file)
  89. {
  90. if (test_and_set_bit(0, &at91wdt_private.open))
  91. return -EBUSY;
  92. at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ;
  93. mod_timer(&at91wdt_private.timer, jiffies + WDT_TIMEOUT);
  94. return nonseekable_open(inode, file);
  95. }
  96. /*
  97. * Close the watchdog device.
  98. */
  99. static int at91_wdt_close(struct inode *inode, struct file *file)
  100. {
  101. clear_bit(0, &at91wdt_private.open);
  102. /* stop internal ping */
  103. if (!at91wdt_private.expect_close)
  104. del_timer(&at91wdt_private.timer);
  105. at91wdt_private.expect_close = 0;
  106. return 0;
  107. }
  108. /*
  109. * Set the watchdog time interval in 1/256Hz (write-once)
  110. * Counter is 12 bit.
  111. */
  112. static int at91_wdt_settimeout(unsigned int timeout)
  113. {
  114. unsigned int reg;
  115. unsigned int mr;
  116. /* Check if disabled */
  117. mr = wdt_read(AT91_WDT_MR);
  118. if (mr & AT91_WDT_WDDIS) {
  119. printk(KERN_ERR DRV_NAME": sorry, watchdog is disabled\n");
  120. return -EIO;
  121. }
  122. /*
  123. * All counting occurs at SLOW_CLOCK / 128 = 256 Hz
  124. *
  125. * Since WDV is a 12-bit counter, the maximum period is
  126. * 4096 / 256 = 16 seconds.
  127. */
  128. reg = AT91_WDT_WDRSTEN /* causes watchdog reset */
  129. /* | AT91_WDT_WDRPROC causes processor reset only */
  130. | AT91_WDT_WDDBGHLT /* disabled in debug mode */
  131. | AT91_WDT_WDD /* restart at any time */
  132. | (timeout & AT91_WDT_WDV); /* timer value */
  133. wdt_write(AT91_WDT_MR, reg);
  134. return 0;
  135. }
  136. static const struct watchdog_info at91_wdt_info = {
  137. .identity = DRV_NAME,
  138. .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
  139. WDIOF_MAGICCLOSE,
  140. };
  141. /*
  142. * Handle commands from user-space.
  143. */
  144. static long at91_wdt_ioctl(struct file *file,
  145. unsigned int cmd, unsigned long arg)
  146. {
  147. void __user *argp = (void __user *)arg;
  148. int __user *p = argp;
  149. int new_value;
  150. switch (cmd) {
  151. case WDIOC_GETSUPPORT:
  152. return copy_to_user(argp, &at91_wdt_info,
  153. sizeof(at91_wdt_info)) ? -EFAULT : 0;
  154. case WDIOC_GETSTATUS:
  155. case WDIOC_GETBOOTSTATUS:
  156. return put_user(0, p);
  157. case WDIOC_KEEPALIVE:
  158. at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ;
  159. return 0;
  160. case WDIOC_SETTIMEOUT:
  161. if (get_user(new_value, p))
  162. return -EFAULT;
  163. heartbeat = new_value;
  164. at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ;
  165. return put_user(new_value, p); /* return current value */
  166. case WDIOC_GETTIMEOUT:
  167. return put_user(heartbeat, p);
  168. }
  169. return -ENOTTY;
  170. }
  171. /*
  172. * Pat the watchdog whenever device is written to.
  173. */
  174. static ssize_t at91_wdt_write(struct file *file, const char *data, size_t len,
  175. loff_t *ppos)
  176. {
  177. if (!len)
  178. return 0;
  179. /* Scan for magic character */
  180. if (!nowayout) {
  181. size_t i;
  182. at91wdt_private.expect_close = 0;
  183. for (i = 0; i < len; i++) {
  184. char c;
  185. if (get_user(c, data + i))
  186. return -EFAULT;
  187. if (c == 'V') {
  188. at91wdt_private.expect_close = 42;
  189. break;
  190. }
  191. }
  192. }
  193. at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ;
  194. return len;
  195. }
  196. /* ......................................................................... */
  197. static const struct file_operations at91wdt_fops = {
  198. .owner = THIS_MODULE,
  199. .llseek = no_llseek,
  200. .unlocked_ioctl = at91_wdt_ioctl,
  201. .open = at91_wdt_open,
  202. .release = at91_wdt_close,
  203. .write = at91_wdt_write,
  204. };
  205. static struct miscdevice at91wdt_miscdev = {
  206. .minor = WATCHDOG_MINOR,
  207. .name = "watchdog",
  208. .fops = &at91wdt_fops,
  209. };
  210. static int __init at91wdt_probe(struct platform_device *pdev)
  211. {
  212. struct resource *r;
  213. int res;
  214. if (at91wdt_miscdev.parent)
  215. return -EBUSY;
  216. at91wdt_miscdev.parent = &pdev->dev;
  217. r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  218. if (!r)
  219. return -ENODEV;
  220. at91wdt_private.base = ioremap(r->start, resource_size(r));
  221. if (!at91wdt_private.base) {
  222. dev_err(&pdev->dev, "failed to map registers, aborting.\n");
  223. return -ENOMEM;
  224. }
  225. /* Set watchdog */
  226. res = at91_wdt_settimeout(ms_to_ticks(WDT_HW_TIMEOUT * 1000));
  227. if (res)
  228. return res;
  229. res = misc_register(&at91wdt_miscdev);
  230. if (res)
  231. return res;
  232. at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ;
  233. setup_timer(&at91wdt_private.timer, at91_ping, 0);
  234. mod_timer(&at91wdt_private.timer, jiffies + WDT_TIMEOUT);
  235. printk(KERN_INFO DRV_NAME " enabled (heartbeat=%d sec, nowayout=%d)\n",
  236. heartbeat, nowayout);
  237. return 0;
  238. }
  239. static int __exit at91wdt_remove(struct platform_device *pdev)
  240. {
  241. int res;
  242. res = misc_deregister(&at91wdt_miscdev);
  243. if (!res)
  244. at91wdt_miscdev.parent = NULL;
  245. return res;
  246. }
  247. static struct platform_driver at91wdt_driver = {
  248. .remove = __exit_p(at91wdt_remove),
  249. .driver = {
  250. .name = "at91_wdt",
  251. .owner = THIS_MODULE,
  252. },
  253. };
  254. static int __init at91sam_wdt_init(void)
  255. {
  256. return platform_driver_probe(&at91wdt_driver, at91wdt_probe);
  257. }
  258. static void __exit at91sam_wdt_exit(void)
  259. {
  260. platform_driver_unregister(&at91wdt_driver);
  261. }
  262. module_init(at91sam_wdt_init);
  263. module_exit(at91sam_wdt_exit);
  264. MODULE_AUTHOR("Renaud CERRATO <r.cerrato@til-technologies.fr>");
  265. MODULE_DESCRIPTION("Watchdog driver for Atmel AT91SAM9x processors");
  266. MODULE_LICENSE("GPL");
  267. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);