mxser.c 69 KB

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  1. /*
  2. * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
  3. *
  4. * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
  5. * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
  6. *
  7. * This code is loosely based on the 1.8 moxa driver which is based on
  8. * Linux serial driver, written by Linus Torvalds, Theodore T'so and
  9. * others.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
  17. * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on
  18. * www.moxa.com.
  19. * - Fixed x86_64 cleanness
  20. */
  21. #include <linux/module.h>
  22. #include <linux/errno.h>
  23. #include <linux/signal.h>
  24. #include <linux/sched.h>
  25. #include <linux/timer.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/tty.h>
  28. #include <linux/tty_flip.h>
  29. #include <linux/serial.h>
  30. #include <linux/serial_reg.h>
  31. #include <linux/major.h>
  32. #include <linux/string.h>
  33. #include <linux/fcntl.h>
  34. #include <linux/ptrace.h>
  35. #include <linux/ioport.h>
  36. #include <linux/mm.h>
  37. #include <linux/delay.h>
  38. #include <linux/pci.h>
  39. #include <linux/bitops.h>
  40. #include <linux/slab.h>
  41. #include <linux/ratelimit.h>
  42. #include <asm/system.h>
  43. #include <asm/io.h>
  44. #include <asm/irq.h>
  45. #include <asm/uaccess.h>
  46. #include "mxser.h"
  47. #define MXSER_VERSION "2.0.5" /* 1.14 */
  48. #define MXSERMAJOR 174
  49. #define MXSER_BOARDS 4 /* Max. boards */
  50. #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
  51. #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
  52. #define MXSER_ISR_PASS_LIMIT 100
  53. /*CheckIsMoxaMust return value*/
  54. #define MOXA_OTHER_UART 0x00
  55. #define MOXA_MUST_MU150_HWID 0x01
  56. #define MOXA_MUST_MU860_HWID 0x02
  57. #define WAKEUP_CHARS 256
  58. #define UART_MCR_AFE 0x20
  59. #define UART_LSR_SPECIAL 0x1E
  60. #define PCI_DEVICE_ID_POS104UL 0x1044
  61. #define PCI_DEVICE_ID_CB108 0x1080
  62. #define PCI_DEVICE_ID_CP102UF 0x1023
  63. #define PCI_DEVICE_ID_CP112UL 0x1120
  64. #define PCI_DEVICE_ID_CB114 0x1142
  65. #define PCI_DEVICE_ID_CP114UL 0x1143
  66. #define PCI_DEVICE_ID_CB134I 0x1341
  67. #define PCI_DEVICE_ID_CP138U 0x1380
  68. #define C168_ASIC_ID 1
  69. #define C104_ASIC_ID 2
  70. #define C102_ASIC_ID 0xB
  71. #define CI132_ASIC_ID 4
  72. #define CI134_ASIC_ID 3
  73. #define CI104J_ASIC_ID 5
  74. #define MXSER_HIGHBAUD 1
  75. #define MXSER_HAS2 2
  76. /* This is only for PCI */
  77. static const struct {
  78. int type;
  79. int tx_fifo;
  80. int rx_fifo;
  81. int xmit_fifo_size;
  82. int rx_high_water;
  83. int rx_trigger;
  84. int rx_low_water;
  85. long max_baud;
  86. } Gpci_uart_info[] = {
  87. {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
  88. {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
  89. {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
  90. };
  91. #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
  92. struct mxser_cardinfo {
  93. char *name;
  94. unsigned int nports;
  95. unsigned int flags;
  96. };
  97. static const struct mxser_cardinfo mxser_cards[] = {
  98. /* 0*/ { "C168 series", 8, },
  99. { "C104 series", 4, },
  100. { "CI-104J series", 4, },
  101. { "C168H/PCI series", 8, },
  102. { "C104H/PCI series", 4, },
  103. /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
  104. { "CI-132 series", 4, MXSER_HAS2 },
  105. { "CI-134 series", 4, },
  106. { "CP-132 series", 2, },
  107. { "CP-114 series", 4, },
  108. /*10*/ { "CT-114 series", 4, },
  109. { "CP-102 series", 2, MXSER_HIGHBAUD },
  110. { "CP-104U series", 4, },
  111. { "CP-168U series", 8, },
  112. { "CP-132U series", 2, },
  113. /*15*/ { "CP-134U series", 4, },
  114. { "CP-104JU series", 4, },
  115. { "Moxa UC7000 Serial", 8, }, /* RC7000 */
  116. { "CP-118U series", 8, },
  117. { "CP-102UL series", 2, },
  118. /*20*/ { "CP-102U series", 2, },
  119. { "CP-118EL series", 8, },
  120. { "CP-168EL series", 8, },
  121. { "CP-104EL series", 4, },
  122. { "CB-108 series", 8, },
  123. /*25*/ { "CB-114 series", 4, },
  124. { "CB-134I series", 4, },
  125. { "CP-138U series", 8, },
  126. { "POS-104UL series", 4, },
  127. { "CP-114UL series", 4, },
  128. /*30*/ { "CP-102UF series", 2, },
  129. { "CP-112UL series", 2, },
  130. };
  131. /* driver_data correspond to the lines in the structure above
  132. see also ISA probe function before you change something */
  133. static struct pci_device_id mxser_pcibrds[] = {
  134. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
  135. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
  136. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
  137. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
  138. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
  139. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
  140. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
  141. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
  142. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
  143. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
  144. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
  145. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
  146. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
  147. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
  148. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
  149. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
  150. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
  151. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
  152. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
  153. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
  154. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
  155. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
  156. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
  157. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
  158. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
  159. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP112UL), .driver_data = 31 },
  160. { }
  161. };
  162. MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
  163. static unsigned long ioaddr[MXSER_BOARDS];
  164. static int ttymajor = MXSERMAJOR;
  165. /* Variables for insmod */
  166. MODULE_AUTHOR("Casper Yang");
  167. MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
  168. module_param_array(ioaddr, ulong, NULL, 0);
  169. MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board");
  170. module_param(ttymajor, int, 0);
  171. MODULE_LICENSE("GPL");
  172. struct mxser_log {
  173. int tick;
  174. unsigned long rxcnt[MXSER_PORTS];
  175. unsigned long txcnt[MXSER_PORTS];
  176. };
  177. struct mxser_mon {
  178. unsigned long rxcnt;
  179. unsigned long txcnt;
  180. unsigned long up_rxcnt;
  181. unsigned long up_txcnt;
  182. int modem_status;
  183. unsigned char hold_reason;
  184. };
  185. struct mxser_mon_ext {
  186. unsigned long rx_cnt[32];
  187. unsigned long tx_cnt[32];
  188. unsigned long up_rxcnt[32];
  189. unsigned long up_txcnt[32];
  190. int modem_status[32];
  191. long baudrate[32];
  192. int databits[32];
  193. int stopbits[32];
  194. int parity[32];
  195. int flowctrl[32];
  196. int fifo[32];
  197. int iftype[32];
  198. };
  199. struct mxser_board;
  200. struct mxser_port {
  201. struct tty_port port;
  202. struct mxser_board *board;
  203. unsigned long ioaddr;
  204. unsigned long opmode_ioaddr;
  205. int max_baud;
  206. int rx_high_water;
  207. int rx_trigger; /* Rx fifo trigger level */
  208. int rx_low_water;
  209. int baud_base; /* max. speed */
  210. int type; /* UART type */
  211. int x_char; /* xon/xoff character */
  212. int IER; /* Interrupt Enable Register */
  213. int MCR; /* Modem control register */
  214. unsigned char stop_rx;
  215. unsigned char ldisc_stop_rx;
  216. int custom_divisor;
  217. unsigned char err_shadow;
  218. struct async_icount icount; /* kernel counters for 4 input interrupts */
  219. int timeout;
  220. int read_status_mask;
  221. int ignore_status_mask;
  222. int xmit_fifo_size;
  223. int xmit_head;
  224. int xmit_tail;
  225. int xmit_cnt;
  226. struct ktermios normal_termios;
  227. struct mxser_mon mon_data;
  228. spinlock_t slock;
  229. };
  230. struct mxser_board {
  231. unsigned int idx;
  232. int irq;
  233. const struct mxser_cardinfo *info;
  234. unsigned long vector;
  235. unsigned long vector_mask;
  236. int chip_flag;
  237. int uart_type;
  238. struct mxser_port ports[MXSER_PORTS_PER_BOARD];
  239. };
  240. struct mxser_mstatus {
  241. tcflag_t cflag;
  242. int cts;
  243. int dsr;
  244. int ri;
  245. int dcd;
  246. };
  247. static struct mxser_board mxser_boards[MXSER_BOARDS];
  248. static struct tty_driver *mxvar_sdriver;
  249. static struct mxser_log mxvar_log;
  250. static int mxser_set_baud_method[MXSER_PORTS + 1];
  251. static void mxser_enable_must_enchance_mode(unsigned long baseio)
  252. {
  253. u8 oldlcr;
  254. u8 efr;
  255. oldlcr = inb(baseio + UART_LCR);
  256. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  257. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  258. efr |= MOXA_MUST_EFR_EFRB_ENABLE;
  259. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  260. outb(oldlcr, baseio + UART_LCR);
  261. }
  262. #ifdef CONFIG_PCI
  263. static void mxser_disable_must_enchance_mode(unsigned long baseio)
  264. {
  265. u8 oldlcr;
  266. u8 efr;
  267. oldlcr = inb(baseio + UART_LCR);
  268. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  269. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  270. efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
  271. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  272. outb(oldlcr, baseio + UART_LCR);
  273. }
  274. #endif
  275. static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
  276. {
  277. u8 oldlcr;
  278. u8 efr;
  279. oldlcr = inb(baseio + UART_LCR);
  280. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  281. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  282. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  283. efr |= MOXA_MUST_EFR_BANK0;
  284. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  285. outb(value, baseio + MOXA_MUST_XON1_REGISTER);
  286. outb(oldlcr, baseio + UART_LCR);
  287. }
  288. static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
  289. {
  290. u8 oldlcr;
  291. u8 efr;
  292. oldlcr = inb(baseio + UART_LCR);
  293. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  294. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  295. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  296. efr |= MOXA_MUST_EFR_BANK0;
  297. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  298. outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
  299. outb(oldlcr, baseio + UART_LCR);
  300. }
  301. static void mxser_set_must_fifo_value(struct mxser_port *info)
  302. {
  303. u8 oldlcr;
  304. u8 efr;
  305. oldlcr = inb(info->ioaddr + UART_LCR);
  306. outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
  307. efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
  308. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  309. efr |= MOXA_MUST_EFR_BANK1;
  310. outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
  311. outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
  312. outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
  313. outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
  314. outb(oldlcr, info->ioaddr + UART_LCR);
  315. }
  316. static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
  317. {
  318. u8 oldlcr;
  319. u8 efr;
  320. oldlcr = inb(baseio + UART_LCR);
  321. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  322. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  323. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  324. efr |= MOXA_MUST_EFR_BANK2;
  325. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  326. outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
  327. outb(oldlcr, baseio + UART_LCR);
  328. }
  329. #ifdef CONFIG_PCI
  330. static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
  331. {
  332. u8 oldlcr;
  333. u8 efr;
  334. oldlcr = inb(baseio + UART_LCR);
  335. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  336. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  337. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  338. efr |= MOXA_MUST_EFR_BANK2;
  339. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  340. *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
  341. outb(oldlcr, baseio + UART_LCR);
  342. }
  343. #endif
  344. static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
  345. {
  346. u8 oldlcr;
  347. u8 efr;
  348. oldlcr = inb(baseio + UART_LCR);
  349. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  350. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  351. efr &= ~MOXA_MUST_EFR_SF_MASK;
  352. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  353. outb(oldlcr, baseio + UART_LCR);
  354. }
  355. static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
  356. {
  357. u8 oldlcr;
  358. u8 efr;
  359. oldlcr = inb(baseio + UART_LCR);
  360. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  361. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  362. efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
  363. efr |= MOXA_MUST_EFR_SF_TX1;
  364. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  365. outb(oldlcr, baseio + UART_LCR);
  366. }
  367. static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
  368. {
  369. u8 oldlcr;
  370. u8 efr;
  371. oldlcr = inb(baseio + UART_LCR);
  372. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  373. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  374. efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
  375. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  376. outb(oldlcr, baseio + UART_LCR);
  377. }
  378. static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
  379. {
  380. u8 oldlcr;
  381. u8 efr;
  382. oldlcr = inb(baseio + UART_LCR);
  383. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  384. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  385. efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
  386. efr |= MOXA_MUST_EFR_SF_RX1;
  387. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  388. outb(oldlcr, baseio + UART_LCR);
  389. }
  390. static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
  391. {
  392. u8 oldlcr;
  393. u8 efr;
  394. oldlcr = inb(baseio + UART_LCR);
  395. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  396. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  397. efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
  398. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  399. outb(oldlcr, baseio + UART_LCR);
  400. }
  401. #ifdef CONFIG_PCI
  402. static int __devinit CheckIsMoxaMust(unsigned long io)
  403. {
  404. u8 oldmcr, hwid;
  405. int i;
  406. outb(0, io + UART_LCR);
  407. mxser_disable_must_enchance_mode(io);
  408. oldmcr = inb(io + UART_MCR);
  409. outb(0, io + UART_MCR);
  410. mxser_set_must_xon1_value(io, 0x11);
  411. if ((hwid = inb(io + UART_MCR)) != 0) {
  412. outb(oldmcr, io + UART_MCR);
  413. return MOXA_OTHER_UART;
  414. }
  415. mxser_get_must_hardware_id(io, &hwid);
  416. for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
  417. if (hwid == Gpci_uart_info[i].type)
  418. return (int)hwid;
  419. }
  420. return MOXA_OTHER_UART;
  421. }
  422. #endif
  423. static void process_txrx_fifo(struct mxser_port *info)
  424. {
  425. int i;
  426. if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
  427. info->rx_trigger = 1;
  428. info->rx_high_water = 1;
  429. info->rx_low_water = 1;
  430. info->xmit_fifo_size = 1;
  431. } else
  432. for (i = 0; i < UART_INFO_NUM; i++)
  433. if (info->board->chip_flag == Gpci_uart_info[i].type) {
  434. info->rx_trigger = Gpci_uart_info[i].rx_trigger;
  435. info->rx_low_water = Gpci_uart_info[i].rx_low_water;
  436. info->rx_high_water = Gpci_uart_info[i].rx_high_water;
  437. info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
  438. break;
  439. }
  440. }
  441. static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
  442. {
  443. static unsigned char mxser_msr[MXSER_PORTS + 1];
  444. unsigned char status = 0;
  445. status = inb(baseaddr + UART_MSR);
  446. mxser_msr[port] &= 0x0F;
  447. mxser_msr[port] |= status;
  448. status = mxser_msr[port];
  449. if (mode)
  450. mxser_msr[port] = 0;
  451. return status;
  452. }
  453. static int mxser_carrier_raised(struct tty_port *port)
  454. {
  455. struct mxser_port *mp = container_of(port, struct mxser_port, port);
  456. return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0;
  457. }
  458. static void mxser_dtr_rts(struct tty_port *port, int on)
  459. {
  460. struct mxser_port *mp = container_of(port, struct mxser_port, port);
  461. unsigned long flags;
  462. spin_lock_irqsave(&mp->slock, flags);
  463. if (on)
  464. outb(inb(mp->ioaddr + UART_MCR) |
  465. UART_MCR_DTR | UART_MCR_RTS, mp->ioaddr + UART_MCR);
  466. else
  467. outb(inb(mp->ioaddr + UART_MCR)&~(UART_MCR_DTR | UART_MCR_RTS),
  468. mp->ioaddr + UART_MCR);
  469. spin_unlock_irqrestore(&mp->slock, flags);
  470. }
  471. static int mxser_set_baud(struct tty_struct *tty, long newspd)
  472. {
  473. struct mxser_port *info = tty->driver_data;
  474. int quot = 0, baud;
  475. unsigned char cval;
  476. if (!info->ioaddr)
  477. return -1;
  478. if (newspd > info->max_baud)
  479. return -1;
  480. if (newspd == 134) {
  481. quot = 2 * info->baud_base / 269;
  482. tty_encode_baud_rate(tty, 134, 134);
  483. } else if (newspd) {
  484. quot = info->baud_base / newspd;
  485. if (quot == 0)
  486. quot = 1;
  487. baud = info->baud_base/quot;
  488. tty_encode_baud_rate(tty, baud, baud);
  489. } else {
  490. quot = 0;
  491. }
  492. info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
  493. info->timeout += HZ / 50; /* Add .02 seconds of slop */
  494. if (quot) {
  495. info->MCR |= UART_MCR_DTR;
  496. outb(info->MCR, info->ioaddr + UART_MCR);
  497. } else {
  498. info->MCR &= ~UART_MCR_DTR;
  499. outb(info->MCR, info->ioaddr + UART_MCR);
  500. return 0;
  501. }
  502. cval = inb(info->ioaddr + UART_LCR);
  503. outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
  504. outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
  505. outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
  506. outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
  507. #ifdef BOTHER
  508. if (C_BAUD(tty) == BOTHER) {
  509. quot = info->baud_base % newspd;
  510. quot *= 8;
  511. if (quot % newspd > newspd / 2) {
  512. quot /= newspd;
  513. quot++;
  514. } else
  515. quot /= newspd;
  516. mxser_set_must_enum_value(info->ioaddr, quot);
  517. } else
  518. #endif
  519. mxser_set_must_enum_value(info->ioaddr, 0);
  520. return 0;
  521. }
  522. /*
  523. * This routine is called to set the UART divisor registers to match
  524. * the specified baud rate for a serial port.
  525. */
  526. static int mxser_change_speed(struct tty_struct *tty,
  527. struct ktermios *old_termios)
  528. {
  529. struct mxser_port *info = tty->driver_data;
  530. unsigned cflag, cval, fcr;
  531. int ret = 0;
  532. unsigned char status;
  533. cflag = tty->termios->c_cflag;
  534. if (!info->ioaddr)
  535. return ret;
  536. if (mxser_set_baud_method[tty->index] == 0)
  537. mxser_set_baud(tty, tty_get_baud_rate(tty));
  538. /* byte size and parity */
  539. switch (cflag & CSIZE) {
  540. case CS5:
  541. cval = 0x00;
  542. break;
  543. case CS6:
  544. cval = 0x01;
  545. break;
  546. case CS7:
  547. cval = 0x02;
  548. break;
  549. case CS8:
  550. cval = 0x03;
  551. break;
  552. default:
  553. cval = 0x00;
  554. break; /* too keep GCC shut... */
  555. }
  556. if (cflag & CSTOPB)
  557. cval |= 0x04;
  558. if (cflag & PARENB)
  559. cval |= UART_LCR_PARITY;
  560. if (!(cflag & PARODD))
  561. cval |= UART_LCR_EPAR;
  562. if (cflag & CMSPAR)
  563. cval |= UART_LCR_SPAR;
  564. if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
  565. if (info->board->chip_flag) {
  566. fcr = UART_FCR_ENABLE_FIFO;
  567. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  568. mxser_set_must_fifo_value(info);
  569. } else
  570. fcr = 0;
  571. } else {
  572. fcr = UART_FCR_ENABLE_FIFO;
  573. if (info->board->chip_flag) {
  574. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  575. mxser_set_must_fifo_value(info);
  576. } else {
  577. switch (info->rx_trigger) {
  578. case 1:
  579. fcr |= UART_FCR_TRIGGER_1;
  580. break;
  581. case 4:
  582. fcr |= UART_FCR_TRIGGER_4;
  583. break;
  584. case 8:
  585. fcr |= UART_FCR_TRIGGER_8;
  586. break;
  587. default:
  588. fcr |= UART_FCR_TRIGGER_14;
  589. break;
  590. }
  591. }
  592. }
  593. /* CTS flow control flag and modem status interrupts */
  594. info->IER &= ~UART_IER_MSI;
  595. info->MCR &= ~UART_MCR_AFE;
  596. if (cflag & CRTSCTS) {
  597. info->port.flags |= ASYNC_CTS_FLOW;
  598. info->IER |= UART_IER_MSI;
  599. if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
  600. info->MCR |= UART_MCR_AFE;
  601. } else {
  602. status = inb(info->ioaddr + UART_MSR);
  603. if (tty->hw_stopped) {
  604. if (status & UART_MSR_CTS) {
  605. tty->hw_stopped = 0;
  606. if (info->type != PORT_16550A &&
  607. !info->board->chip_flag) {
  608. outb(info->IER & ~UART_IER_THRI,
  609. info->ioaddr +
  610. UART_IER);
  611. info->IER |= UART_IER_THRI;
  612. outb(info->IER, info->ioaddr +
  613. UART_IER);
  614. }
  615. tty_wakeup(tty);
  616. }
  617. } else {
  618. if (!(status & UART_MSR_CTS)) {
  619. tty->hw_stopped = 1;
  620. if ((info->type != PORT_16550A) &&
  621. (!info->board->chip_flag)) {
  622. info->IER &= ~UART_IER_THRI;
  623. outb(info->IER, info->ioaddr +
  624. UART_IER);
  625. }
  626. }
  627. }
  628. }
  629. } else {
  630. info->port.flags &= ~ASYNC_CTS_FLOW;
  631. }
  632. outb(info->MCR, info->ioaddr + UART_MCR);
  633. if (cflag & CLOCAL) {
  634. info->port.flags &= ~ASYNC_CHECK_CD;
  635. } else {
  636. info->port.flags |= ASYNC_CHECK_CD;
  637. info->IER |= UART_IER_MSI;
  638. }
  639. outb(info->IER, info->ioaddr + UART_IER);
  640. /*
  641. * Set up parity check flag
  642. */
  643. info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  644. if (I_INPCK(tty))
  645. info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  646. if (I_BRKINT(tty) || I_PARMRK(tty))
  647. info->read_status_mask |= UART_LSR_BI;
  648. info->ignore_status_mask = 0;
  649. if (I_IGNBRK(tty)) {
  650. info->ignore_status_mask |= UART_LSR_BI;
  651. info->read_status_mask |= UART_LSR_BI;
  652. /*
  653. * If we're ignore parity and break indicators, ignore
  654. * overruns too. (For real raw support).
  655. */
  656. if (I_IGNPAR(tty)) {
  657. info->ignore_status_mask |=
  658. UART_LSR_OE |
  659. UART_LSR_PE |
  660. UART_LSR_FE;
  661. info->read_status_mask |=
  662. UART_LSR_OE |
  663. UART_LSR_PE |
  664. UART_LSR_FE;
  665. }
  666. }
  667. if (info->board->chip_flag) {
  668. mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty));
  669. mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty));
  670. if (I_IXON(tty)) {
  671. mxser_enable_must_rx_software_flow_control(
  672. info->ioaddr);
  673. } else {
  674. mxser_disable_must_rx_software_flow_control(
  675. info->ioaddr);
  676. }
  677. if (I_IXOFF(tty)) {
  678. mxser_enable_must_tx_software_flow_control(
  679. info->ioaddr);
  680. } else {
  681. mxser_disable_must_tx_software_flow_control(
  682. info->ioaddr);
  683. }
  684. }
  685. outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
  686. outb(cval, info->ioaddr + UART_LCR);
  687. return ret;
  688. }
  689. static void mxser_check_modem_status(struct tty_struct *tty,
  690. struct mxser_port *port, int status)
  691. {
  692. /* update input line counters */
  693. if (status & UART_MSR_TERI)
  694. port->icount.rng++;
  695. if (status & UART_MSR_DDSR)
  696. port->icount.dsr++;
  697. if (status & UART_MSR_DDCD)
  698. port->icount.dcd++;
  699. if (status & UART_MSR_DCTS)
  700. port->icount.cts++;
  701. port->mon_data.modem_status = status;
  702. wake_up_interruptible(&port->port.delta_msr_wait);
  703. if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
  704. if (status & UART_MSR_DCD)
  705. wake_up_interruptible(&port->port.open_wait);
  706. }
  707. if (port->port.flags & ASYNC_CTS_FLOW) {
  708. if (tty->hw_stopped) {
  709. if (status & UART_MSR_CTS) {
  710. tty->hw_stopped = 0;
  711. if ((port->type != PORT_16550A) &&
  712. (!port->board->chip_flag)) {
  713. outb(port->IER & ~UART_IER_THRI,
  714. port->ioaddr + UART_IER);
  715. port->IER |= UART_IER_THRI;
  716. outb(port->IER, port->ioaddr +
  717. UART_IER);
  718. }
  719. tty_wakeup(tty);
  720. }
  721. } else {
  722. if (!(status & UART_MSR_CTS)) {
  723. tty->hw_stopped = 1;
  724. if (port->type != PORT_16550A &&
  725. !port->board->chip_flag) {
  726. port->IER &= ~UART_IER_THRI;
  727. outb(port->IER, port->ioaddr +
  728. UART_IER);
  729. }
  730. }
  731. }
  732. }
  733. }
  734. static int mxser_activate(struct tty_port *port, struct tty_struct *tty)
  735. {
  736. struct mxser_port *info = container_of(port, struct mxser_port, port);
  737. unsigned long page;
  738. unsigned long flags;
  739. page = __get_free_page(GFP_KERNEL);
  740. if (!page)
  741. return -ENOMEM;
  742. spin_lock_irqsave(&info->slock, flags);
  743. if (!info->ioaddr || !info->type) {
  744. set_bit(TTY_IO_ERROR, &tty->flags);
  745. free_page(page);
  746. spin_unlock_irqrestore(&info->slock, flags);
  747. return 0;
  748. }
  749. info->port.xmit_buf = (unsigned char *) page;
  750. /*
  751. * Clear the FIFO buffers and disable them
  752. * (they will be reenabled in mxser_change_speed())
  753. */
  754. if (info->board->chip_flag)
  755. outb((UART_FCR_CLEAR_RCVR |
  756. UART_FCR_CLEAR_XMIT |
  757. MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
  758. else
  759. outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  760. info->ioaddr + UART_FCR);
  761. /*
  762. * At this point there's no way the LSR could still be 0xFF;
  763. * if it is, then bail out, because there's likely no UART
  764. * here.
  765. */
  766. if (inb(info->ioaddr + UART_LSR) == 0xff) {
  767. spin_unlock_irqrestore(&info->slock, flags);
  768. if (capable(CAP_SYS_ADMIN)) {
  769. set_bit(TTY_IO_ERROR, &tty->flags);
  770. return 0;
  771. } else
  772. return -ENODEV;
  773. }
  774. /*
  775. * Clear the interrupt registers.
  776. */
  777. (void) inb(info->ioaddr + UART_LSR);
  778. (void) inb(info->ioaddr + UART_RX);
  779. (void) inb(info->ioaddr + UART_IIR);
  780. (void) inb(info->ioaddr + UART_MSR);
  781. /*
  782. * Now, initialize the UART
  783. */
  784. outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
  785. info->MCR = UART_MCR_DTR | UART_MCR_RTS;
  786. outb(info->MCR, info->ioaddr + UART_MCR);
  787. /*
  788. * Finally, enable interrupts
  789. */
  790. info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
  791. if (info->board->chip_flag)
  792. info->IER |= MOXA_MUST_IER_EGDAI;
  793. outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
  794. /*
  795. * And clear the interrupt registers again for luck.
  796. */
  797. (void) inb(info->ioaddr + UART_LSR);
  798. (void) inb(info->ioaddr + UART_RX);
  799. (void) inb(info->ioaddr + UART_IIR);
  800. (void) inb(info->ioaddr + UART_MSR);
  801. clear_bit(TTY_IO_ERROR, &tty->flags);
  802. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  803. /*
  804. * and set the speed of the serial port
  805. */
  806. mxser_change_speed(tty, NULL);
  807. spin_unlock_irqrestore(&info->slock, flags);
  808. return 0;
  809. }
  810. /*
  811. * This routine will shutdown a serial port
  812. */
  813. static void mxser_shutdown_port(struct tty_port *port)
  814. {
  815. struct mxser_port *info = container_of(port, struct mxser_port, port);
  816. unsigned long flags;
  817. spin_lock_irqsave(&info->slock, flags);
  818. /*
  819. * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
  820. * here so the queue might never be waken up
  821. */
  822. wake_up_interruptible(&info->port.delta_msr_wait);
  823. /*
  824. * Free the xmit buffer, if necessary
  825. */
  826. if (info->port.xmit_buf) {
  827. free_page((unsigned long) info->port.xmit_buf);
  828. info->port.xmit_buf = NULL;
  829. }
  830. info->IER = 0;
  831. outb(0x00, info->ioaddr + UART_IER);
  832. /* clear Rx/Tx FIFO's */
  833. if (info->board->chip_flag)
  834. outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
  835. MOXA_MUST_FCR_GDA_MODE_ENABLE,
  836. info->ioaddr + UART_FCR);
  837. else
  838. outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
  839. info->ioaddr + UART_FCR);
  840. /* read data port to reset things */
  841. (void) inb(info->ioaddr + UART_RX);
  842. if (info->board->chip_flag)
  843. SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
  844. spin_unlock_irqrestore(&info->slock, flags);
  845. }
  846. /*
  847. * This routine is called whenever a serial port is opened. It
  848. * enables interrupts for a serial port, linking in its async structure into
  849. * the IRQ chain. It also performs the serial-specific
  850. * initialization for the tty structure.
  851. */
  852. static int mxser_open(struct tty_struct *tty, struct file *filp)
  853. {
  854. struct mxser_port *info;
  855. int line;
  856. line = tty->index;
  857. if (line == MXSER_PORTS)
  858. return 0;
  859. info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
  860. if (!info->ioaddr)
  861. return -ENODEV;
  862. tty->driver_data = info;
  863. return tty_port_open(&info->port, tty, filp);
  864. }
  865. static void mxser_flush_buffer(struct tty_struct *tty)
  866. {
  867. struct mxser_port *info = tty->driver_data;
  868. char fcr;
  869. unsigned long flags;
  870. spin_lock_irqsave(&info->slock, flags);
  871. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  872. fcr = inb(info->ioaddr + UART_FCR);
  873. outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  874. info->ioaddr + UART_FCR);
  875. outb(fcr, info->ioaddr + UART_FCR);
  876. spin_unlock_irqrestore(&info->slock, flags);
  877. tty_wakeup(tty);
  878. }
  879. static void mxser_close_port(struct tty_port *port)
  880. {
  881. struct mxser_port *info = container_of(port, struct mxser_port, port);
  882. unsigned long timeout;
  883. /*
  884. * At this point we stop accepting input. To do this, we
  885. * disable the receive line status interrupts, and tell the
  886. * interrupt driver to stop checking the data ready bit in the
  887. * line status register.
  888. */
  889. info->IER &= ~UART_IER_RLSI;
  890. if (info->board->chip_flag)
  891. info->IER &= ~MOXA_MUST_RECV_ISR;
  892. outb(info->IER, info->ioaddr + UART_IER);
  893. /*
  894. * Before we drop DTR, make sure the UART transmitter
  895. * has completely drained; this is especially
  896. * important if there is a transmit FIFO!
  897. */
  898. timeout = jiffies + HZ;
  899. while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
  900. schedule_timeout_interruptible(5);
  901. if (time_after(jiffies, timeout))
  902. break;
  903. }
  904. }
  905. /*
  906. * This routine is called when the serial port gets closed. First, we
  907. * wait for the last remaining data to be sent. Then, we unlink its
  908. * async structure from the interrupt chain if necessary, and we free
  909. * that IRQ if nothing is left in the chain.
  910. */
  911. static void mxser_close(struct tty_struct *tty, struct file *filp)
  912. {
  913. struct mxser_port *info = tty->driver_data;
  914. struct tty_port *port = &info->port;
  915. if (tty->index == MXSER_PORTS || info == NULL)
  916. return;
  917. if (tty_port_close_start(port, tty, filp) == 0)
  918. return;
  919. mutex_lock(&port->mutex);
  920. mxser_close_port(port);
  921. mxser_flush_buffer(tty);
  922. mxser_shutdown_port(port);
  923. clear_bit(ASYNCB_INITIALIZED, &port->flags);
  924. mutex_unlock(&port->mutex);
  925. /* Right now the tty_port set is done outside of the close_end helper
  926. as we don't yet have everyone using refcounts */
  927. tty_port_close_end(port, tty);
  928. tty_port_tty_set(port, NULL);
  929. }
  930. static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
  931. {
  932. int c, total = 0;
  933. struct mxser_port *info = tty->driver_data;
  934. unsigned long flags;
  935. if (!info->port.xmit_buf)
  936. return 0;
  937. while (1) {
  938. c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
  939. SERIAL_XMIT_SIZE - info->xmit_head));
  940. if (c <= 0)
  941. break;
  942. memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
  943. spin_lock_irqsave(&info->slock, flags);
  944. info->xmit_head = (info->xmit_head + c) &
  945. (SERIAL_XMIT_SIZE - 1);
  946. info->xmit_cnt += c;
  947. spin_unlock_irqrestore(&info->slock, flags);
  948. buf += c;
  949. count -= c;
  950. total += c;
  951. }
  952. if (info->xmit_cnt && !tty->stopped) {
  953. if (!tty->hw_stopped ||
  954. (info->type == PORT_16550A) ||
  955. (info->board->chip_flag)) {
  956. spin_lock_irqsave(&info->slock, flags);
  957. outb(info->IER & ~UART_IER_THRI, info->ioaddr +
  958. UART_IER);
  959. info->IER |= UART_IER_THRI;
  960. outb(info->IER, info->ioaddr + UART_IER);
  961. spin_unlock_irqrestore(&info->slock, flags);
  962. }
  963. }
  964. return total;
  965. }
  966. static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
  967. {
  968. struct mxser_port *info = tty->driver_data;
  969. unsigned long flags;
  970. if (!info->port.xmit_buf)
  971. return 0;
  972. if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
  973. return 0;
  974. spin_lock_irqsave(&info->slock, flags);
  975. info->port.xmit_buf[info->xmit_head++] = ch;
  976. info->xmit_head &= SERIAL_XMIT_SIZE - 1;
  977. info->xmit_cnt++;
  978. spin_unlock_irqrestore(&info->slock, flags);
  979. if (!tty->stopped) {
  980. if (!tty->hw_stopped ||
  981. (info->type == PORT_16550A) ||
  982. info->board->chip_flag) {
  983. spin_lock_irqsave(&info->slock, flags);
  984. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  985. info->IER |= UART_IER_THRI;
  986. outb(info->IER, info->ioaddr + UART_IER);
  987. spin_unlock_irqrestore(&info->slock, flags);
  988. }
  989. }
  990. return 1;
  991. }
  992. static void mxser_flush_chars(struct tty_struct *tty)
  993. {
  994. struct mxser_port *info = tty->driver_data;
  995. unsigned long flags;
  996. if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf ||
  997. (tty->hw_stopped && info->type != PORT_16550A &&
  998. !info->board->chip_flag))
  999. return;
  1000. spin_lock_irqsave(&info->slock, flags);
  1001. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1002. info->IER |= UART_IER_THRI;
  1003. outb(info->IER, info->ioaddr + UART_IER);
  1004. spin_unlock_irqrestore(&info->slock, flags);
  1005. }
  1006. static int mxser_write_room(struct tty_struct *tty)
  1007. {
  1008. struct mxser_port *info = tty->driver_data;
  1009. int ret;
  1010. ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
  1011. return ret < 0 ? 0 : ret;
  1012. }
  1013. static int mxser_chars_in_buffer(struct tty_struct *tty)
  1014. {
  1015. struct mxser_port *info = tty->driver_data;
  1016. return info->xmit_cnt;
  1017. }
  1018. /*
  1019. * ------------------------------------------------------------
  1020. * friends of mxser_ioctl()
  1021. * ------------------------------------------------------------
  1022. */
  1023. static int mxser_get_serial_info(struct tty_struct *tty,
  1024. struct serial_struct __user *retinfo)
  1025. {
  1026. struct mxser_port *info = tty->driver_data;
  1027. struct serial_struct tmp = {
  1028. .type = info->type,
  1029. .line = tty->index,
  1030. .port = info->ioaddr,
  1031. .irq = info->board->irq,
  1032. .flags = info->port.flags,
  1033. .baud_base = info->baud_base,
  1034. .close_delay = info->port.close_delay,
  1035. .closing_wait = info->port.closing_wait,
  1036. .custom_divisor = info->custom_divisor,
  1037. .hub6 = 0
  1038. };
  1039. if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
  1040. return -EFAULT;
  1041. return 0;
  1042. }
  1043. static int mxser_set_serial_info(struct tty_struct *tty,
  1044. struct serial_struct __user *new_info)
  1045. {
  1046. struct mxser_port *info = tty->driver_data;
  1047. struct tty_port *port = &info->port;
  1048. struct serial_struct new_serial;
  1049. speed_t baud;
  1050. unsigned long sl_flags;
  1051. unsigned int flags;
  1052. int retval = 0;
  1053. if (!new_info || !info->ioaddr)
  1054. return -ENODEV;
  1055. if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
  1056. return -EFAULT;
  1057. if (new_serial.irq != info->board->irq ||
  1058. new_serial.port != info->ioaddr)
  1059. return -EINVAL;
  1060. flags = port->flags & ASYNC_SPD_MASK;
  1061. if (!capable(CAP_SYS_ADMIN)) {
  1062. if ((new_serial.baud_base != info->baud_base) ||
  1063. (new_serial.close_delay != info->port.close_delay) ||
  1064. ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK)))
  1065. return -EPERM;
  1066. info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
  1067. (new_serial.flags & ASYNC_USR_MASK));
  1068. } else {
  1069. /*
  1070. * OK, past this point, all the error checking has been done.
  1071. * At this point, we start making changes.....
  1072. */
  1073. port->flags = ((port->flags & ~ASYNC_FLAGS) |
  1074. (new_serial.flags & ASYNC_FLAGS));
  1075. port->close_delay = new_serial.close_delay * HZ / 100;
  1076. port->closing_wait = new_serial.closing_wait * HZ / 100;
  1077. tty->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
  1078. if ((port->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
  1079. (new_serial.baud_base != info->baud_base ||
  1080. new_serial.custom_divisor !=
  1081. info->custom_divisor)) {
  1082. if (new_serial.custom_divisor == 0)
  1083. return -EINVAL;
  1084. baud = new_serial.baud_base / new_serial.custom_divisor;
  1085. tty_encode_baud_rate(tty, baud, baud);
  1086. }
  1087. }
  1088. info->type = new_serial.type;
  1089. process_txrx_fifo(info);
  1090. if (test_bit(ASYNCB_INITIALIZED, &port->flags)) {
  1091. if (flags != (port->flags & ASYNC_SPD_MASK)) {
  1092. spin_lock_irqsave(&info->slock, sl_flags);
  1093. mxser_change_speed(tty, NULL);
  1094. spin_unlock_irqrestore(&info->slock, sl_flags);
  1095. }
  1096. } else {
  1097. retval = mxser_activate(port, tty);
  1098. if (retval == 0)
  1099. set_bit(ASYNCB_INITIALIZED, &port->flags);
  1100. }
  1101. return retval;
  1102. }
  1103. /*
  1104. * mxser_get_lsr_info - get line status register info
  1105. *
  1106. * Purpose: Let user call ioctl() to get info when the UART physically
  1107. * is emptied. On bus types like RS485, the transmitter must
  1108. * release the bus after transmitting. This must be done when
  1109. * the transmit shift register is empty, not be done when the
  1110. * transmit holding register is empty. This functionality
  1111. * allows an RS485 driver to be written in user space.
  1112. */
  1113. static int mxser_get_lsr_info(struct mxser_port *info,
  1114. unsigned int __user *value)
  1115. {
  1116. unsigned char status;
  1117. unsigned int result;
  1118. unsigned long flags;
  1119. spin_lock_irqsave(&info->slock, flags);
  1120. status = inb(info->ioaddr + UART_LSR);
  1121. spin_unlock_irqrestore(&info->slock, flags);
  1122. result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
  1123. return put_user(result, value);
  1124. }
  1125. static int mxser_tiocmget(struct tty_struct *tty)
  1126. {
  1127. struct mxser_port *info = tty->driver_data;
  1128. unsigned char control, status;
  1129. unsigned long flags;
  1130. if (tty->index == MXSER_PORTS)
  1131. return -ENOIOCTLCMD;
  1132. if (test_bit(TTY_IO_ERROR, &tty->flags))
  1133. return -EIO;
  1134. control = info->MCR;
  1135. spin_lock_irqsave(&info->slock, flags);
  1136. status = inb(info->ioaddr + UART_MSR);
  1137. if (status & UART_MSR_ANY_DELTA)
  1138. mxser_check_modem_status(tty, info, status);
  1139. spin_unlock_irqrestore(&info->slock, flags);
  1140. return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
  1141. ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
  1142. ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
  1143. ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
  1144. ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
  1145. ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
  1146. }
  1147. static int mxser_tiocmset(struct tty_struct *tty,
  1148. unsigned int set, unsigned int clear)
  1149. {
  1150. struct mxser_port *info = tty->driver_data;
  1151. unsigned long flags;
  1152. if (tty->index == MXSER_PORTS)
  1153. return -ENOIOCTLCMD;
  1154. if (test_bit(TTY_IO_ERROR, &tty->flags))
  1155. return -EIO;
  1156. spin_lock_irqsave(&info->slock, flags);
  1157. if (set & TIOCM_RTS)
  1158. info->MCR |= UART_MCR_RTS;
  1159. if (set & TIOCM_DTR)
  1160. info->MCR |= UART_MCR_DTR;
  1161. if (clear & TIOCM_RTS)
  1162. info->MCR &= ~UART_MCR_RTS;
  1163. if (clear & TIOCM_DTR)
  1164. info->MCR &= ~UART_MCR_DTR;
  1165. outb(info->MCR, info->ioaddr + UART_MCR);
  1166. spin_unlock_irqrestore(&info->slock, flags);
  1167. return 0;
  1168. }
  1169. static int __init mxser_program_mode(int port)
  1170. {
  1171. int id, i, j, n;
  1172. outb(0, port);
  1173. outb(0, port);
  1174. outb(0, port);
  1175. (void)inb(port);
  1176. (void)inb(port);
  1177. outb(0, port);
  1178. (void)inb(port);
  1179. id = inb(port + 1) & 0x1F;
  1180. if ((id != C168_ASIC_ID) &&
  1181. (id != C104_ASIC_ID) &&
  1182. (id != C102_ASIC_ID) &&
  1183. (id != CI132_ASIC_ID) &&
  1184. (id != CI134_ASIC_ID) &&
  1185. (id != CI104J_ASIC_ID))
  1186. return -1;
  1187. for (i = 0, j = 0; i < 4; i++) {
  1188. n = inb(port + 2);
  1189. if (n == 'M') {
  1190. j = 1;
  1191. } else if ((j == 1) && (n == 1)) {
  1192. j = 2;
  1193. break;
  1194. } else
  1195. j = 0;
  1196. }
  1197. if (j != 2)
  1198. id = -2;
  1199. return id;
  1200. }
  1201. static void __init mxser_normal_mode(int port)
  1202. {
  1203. int i, n;
  1204. outb(0xA5, port + 1);
  1205. outb(0x80, port + 3);
  1206. outb(12, port + 0); /* 9600 bps */
  1207. outb(0, port + 1);
  1208. outb(0x03, port + 3); /* 8 data bits */
  1209. outb(0x13, port + 4); /* loop back mode */
  1210. for (i = 0; i < 16; i++) {
  1211. n = inb(port + 5);
  1212. if ((n & 0x61) == 0x60)
  1213. break;
  1214. if ((n & 1) == 1)
  1215. (void)inb(port);
  1216. }
  1217. outb(0x00, port + 4);
  1218. }
  1219. #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
  1220. #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
  1221. #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
  1222. #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
  1223. #define EN_CCMD 0x000 /* Chip's command register */
  1224. #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
  1225. #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
  1226. #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
  1227. #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
  1228. #define EN0_DCFG 0x00E /* Data configuration reg WR */
  1229. #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
  1230. #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
  1231. #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
  1232. static int __init mxser_read_register(int port, unsigned short *regs)
  1233. {
  1234. int i, k, value, id;
  1235. unsigned int j;
  1236. id = mxser_program_mode(port);
  1237. if (id < 0)
  1238. return id;
  1239. for (i = 0; i < 14; i++) {
  1240. k = (i & 0x3F) | 0x180;
  1241. for (j = 0x100; j > 0; j >>= 1) {
  1242. outb(CHIP_CS, port);
  1243. if (k & j) {
  1244. outb(CHIP_CS | CHIP_DO, port);
  1245. outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
  1246. } else {
  1247. outb(CHIP_CS, port);
  1248. outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
  1249. }
  1250. }
  1251. (void)inb(port);
  1252. value = 0;
  1253. for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
  1254. outb(CHIP_CS, port);
  1255. outb(CHIP_CS | CHIP_SK, port);
  1256. if (inb(port) & CHIP_DI)
  1257. value |= j;
  1258. }
  1259. regs[i] = value;
  1260. outb(0, port);
  1261. }
  1262. mxser_normal_mode(port);
  1263. return id;
  1264. }
  1265. static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
  1266. {
  1267. struct mxser_port *ip;
  1268. struct tty_port *port;
  1269. struct tty_struct *tty;
  1270. int result, status;
  1271. unsigned int i, j;
  1272. int ret = 0;
  1273. switch (cmd) {
  1274. case MOXA_GET_MAJOR:
  1275. printk_ratelimited(KERN_WARNING "mxser: '%s' uses deprecated ioctl "
  1276. "%x (GET_MAJOR), fix your userspace\n",
  1277. current->comm, cmd);
  1278. return put_user(ttymajor, (int __user *)argp);
  1279. case MOXA_CHKPORTENABLE:
  1280. result = 0;
  1281. for (i = 0; i < MXSER_BOARDS; i++)
  1282. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
  1283. if (mxser_boards[i].ports[j].ioaddr)
  1284. result |= (1 << i);
  1285. return put_user(result, (unsigned long __user *)argp);
  1286. case MOXA_GETDATACOUNT:
  1287. /* The receive side is locked by port->slock but it isn't
  1288. clear that an exact snapshot is worth copying here */
  1289. if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
  1290. ret = -EFAULT;
  1291. return ret;
  1292. case MOXA_GETMSTATUS: {
  1293. struct mxser_mstatus ms, __user *msu = argp;
  1294. for (i = 0; i < MXSER_BOARDS; i++)
  1295. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
  1296. ip = &mxser_boards[i].ports[j];
  1297. port = &ip->port;
  1298. memset(&ms, 0, sizeof(ms));
  1299. mutex_lock(&port->mutex);
  1300. if (!ip->ioaddr)
  1301. goto copy;
  1302. tty = tty_port_tty_get(port);
  1303. if (!tty || !tty->termios)
  1304. ms.cflag = ip->normal_termios.c_cflag;
  1305. else
  1306. ms.cflag = tty->termios->c_cflag;
  1307. tty_kref_put(tty);
  1308. spin_lock_irq(&ip->slock);
  1309. status = inb(ip->ioaddr + UART_MSR);
  1310. spin_unlock_irq(&ip->slock);
  1311. if (status & UART_MSR_DCD)
  1312. ms.dcd = 1;
  1313. if (status & UART_MSR_DSR)
  1314. ms.dsr = 1;
  1315. if (status & UART_MSR_CTS)
  1316. ms.cts = 1;
  1317. copy:
  1318. mutex_unlock(&port->mutex);
  1319. if (copy_to_user(msu, &ms, sizeof(ms)))
  1320. return -EFAULT;
  1321. msu++;
  1322. }
  1323. return 0;
  1324. }
  1325. case MOXA_ASPP_MON_EXT: {
  1326. struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */
  1327. unsigned int cflag, iflag, p;
  1328. u8 opmode;
  1329. me = kzalloc(sizeof(*me), GFP_KERNEL);
  1330. if (!me)
  1331. return -ENOMEM;
  1332. for (i = 0, p = 0; i < MXSER_BOARDS; i++) {
  1333. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) {
  1334. if (p >= ARRAY_SIZE(me->rx_cnt)) {
  1335. i = MXSER_BOARDS;
  1336. break;
  1337. }
  1338. ip = &mxser_boards[i].ports[j];
  1339. port = &ip->port;
  1340. mutex_lock(&port->mutex);
  1341. if (!ip->ioaddr) {
  1342. mutex_unlock(&port->mutex);
  1343. continue;
  1344. }
  1345. spin_lock_irq(&ip->slock);
  1346. status = mxser_get_msr(ip->ioaddr, 0, p);
  1347. if (status & UART_MSR_TERI)
  1348. ip->icount.rng++;
  1349. if (status & UART_MSR_DDSR)
  1350. ip->icount.dsr++;
  1351. if (status & UART_MSR_DDCD)
  1352. ip->icount.dcd++;
  1353. if (status & UART_MSR_DCTS)
  1354. ip->icount.cts++;
  1355. ip->mon_data.modem_status = status;
  1356. me->rx_cnt[p] = ip->mon_data.rxcnt;
  1357. me->tx_cnt[p] = ip->mon_data.txcnt;
  1358. me->up_rxcnt[p] = ip->mon_data.up_rxcnt;
  1359. me->up_txcnt[p] = ip->mon_data.up_txcnt;
  1360. me->modem_status[p] =
  1361. ip->mon_data.modem_status;
  1362. spin_unlock_irq(&ip->slock);
  1363. tty = tty_port_tty_get(&ip->port);
  1364. if (!tty || !tty->termios) {
  1365. cflag = ip->normal_termios.c_cflag;
  1366. iflag = ip->normal_termios.c_iflag;
  1367. me->baudrate[p] = tty_termios_baud_rate(&ip->normal_termios);
  1368. } else {
  1369. cflag = tty->termios->c_cflag;
  1370. iflag = tty->termios->c_iflag;
  1371. me->baudrate[p] = tty_get_baud_rate(tty);
  1372. }
  1373. tty_kref_put(tty);
  1374. me->databits[p] = cflag & CSIZE;
  1375. me->stopbits[p] = cflag & CSTOPB;
  1376. me->parity[p] = cflag & (PARENB | PARODD |
  1377. CMSPAR);
  1378. if (cflag & CRTSCTS)
  1379. me->flowctrl[p] |= 0x03;
  1380. if (iflag & (IXON | IXOFF))
  1381. me->flowctrl[p] |= 0x0C;
  1382. if (ip->type == PORT_16550A)
  1383. me->fifo[p] = 1;
  1384. opmode = inb(ip->opmode_ioaddr)>>((p % 4) * 2);
  1385. opmode &= OP_MODE_MASK;
  1386. me->iftype[p] = opmode;
  1387. mutex_unlock(&port->mutex);
  1388. }
  1389. }
  1390. if (copy_to_user(argp, me, sizeof(*me)))
  1391. ret = -EFAULT;
  1392. kfree(me);
  1393. return ret;
  1394. }
  1395. default:
  1396. return -ENOIOCTLCMD;
  1397. }
  1398. return 0;
  1399. }
  1400. static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
  1401. struct async_icount *cprev)
  1402. {
  1403. struct async_icount cnow;
  1404. unsigned long flags;
  1405. int ret;
  1406. spin_lock_irqsave(&info->slock, flags);
  1407. cnow = info->icount; /* atomic copy */
  1408. spin_unlock_irqrestore(&info->slock, flags);
  1409. ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
  1410. ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
  1411. ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
  1412. ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
  1413. *cprev = cnow;
  1414. return ret;
  1415. }
  1416. static int mxser_ioctl(struct tty_struct *tty,
  1417. unsigned int cmd, unsigned long arg)
  1418. {
  1419. struct mxser_port *info = tty->driver_data;
  1420. struct tty_port *port = &info->port;
  1421. struct async_icount cnow;
  1422. unsigned long flags;
  1423. void __user *argp = (void __user *)arg;
  1424. int retval;
  1425. if (tty->index == MXSER_PORTS)
  1426. return mxser_ioctl_special(cmd, argp);
  1427. if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
  1428. int p;
  1429. unsigned long opmode;
  1430. static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
  1431. int shiftbit;
  1432. unsigned char val, mask;
  1433. p = tty->index % 4;
  1434. if (cmd == MOXA_SET_OP_MODE) {
  1435. if (get_user(opmode, (int __user *) argp))
  1436. return -EFAULT;
  1437. if (opmode != RS232_MODE &&
  1438. opmode != RS485_2WIRE_MODE &&
  1439. opmode != RS422_MODE &&
  1440. opmode != RS485_4WIRE_MODE)
  1441. return -EFAULT;
  1442. mask = ModeMask[p];
  1443. shiftbit = p * 2;
  1444. spin_lock_irq(&info->slock);
  1445. val = inb(info->opmode_ioaddr);
  1446. val &= mask;
  1447. val |= (opmode << shiftbit);
  1448. outb(val, info->opmode_ioaddr);
  1449. spin_unlock_irq(&info->slock);
  1450. } else {
  1451. shiftbit = p * 2;
  1452. spin_lock_irq(&info->slock);
  1453. opmode = inb(info->opmode_ioaddr) >> shiftbit;
  1454. spin_unlock_irq(&info->slock);
  1455. opmode &= OP_MODE_MASK;
  1456. if (put_user(opmode, (int __user *)argp))
  1457. return -EFAULT;
  1458. }
  1459. return 0;
  1460. }
  1461. if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT &&
  1462. test_bit(TTY_IO_ERROR, &tty->flags))
  1463. return -EIO;
  1464. switch (cmd) {
  1465. case TIOCGSERIAL:
  1466. mutex_lock(&port->mutex);
  1467. retval = mxser_get_serial_info(tty, argp);
  1468. mutex_unlock(&port->mutex);
  1469. return retval;
  1470. case TIOCSSERIAL:
  1471. mutex_lock(&port->mutex);
  1472. retval = mxser_set_serial_info(tty, argp);
  1473. mutex_unlock(&port->mutex);
  1474. return retval;
  1475. case TIOCSERGETLSR: /* Get line status register */
  1476. return mxser_get_lsr_info(info, argp);
  1477. /*
  1478. * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
  1479. * - mask passed in arg for lines of interest
  1480. * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
  1481. * Caller should use TIOCGICOUNT to see which one it was
  1482. */
  1483. case TIOCMIWAIT:
  1484. spin_lock_irqsave(&info->slock, flags);
  1485. cnow = info->icount; /* note the counters on entry */
  1486. spin_unlock_irqrestore(&info->slock, flags);
  1487. return wait_event_interruptible(info->port.delta_msr_wait,
  1488. mxser_cflags_changed(info, arg, &cnow));
  1489. case MOXA_HighSpeedOn:
  1490. return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
  1491. case MOXA_SDS_RSTICOUNTER:
  1492. spin_lock_irq(&info->slock);
  1493. info->mon_data.rxcnt = 0;
  1494. info->mon_data.txcnt = 0;
  1495. spin_unlock_irq(&info->slock);
  1496. return 0;
  1497. case MOXA_ASPP_OQUEUE:{
  1498. int len, lsr;
  1499. len = mxser_chars_in_buffer(tty);
  1500. spin_lock_irq(&info->slock);
  1501. lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_THRE;
  1502. spin_unlock_irq(&info->slock);
  1503. len += (lsr ? 0 : 1);
  1504. return put_user(len, (int __user *)argp);
  1505. }
  1506. case MOXA_ASPP_MON: {
  1507. int mcr, status;
  1508. spin_lock_irq(&info->slock);
  1509. status = mxser_get_msr(info->ioaddr, 1, tty->index);
  1510. mxser_check_modem_status(tty, info, status);
  1511. mcr = inb(info->ioaddr + UART_MCR);
  1512. spin_unlock_irq(&info->slock);
  1513. if (mcr & MOXA_MUST_MCR_XON_FLAG)
  1514. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
  1515. else
  1516. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
  1517. if (mcr & MOXA_MUST_MCR_TX_XON)
  1518. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
  1519. else
  1520. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
  1521. if (tty->hw_stopped)
  1522. info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
  1523. else
  1524. info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
  1525. if (copy_to_user(argp, &info->mon_data,
  1526. sizeof(struct mxser_mon)))
  1527. return -EFAULT;
  1528. return 0;
  1529. }
  1530. case MOXA_ASPP_LSTATUS: {
  1531. if (put_user(info->err_shadow, (unsigned char __user *)argp))
  1532. return -EFAULT;
  1533. info->err_shadow = 0;
  1534. return 0;
  1535. }
  1536. case MOXA_SET_BAUD_METHOD: {
  1537. int method;
  1538. if (get_user(method, (int __user *)argp))
  1539. return -EFAULT;
  1540. mxser_set_baud_method[tty->index] = method;
  1541. return put_user(method, (int __user *)argp);
  1542. }
  1543. default:
  1544. return -ENOIOCTLCMD;
  1545. }
  1546. return 0;
  1547. }
  1548. /*
  1549. * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
  1550. * Return: write counters to the user passed counter struct
  1551. * NB: both 1->0 and 0->1 transitions are counted except for
  1552. * RI where only 0->1 is counted.
  1553. */
  1554. static int mxser_get_icount(struct tty_struct *tty,
  1555. struct serial_icounter_struct *icount)
  1556. {
  1557. struct mxser_port *info = tty->driver_data;
  1558. struct async_icount cnow;
  1559. unsigned long flags;
  1560. spin_lock_irqsave(&info->slock, flags);
  1561. cnow = info->icount;
  1562. spin_unlock_irqrestore(&info->slock, flags);
  1563. icount->frame = cnow.frame;
  1564. icount->brk = cnow.brk;
  1565. icount->overrun = cnow.overrun;
  1566. icount->buf_overrun = cnow.buf_overrun;
  1567. icount->parity = cnow.parity;
  1568. icount->rx = cnow.rx;
  1569. icount->tx = cnow.tx;
  1570. icount->cts = cnow.cts;
  1571. icount->dsr = cnow.dsr;
  1572. icount->rng = cnow.rng;
  1573. icount->dcd = cnow.dcd;
  1574. return 0;
  1575. }
  1576. static void mxser_stoprx(struct tty_struct *tty)
  1577. {
  1578. struct mxser_port *info = tty->driver_data;
  1579. info->ldisc_stop_rx = 1;
  1580. if (I_IXOFF(tty)) {
  1581. if (info->board->chip_flag) {
  1582. info->IER &= ~MOXA_MUST_RECV_ISR;
  1583. outb(info->IER, info->ioaddr + UART_IER);
  1584. } else {
  1585. info->x_char = STOP_CHAR(tty);
  1586. outb(0, info->ioaddr + UART_IER);
  1587. info->IER |= UART_IER_THRI;
  1588. outb(info->IER, info->ioaddr + UART_IER);
  1589. }
  1590. }
  1591. if (tty->termios->c_cflag & CRTSCTS) {
  1592. info->MCR &= ~UART_MCR_RTS;
  1593. outb(info->MCR, info->ioaddr + UART_MCR);
  1594. }
  1595. }
  1596. /*
  1597. * This routine is called by the upper-layer tty layer to signal that
  1598. * incoming characters should be throttled.
  1599. */
  1600. static void mxser_throttle(struct tty_struct *tty)
  1601. {
  1602. mxser_stoprx(tty);
  1603. }
  1604. static void mxser_unthrottle(struct tty_struct *tty)
  1605. {
  1606. struct mxser_port *info = tty->driver_data;
  1607. /* startrx */
  1608. info->ldisc_stop_rx = 0;
  1609. if (I_IXOFF(tty)) {
  1610. if (info->x_char)
  1611. info->x_char = 0;
  1612. else {
  1613. if (info->board->chip_flag) {
  1614. info->IER |= MOXA_MUST_RECV_ISR;
  1615. outb(info->IER, info->ioaddr + UART_IER);
  1616. } else {
  1617. info->x_char = START_CHAR(tty);
  1618. outb(0, info->ioaddr + UART_IER);
  1619. info->IER |= UART_IER_THRI;
  1620. outb(info->IER, info->ioaddr + UART_IER);
  1621. }
  1622. }
  1623. }
  1624. if (tty->termios->c_cflag & CRTSCTS) {
  1625. info->MCR |= UART_MCR_RTS;
  1626. outb(info->MCR, info->ioaddr + UART_MCR);
  1627. }
  1628. }
  1629. /*
  1630. * mxser_stop() and mxser_start()
  1631. *
  1632. * This routines are called before setting or resetting tty->stopped.
  1633. * They enable or disable transmitter interrupts, as necessary.
  1634. */
  1635. static void mxser_stop(struct tty_struct *tty)
  1636. {
  1637. struct mxser_port *info = tty->driver_data;
  1638. unsigned long flags;
  1639. spin_lock_irqsave(&info->slock, flags);
  1640. if (info->IER & UART_IER_THRI) {
  1641. info->IER &= ~UART_IER_THRI;
  1642. outb(info->IER, info->ioaddr + UART_IER);
  1643. }
  1644. spin_unlock_irqrestore(&info->slock, flags);
  1645. }
  1646. static void mxser_start(struct tty_struct *tty)
  1647. {
  1648. struct mxser_port *info = tty->driver_data;
  1649. unsigned long flags;
  1650. spin_lock_irqsave(&info->slock, flags);
  1651. if (info->xmit_cnt && info->port.xmit_buf) {
  1652. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1653. info->IER |= UART_IER_THRI;
  1654. outb(info->IER, info->ioaddr + UART_IER);
  1655. }
  1656. spin_unlock_irqrestore(&info->slock, flags);
  1657. }
  1658. static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
  1659. {
  1660. struct mxser_port *info = tty->driver_data;
  1661. unsigned long flags;
  1662. spin_lock_irqsave(&info->slock, flags);
  1663. mxser_change_speed(tty, old_termios);
  1664. spin_unlock_irqrestore(&info->slock, flags);
  1665. if ((old_termios->c_cflag & CRTSCTS) &&
  1666. !(tty->termios->c_cflag & CRTSCTS)) {
  1667. tty->hw_stopped = 0;
  1668. mxser_start(tty);
  1669. }
  1670. /* Handle sw stopped */
  1671. if ((old_termios->c_iflag & IXON) &&
  1672. !(tty->termios->c_iflag & IXON)) {
  1673. tty->stopped = 0;
  1674. if (info->board->chip_flag) {
  1675. spin_lock_irqsave(&info->slock, flags);
  1676. mxser_disable_must_rx_software_flow_control(
  1677. info->ioaddr);
  1678. spin_unlock_irqrestore(&info->slock, flags);
  1679. }
  1680. mxser_start(tty);
  1681. }
  1682. }
  1683. /*
  1684. * mxser_wait_until_sent() --- wait until the transmitter is empty
  1685. */
  1686. static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
  1687. {
  1688. struct mxser_port *info = tty->driver_data;
  1689. unsigned long orig_jiffies, char_time;
  1690. unsigned long flags;
  1691. int lsr;
  1692. if (info->type == PORT_UNKNOWN)
  1693. return;
  1694. if (info->xmit_fifo_size == 0)
  1695. return; /* Just in case.... */
  1696. orig_jiffies = jiffies;
  1697. /*
  1698. * Set the check interval to be 1/5 of the estimated time to
  1699. * send a single character, and make it at least 1. The check
  1700. * interval should also be less than the timeout.
  1701. *
  1702. * Note: we have to use pretty tight timings here to satisfy
  1703. * the NIST-PCTS.
  1704. */
  1705. char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
  1706. char_time = char_time / 5;
  1707. if (char_time == 0)
  1708. char_time = 1;
  1709. if (timeout && timeout < char_time)
  1710. char_time = timeout;
  1711. /*
  1712. * If the transmitter hasn't cleared in twice the approximate
  1713. * amount of time to send the entire FIFO, it probably won't
  1714. * ever clear. This assumes the UART isn't doing flow
  1715. * control, which is currently the case. Hence, if it ever
  1716. * takes longer than info->timeout, this is probably due to a
  1717. * UART bug of some kind. So, we clamp the timeout parameter at
  1718. * 2*info->timeout.
  1719. */
  1720. if (!timeout || timeout > 2 * info->timeout)
  1721. timeout = 2 * info->timeout;
  1722. spin_lock_irqsave(&info->slock, flags);
  1723. while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
  1724. spin_unlock_irqrestore(&info->slock, flags);
  1725. schedule_timeout_interruptible(char_time);
  1726. spin_lock_irqsave(&info->slock, flags);
  1727. if (signal_pending(current))
  1728. break;
  1729. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  1730. break;
  1731. }
  1732. spin_unlock_irqrestore(&info->slock, flags);
  1733. set_current_state(TASK_RUNNING);
  1734. }
  1735. /*
  1736. * This routine is called by tty_hangup() when a hangup is signaled.
  1737. */
  1738. static void mxser_hangup(struct tty_struct *tty)
  1739. {
  1740. struct mxser_port *info = tty->driver_data;
  1741. mxser_flush_buffer(tty);
  1742. tty_port_hangup(&info->port);
  1743. }
  1744. /*
  1745. * mxser_rs_break() --- routine which turns the break handling on or off
  1746. */
  1747. static int mxser_rs_break(struct tty_struct *tty, int break_state)
  1748. {
  1749. struct mxser_port *info = tty->driver_data;
  1750. unsigned long flags;
  1751. spin_lock_irqsave(&info->slock, flags);
  1752. if (break_state == -1)
  1753. outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
  1754. info->ioaddr + UART_LCR);
  1755. else
  1756. outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
  1757. info->ioaddr + UART_LCR);
  1758. spin_unlock_irqrestore(&info->slock, flags);
  1759. return 0;
  1760. }
  1761. static void mxser_receive_chars(struct tty_struct *tty,
  1762. struct mxser_port *port, int *status)
  1763. {
  1764. unsigned char ch, gdl;
  1765. int ignored = 0;
  1766. int cnt = 0;
  1767. int recv_room;
  1768. int max = 256;
  1769. recv_room = tty->receive_room;
  1770. if (recv_room == 0 && !port->ldisc_stop_rx)
  1771. mxser_stoprx(tty);
  1772. if (port->board->chip_flag != MOXA_OTHER_UART) {
  1773. if (*status & UART_LSR_SPECIAL)
  1774. goto intr_old;
  1775. if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
  1776. (*status & MOXA_MUST_LSR_RERR))
  1777. goto intr_old;
  1778. if (*status & MOXA_MUST_LSR_RERR)
  1779. goto intr_old;
  1780. gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
  1781. if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
  1782. gdl &= MOXA_MUST_GDL_MASK;
  1783. if (gdl >= recv_room) {
  1784. if (!port->ldisc_stop_rx)
  1785. mxser_stoprx(tty);
  1786. }
  1787. while (gdl--) {
  1788. ch = inb(port->ioaddr + UART_RX);
  1789. tty_insert_flip_char(tty, ch, 0);
  1790. cnt++;
  1791. }
  1792. goto end_intr;
  1793. }
  1794. intr_old:
  1795. do {
  1796. if (max-- < 0)
  1797. break;
  1798. ch = inb(port->ioaddr + UART_RX);
  1799. if (port->board->chip_flag && (*status & UART_LSR_OE))
  1800. outb(0x23, port->ioaddr + UART_FCR);
  1801. *status &= port->read_status_mask;
  1802. if (*status & port->ignore_status_mask) {
  1803. if (++ignored > 100)
  1804. break;
  1805. } else {
  1806. char flag = 0;
  1807. if (*status & UART_LSR_SPECIAL) {
  1808. if (*status & UART_LSR_BI) {
  1809. flag = TTY_BREAK;
  1810. port->icount.brk++;
  1811. if (port->port.flags & ASYNC_SAK)
  1812. do_SAK(tty);
  1813. } else if (*status & UART_LSR_PE) {
  1814. flag = TTY_PARITY;
  1815. port->icount.parity++;
  1816. } else if (*status & UART_LSR_FE) {
  1817. flag = TTY_FRAME;
  1818. port->icount.frame++;
  1819. } else if (*status & UART_LSR_OE) {
  1820. flag = TTY_OVERRUN;
  1821. port->icount.overrun++;
  1822. } else
  1823. flag = TTY_BREAK;
  1824. }
  1825. tty_insert_flip_char(tty, ch, flag);
  1826. cnt++;
  1827. if (cnt >= recv_room) {
  1828. if (!port->ldisc_stop_rx)
  1829. mxser_stoprx(tty);
  1830. break;
  1831. }
  1832. }
  1833. if (port->board->chip_flag)
  1834. break;
  1835. *status = inb(port->ioaddr + UART_LSR);
  1836. } while (*status & UART_LSR_DR);
  1837. end_intr:
  1838. mxvar_log.rxcnt[tty->index] += cnt;
  1839. port->mon_data.rxcnt += cnt;
  1840. port->mon_data.up_rxcnt += cnt;
  1841. /*
  1842. * We are called from an interrupt context with &port->slock
  1843. * being held. Drop it temporarily in order to prevent
  1844. * recursive locking.
  1845. */
  1846. spin_unlock(&port->slock);
  1847. tty_flip_buffer_push(tty);
  1848. spin_lock(&port->slock);
  1849. }
  1850. static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port)
  1851. {
  1852. int count, cnt;
  1853. if (port->x_char) {
  1854. outb(port->x_char, port->ioaddr + UART_TX);
  1855. port->x_char = 0;
  1856. mxvar_log.txcnt[tty->index]++;
  1857. port->mon_data.txcnt++;
  1858. port->mon_data.up_txcnt++;
  1859. port->icount.tx++;
  1860. return;
  1861. }
  1862. if (port->port.xmit_buf == NULL)
  1863. return;
  1864. if (port->xmit_cnt <= 0 || tty->stopped ||
  1865. (tty->hw_stopped &&
  1866. (port->type != PORT_16550A) &&
  1867. (!port->board->chip_flag))) {
  1868. port->IER &= ~UART_IER_THRI;
  1869. outb(port->IER, port->ioaddr + UART_IER);
  1870. return;
  1871. }
  1872. cnt = port->xmit_cnt;
  1873. count = port->xmit_fifo_size;
  1874. do {
  1875. outb(port->port.xmit_buf[port->xmit_tail++],
  1876. port->ioaddr + UART_TX);
  1877. port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
  1878. if (--port->xmit_cnt <= 0)
  1879. break;
  1880. } while (--count > 0);
  1881. mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt);
  1882. port->mon_data.txcnt += (cnt - port->xmit_cnt);
  1883. port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
  1884. port->icount.tx += (cnt - port->xmit_cnt);
  1885. if (port->xmit_cnt < WAKEUP_CHARS)
  1886. tty_wakeup(tty);
  1887. if (port->xmit_cnt <= 0) {
  1888. port->IER &= ~UART_IER_THRI;
  1889. outb(port->IER, port->ioaddr + UART_IER);
  1890. }
  1891. }
  1892. /*
  1893. * This is the serial driver's generic interrupt routine
  1894. */
  1895. static irqreturn_t mxser_interrupt(int irq, void *dev_id)
  1896. {
  1897. int status, iir, i;
  1898. struct mxser_board *brd = NULL;
  1899. struct mxser_port *port;
  1900. int max, irqbits, bits, msr;
  1901. unsigned int int_cnt, pass_counter = 0;
  1902. int handled = IRQ_NONE;
  1903. struct tty_struct *tty;
  1904. for (i = 0; i < MXSER_BOARDS; i++)
  1905. if (dev_id == &mxser_boards[i]) {
  1906. brd = dev_id;
  1907. break;
  1908. }
  1909. if (i == MXSER_BOARDS)
  1910. goto irq_stop;
  1911. if (brd == NULL)
  1912. goto irq_stop;
  1913. max = brd->info->nports;
  1914. while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
  1915. irqbits = inb(brd->vector) & brd->vector_mask;
  1916. if (irqbits == brd->vector_mask)
  1917. break;
  1918. handled = IRQ_HANDLED;
  1919. for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
  1920. if (irqbits == brd->vector_mask)
  1921. break;
  1922. if (bits & irqbits)
  1923. continue;
  1924. port = &brd->ports[i];
  1925. int_cnt = 0;
  1926. spin_lock(&port->slock);
  1927. do {
  1928. iir = inb(port->ioaddr + UART_IIR);
  1929. if (iir & UART_IIR_NO_INT)
  1930. break;
  1931. iir &= MOXA_MUST_IIR_MASK;
  1932. tty = tty_port_tty_get(&port->port);
  1933. if (!tty ||
  1934. (port->port.flags & ASYNC_CLOSING) ||
  1935. !(port->port.flags &
  1936. ASYNC_INITIALIZED)) {
  1937. status = inb(port->ioaddr + UART_LSR);
  1938. outb(0x27, port->ioaddr + UART_FCR);
  1939. inb(port->ioaddr + UART_MSR);
  1940. tty_kref_put(tty);
  1941. break;
  1942. }
  1943. status = inb(port->ioaddr + UART_LSR);
  1944. if (status & UART_LSR_PE)
  1945. port->err_shadow |= NPPI_NOTIFY_PARITY;
  1946. if (status & UART_LSR_FE)
  1947. port->err_shadow |= NPPI_NOTIFY_FRAMING;
  1948. if (status & UART_LSR_OE)
  1949. port->err_shadow |=
  1950. NPPI_NOTIFY_HW_OVERRUN;
  1951. if (status & UART_LSR_BI)
  1952. port->err_shadow |= NPPI_NOTIFY_BREAK;
  1953. if (port->board->chip_flag) {
  1954. if (iir == MOXA_MUST_IIR_GDA ||
  1955. iir == MOXA_MUST_IIR_RDA ||
  1956. iir == MOXA_MUST_IIR_RTO ||
  1957. iir == MOXA_MUST_IIR_LSR)
  1958. mxser_receive_chars(tty, port,
  1959. &status);
  1960. } else {
  1961. status &= port->read_status_mask;
  1962. if (status & UART_LSR_DR)
  1963. mxser_receive_chars(tty, port,
  1964. &status);
  1965. }
  1966. msr = inb(port->ioaddr + UART_MSR);
  1967. if (msr & UART_MSR_ANY_DELTA)
  1968. mxser_check_modem_status(tty, port, msr);
  1969. if (port->board->chip_flag) {
  1970. if (iir == 0x02 && (status &
  1971. UART_LSR_THRE))
  1972. mxser_transmit_chars(tty, port);
  1973. } else {
  1974. if (status & UART_LSR_THRE)
  1975. mxser_transmit_chars(tty, port);
  1976. }
  1977. tty_kref_put(tty);
  1978. } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
  1979. spin_unlock(&port->slock);
  1980. }
  1981. }
  1982. irq_stop:
  1983. return handled;
  1984. }
  1985. static const struct tty_operations mxser_ops = {
  1986. .open = mxser_open,
  1987. .close = mxser_close,
  1988. .write = mxser_write,
  1989. .put_char = mxser_put_char,
  1990. .flush_chars = mxser_flush_chars,
  1991. .write_room = mxser_write_room,
  1992. .chars_in_buffer = mxser_chars_in_buffer,
  1993. .flush_buffer = mxser_flush_buffer,
  1994. .ioctl = mxser_ioctl,
  1995. .throttle = mxser_throttle,
  1996. .unthrottle = mxser_unthrottle,
  1997. .set_termios = mxser_set_termios,
  1998. .stop = mxser_stop,
  1999. .start = mxser_start,
  2000. .hangup = mxser_hangup,
  2001. .break_ctl = mxser_rs_break,
  2002. .wait_until_sent = mxser_wait_until_sent,
  2003. .tiocmget = mxser_tiocmget,
  2004. .tiocmset = mxser_tiocmset,
  2005. .get_icount = mxser_get_icount,
  2006. };
  2007. struct tty_port_operations mxser_port_ops = {
  2008. .carrier_raised = mxser_carrier_raised,
  2009. .dtr_rts = mxser_dtr_rts,
  2010. .activate = mxser_activate,
  2011. .shutdown = mxser_shutdown_port,
  2012. };
  2013. /*
  2014. * The MOXA Smartio/Industio serial driver boot-time initialization code!
  2015. */
  2016. static void mxser_release_ISA_res(struct mxser_board *brd)
  2017. {
  2018. free_irq(brd->irq, brd);
  2019. release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
  2020. release_region(brd->vector, 1);
  2021. }
  2022. static int __devinit mxser_initbrd(struct mxser_board *brd,
  2023. struct pci_dev *pdev)
  2024. {
  2025. struct mxser_port *info;
  2026. unsigned int i;
  2027. int retval;
  2028. printk(KERN_INFO "mxser: max. baud rate = %d bps\n",
  2029. brd->ports[0].max_baud);
  2030. for (i = 0; i < brd->info->nports; i++) {
  2031. info = &brd->ports[i];
  2032. tty_port_init(&info->port);
  2033. info->port.ops = &mxser_port_ops;
  2034. info->board = brd;
  2035. info->stop_rx = 0;
  2036. info->ldisc_stop_rx = 0;
  2037. /* Enhance mode enabled here */
  2038. if (brd->chip_flag != MOXA_OTHER_UART)
  2039. mxser_enable_must_enchance_mode(info->ioaddr);
  2040. info->port.flags = ASYNC_SHARE_IRQ;
  2041. info->type = brd->uart_type;
  2042. process_txrx_fifo(info);
  2043. info->custom_divisor = info->baud_base * 16;
  2044. info->port.close_delay = 5 * HZ / 10;
  2045. info->port.closing_wait = 30 * HZ;
  2046. info->normal_termios = mxvar_sdriver->init_termios;
  2047. memset(&info->mon_data, 0, sizeof(struct mxser_mon));
  2048. info->err_shadow = 0;
  2049. spin_lock_init(&info->slock);
  2050. /* before set INT ISR, disable all int */
  2051. outb(inb(info->ioaddr + UART_IER) & 0xf0,
  2052. info->ioaddr + UART_IER);
  2053. }
  2054. retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
  2055. brd);
  2056. if (retval)
  2057. printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
  2058. "conflict with another device.\n",
  2059. brd->info->name, brd->irq);
  2060. return retval;
  2061. }
  2062. static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
  2063. {
  2064. int id, i, bits;
  2065. unsigned short regs[16], irq;
  2066. unsigned char scratch, scratch2;
  2067. brd->chip_flag = MOXA_OTHER_UART;
  2068. id = mxser_read_register(cap, regs);
  2069. switch (id) {
  2070. case C168_ASIC_ID:
  2071. brd->info = &mxser_cards[0];
  2072. break;
  2073. case C104_ASIC_ID:
  2074. brd->info = &mxser_cards[1];
  2075. break;
  2076. case CI104J_ASIC_ID:
  2077. brd->info = &mxser_cards[2];
  2078. break;
  2079. case C102_ASIC_ID:
  2080. brd->info = &mxser_cards[5];
  2081. break;
  2082. case CI132_ASIC_ID:
  2083. brd->info = &mxser_cards[6];
  2084. break;
  2085. case CI134_ASIC_ID:
  2086. brd->info = &mxser_cards[7];
  2087. break;
  2088. default:
  2089. return 0;
  2090. }
  2091. irq = 0;
  2092. /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
  2093. Flag-hack checks if configuration should be read as 2-port here. */
  2094. if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
  2095. irq = regs[9] & 0xF000;
  2096. irq = irq | (irq >> 4);
  2097. if (irq != (regs[9] & 0xFF00))
  2098. goto err_irqconflict;
  2099. } else if (brd->info->nports == 4) {
  2100. irq = regs[9] & 0xF000;
  2101. irq = irq | (irq >> 4);
  2102. irq = irq | (irq >> 8);
  2103. if (irq != regs[9])
  2104. goto err_irqconflict;
  2105. } else if (brd->info->nports == 8) {
  2106. irq = regs[9] & 0xF000;
  2107. irq = irq | (irq >> 4);
  2108. irq = irq | (irq >> 8);
  2109. if ((irq != regs[9]) || (irq != regs[10]))
  2110. goto err_irqconflict;
  2111. }
  2112. if (!irq) {
  2113. printk(KERN_ERR "mxser: interrupt number unset\n");
  2114. return -EIO;
  2115. }
  2116. brd->irq = ((int)(irq & 0xF000) >> 12);
  2117. for (i = 0; i < 8; i++)
  2118. brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
  2119. if ((regs[12] & 0x80) == 0) {
  2120. printk(KERN_ERR "mxser: invalid interrupt vector\n");
  2121. return -EIO;
  2122. }
  2123. brd->vector = (int)regs[11]; /* interrupt vector */
  2124. if (id == 1)
  2125. brd->vector_mask = 0x00FF;
  2126. else
  2127. brd->vector_mask = 0x000F;
  2128. for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
  2129. if (regs[12] & bits) {
  2130. brd->ports[i].baud_base = 921600;
  2131. brd->ports[i].max_baud = 921600;
  2132. } else {
  2133. brd->ports[i].baud_base = 115200;
  2134. brd->ports[i].max_baud = 115200;
  2135. }
  2136. }
  2137. scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
  2138. outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
  2139. outb(0, cap + UART_EFR); /* EFR is the same as FCR */
  2140. outb(scratch2, cap + UART_LCR);
  2141. outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
  2142. scratch = inb(cap + UART_IIR);
  2143. if (scratch & 0xC0)
  2144. brd->uart_type = PORT_16550A;
  2145. else
  2146. brd->uart_type = PORT_16450;
  2147. if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
  2148. "mxser(IO)")) {
  2149. printk(KERN_ERR "mxser: can't request ports I/O region: "
  2150. "0x%.8lx-0x%.8lx\n",
  2151. brd->ports[0].ioaddr, brd->ports[0].ioaddr +
  2152. 8 * brd->info->nports - 1);
  2153. return -EIO;
  2154. }
  2155. if (!request_region(brd->vector, 1, "mxser(vector)")) {
  2156. release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
  2157. printk(KERN_ERR "mxser: can't request interrupt vector region: "
  2158. "0x%.8lx-0x%.8lx\n",
  2159. brd->ports[0].ioaddr, brd->ports[0].ioaddr +
  2160. 8 * brd->info->nports - 1);
  2161. return -EIO;
  2162. }
  2163. return brd->info->nports;
  2164. err_irqconflict:
  2165. printk(KERN_ERR "mxser: invalid interrupt number\n");
  2166. return -EIO;
  2167. }
  2168. static int __devinit mxser_probe(struct pci_dev *pdev,
  2169. const struct pci_device_id *ent)
  2170. {
  2171. #ifdef CONFIG_PCI
  2172. struct mxser_board *brd;
  2173. unsigned int i, j;
  2174. unsigned long ioaddress;
  2175. int retval = -EINVAL;
  2176. for (i = 0; i < MXSER_BOARDS; i++)
  2177. if (mxser_boards[i].info == NULL)
  2178. break;
  2179. if (i >= MXSER_BOARDS) {
  2180. dev_err(&pdev->dev, "too many boards found (maximum %d), board "
  2181. "not configured\n", MXSER_BOARDS);
  2182. goto err;
  2183. }
  2184. brd = &mxser_boards[i];
  2185. brd->idx = i * MXSER_PORTS_PER_BOARD;
  2186. dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n",
  2187. mxser_cards[ent->driver_data].name,
  2188. pdev->bus->number, PCI_SLOT(pdev->devfn));
  2189. retval = pci_enable_device(pdev);
  2190. if (retval) {
  2191. dev_err(&pdev->dev, "PCI enable failed\n");
  2192. goto err;
  2193. }
  2194. /* io address */
  2195. ioaddress = pci_resource_start(pdev, 2);
  2196. retval = pci_request_region(pdev, 2, "mxser(IO)");
  2197. if (retval)
  2198. goto err_dis;
  2199. brd->info = &mxser_cards[ent->driver_data];
  2200. for (i = 0; i < brd->info->nports; i++)
  2201. brd->ports[i].ioaddr = ioaddress + 8 * i;
  2202. /* vector */
  2203. ioaddress = pci_resource_start(pdev, 3);
  2204. retval = pci_request_region(pdev, 3, "mxser(vector)");
  2205. if (retval)
  2206. goto err_zero;
  2207. brd->vector = ioaddress;
  2208. /* irq */
  2209. brd->irq = pdev->irq;
  2210. brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
  2211. brd->uart_type = PORT_16550A;
  2212. brd->vector_mask = 0;
  2213. for (i = 0; i < brd->info->nports; i++) {
  2214. for (j = 0; j < UART_INFO_NUM; j++) {
  2215. if (Gpci_uart_info[j].type == brd->chip_flag) {
  2216. brd->ports[i].max_baud =
  2217. Gpci_uart_info[j].max_baud;
  2218. /* exception....CP-102 */
  2219. if (brd->info->flags & MXSER_HIGHBAUD)
  2220. brd->ports[i].max_baud = 921600;
  2221. break;
  2222. }
  2223. }
  2224. }
  2225. if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
  2226. for (i = 0; i < brd->info->nports; i++) {
  2227. if (i < 4)
  2228. brd->ports[i].opmode_ioaddr = ioaddress + 4;
  2229. else
  2230. brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
  2231. }
  2232. outb(0, ioaddress + 4); /* default set to RS232 mode */
  2233. outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
  2234. }
  2235. for (i = 0; i < brd->info->nports; i++) {
  2236. brd->vector_mask |= (1 << i);
  2237. brd->ports[i].baud_base = 921600;
  2238. }
  2239. /* mxser_initbrd will hook ISR. */
  2240. retval = mxser_initbrd(brd, pdev);
  2241. if (retval)
  2242. goto err_rel3;
  2243. for (i = 0; i < brd->info->nports; i++)
  2244. tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev);
  2245. pci_set_drvdata(pdev, brd);
  2246. return 0;
  2247. err_rel3:
  2248. pci_release_region(pdev, 3);
  2249. err_zero:
  2250. brd->info = NULL;
  2251. pci_release_region(pdev, 2);
  2252. err_dis:
  2253. pci_disable_device(pdev);
  2254. err:
  2255. return retval;
  2256. #else
  2257. return -ENODEV;
  2258. #endif
  2259. }
  2260. static void __devexit mxser_remove(struct pci_dev *pdev)
  2261. {
  2262. #ifdef CONFIG_PCI
  2263. struct mxser_board *brd = pci_get_drvdata(pdev);
  2264. unsigned int i;
  2265. for (i = 0; i < brd->info->nports; i++)
  2266. tty_unregister_device(mxvar_sdriver, brd->idx + i);
  2267. free_irq(pdev->irq, brd);
  2268. pci_release_region(pdev, 2);
  2269. pci_release_region(pdev, 3);
  2270. pci_disable_device(pdev);
  2271. brd->info = NULL;
  2272. #endif
  2273. }
  2274. static struct pci_driver mxser_driver = {
  2275. .name = "mxser",
  2276. .id_table = mxser_pcibrds,
  2277. .probe = mxser_probe,
  2278. .remove = __devexit_p(mxser_remove)
  2279. };
  2280. static int __init mxser_module_init(void)
  2281. {
  2282. struct mxser_board *brd;
  2283. unsigned int b, i, m;
  2284. int retval;
  2285. mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
  2286. if (!mxvar_sdriver)
  2287. return -ENOMEM;
  2288. printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
  2289. MXSER_VERSION);
  2290. /* Initialize the tty_driver structure */
  2291. mxvar_sdriver->name = "ttyMI";
  2292. mxvar_sdriver->major = ttymajor;
  2293. mxvar_sdriver->minor_start = 0;
  2294. mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
  2295. mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
  2296. mxvar_sdriver->init_termios = tty_std_termios;
  2297. mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
  2298. mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
  2299. tty_set_operations(mxvar_sdriver, &mxser_ops);
  2300. retval = tty_register_driver(mxvar_sdriver);
  2301. if (retval) {
  2302. printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
  2303. "tty driver !\n");
  2304. goto err_put;
  2305. }
  2306. /* Start finding ISA boards here */
  2307. for (m = 0, b = 0; b < MXSER_BOARDS; b++) {
  2308. if (!ioaddr[b])
  2309. continue;
  2310. brd = &mxser_boards[m];
  2311. retval = mxser_get_ISA_conf(ioaddr[b], brd);
  2312. if (retval <= 0) {
  2313. brd->info = NULL;
  2314. continue;
  2315. }
  2316. printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n",
  2317. brd->info->name, ioaddr[b]);
  2318. /* mxser_initbrd will hook ISR. */
  2319. if (mxser_initbrd(brd, NULL) < 0) {
  2320. brd->info = NULL;
  2321. continue;
  2322. }
  2323. brd->idx = m * MXSER_PORTS_PER_BOARD;
  2324. for (i = 0; i < brd->info->nports; i++)
  2325. tty_register_device(mxvar_sdriver, brd->idx + i, NULL);
  2326. m++;
  2327. }
  2328. retval = pci_register_driver(&mxser_driver);
  2329. if (retval) {
  2330. printk(KERN_ERR "mxser: can't register pci driver\n");
  2331. if (!m) {
  2332. retval = -ENODEV;
  2333. goto err_unr;
  2334. } /* else: we have some ISA cards under control */
  2335. }
  2336. return 0;
  2337. err_unr:
  2338. tty_unregister_driver(mxvar_sdriver);
  2339. err_put:
  2340. put_tty_driver(mxvar_sdriver);
  2341. return retval;
  2342. }
  2343. static void __exit mxser_module_exit(void)
  2344. {
  2345. unsigned int i, j;
  2346. pci_unregister_driver(&mxser_driver);
  2347. for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
  2348. if (mxser_boards[i].info != NULL)
  2349. for (j = 0; j < mxser_boards[i].info->nports; j++)
  2350. tty_unregister_device(mxvar_sdriver,
  2351. mxser_boards[i].idx + j);
  2352. tty_unregister_driver(mxvar_sdriver);
  2353. put_tty_driver(mxvar_sdriver);
  2354. for (i = 0; i < MXSER_BOARDS; i++)
  2355. if (mxser_boards[i].info != NULL)
  2356. mxser_release_ISA_res(&mxser_boards[i]);
  2357. }
  2358. module_init(mxser_module_init);
  2359. module_exit(mxser_module_exit);