rtc-sa1100.c 9.2 KB

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  1. /*
  2. * Real Time Clock interface for StrongARM SA1x00 and XScale PXA2xx
  3. *
  4. * Copyright (c) 2000 Nils Faerber
  5. *
  6. * Based on rtc.c by Paul Gortmaker
  7. *
  8. * Original Driver by Nils Faerber <nils@kernelconcepts.de>
  9. *
  10. * Modifications from:
  11. * CIH <cih@coventive.com>
  12. * Nicolas Pitre <nico@fluxnic.net>
  13. * Andrew Christian <andrew.christian@hp.com>
  14. *
  15. * Converted to the RTC subsystem and Driver Model
  16. * by Richard Purdie <rpurdie@rpsys.net>
  17. *
  18. * This program is free software; you can redistribute it and/or
  19. * modify it under the terms of the GNU General Public License
  20. * as published by the Free Software Foundation; either version
  21. * 2 of the License, or (at your option) any later version.
  22. */
  23. #include <linux/platform_device.h>
  24. #include <linux/module.h>
  25. #include <linux/rtc.h>
  26. #include <linux/init.h>
  27. #include <linux/fs.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/string.h>
  30. #include <linux/pm.h>
  31. #include <linux/bitops.h>
  32. #include <mach/hardware.h>
  33. #include <asm/irq.h>
  34. #ifdef CONFIG_ARCH_PXA
  35. #include <mach/regs-rtc.h>
  36. #endif
  37. #define RTC_DEF_DIVIDER (32768 - 1)
  38. #define RTC_DEF_TRIM 0
  39. static const unsigned long RTC_FREQ = 1024;
  40. static struct rtc_time rtc_alarm;
  41. static DEFINE_SPINLOCK(sa1100_rtc_lock);
  42. static inline int rtc_periodic_alarm(struct rtc_time *tm)
  43. {
  44. return (tm->tm_year == -1) ||
  45. ((unsigned)tm->tm_mon >= 12) ||
  46. ((unsigned)(tm->tm_mday - 1) >= 31) ||
  47. ((unsigned)tm->tm_hour > 23) ||
  48. ((unsigned)tm->tm_min > 59) ||
  49. ((unsigned)tm->tm_sec > 59);
  50. }
  51. /*
  52. * Calculate the next alarm time given the requested alarm time mask
  53. * and the current time.
  54. */
  55. static void rtc_next_alarm_time(struct rtc_time *next, struct rtc_time *now,
  56. struct rtc_time *alrm)
  57. {
  58. unsigned long next_time;
  59. unsigned long now_time;
  60. next->tm_year = now->tm_year;
  61. next->tm_mon = now->tm_mon;
  62. next->tm_mday = now->tm_mday;
  63. next->tm_hour = alrm->tm_hour;
  64. next->tm_min = alrm->tm_min;
  65. next->tm_sec = alrm->tm_sec;
  66. rtc_tm_to_time(now, &now_time);
  67. rtc_tm_to_time(next, &next_time);
  68. if (next_time < now_time) {
  69. /* Advance one day */
  70. next_time += 60 * 60 * 24;
  71. rtc_time_to_tm(next_time, next);
  72. }
  73. }
  74. static int rtc_update_alarm(struct rtc_time *alrm)
  75. {
  76. struct rtc_time alarm_tm, now_tm;
  77. unsigned long now, time;
  78. int ret;
  79. do {
  80. now = RCNR;
  81. rtc_time_to_tm(now, &now_tm);
  82. rtc_next_alarm_time(&alarm_tm, &now_tm, alrm);
  83. ret = rtc_tm_to_time(&alarm_tm, &time);
  84. if (ret != 0)
  85. break;
  86. RTSR = RTSR & (RTSR_HZE|RTSR_ALE|RTSR_AL);
  87. RTAR = time;
  88. } while (now != RCNR);
  89. return ret;
  90. }
  91. static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
  92. {
  93. struct platform_device *pdev = to_platform_device(dev_id);
  94. struct rtc_device *rtc = platform_get_drvdata(pdev);
  95. unsigned int rtsr;
  96. unsigned long events = 0;
  97. spin_lock(&sa1100_rtc_lock);
  98. rtsr = RTSR;
  99. /* clear interrupt sources */
  100. RTSR = 0;
  101. /* Fix for a nasty initialization problem the in SA11xx RTSR register.
  102. * See also the comments in sa1100_rtc_probe(). */
  103. if (rtsr & (RTSR_ALE | RTSR_HZE)) {
  104. /* This is the original code, before there was the if test
  105. * above. This code does not clear interrupts that were not
  106. * enabled. */
  107. RTSR = (RTSR_AL | RTSR_HZ) & (rtsr >> 2);
  108. } else {
  109. /* For some reason, it is possible to enter this routine
  110. * without interruptions enabled, it has been tested with
  111. * several units (Bug in SA11xx chip?).
  112. *
  113. * This situation leads to an infinite "loop" of interrupt
  114. * routine calling and as a result the processor seems to
  115. * lock on its first call to open(). */
  116. RTSR = RTSR_AL | RTSR_HZ;
  117. }
  118. /* clear alarm interrupt if it has occurred */
  119. if (rtsr & RTSR_AL)
  120. rtsr &= ~RTSR_ALE;
  121. RTSR = rtsr & (RTSR_ALE | RTSR_HZE);
  122. /* update irq data & counter */
  123. if (rtsr & RTSR_AL)
  124. events |= RTC_AF | RTC_IRQF;
  125. if (rtsr & RTSR_HZ)
  126. events |= RTC_UF | RTC_IRQF;
  127. rtc_update_irq(rtc, 1, events);
  128. if (rtsr & RTSR_AL && rtc_periodic_alarm(&rtc_alarm))
  129. rtc_update_alarm(&rtc_alarm);
  130. spin_unlock(&sa1100_rtc_lock);
  131. return IRQ_HANDLED;
  132. }
  133. static int sa1100_rtc_open(struct device *dev)
  134. {
  135. int ret;
  136. struct platform_device *plat_dev = to_platform_device(dev);
  137. struct rtc_device *rtc = platform_get_drvdata(plat_dev);
  138. ret = request_irq(IRQ_RTC1Hz, sa1100_rtc_interrupt, IRQF_DISABLED,
  139. "rtc 1Hz", dev);
  140. if (ret) {
  141. dev_err(dev, "IRQ %d already in use.\n", IRQ_RTC1Hz);
  142. goto fail_ui;
  143. }
  144. ret = request_irq(IRQ_RTCAlrm, sa1100_rtc_interrupt, IRQF_DISABLED,
  145. "rtc Alrm", dev);
  146. if (ret) {
  147. dev_err(dev, "IRQ %d already in use.\n", IRQ_RTCAlrm);
  148. goto fail_ai;
  149. }
  150. rtc->max_user_freq = RTC_FREQ;
  151. rtc_irq_set_freq(rtc, NULL, RTC_FREQ);
  152. return 0;
  153. fail_ai:
  154. free_irq(IRQ_RTC1Hz, dev);
  155. fail_ui:
  156. return ret;
  157. }
  158. static void sa1100_rtc_release(struct device *dev)
  159. {
  160. spin_lock_irq(&sa1100_rtc_lock);
  161. RTSR = 0;
  162. spin_unlock_irq(&sa1100_rtc_lock);
  163. free_irq(IRQ_RTCAlrm, dev);
  164. free_irq(IRQ_RTC1Hz, dev);
  165. }
  166. static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
  167. {
  168. spin_lock_irq(&sa1100_rtc_lock);
  169. if (enabled)
  170. RTSR |= RTSR_ALE;
  171. else
  172. RTSR &= ~RTSR_ALE;
  173. spin_unlock_irq(&sa1100_rtc_lock);
  174. return 0;
  175. }
  176. static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm)
  177. {
  178. rtc_time_to_tm(RCNR, tm);
  179. return 0;
  180. }
  181. static int sa1100_rtc_set_time(struct device *dev, struct rtc_time *tm)
  182. {
  183. unsigned long time;
  184. int ret;
  185. ret = rtc_tm_to_time(tm, &time);
  186. if (ret == 0)
  187. RCNR = time;
  188. return ret;
  189. }
  190. static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  191. {
  192. u32 rtsr;
  193. memcpy(&alrm->time, &rtc_alarm, sizeof(struct rtc_time));
  194. rtsr = RTSR;
  195. alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0;
  196. alrm->pending = (rtsr & RTSR_AL) ? 1 : 0;
  197. return 0;
  198. }
  199. static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  200. {
  201. int ret;
  202. spin_lock_irq(&sa1100_rtc_lock);
  203. ret = rtc_update_alarm(&alrm->time);
  204. if (ret == 0) {
  205. if (alrm->enabled)
  206. RTSR |= RTSR_ALE;
  207. else
  208. RTSR &= ~RTSR_ALE;
  209. }
  210. spin_unlock_irq(&sa1100_rtc_lock);
  211. return ret;
  212. }
  213. static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq)
  214. {
  215. seq_printf(seq, "trim/divider\t\t: 0x%08x\n", (u32) RTTR);
  216. seq_printf(seq, "RTSR\t\t\t: 0x%08x\n", (u32)RTSR);
  217. return 0;
  218. }
  219. static const struct rtc_class_ops sa1100_rtc_ops = {
  220. .open = sa1100_rtc_open,
  221. .release = sa1100_rtc_release,
  222. .read_time = sa1100_rtc_read_time,
  223. .set_time = sa1100_rtc_set_time,
  224. .read_alarm = sa1100_rtc_read_alarm,
  225. .set_alarm = sa1100_rtc_set_alarm,
  226. .proc = sa1100_rtc_proc,
  227. .alarm_irq_enable = sa1100_rtc_alarm_irq_enable,
  228. };
  229. static int sa1100_rtc_probe(struct platform_device *pdev)
  230. {
  231. struct rtc_device *rtc;
  232. /*
  233. * According to the manual we should be able to let RTTR be zero
  234. * and then a default diviser for a 32.768KHz clock is used.
  235. * Apparently this doesn't work, at least for my SA1110 rev 5.
  236. * If the clock divider is uninitialized then reset it to the
  237. * default value to get the 1Hz clock.
  238. */
  239. if (RTTR == 0) {
  240. RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);
  241. dev_warn(&pdev->dev, "warning: "
  242. "initializing default clock divider/trim value\n");
  243. /* The current RTC value probably doesn't make sense either */
  244. RCNR = 0;
  245. }
  246. device_init_wakeup(&pdev->dev, 1);
  247. rtc = rtc_device_register(pdev->name, &pdev->dev, &sa1100_rtc_ops,
  248. THIS_MODULE);
  249. if (IS_ERR(rtc))
  250. return PTR_ERR(rtc);
  251. platform_set_drvdata(pdev, rtc);
  252. /* Fix for a nasty initialization problem the in SA11xx RTSR register.
  253. * See also the comments in sa1100_rtc_interrupt().
  254. *
  255. * Sometimes bit 1 of the RTSR (RTSR_HZ) will wake up 1, which means an
  256. * interrupt pending, even though interrupts were never enabled.
  257. * In this case, this bit it must be reset before enabling
  258. * interruptions to avoid a nonexistent interrupt to occur.
  259. *
  260. * In principle, the same problem would apply to bit 0, although it has
  261. * never been observed to happen.
  262. *
  263. * This issue is addressed both here and in sa1100_rtc_interrupt().
  264. * If the issue is not addressed here, in the times when the processor
  265. * wakes up with the bit set there will be one spurious interrupt.
  266. *
  267. * The issue is also dealt with in sa1100_rtc_interrupt() to be on the
  268. * safe side, once the condition that lead to this strange
  269. * initialization is unknown and could in principle happen during
  270. * normal processing.
  271. *
  272. * Notice that clearing bit 1 and 0 is accomplished by writting ONES to
  273. * the corresponding bits in RTSR. */
  274. RTSR = RTSR_AL | RTSR_HZ;
  275. return 0;
  276. }
  277. static int sa1100_rtc_remove(struct platform_device *pdev)
  278. {
  279. struct rtc_device *rtc = platform_get_drvdata(pdev);
  280. if (rtc)
  281. rtc_device_unregister(rtc);
  282. return 0;
  283. }
  284. #ifdef CONFIG_PM
  285. static int sa1100_rtc_suspend(struct device *dev)
  286. {
  287. if (device_may_wakeup(dev))
  288. enable_irq_wake(IRQ_RTCAlrm);
  289. return 0;
  290. }
  291. static int sa1100_rtc_resume(struct device *dev)
  292. {
  293. if (device_may_wakeup(dev))
  294. disable_irq_wake(IRQ_RTCAlrm);
  295. return 0;
  296. }
  297. static const struct dev_pm_ops sa1100_rtc_pm_ops = {
  298. .suspend = sa1100_rtc_suspend,
  299. .resume = sa1100_rtc_resume,
  300. };
  301. #endif
  302. static struct platform_driver sa1100_rtc_driver = {
  303. .probe = sa1100_rtc_probe,
  304. .remove = sa1100_rtc_remove,
  305. .driver = {
  306. .name = "sa1100-rtc",
  307. #ifdef CONFIG_PM
  308. .pm = &sa1100_rtc_pm_ops,
  309. #endif
  310. },
  311. };
  312. module_platform_driver(sa1100_rtc_driver);
  313. MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
  314. MODULE_DESCRIPTION("SA11x0/PXA2xx Realtime Clock Driver (RTC)");
  315. MODULE_LICENSE("GPL");
  316. MODULE_ALIAS("platform:sa1100-rtc");