rtc-ds1307.c 24 KB

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  1. /*
  2. * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips.
  3. *
  4. * Copyright (C) 2005 James Chapman (ds1337 core)
  5. * Copyright (C) 2006 David Brownell
  6. * Copyright (C) 2009 Matthias Fuchs (rx8025 support)
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/slab.h>
  15. #include <linux/i2c.h>
  16. #include <linux/string.h>
  17. #include <linux/rtc.h>
  18. #include <linux/bcd.h>
  19. /* We can't determine type by probing, but if we expect pre-Linux code
  20. * to have set the chip up as a clock (turning on the oscillator and
  21. * setting the date and time), Linux can ignore the non-clock features.
  22. * That's a natural job for a factory or repair bench.
  23. */
  24. enum ds_type {
  25. ds_1307,
  26. ds_1337,
  27. ds_1338,
  28. ds_1339,
  29. ds_1340,
  30. ds_1388,
  31. ds_3231,
  32. m41t00,
  33. mcp7941x,
  34. rx_8025,
  35. // rs5c372 too? different address...
  36. };
  37. /* RTC registers don't differ much, except for the century flag */
  38. #define DS1307_REG_SECS 0x00 /* 00-59 */
  39. # define DS1307_BIT_CH 0x80
  40. # define DS1340_BIT_nEOSC 0x80
  41. # define MCP7941X_BIT_ST 0x80
  42. #define DS1307_REG_MIN 0x01 /* 00-59 */
  43. #define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */
  44. # define DS1307_BIT_12HR 0x40 /* in REG_HOUR */
  45. # define DS1307_BIT_PM 0x20 /* in REG_HOUR */
  46. # define DS1340_BIT_CENTURY_EN 0x80 /* in REG_HOUR */
  47. # define DS1340_BIT_CENTURY 0x40 /* in REG_HOUR */
  48. #define DS1307_REG_WDAY 0x03 /* 01-07 */
  49. # define MCP7941X_BIT_VBATEN 0x08
  50. #define DS1307_REG_MDAY 0x04 /* 01-31 */
  51. #define DS1307_REG_MONTH 0x05 /* 01-12 */
  52. # define DS1337_BIT_CENTURY 0x80 /* in REG_MONTH */
  53. #define DS1307_REG_YEAR 0x06 /* 00-99 */
  54. /* Other registers (control, status, alarms, trickle charge, NVRAM, etc)
  55. * start at 7, and they differ a LOT. Only control and status matter for
  56. * basic RTC date and time functionality; be careful using them.
  57. */
  58. #define DS1307_REG_CONTROL 0x07 /* or ds1338 */
  59. # define DS1307_BIT_OUT 0x80
  60. # define DS1338_BIT_OSF 0x20
  61. # define DS1307_BIT_SQWE 0x10
  62. # define DS1307_BIT_RS1 0x02
  63. # define DS1307_BIT_RS0 0x01
  64. #define DS1337_REG_CONTROL 0x0e
  65. # define DS1337_BIT_nEOSC 0x80
  66. # define DS1339_BIT_BBSQI 0x20
  67. # define DS3231_BIT_BBSQW 0x40 /* same as BBSQI */
  68. # define DS1337_BIT_RS2 0x10
  69. # define DS1337_BIT_RS1 0x08
  70. # define DS1337_BIT_INTCN 0x04
  71. # define DS1337_BIT_A2IE 0x02
  72. # define DS1337_BIT_A1IE 0x01
  73. #define DS1340_REG_CONTROL 0x07
  74. # define DS1340_BIT_OUT 0x80
  75. # define DS1340_BIT_FT 0x40
  76. # define DS1340_BIT_CALIB_SIGN 0x20
  77. # define DS1340_M_CALIBRATION 0x1f
  78. #define DS1340_REG_FLAG 0x09
  79. # define DS1340_BIT_OSF 0x80
  80. #define DS1337_REG_STATUS 0x0f
  81. # define DS1337_BIT_OSF 0x80
  82. # define DS1337_BIT_A2I 0x02
  83. # define DS1337_BIT_A1I 0x01
  84. #define DS1339_REG_ALARM1_SECS 0x07
  85. #define DS1339_REG_TRICKLE 0x10
  86. #define RX8025_REG_CTRL1 0x0e
  87. # define RX8025_BIT_2412 0x20
  88. #define RX8025_REG_CTRL2 0x0f
  89. # define RX8025_BIT_PON 0x10
  90. # define RX8025_BIT_VDET 0x40
  91. # define RX8025_BIT_XST 0x20
  92. struct ds1307 {
  93. u8 offset; /* register's offset */
  94. u8 regs[11];
  95. enum ds_type type;
  96. unsigned long flags;
  97. #define HAS_NVRAM 0 /* bit 0 == sysfs file active */
  98. #define HAS_ALARM 1 /* bit 1 == irq claimed */
  99. struct i2c_client *client;
  100. struct rtc_device *rtc;
  101. struct work_struct work;
  102. s32 (*read_block_data)(const struct i2c_client *client, u8 command,
  103. u8 length, u8 *values);
  104. s32 (*write_block_data)(const struct i2c_client *client, u8 command,
  105. u8 length, const u8 *values);
  106. };
  107. struct chip_desc {
  108. unsigned nvram56:1;
  109. unsigned alarm:1;
  110. };
  111. static const struct chip_desc chips[] = {
  112. [ds_1307] = {
  113. .nvram56 = 1,
  114. },
  115. [ds_1337] = {
  116. .alarm = 1,
  117. },
  118. [ds_1338] = {
  119. .nvram56 = 1,
  120. },
  121. [ds_1339] = {
  122. .alarm = 1,
  123. },
  124. [ds_1340] = {
  125. },
  126. [ds_3231] = {
  127. .alarm = 1,
  128. },
  129. [m41t00] = {
  130. },
  131. [mcp7941x] = {
  132. },
  133. [rx_8025] = {
  134. }, };
  135. static const struct i2c_device_id ds1307_id[] = {
  136. { "ds1307", ds_1307 },
  137. { "ds1337", ds_1337 },
  138. { "ds1338", ds_1338 },
  139. { "ds1339", ds_1339 },
  140. { "ds1388", ds_1388 },
  141. { "ds1340", ds_1340 },
  142. { "ds3231", ds_3231 },
  143. { "m41t00", m41t00 },
  144. { "mcp7941x", mcp7941x },
  145. { "pt7c4338", ds_1307 },
  146. { "rx8025", rx_8025 },
  147. { }
  148. };
  149. MODULE_DEVICE_TABLE(i2c, ds1307_id);
  150. /*----------------------------------------------------------------------*/
  151. #define BLOCK_DATA_MAX_TRIES 10
  152. static s32 ds1307_read_block_data_once(const struct i2c_client *client,
  153. u8 command, u8 length, u8 *values)
  154. {
  155. s32 i, data;
  156. for (i = 0; i < length; i++) {
  157. data = i2c_smbus_read_byte_data(client, command + i);
  158. if (data < 0)
  159. return data;
  160. values[i] = data;
  161. }
  162. return i;
  163. }
  164. static s32 ds1307_read_block_data(const struct i2c_client *client, u8 command,
  165. u8 length, u8 *values)
  166. {
  167. u8 oldvalues[I2C_SMBUS_BLOCK_MAX];
  168. s32 ret;
  169. int tries = 0;
  170. dev_dbg(&client->dev, "ds1307_read_block_data (length=%d)\n", length);
  171. ret = ds1307_read_block_data_once(client, command, length, values);
  172. if (ret < 0)
  173. return ret;
  174. do {
  175. if (++tries > BLOCK_DATA_MAX_TRIES) {
  176. dev_err(&client->dev,
  177. "ds1307_read_block_data failed\n");
  178. return -EIO;
  179. }
  180. memcpy(oldvalues, values, length);
  181. ret = ds1307_read_block_data_once(client, command, length,
  182. values);
  183. if (ret < 0)
  184. return ret;
  185. } while (memcmp(oldvalues, values, length));
  186. return length;
  187. }
  188. static s32 ds1307_write_block_data(const struct i2c_client *client, u8 command,
  189. u8 length, const u8 *values)
  190. {
  191. u8 currvalues[I2C_SMBUS_BLOCK_MAX];
  192. int tries = 0;
  193. dev_dbg(&client->dev, "ds1307_write_block_data (length=%d)\n", length);
  194. do {
  195. s32 i, ret;
  196. if (++tries > BLOCK_DATA_MAX_TRIES) {
  197. dev_err(&client->dev,
  198. "ds1307_write_block_data failed\n");
  199. return -EIO;
  200. }
  201. for (i = 0; i < length; i++) {
  202. ret = i2c_smbus_write_byte_data(client, command + i,
  203. values[i]);
  204. if (ret < 0)
  205. return ret;
  206. }
  207. ret = ds1307_read_block_data_once(client, command, length,
  208. currvalues);
  209. if (ret < 0)
  210. return ret;
  211. } while (memcmp(currvalues, values, length));
  212. return length;
  213. }
  214. /*----------------------------------------------------------------------*/
  215. /*
  216. * The IRQ logic includes a "real" handler running in IRQ context just
  217. * long enough to schedule this workqueue entry. We need a task context
  218. * to talk to the RTC, since I2C I/O calls require that; and disable the
  219. * IRQ until we clear its status on the chip, so that this handler can
  220. * work with any type of triggering (not just falling edge).
  221. *
  222. * The ds1337 and ds1339 both have two alarms, but we only use the first
  223. * one (with a "seconds" field). For ds1337 we expect nINTA is our alarm
  224. * signal; ds1339 chips have only one alarm signal.
  225. */
  226. static void ds1307_work(struct work_struct *work)
  227. {
  228. struct ds1307 *ds1307;
  229. struct i2c_client *client;
  230. struct mutex *lock;
  231. int stat, control;
  232. ds1307 = container_of(work, struct ds1307, work);
  233. client = ds1307->client;
  234. lock = &ds1307->rtc->ops_lock;
  235. mutex_lock(lock);
  236. stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);
  237. if (stat < 0)
  238. goto out;
  239. if (stat & DS1337_BIT_A1I) {
  240. stat &= ~DS1337_BIT_A1I;
  241. i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat);
  242. control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
  243. if (control < 0)
  244. goto out;
  245. control &= ~DS1337_BIT_A1IE;
  246. i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control);
  247. rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
  248. }
  249. out:
  250. if (test_bit(HAS_ALARM, &ds1307->flags))
  251. enable_irq(client->irq);
  252. mutex_unlock(lock);
  253. }
  254. static irqreturn_t ds1307_irq(int irq, void *dev_id)
  255. {
  256. struct i2c_client *client = dev_id;
  257. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  258. disable_irq_nosync(irq);
  259. schedule_work(&ds1307->work);
  260. return IRQ_HANDLED;
  261. }
  262. /*----------------------------------------------------------------------*/
  263. static int ds1307_get_time(struct device *dev, struct rtc_time *t)
  264. {
  265. struct ds1307 *ds1307 = dev_get_drvdata(dev);
  266. int tmp;
  267. /* read the RTC date and time registers all at once */
  268. tmp = ds1307->read_block_data(ds1307->client,
  269. ds1307->offset, 7, ds1307->regs);
  270. if (tmp != 7) {
  271. dev_err(dev, "%s error %d\n", "read", tmp);
  272. return -EIO;
  273. }
  274. dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n",
  275. "read",
  276. ds1307->regs[0], ds1307->regs[1],
  277. ds1307->regs[2], ds1307->regs[3],
  278. ds1307->regs[4], ds1307->regs[5],
  279. ds1307->regs[6]);
  280. t->tm_sec = bcd2bin(ds1307->regs[DS1307_REG_SECS] & 0x7f);
  281. t->tm_min = bcd2bin(ds1307->regs[DS1307_REG_MIN] & 0x7f);
  282. tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f;
  283. t->tm_hour = bcd2bin(tmp);
  284. t->tm_wday = bcd2bin(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1;
  285. t->tm_mday = bcd2bin(ds1307->regs[DS1307_REG_MDAY] & 0x3f);
  286. tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f;
  287. t->tm_mon = bcd2bin(tmp) - 1;
  288. /* assume 20YY not 19YY, and ignore DS1337_BIT_CENTURY */
  289. t->tm_year = bcd2bin(ds1307->regs[DS1307_REG_YEAR]) + 100;
  290. dev_dbg(dev, "%s secs=%d, mins=%d, "
  291. "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
  292. "read", t->tm_sec, t->tm_min,
  293. t->tm_hour, t->tm_mday,
  294. t->tm_mon, t->tm_year, t->tm_wday);
  295. /* initial clock setting can be undefined */
  296. return rtc_valid_tm(t);
  297. }
  298. static int ds1307_set_time(struct device *dev, struct rtc_time *t)
  299. {
  300. struct ds1307 *ds1307 = dev_get_drvdata(dev);
  301. int result;
  302. int tmp;
  303. u8 *buf = ds1307->regs;
  304. dev_dbg(dev, "%s secs=%d, mins=%d, "
  305. "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
  306. "write", t->tm_sec, t->tm_min,
  307. t->tm_hour, t->tm_mday,
  308. t->tm_mon, t->tm_year, t->tm_wday);
  309. buf[DS1307_REG_SECS] = bin2bcd(t->tm_sec);
  310. buf[DS1307_REG_MIN] = bin2bcd(t->tm_min);
  311. buf[DS1307_REG_HOUR] = bin2bcd(t->tm_hour);
  312. buf[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1);
  313. buf[DS1307_REG_MDAY] = bin2bcd(t->tm_mday);
  314. buf[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1);
  315. /* assume 20YY not 19YY */
  316. tmp = t->tm_year - 100;
  317. buf[DS1307_REG_YEAR] = bin2bcd(tmp);
  318. switch (ds1307->type) {
  319. case ds_1337:
  320. case ds_1339:
  321. case ds_3231:
  322. buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY;
  323. break;
  324. case ds_1340:
  325. buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN
  326. | DS1340_BIT_CENTURY;
  327. break;
  328. case mcp7941x:
  329. buf[DS1307_REG_SECS] |= MCP7941X_BIT_ST;
  330. buf[DS1307_REG_WDAY] |= MCP7941X_BIT_VBATEN;
  331. break;
  332. default:
  333. break;
  334. }
  335. dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n",
  336. "write", buf[0], buf[1], buf[2], buf[3],
  337. buf[4], buf[5], buf[6]);
  338. result = ds1307->write_block_data(ds1307->client,
  339. ds1307->offset, 7, buf);
  340. if (result < 0) {
  341. dev_err(dev, "%s error %d\n", "write", result);
  342. return result;
  343. }
  344. return 0;
  345. }
  346. static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t)
  347. {
  348. struct i2c_client *client = to_i2c_client(dev);
  349. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  350. int ret;
  351. if (!test_bit(HAS_ALARM, &ds1307->flags))
  352. return -EINVAL;
  353. /* read all ALARM1, ALARM2, and status registers at once */
  354. ret = ds1307->read_block_data(client,
  355. DS1339_REG_ALARM1_SECS, 9, ds1307->regs);
  356. if (ret != 9) {
  357. dev_err(dev, "%s error %d\n", "alarm read", ret);
  358. return -EIO;
  359. }
  360. dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n",
  361. "alarm read",
  362. ds1307->regs[0], ds1307->regs[1],
  363. ds1307->regs[2], ds1307->regs[3],
  364. ds1307->regs[4], ds1307->regs[5],
  365. ds1307->regs[6], ds1307->regs[7],
  366. ds1307->regs[8]);
  367. /* report alarm time (ALARM1); assume 24 hour and day-of-month modes,
  368. * and that all four fields are checked matches
  369. */
  370. t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f);
  371. t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f);
  372. t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f);
  373. t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f);
  374. t->time.tm_mon = -1;
  375. t->time.tm_year = -1;
  376. t->time.tm_wday = -1;
  377. t->time.tm_yday = -1;
  378. t->time.tm_isdst = -1;
  379. /* ... and status */
  380. t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE);
  381. t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I);
  382. dev_dbg(dev, "%s secs=%d, mins=%d, "
  383. "hours=%d, mday=%d, enabled=%d, pending=%d\n",
  384. "alarm read", t->time.tm_sec, t->time.tm_min,
  385. t->time.tm_hour, t->time.tm_mday,
  386. t->enabled, t->pending);
  387. return 0;
  388. }
  389. static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t)
  390. {
  391. struct i2c_client *client = to_i2c_client(dev);
  392. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  393. unsigned char *buf = ds1307->regs;
  394. u8 control, status;
  395. int ret;
  396. if (!test_bit(HAS_ALARM, &ds1307->flags))
  397. return -EINVAL;
  398. dev_dbg(dev, "%s secs=%d, mins=%d, "
  399. "hours=%d, mday=%d, enabled=%d, pending=%d\n",
  400. "alarm set", t->time.tm_sec, t->time.tm_min,
  401. t->time.tm_hour, t->time.tm_mday,
  402. t->enabled, t->pending);
  403. /* read current status of both alarms and the chip */
  404. ret = ds1307->read_block_data(client,
  405. DS1339_REG_ALARM1_SECS, 9, buf);
  406. if (ret != 9) {
  407. dev_err(dev, "%s error %d\n", "alarm write", ret);
  408. return -EIO;
  409. }
  410. control = ds1307->regs[7];
  411. status = ds1307->regs[8];
  412. dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n",
  413. "alarm set (old status)",
  414. ds1307->regs[0], ds1307->regs[1],
  415. ds1307->regs[2], ds1307->regs[3],
  416. ds1307->regs[4], ds1307->regs[5],
  417. ds1307->regs[6], control, status);
  418. /* set ALARM1, using 24 hour and day-of-month modes */
  419. buf[0] = bin2bcd(t->time.tm_sec);
  420. buf[1] = bin2bcd(t->time.tm_min);
  421. buf[2] = bin2bcd(t->time.tm_hour);
  422. buf[3] = bin2bcd(t->time.tm_mday);
  423. /* set ALARM2 to non-garbage */
  424. buf[4] = 0;
  425. buf[5] = 0;
  426. buf[6] = 0;
  427. /* optionally enable ALARM1 */
  428. buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
  429. if (t->enabled) {
  430. dev_dbg(dev, "alarm IRQ armed\n");
  431. buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */
  432. }
  433. buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
  434. ret = ds1307->write_block_data(client,
  435. DS1339_REG_ALARM1_SECS, 9, buf);
  436. if (ret < 0) {
  437. dev_err(dev, "can't set alarm time\n");
  438. return ret;
  439. }
  440. return 0;
  441. }
  442. static int ds1307_alarm_irq_enable(struct device *dev, unsigned int enabled)
  443. {
  444. struct i2c_client *client = to_i2c_client(dev);
  445. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  446. int ret;
  447. if (!test_bit(HAS_ALARM, &ds1307->flags))
  448. return -ENOTTY;
  449. ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
  450. if (ret < 0)
  451. return ret;
  452. if (enabled)
  453. ret |= DS1337_BIT_A1IE;
  454. else
  455. ret &= ~DS1337_BIT_A1IE;
  456. ret = i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, ret);
  457. if (ret < 0)
  458. return ret;
  459. return 0;
  460. }
  461. static const struct rtc_class_ops ds13xx_rtc_ops = {
  462. .read_time = ds1307_get_time,
  463. .set_time = ds1307_set_time,
  464. .read_alarm = ds1337_read_alarm,
  465. .set_alarm = ds1337_set_alarm,
  466. .alarm_irq_enable = ds1307_alarm_irq_enable,
  467. };
  468. /*----------------------------------------------------------------------*/
  469. #define NVRAM_SIZE 56
  470. static ssize_t
  471. ds1307_nvram_read(struct file *filp, struct kobject *kobj,
  472. struct bin_attribute *attr,
  473. char *buf, loff_t off, size_t count)
  474. {
  475. struct i2c_client *client;
  476. struct ds1307 *ds1307;
  477. int result;
  478. client = kobj_to_i2c_client(kobj);
  479. ds1307 = i2c_get_clientdata(client);
  480. if (unlikely(off >= NVRAM_SIZE))
  481. return 0;
  482. if ((off + count) > NVRAM_SIZE)
  483. count = NVRAM_SIZE - off;
  484. if (unlikely(!count))
  485. return count;
  486. result = ds1307->read_block_data(client, 8 + off, count, buf);
  487. if (result < 0)
  488. dev_err(&client->dev, "%s error %d\n", "nvram read", result);
  489. return result;
  490. }
  491. static ssize_t
  492. ds1307_nvram_write(struct file *filp, struct kobject *kobj,
  493. struct bin_attribute *attr,
  494. char *buf, loff_t off, size_t count)
  495. {
  496. struct i2c_client *client;
  497. struct ds1307 *ds1307;
  498. int result;
  499. client = kobj_to_i2c_client(kobj);
  500. ds1307 = i2c_get_clientdata(client);
  501. if (unlikely(off >= NVRAM_SIZE))
  502. return -EFBIG;
  503. if ((off + count) > NVRAM_SIZE)
  504. count = NVRAM_SIZE - off;
  505. if (unlikely(!count))
  506. return count;
  507. result = ds1307->write_block_data(client, 8 + off, count, buf);
  508. if (result < 0) {
  509. dev_err(&client->dev, "%s error %d\n", "nvram write", result);
  510. return result;
  511. }
  512. return count;
  513. }
  514. static struct bin_attribute nvram = {
  515. .attr = {
  516. .name = "nvram",
  517. .mode = S_IRUGO | S_IWUSR,
  518. },
  519. .read = ds1307_nvram_read,
  520. .write = ds1307_nvram_write,
  521. .size = NVRAM_SIZE,
  522. };
  523. /*----------------------------------------------------------------------*/
  524. static struct i2c_driver ds1307_driver;
  525. static int __devinit ds1307_probe(struct i2c_client *client,
  526. const struct i2c_device_id *id)
  527. {
  528. struct ds1307 *ds1307;
  529. int err = -ENODEV;
  530. int tmp;
  531. const struct chip_desc *chip = &chips[id->driver_data];
  532. struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
  533. int want_irq = false;
  534. unsigned char *buf;
  535. static const int bbsqi_bitpos[] = {
  536. [ds_1337] = 0,
  537. [ds_1339] = DS1339_BIT_BBSQI,
  538. [ds_3231] = DS3231_BIT_BBSQW,
  539. };
  540. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)
  541. && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK))
  542. return -EIO;
  543. if (!(ds1307 = kzalloc(sizeof(struct ds1307), GFP_KERNEL)))
  544. return -ENOMEM;
  545. i2c_set_clientdata(client, ds1307);
  546. ds1307->client = client;
  547. ds1307->type = id->driver_data;
  548. ds1307->offset = 0;
  549. buf = ds1307->regs;
  550. if (i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) {
  551. ds1307->read_block_data = i2c_smbus_read_i2c_block_data;
  552. ds1307->write_block_data = i2c_smbus_write_i2c_block_data;
  553. } else {
  554. ds1307->read_block_data = ds1307_read_block_data;
  555. ds1307->write_block_data = ds1307_write_block_data;
  556. }
  557. switch (ds1307->type) {
  558. case ds_1337:
  559. case ds_1339:
  560. case ds_3231:
  561. /* has IRQ? */
  562. if (ds1307->client->irq > 0 && chip->alarm) {
  563. INIT_WORK(&ds1307->work, ds1307_work);
  564. want_irq = true;
  565. }
  566. /* get registers that the "rtc" read below won't read... */
  567. tmp = ds1307->read_block_data(ds1307->client,
  568. DS1337_REG_CONTROL, 2, buf);
  569. if (tmp != 2) {
  570. pr_debug("read error %d\n", tmp);
  571. err = -EIO;
  572. goto exit_free;
  573. }
  574. /* oscillator off? turn it on, so clock can tick. */
  575. if (ds1307->regs[0] & DS1337_BIT_nEOSC)
  576. ds1307->regs[0] &= ~DS1337_BIT_nEOSC;
  577. /* Using IRQ? Disable the square wave and both alarms.
  578. * For some variants, be sure alarms can trigger when we're
  579. * running on Vbackup (BBSQI/BBSQW)
  580. */
  581. if (want_irq) {
  582. ds1307->regs[0] |= DS1337_BIT_INTCN
  583. | bbsqi_bitpos[ds1307->type];
  584. ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE);
  585. }
  586. i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL,
  587. ds1307->regs[0]);
  588. /* oscillator fault? clear flag, and warn */
  589. if (ds1307->regs[1] & DS1337_BIT_OSF) {
  590. i2c_smbus_write_byte_data(client, DS1337_REG_STATUS,
  591. ds1307->regs[1] & ~DS1337_BIT_OSF);
  592. dev_warn(&client->dev, "SET TIME!\n");
  593. }
  594. break;
  595. case rx_8025:
  596. tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
  597. RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
  598. if (tmp != 2) {
  599. pr_debug("read error %d\n", tmp);
  600. err = -EIO;
  601. goto exit_free;
  602. }
  603. /* oscillator off? turn it on, so clock can tick. */
  604. if (!(ds1307->regs[1] & RX8025_BIT_XST)) {
  605. ds1307->regs[1] |= RX8025_BIT_XST;
  606. i2c_smbus_write_byte_data(client,
  607. RX8025_REG_CTRL2 << 4 | 0x08,
  608. ds1307->regs[1]);
  609. dev_warn(&client->dev,
  610. "oscillator stop detected - SET TIME!\n");
  611. }
  612. if (ds1307->regs[1] & RX8025_BIT_PON) {
  613. ds1307->regs[1] &= ~RX8025_BIT_PON;
  614. i2c_smbus_write_byte_data(client,
  615. RX8025_REG_CTRL2 << 4 | 0x08,
  616. ds1307->regs[1]);
  617. dev_warn(&client->dev, "power-on detected\n");
  618. }
  619. if (ds1307->regs[1] & RX8025_BIT_VDET) {
  620. ds1307->regs[1] &= ~RX8025_BIT_VDET;
  621. i2c_smbus_write_byte_data(client,
  622. RX8025_REG_CTRL2 << 4 | 0x08,
  623. ds1307->regs[1]);
  624. dev_warn(&client->dev, "voltage drop detected\n");
  625. }
  626. /* make sure we are running in 24hour mode */
  627. if (!(ds1307->regs[0] & RX8025_BIT_2412)) {
  628. u8 hour;
  629. /* switch to 24 hour mode */
  630. i2c_smbus_write_byte_data(client,
  631. RX8025_REG_CTRL1 << 4 | 0x08,
  632. ds1307->regs[0] |
  633. RX8025_BIT_2412);
  634. tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
  635. RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
  636. if (tmp != 2) {
  637. pr_debug("read error %d\n", tmp);
  638. err = -EIO;
  639. goto exit_free;
  640. }
  641. /* correct hour */
  642. hour = bcd2bin(ds1307->regs[DS1307_REG_HOUR]);
  643. if (hour == 12)
  644. hour = 0;
  645. if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
  646. hour += 12;
  647. i2c_smbus_write_byte_data(client,
  648. DS1307_REG_HOUR << 4 | 0x08,
  649. hour);
  650. }
  651. break;
  652. case ds_1388:
  653. ds1307->offset = 1; /* Seconds starts at 1 */
  654. break;
  655. default:
  656. break;
  657. }
  658. read_rtc:
  659. /* read RTC registers */
  660. tmp = ds1307->read_block_data(ds1307->client, ds1307->offset, 8, buf);
  661. if (tmp != 8) {
  662. pr_debug("read error %d\n", tmp);
  663. err = -EIO;
  664. goto exit_free;
  665. }
  666. /* minimal sanity checking; some chips (like DS1340) don't
  667. * specify the extra bits as must-be-zero, but there are
  668. * still a few values that are clearly out-of-range.
  669. */
  670. tmp = ds1307->regs[DS1307_REG_SECS];
  671. switch (ds1307->type) {
  672. case ds_1307:
  673. case m41t00:
  674. /* clock halted? turn it on, so clock can tick. */
  675. if (tmp & DS1307_BIT_CH) {
  676. i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
  677. dev_warn(&client->dev, "SET TIME!\n");
  678. goto read_rtc;
  679. }
  680. break;
  681. case ds_1338:
  682. /* clock halted? turn it on, so clock can tick. */
  683. if (tmp & DS1307_BIT_CH)
  684. i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
  685. /* oscillator fault? clear flag, and warn */
  686. if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) {
  687. i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL,
  688. ds1307->regs[DS1307_REG_CONTROL]
  689. & ~DS1338_BIT_OSF);
  690. dev_warn(&client->dev, "SET TIME!\n");
  691. goto read_rtc;
  692. }
  693. break;
  694. case ds_1340:
  695. /* clock halted? turn it on, so clock can tick. */
  696. if (tmp & DS1340_BIT_nEOSC)
  697. i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
  698. tmp = i2c_smbus_read_byte_data(client, DS1340_REG_FLAG);
  699. if (tmp < 0) {
  700. pr_debug("read error %d\n", tmp);
  701. err = -EIO;
  702. goto exit_free;
  703. }
  704. /* oscillator fault? clear flag, and warn */
  705. if (tmp & DS1340_BIT_OSF) {
  706. i2c_smbus_write_byte_data(client, DS1340_REG_FLAG, 0);
  707. dev_warn(&client->dev, "SET TIME!\n");
  708. }
  709. break;
  710. case mcp7941x:
  711. /* make sure that the backup battery is enabled */
  712. if (!(ds1307->regs[DS1307_REG_WDAY] & MCP7941X_BIT_VBATEN)) {
  713. i2c_smbus_write_byte_data(client, DS1307_REG_WDAY,
  714. ds1307->regs[DS1307_REG_WDAY]
  715. | MCP7941X_BIT_VBATEN);
  716. }
  717. /* clock halted? turn it on, so clock can tick. */
  718. if (!(tmp & MCP7941X_BIT_ST)) {
  719. i2c_smbus_write_byte_data(client, DS1307_REG_SECS,
  720. MCP7941X_BIT_ST);
  721. dev_warn(&client->dev, "SET TIME!\n");
  722. goto read_rtc;
  723. }
  724. break;
  725. case rx_8025:
  726. case ds_1337:
  727. case ds_1339:
  728. case ds_1388:
  729. case ds_3231:
  730. break;
  731. }
  732. tmp = ds1307->regs[DS1307_REG_HOUR];
  733. switch (ds1307->type) {
  734. case ds_1340:
  735. case m41t00:
  736. /* NOTE: ignores century bits; fix before deploying
  737. * systems that will run through year 2100.
  738. */
  739. break;
  740. case rx_8025:
  741. break;
  742. default:
  743. if (!(tmp & DS1307_BIT_12HR))
  744. break;
  745. /* Be sure we're in 24 hour mode. Multi-master systems
  746. * take note...
  747. */
  748. tmp = bcd2bin(tmp & 0x1f);
  749. if (tmp == 12)
  750. tmp = 0;
  751. if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
  752. tmp += 12;
  753. i2c_smbus_write_byte_data(client,
  754. ds1307->offset + DS1307_REG_HOUR,
  755. bin2bcd(tmp));
  756. }
  757. ds1307->rtc = rtc_device_register(client->name, &client->dev,
  758. &ds13xx_rtc_ops, THIS_MODULE);
  759. if (IS_ERR(ds1307->rtc)) {
  760. err = PTR_ERR(ds1307->rtc);
  761. dev_err(&client->dev,
  762. "unable to register the class device\n");
  763. goto exit_free;
  764. }
  765. if (want_irq) {
  766. err = request_irq(client->irq, ds1307_irq, IRQF_SHARED,
  767. ds1307->rtc->name, client);
  768. if (err) {
  769. dev_err(&client->dev,
  770. "unable to request IRQ!\n");
  771. goto exit_irq;
  772. }
  773. device_set_wakeup_capable(&client->dev, 1);
  774. set_bit(HAS_ALARM, &ds1307->flags);
  775. dev_dbg(&client->dev, "got IRQ %d\n", client->irq);
  776. }
  777. if (chip->nvram56) {
  778. err = sysfs_create_bin_file(&client->dev.kobj, &nvram);
  779. if (err == 0) {
  780. set_bit(HAS_NVRAM, &ds1307->flags);
  781. dev_info(&client->dev, "56 bytes nvram\n");
  782. }
  783. }
  784. return 0;
  785. exit_irq:
  786. rtc_device_unregister(ds1307->rtc);
  787. exit_free:
  788. kfree(ds1307);
  789. return err;
  790. }
  791. static int __devexit ds1307_remove(struct i2c_client *client)
  792. {
  793. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  794. if (test_and_clear_bit(HAS_ALARM, &ds1307->flags)) {
  795. free_irq(client->irq, client);
  796. cancel_work_sync(&ds1307->work);
  797. }
  798. if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags))
  799. sysfs_remove_bin_file(&client->dev.kobj, &nvram);
  800. rtc_device_unregister(ds1307->rtc);
  801. kfree(ds1307);
  802. return 0;
  803. }
  804. static struct i2c_driver ds1307_driver = {
  805. .driver = {
  806. .name = "rtc-ds1307",
  807. .owner = THIS_MODULE,
  808. },
  809. .probe = ds1307_probe,
  810. .remove = __devexit_p(ds1307_remove),
  811. .id_table = ds1307_id,
  812. };
  813. static int __init ds1307_init(void)
  814. {
  815. return i2c_add_driver(&ds1307_driver);
  816. }
  817. module_init(ds1307_init);
  818. static void __exit ds1307_exit(void)
  819. {
  820. i2c_del_driver(&ds1307_driver);
  821. }
  822. module_exit(ds1307_exit);
  823. MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips");
  824. MODULE_LICENSE("GPL");