main.c 58 KB

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  1. /*
  2. * Copyright (c) 2008-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/nl80211.h>
  17. #include <linux/delay.h>
  18. #include "ath9k.h"
  19. #include "btcoex.h"
  20. static u8 parse_mpdudensity(u8 mpdudensity)
  21. {
  22. /*
  23. * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  24. * 0 for no restriction
  25. * 1 for 1/4 us
  26. * 2 for 1/2 us
  27. * 3 for 1 us
  28. * 4 for 2 us
  29. * 5 for 4 us
  30. * 6 for 8 us
  31. * 7 for 16 us
  32. */
  33. switch (mpdudensity) {
  34. case 0:
  35. return 0;
  36. case 1:
  37. case 2:
  38. case 3:
  39. /* Our lower layer calculations limit our precision to
  40. 1 microsecond */
  41. return 1;
  42. case 4:
  43. return 2;
  44. case 5:
  45. return 4;
  46. case 6:
  47. return 8;
  48. case 7:
  49. return 16;
  50. default:
  51. return 0;
  52. }
  53. }
  54. static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
  55. {
  56. bool pending = false;
  57. spin_lock_bh(&txq->axq_lock);
  58. if (txq->axq_depth || !list_empty(&txq->axq_acq))
  59. pending = true;
  60. spin_unlock_bh(&txq->axq_lock);
  61. return pending;
  62. }
  63. static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  64. {
  65. unsigned long flags;
  66. bool ret;
  67. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  68. ret = ath9k_hw_setpower(sc->sc_ah, mode);
  69. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  70. return ret;
  71. }
  72. void ath9k_ps_wakeup(struct ath_softc *sc)
  73. {
  74. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  75. unsigned long flags;
  76. enum ath9k_power_mode power_mode;
  77. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  78. if (++sc->ps_usecount != 1)
  79. goto unlock;
  80. power_mode = sc->sc_ah->power_mode;
  81. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  82. /*
  83. * While the hardware is asleep, the cycle counters contain no
  84. * useful data. Better clear them now so that they don't mess up
  85. * survey data results.
  86. */
  87. if (power_mode != ATH9K_PM_AWAKE) {
  88. spin_lock(&common->cc_lock);
  89. ath_hw_cycle_counters_update(common);
  90. memset(&common->cc_survey, 0, sizeof(common->cc_survey));
  91. spin_unlock(&common->cc_lock);
  92. }
  93. unlock:
  94. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  95. }
  96. void ath9k_ps_restore(struct ath_softc *sc)
  97. {
  98. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  99. enum ath9k_power_mode mode;
  100. unsigned long flags;
  101. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  102. if (--sc->ps_usecount != 0)
  103. goto unlock;
  104. if (sc->ps_flags & PS_WAIT_FOR_TX_ACK)
  105. goto unlock;
  106. if (sc->ps_idle)
  107. mode = ATH9K_PM_FULL_SLEEP;
  108. else if (sc->ps_enabled &&
  109. !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
  110. PS_WAIT_FOR_CAB |
  111. PS_WAIT_FOR_PSPOLL_DATA)))
  112. mode = ATH9K_PM_NETWORK_SLEEP;
  113. else
  114. goto unlock;
  115. spin_lock(&common->cc_lock);
  116. ath_hw_cycle_counters_update(common);
  117. spin_unlock(&common->cc_lock);
  118. ath9k_hw_setpower(sc->sc_ah, mode);
  119. unlock:
  120. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  121. }
  122. void ath_start_ani(struct ath_common *common)
  123. {
  124. struct ath_hw *ah = common->ah;
  125. unsigned long timestamp = jiffies_to_msecs(jiffies);
  126. struct ath_softc *sc = (struct ath_softc *) common->priv;
  127. if (!(sc->sc_flags & SC_OP_ANI_RUN))
  128. return;
  129. if (sc->sc_flags & SC_OP_OFFCHANNEL)
  130. return;
  131. common->ani.longcal_timer = timestamp;
  132. common->ani.shortcal_timer = timestamp;
  133. common->ani.checkani_timer = timestamp;
  134. mod_timer(&common->ani.timer,
  135. jiffies +
  136. msecs_to_jiffies((u32)ah->config.ani_poll_interval));
  137. }
  138. static void ath_update_survey_nf(struct ath_softc *sc, int channel)
  139. {
  140. struct ath_hw *ah = sc->sc_ah;
  141. struct ath9k_channel *chan = &ah->channels[channel];
  142. struct survey_info *survey = &sc->survey[channel];
  143. if (chan->noisefloor) {
  144. survey->filled |= SURVEY_INFO_NOISE_DBM;
  145. survey->noise = ath9k_hw_getchan_noise(ah, chan);
  146. }
  147. }
  148. /*
  149. * Updates the survey statistics and returns the busy time since last
  150. * update in %, if the measurement duration was long enough for the
  151. * result to be useful, -1 otherwise.
  152. */
  153. static int ath_update_survey_stats(struct ath_softc *sc)
  154. {
  155. struct ath_hw *ah = sc->sc_ah;
  156. struct ath_common *common = ath9k_hw_common(ah);
  157. int pos = ah->curchan - &ah->channels[0];
  158. struct survey_info *survey = &sc->survey[pos];
  159. struct ath_cycle_counters *cc = &common->cc_survey;
  160. unsigned int div = common->clockrate * 1000;
  161. int ret = 0;
  162. if (!ah->curchan)
  163. return -1;
  164. if (ah->power_mode == ATH9K_PM_AWAKE)
  165. ath_hw_cycle_counters_update(common);
  166. if (cc->cycles > 0) {
  167. survey->filled |= SURVEY_INFO_CHANNEL_TIME |
  168. SURVEY_INFO_CHANNEL_TIME_BUSY |
  169. SURVEY_INFO_CHANNEL_TIME_RX |
  170. SURVEY_INFO_CHANNEL_TIME_TX;
  171. survey->channel_time += cc->cycles / div;
  172. survey->channel_time_busy += cc->rx_busy / div;
  173. survey->channel_time_rx += cc->rx_frame / div;
  174. survey->channel_time_tx += cc->tx_frame / div;
  175. }
  176. if (cc->cycles < div)
  177. return -1;
  178. if (cc->cycles > 0)
  179. ret = cc->rx_busy * 100 / cc->cycles;
  180. memset(cc, 0, sizeof(*cc));
  181. ath_update_survey_nf(sc, pos);
  182. return ret;
  183. }
  184. static void __ath_cancel_work(struct ath_softc *sc)
  185. {
  186. cancel_work_sync(&sc->paprd_work);
  187. cancel_work_sync(&sc->hw_check_work);
  188. cancel_delayed_work_sync(&sc->tx_complete_work);
  189. cancel_delayed_work_sync(&sc->hw_pll_work);
  190. }
  191. static void ath_cancel_work(struct ath_softc *sc)
  192. {
  193. __ath_cancel_work(sc);
  194. cancel_work_sync(&sc->hw_reset_work);
  195. }
  196. static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
  197. {
  198. struct ath_hw *ah = sc->sc_ah;
  199. struct ath_common *common = ath9k_hw_common(ah);
  200. bool ret;
  201. ieee80211_stop_queues(sc->hw);
  202. sc->hw_busy_count = 0;
  203. del_timer_sync(&common->ani.timer);
  204. ath9k_debug_samp_bb_mac(sc);
  205. ath9k_hw_disable_interrupts(ah);
  206. ret = ath_drain_all_txq(sc, retry_tx);
  207. if (!ath_stoprecv(sc))
  208. ret = false;
  209. if (!flush) {
  210. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  211. ath_rx_tasklet(sc, 1, true);
  212. ath_rx_tasklet(sc, 1, false);
  213. } else {
  214. ath_flushrecv(sc);
  215. }
  216. return ret;
  217. }
  218. static bool ath_complete_reset(struct ath_softc *sc, bool start)
  219. {
  220. struct ath_hw *ah = sc->sc_ah;
  221. struct ath_common *common = ath9k_hw_common(ah);
  222. if (ath_startrecv(sc) != 0) {
  223. ath_err(common, "Unable to restart recv logic\n");
  224. return false;
  225. }
  226. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  227. sc->config.txpowlimit, &sc->curtxpow);
  228. ath9k_hw_set_interrupts(ah);
  229. ath9k_hw_enable_interrupts(ah);
  230. if (!(sc->sc_flags & (SC_OP_OFFCHANNEL)) && start) {
  231. if (sc->sc_flags & SC_OP_BEACONS)
  232. ath_set_beacon(sc);
  233. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  234. ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
  235. if (!common->disable_ani)
  236. ath_start_ani(common);
  237. }
  238. if ((ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) && sc->ant_rx != 3) {
  239. struct ath_hw_antcomb_conf div_ant_conf;
  240. u8 lna_conf;
  241. ath9k_hw_antdiv_comb_conf_get(ah, &div_ant_conf);
  242. if (sc->ant_rx == 1)
  243. lna_conf = ATH_ANT_DIV_COMB_LNA1;
  244. else
  245. lna_conf = ATH_ANT_DIV_COMB_LNA2;
  246. div_ant_conf.main_lna_conf = lna_conf;
  247. div_ant_conf.alt_lna_conf = lna_conf;
  248. ath9k_hw_antdiv_comb_conf_set(ah, &div_ant_conf);
  249. }
  250. ieee80211_wake_queues(sc->hw);
  251. return true;
  252. }
  253. static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
  254. bool retry_tx)
  255. {
  256. struct ath_hw *ah = sc->sc_ah;
  257. struct ath_common *common = ath9k_hw_common(ah);
  258. struct ath9k_hw_cal_data *caldata = NULL;
  259. bool fastcc = true;
  260. bool flush = false;
  261. int r;
  262. __ath_cancel_work(sc);
  263. spin_lock_bh(&sc->sc_pcu_lock);
  264. if (!(sc->sc_flags & SC_OP_OFFCHANNEL)) {
  265. fastcc = false;
  266. caldata = &sc->caldata;
  267. }
  268. if (!hchan) {
  269. fastcc = false;
  270. flush = true;
  271. hchan = ah->curchan;
  272. }
  273. if (!ath_prepare_reset(sc, retry_tx, flush))
  274. fastcc = false;
  275. ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
  276. hchan->channel, IS_CHAN_HT40(hchan), fastcc);
  277. r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
  278. if (r) {
  279. ath_err(common,
  280. "Unable to reset channel, reset status %d\n", r);
  281. goto out;
  282. }
  283. if (!ath_complete_reset(sc, true))
  284. r = -EIO;
  285. out:
  286. spin_unlock_bh(&sc->sc_pcu_lock);
  287. return r;
  288. }
  289. /*
  290. * Set/change channels. If the channel is really being changed, it's done
  291. * by reseting the chip. To accomplish this we must first cleanup any pending
  292. * DMA, then restart stuff.
  293. */
  294. static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  295. struct ath9k_channel *hchan)
  296. {
  297. int r;
  298. if (sc->sc_flags & SC_OP_INVALID)
  299. return -EIO;
  300. r = ath_reset_internal(sc, hchan, false);
  301. return r;
  302. }
  303. static void ath_paprd_activate(struct ath_softc *sc)
  304. {
  305. struct ath_hw *ah = sc->sc_ah;
  306. struct ath9k_hw_cal_data *caldata = ah->caldata;
  307. int chain;
  308. if (!caldata || !caldata->paprd_done)
  309. return;
  310. ath9k_ps_wakeup(sc);
  311. ar9003_paprd_enable(ah, false);
  312. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  313. if (!(ah->txchainmask & BIT(chain)))
  314. continue;
  315. ar9003_paprd_populate_single_table(ah, caldata, chain);
  316. }
  317. ar9003_paprd_enable(ah, true);
  318. ath9k_ps_restore(sc);
  319. }
  320. static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
  321. {
  322. struct ieee80211_hw *hw = sc->hw;
  323. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  324. struct ath_hw *ah = sc->sc_ah;
  325. struct ath_common *common = ath9k_hw_common(ah);
  326. struct ath_tx_control txctl;
  327. int time_left;
  328. memset(&txctl, 0, sizeof(txctl));
  329. txctl.txq = sc->tx.txq_map[WME_AC_BE];
  330. memset(tx_info, 0, sizeof(*tx_info));
  331. tx_info->band = hw->conf.channel->band;
  332. tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
  333. tx_info->control.rates[0].idx = 0;
  334. tx_info->control.rates[0].count = 1;
  335. tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
  336. tx_info->control.rates[1].idx = -1;
  337. init_completion(&sc->paprd_complete);
  338. txctl.paprd = BIT(chain);
  339. if (ath_tx_start(hw, skb, &txctl) != 0) {
  340. ath_dbg(common, CALIBRATE, "PAPRD TX failed\n");
  341. dev_kfree_skb_any(skb);
  342. return false;
  343. }
  344. time_left = wait_for_completion_timeout(&sc->paprd_complete,
  345. msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
  346. if (!time_left)
  347. ath_dbg(common, CALIBRATE,
  348. "Timeout waiting for paprd training on TX chain %d\n",
  349. chain);
  350. return !!time_left;
  351. }
  352. void ath_paprd_calibrate(struct work_struct *work)
  353. {
  354. struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
  355. struct ieee80211_hw *hw = sc->hw;
  356. struct ath_hw *ah = sc->sc_ah;
  357. struct ieee80211_hdr *hdr;
  358. struct sk_buff *skb = NULL;
  359. struct ath9k_hw_cal_data *caldata = ah->caldata;
  360. struct ath_common *common = ath9k_hw_common(ah);
  361. int ftype;
  362. int chain_ok = 0;
  363. int chain;
  364. int len = 1800;
  365. if (!caldata)
  366. return;
  367. ath9k_ps_wakeup(sc);
  368. if (ar9003_paprd_init_table(ah) < 0)
  369. goto fail_paprd;
  370. skb = alloc_skb(len, GFP_KERNEL);
  371. if (!skb)
  372. goto fail_paprd;
  373. skb_put(skb, len);
  374. memset(skb->data, 0, len);
  375. hdr = (struct ieee80211_hdr *)skb->data;
  376. ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
  377. hdr->frame_control = cpu_to_le16(ftype);
  378. hdr->duration_id = cpu_to_le16(10);
  379. memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
  380. memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
  381. memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
  382. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  383. if (!(ah->txchainmask & BIT(chain)))
  384. continue;
  385. chain_ok = 0;
  386. ath_dbg(common, CALIBRATE,
  387. "Sending PAPRD frame for thermal measurement on chain %d\n",
  388. chain);
  389. if (!ath_paprd_send_frame(sc, skb, chain))
  390. goto fail_paprd;
  391. ar9003_paprd_setup_gain_table(ah, chain);
  392. ath_dbg(common, CALIBRATE,
  393. "Sending PAPRD training frame on chain %d\n", chain);
  394. if (!ath_paprd_send_frame(sc, skb, chain))
  395. goto fail_paprd;
  396. if (!ar9003_paprd_is_done(ah)) {
  397. ath_dbg(common, CALIBRATE,
  398. "PAPRD not yet done on chain %d\n", chain);
  399. break;
  400. }
  401. if (ar9003_paprd_create_curve(ah, caldata, chain)) {
  402. ath_dbg(common, CALIBRATE,
  403. "PAPRD create curve failed on chain %d\n",
  404. chain);
  405. break;
  406. }
  407. chain_ok = 1;
  408. }
  409. kfree_skb(skb);
  410. if (chain_ok) {
  411. caldata->paprd_done = true;
  412. ath_paprd_activate(sc);
  413. }
  414. fail_paprd:
  415. ath9k_ps_restore(sc);
  416. }
  417. /*
  418. * This routine performs the periodic noise floor calibration function
  419. * that is used to adjust and optimize the chip performance. This
  420. * takes environmental changes (location, temperature) into account.
  421. * When the task is complete, it reschedules itself depending on the
  422. * appropriate interval that was calculated.
  423. */
  424. void ath_ani_calibrate(unsigned long data)
  425. {
  426. struct ath_softc *sc = (struct ath_softc *)data;
  427. struct ath_hw *ah = sc->sc_ah;
  428. struct ath_common *common = ath9k_hw_common(ah);
  429. bool longcal = false;
  430. bool shortcal = false;
  431. bool aniflag = false;
  432. unsigned int timestamp = jiffies_to_msecs(jiffies);
  433. u32 cal_interval, short_cal_interval, long_cal_interval;
  434. unsigned long flags;
  435. if (ah->caldata && ah->caldata->nfcal_interference)
  436. long_cal_interval = ATH_LONG_CALINTERVAL_INT;
  437. else
  438. long_cal_interval = ATH_LONG_CALINTERVAL;
  439. short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
  440. ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
  441. /* Only calibrate if awake */
  442. if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
  443. goto set_timer;
  444. ath9k_ps_wakeup(sc);
  445. /* Long calibration runs independently of short calibration. */
  446. if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
  447. longcal = true;
  448. common->ani.longcal_timer = timestamp;
  449. }
  450. /* Short calibration applies only while caldone is false */
  451. if (!common->ani.caldone) {
  452. if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
  453. shortcal = true;
  454. common->ani.shortcal_timer = timestamp;
  455. common->ani.resetcal_timer = timestamp;
  456. }
  457. } else {
  458. if ((timestamp - common->ani.resetcal_timer) >=
  459. ATH_RESTART_CALINTERVAL) {
  460. common->ani.caldone = ath9k_hw_reset_calvalid(ah);
  461. if (common->ani.caldone)
  462. common->ani.resetcal_timer = timestamp;
  463. }
  464. }
  465. /* Verify whether we must check ANI */
  466. if (sc->sc_ah->config.enable_ani
  467. && (timestamp - common->ani.checkani_timer) >=
  468. ah->config.ani_poll_interval) {
  469. aniflag = true;
  470. common->ani.checkani_timer = timestamp;
  471. }
  472. /* Call ANI routine if necessary */
  473. if (aniflag) {
  474. spin_lock_irqsave(&common->cc_lock, flags);
  475. ath9k_hw_ani_monitor(ah, ah->curchan);
  476. ath_update_survey_stats(sc);
  477. spin_unlock_irqrestore(&common->cc_lock, flags);
  478. }
  479. /* Perform calibration if necessary */
  480. if (longcal || shortcal) {
  481. common->ani.caldone =
  482. ath9k_hw_calibrate(ah, ah->curchan,
  483. ah->rxchainmask, longcal);
  484. }
  485. ath_dbg(common, ANI,
  486. "Calibration @%lu finished: %s %s %s, caldone: %s\n",
  487. jiffies,
  488. longcal ? "long" : "", shortcal ? "short" : "",
  489. aniflag ? "ani" : "", common->ani.caldone ? "true" : "false");
  490. ath9k_ps_restore(sc);
  491. set_timer:
  492. /*
  493. * Set timer interval based on previous results.
  494. * The interval must be the shortest necessary to satisfy ANI,
  495. * short calibration and long calibration.
  496. */
  497. ath9k_debug_samp_bb_mac(sc);
  498. cal_interval = ATH_LONG_CALINTERVAL;
  499. if (sc->sc_ah->config.enable_ani)
  500. cal_interval = min(cal_interval,
  501. (u32)ah->config.ani_poll_interval);
  502. if (!common->ani.caldone)
  503. cal_interval = min(cal_interval, (u32)short_cal_interval);
  504. mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
  505. if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
  506. if (!ah->caldata->paprd_done)
  507. ieee80211_queue_work(sc->hw, &sc->paprd_work);
  508. else if (!ah->paprd_table_write_done)
  509. ath_paprd_activate(sc);
  510. }
  511. }
  512. static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
  513. struct ieee80211_vif *vif)
  514. {
  515. struct ath_node *an;
  516. an = (struct ath_node *)sta->drv_priv;
  517. #ifdef CONFIG_ATH9K_DEBUGFS
  518. spin_lock(&sc->nodes_lock);
  519. list_add(&an->list, &sc->nodes);
  520. spin_unlock(&sc->nodes_lock);
  521. #endif
  522. an->sta = sta;
  523. an->vif = vif;
  524. if (sta->ht_cap.ht_supported) {
  525. ath_tx_node_init(sc, an);
  526. an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
  527. sta->ht_cap.ampdu_factor);
  528. an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
  529. }
  530. }
  531. static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
  532. {
  533. struct ath_node *an = (struct ath_node *)sta->drv_priv;
  534. #ifdef CONFIG_ATH9K_DEBUGFS
  535. spin_lock(&sc->nodes_lock);
  536. list_del(&an->list);
  537. spin_unlock(&sc->nodes_lock);
  538. an->sta = NULL;
  539. #endif
  540. if (sta->ht_cap.ht_supported)
  541. ath_tx_node_cleanup(sc, an);
  542. }
  543. void ath9k_tasklet(unsigned long data)
  544. {
  545. struct ath_softc *sc = (struct ath_softc *)data;
  546. struct ath_hw *ah = sc->sc_ah;
  547. struct ath_common *common = ath9k_hw_common(ah);
  548. u32 status = sc->intrstatus;
  549. u32 rxmask;
  550. ath9k_ps_wakeup(sc);
  551. spin_lock(&sc->sc_pcu_lock);
  552. if ((status & ATH9K_INT_FATAL) ||
  553. (status & ATH9K_INT_BB_WATCHDOG)) {
  554. #ifdef CONFIG_ATH9K_DEBUGFS
  555. enum ath_reset_type type;
  556. if (status & ATH9K_INT_FATAL)
  557. type = RESET_TYPE_FATAL_INT;
  558. else
  559. type = RESET_TYPE_BB_WATCHDOG;
  560. RESET_STAT_INC(sc, type);
  561. #endif
  562. ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  563. goto out;
  564. }
  565. /*
  566. * Only run the baseband hang check if beacons stop working in AP or
  567. * IBSS mode, because it has a high false positive rate. For station
  568. * mode it should not be necessary, since the upper layers will detect
  569. * this through a beacon miss automatically and the following channel
  570. * change will trigger a hardware reset anyway
  571. */
  572. if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
  573. !ath9k_hw_check_alive(ah))
  574. ieee80211_queue_work(sc->hw, &sc->hw_check_work);
  575. if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
  576. /*
  577. * TSF sync does not look correct; remain awake to sync with
  578. * the next Beacon.
  579. */
  580. ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
  581. sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
  582. }
  583. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  584. rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
  585. ATH9K_INT_RXORN);
  586. else
  587. rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  588. if (status & rxmask) {
  589. /* Check for high priority Rx first */
  590. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  591. (status & ATH9K_INT_RXHP))
  592. ath_rx_tasklet(sc, 0, true);
  593. ath_rx_tasklet(sc, 0, false);
  594. }
  595. if (status & ATH9K_INT_TX) {
  596. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  597. ath_tx_edma_tasklet(sc);
  598. else
  599. ath_tx_tasklet(sc);
  600. }
  601. ath9k_btcoex_handle_interrupt(sc, status);
  602. out:
  603. /* re-enable hardware interrupt */
  604. ath9k_hw_enable_interrupts(ah);
  605. spin_unlock(&sc->sc_pcu_lock);
  606. ath9k_ps_restore(sc);
  607. }
  608. irqreturn_t ath_isr(int irq, void *dev)
  609. {
  610. #define SCHED_INTR ( \
  611. ATH9K_INT_FATAL | \
  612. ATH9K_INT_BB_WATCHDOG | \
  613. ATH9K_INT_RXORN | \
  614. ATH9K_INT_RXEOL | \
  615. ATH9K_INT_RX | \
  616. ATH9K_INT_RXLP | \
  617. ATH9K_INT_RXHP | \
  618. ATH9K_INT_TX | \
  619. ATH9K_INT_BMISS | \
  620. ATH9K_INT_CST | \
  621. ATH9K_INT_TSFOOR | \
  622. ATH9K_INT_GENTIMER | \
  623. ATH9K_INT_MCI)
  624. struct ath_softc *sc = dev;
  625. struct ath_hw *ah = sc->sc_ah;
  626. struct ath_common *common = ath9k_hw_common(ah);
  627. enum ath9k_int status;
  628. bool sched = false;
  629. /*
  630. * The hardware is not ready/present, don't
  631. * touch anything. Note this can happen early
  632. * on if the IRQ is shared.
  633. */
  634. if (sc->sc_flags & SC_OP_INVALID)
  635. return IRQ_NONE;
  636. /* shared irq, not for us */
  637. if (!ath9k_hw_intrpend(ah))
  638. return IRQ_NONE;
  639. /*
  640. * Figure out the reason(s) for the interrupt. Note
  641. * that the hal returns a pseudo-ISR that may include
  642. * bits we haven't explicitly enabled so we mask the
  643. * value to insure we only process bits we requested.
  644. */
  645. ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
  646. status &= ah->imask; /* discard unasked-for bits */
  647. /*
  648. * If there are no status bits set, then this interrupt was not
  649. * for me (should have been caught above).
  650. */
  651. if (!status)
  652. return IRQ_NONE;
  653. /* Cache the status */
  654. sc->intrstatus = status;
  655. if (status & SCHED_INTR)
  656. sched = true;
  657. /*
  658. * If a FATAL or RXORN interrupt is received, we have to reset the
  659. * chip immediately.
  660. */
  661. if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
  662. !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
  663. goto chip_reset;
  664. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  665. (status & ATH9K_INT_BB_WATCHDOG)) {
  666. spin_lock(&common->cc_lock);
  667. ath_hw_cycle_counters_update(common);
  668. ar9003_hw_bb_watchdog_dbg_info(ah);
  669. spin_unlock(&common->cc_lock);
  670. goto chip_reset;
  671. }
  672. if (status & ATH9K_INT_SWBA)
  673. tasklet_schedule(&sc->bcon_tasklet);
  674. if (status & ATH9K_INT_TXURN)
  675. ath9k_hw_updatetxtriglevel(ah, true);
  676. if (status & ATH9K_INT_RXEOL) {
  677. ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  678. ath9k_hw_set_interrupts(ah);
  679. }
  680. if (status & ATH9K_INT_MIB) {
  681. /*
  682. * Disable interrupts until we service the MIB
  683. * interrupt; otherwise it will continue to
  684. * fire.
  685. */
  686. ath9k_hw_disable_interrupts(ah);
  687. /*
  688. * Let the hal handle the event. We assume
  689. * it will clear whatever condition caused
  690. * the interrupt.
  691. */
  692. spin_lock(&common->cc_lock);
  693. ath9k_hw_proc_mib_event(ah);
  694. spin_unlock(&common->cc_lock);
  695. ath9k_hw_enable_interrupts(ah);
  696. }
  697. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  698. if (status & ATH9K_INT_TIM_TIMER) {
  699. if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
  700. goto chip_reset;
  701. /* Clear RxAbort bit so that we can
  702. * receive frames */
  703. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  704. ath9k_hw_setrxabort(sc->sc_ah, 0);
  705. sc->ps_flags |= PS_WAIT_FOR_BEACON;
  706. }
  707. chip_reset:
  708. ath_debug_stat_interrupt(sc, status);
  709. if (sched) {
  710. /* turn off every interrupt */
  711. ath9k_hw_disable_interrupts(ah);
  712. tasklet_schedule(&sc->intr_tq);
  713. }
  714. return IRQ_HANDLED;
  715. #undef SCHED_INTR
  716. }
  717. static int ath_reset(struct ath_softc *sc, bool retry_tx)
  718. {
  719. int r;
  720. ath9k_ps_wakeup(sc);
  721. r = ath_reset_internal(sc, NULL, retry_tx);
  722. if (retry_tx) {
  723. int i;
  724. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  725. if (ATH_TXQ_SETUP(sc, i)) {
  726. spin_lock_bh(&sc->tx.txq[i].axq_lock);
  727. ath_txq_schedule(sc, &sc->tx.txq[i]);
  728. spin_unlock_bh(&sc->tx.txq[i].axq_lock);
  729. }
  730. }
  731. }
  732. ath9k_ps_restore(sc);
  733. return r;
  734. }
  735. void ath_reset_work(struct work_struct *work)
  736. {
  737. struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
  738. ath_reset(sc, true);
  739. }
  740. void ath_hw_check(struct work_struct *work)
  741. {
  742. struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
  743. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  744. unsigned long flags;
  745. int busy;
  746. ath9k_ps_wakeup(sc);
  747. if (ath9k_hw_check_alive(sc->sc_ah))
  748. goto out;
  749. spin_lock_irqsave(&common->cc_lock, flags);
  750. busy = ath_update_survey_stats(sc);
  751. spin_unlock_irqrestore(&common->cc_lock, flags);
  752. ath_dbg(common, RESET, "Possible baseband hang, busy=%d (try %d)\n",
  753. busy, sc->hw_busy_count + 1);
  754. if (busy >= 99) {
  755. if (++sc->hw_busy_count >= 3) {
  756. RESET_STAT_INC(sc, RESET_TYPE_BB_HANG);
  757. ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  758. }
  759. } else if (busy >= 0)
  760. sc->hw_busy_count = 0;
  761. out:
  762. ath9k_ps_restore(sc);
  763. }
  764. static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
  765. {
  766. static int count;
  767. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  768. if (pll_sqsum >= 0x40000) {
  769. count++;
  770. if (count == 3) {
  771. /* Rx is hung for more than 500ms. Reset it */
  772. ath_dbg(common, RESET, "Possible RX hang, resetting\n");
  773. RESET_STAT_INC(sc, RESET_TYPE_PLL_HANG);
  774. ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  775. count = 0;
  776. }
  777. } else
  778. count = 0;
  779. }
  780. void ath_hw_pll_work(struct work_struct *work)
  781. {
  782. struct ath_softc *sc = container_of(work, struct ath_softc,
  783. hw_pll_work.work);
  784. u32 pll_sqsum;
  785. if (AR_SREV_9485(sc->sc_ah)) {
  786. ath9k_ps_wakeup(sc);
  787. pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
  788. ath9k_ps_restore(sc);
  789. ath_hw_pll_rx_hang_check(sc, pll_sqsum);
  790. ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
  791. }
  792. }
  793. /**********************/
  794. /* mac80211 callbacks */
  795. /**********************/
  796. static int ath9k_start(struct ieee80211_hw *hw)
  797. {
  798. struct ath_softc *sc = hw->priv;
  799. struct ath_hw *ah = sc->sc_ah;
  800. struct ath_common *common = ath9k_hw_common(ah);
  801. struct ieee80211_channel *curchan = hw->conf.channel;
  802. struct ath9k_channel *init_channel;
  803. int r;
  804. ath_dbg(common, CONFIG,
  805. "Starting driver with initial channel: %d MHz\n",
  806. curchan->center_freq);
  807. ath9k_ps_wakeup(sc);
  808. mutex_lock(&sc->mutex);
  809. init_channel = ath9k_cmn_get_curchannel(hw, ah);
  810. /* Reset SERDES registers */
  811. ath9k_hw_configpcipowersave(ah, false);
  812. /*
  813. * The basic interface to setting the hardware in a good
  814. * state is ``reset''. On return the hardware is known to
  815. * be powered up and with interrupts disabled. This must
  816. * be followed by initialization of the appropriate bits
  817. * and then setup of the interrupt mask.
  818. */
  819. spin_lock_bh(&sc->sc_pcu_lock);
  820. atomic_set(&ah->intr_ref_cnt, -1);
  821. r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
  822. if (r) {
  823. ath_err(common,
  824. "Unable to reset hardware; reset status %d (freq %u MHz)\n",
  825. r, curchan->center_freq);
  826. spin_unlock_bh(&sc->sc_pcu_lock);
  827. goto mutex_unlock;
  828. }
  829. /* Setup our intr mask. */
  830. ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
  831. ATH9K_INT_RXORN | ATH9K_INT_FATAL |
  832. ATH9K_INT_GLOBAL;
  833. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  834. ah->imask |= ATH9K_INT_RXHP |
  835. ATH9K_INT_RXLP |
  836. ATH9K_INT_BB_WATCHDOG;
  837. else
  838. ah->imask |= ATH9K_INT_RX;
  839. ah->imask |= ATH9K_INT_GTT;
  840. if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  841. ah->imask |= ATH9K_INT_CST;
  842. if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI)
  843. ah->imask |= ATH9K_INT_MCI;
  844. sc->sc_flags &= ~SC_OP_INVALID;
  845. sc->sc_ah->is_monitoring = false;
  846. if (!ath_complete_reset(sc, false)) {
  847. r = -EIO;
  848. spin_unlock_bh(&sc->sc_pcu_lock);
  849. goto mutex_unlock;
  850. }
  851. if (ah->led_pin >= 0) {
  852. ath9k_hw_cfg_output(ah, ah->led_pin,
  853. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  854. ath9k_hw_set_gpio(ah, ah->led_pin, 0);
  855. }
  856. /*
  857. * Reset key cache to sane defaults (all entries cleared) instead of
  858. * semi-random values after suspend/resume.
  859. */
  860. ath9k_cmn_init_crypto(sc->sc_ah);
  861. spin_unlock_bh(&sc->sc_pcu_lock);
  862. ath9k_start_btcoex(sc);
  863. if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
  864. common->bus_ops->extn_synch_en(common);
  865. mutex_unlock:
  866. mutex_unlock(&sc->mutex);
  867. ath9k_ps_restore(sc);
  868. return r;
  869. }
  870. static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  871. {
  872. struct ath_softc *sc = hw->priv;
  873. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  874. struct ath_tx_control txctl;
  875. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  876. if (sc->ps_enabled) {
  877. /*
  878. * mac80211 does not set PM field for normal data frames, so we
  879. * need to update that based on the current PS mode.
  880. */
  881. if (ieee80211_is_data(hdr->frame_control) &&
  882. !ieee80211_is_nullfunc(hdr->frame_control) &&
  883. !ieee80211_has_pm(hdr->frame_control)) {
  884. ath_dbg(common, PS,
  885. "Add PM=1 for a TX frame while in PS mode\n");
  886. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
  887. }
  888. }
  889. /*
  890. * Cannot tx while the hardware is in full sleep, it first needs a full
  891. * chip reset to recover from that
  892. */
  893. if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP))
  894. goto exit;
  895. if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
  896. /*
  897. * We are using PS-Poll and mac80211 can request TX while in
  898. * power save mode. Need to wake up hardware for the TX to be
  899. * completed and if needed, also for RX of buffered frames.
  900. */
  901. ath9k_ps_wakeup(sc);
  902. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  903. ath9k_hw_setrxabort(sc->sc_ah, 0);
  904. if (ieee80211_is_pspoll(hdr->frame_control)) {
  905. ath_dbg(common, PS,
  906. "Sending PS-Poll to pick a buffered frame\n");
  907. sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
  908. } else {
  909. ath_dbg(common, PS, "Wake up to complete TX\n");
  910. sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
  911. }
  912. /*
  913. * The actual restore operation will happen only after
  914. * the sc_flags bit is cleared. We are just dropping
  915. * the ps_usecount here.
  916. */
  917. ath9k_ps_restore(sc);
  918. }
  919. memset(&txctl, 0, sizeof(struct ath_tx_control));
  920. txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
  921. ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
  922. if (ath_tx_start(hw, skb, &txctl) != 0) {
  923. ath_dbg(common, XMIT, "TX failed\n");
  924. goto exit;
  925. }
  926. return;
  927. exit:
  928. dev_kfree_skb_any(skb);
  929. }
  930. static void ath9k_stop(struct ieee80211_hw *hw)
  931. {
  932. struct ath_softc *sc = hw->priv;
  933. struct ath_hw *ah = sc->sc_ah;
  934. struct ath_common *common = ath9k_hw_common(ah);
  935. bool prev_idle;
  936. mutex_lock(&sc->mutex);
  937. ath_cancel_work(sc);
  938. if (sc->sc_flags & SC_OP_INVALID) {
  939. ath_dbg(common, ANY, "Device not present\n");
  940. mutex_unlock(&sc->mutex);
  941. return;
  942. }
  943. /* Ensure HW is awake when we try to shut it down. */
  944. ath9k_ps_wakeup(sc);
  945. ath9k_stop_btcoex(sc);
  946. spin_lock_bh(&sc->sc_pcu_lock);
  947. /* prevent tasklets to enable interrupts once we disable them */
  948. ah->imask &= ~ATH9K_INT_GLOBAL;
  949. /* make sure h/w will not generate any interrupt
  950. * before setting the invalid flag. */
  951. ath9k_hw_disable_interrupts(ah);
  952. spin_unlock_bh(&sc->sc_pcu_lock);
  953. /* we can now sync irq and kill any running tasklets, since we already
  954. * disabled interrupts and not holding a spin lock */
  955. synchronize_irq(sc->irq);
  956. tasklet_kill(&sc->intr_tq);
  957. tasklet_kill(&sc->bcon_tasklet);
  958. prev_idle = sc->ps_idle;
  959. sc->ps_idle = true;
  960. spin_lock_bh(&sc->sc_pcu_lock);
  961. if (ah->led_pin >= 0) {
  962. ath9k_hw_set_gpio(ah, ah->led_pin, 1);
  963. ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
  964. }
  965. ath_prepare_reset(sc, false, true);
  966. if (sc->rx.frag) {
  967. dev_kfree_skb_any(sc->rx.frag);
  968. sc->rx.frag = NULL;
  969. }
  970. if (!ah->curchan)
  971. ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
  972. ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  973. ath9k_hw_phy_disable(ah);
  974. ath9k_hw_configpcipowersave(ah, true);
  975. spin_unlock_bh(&sc->sc_pcu_lock);
  976. ath9k_ps_restore(sc);
  977. sc->sc_flags |= SC_OP_INVALID;
  978. sc->ps_idle = prev_idle;
  979. mutex_unlock(&sc->mutex);
  980. ath_dbg(common, CONFIG, "Driver halt\n");
  981. }
  982. bool ath9k_uses_beacons(int type)
  983. {
  984. switch (type) {
  985. case NL80211_IFTYPE_AP:
  986. case NL80211_IFTYPE_ADHOC:
  987. case NL80211_IFTYPE_MESH_POINT:
  988. return true;
  989. default:
  990. return false;
  991. }
  992. }
  993. static void ath9k_reclaim_beacon(struct ath_softc *sc,
  994. struct ieee80211_vif *vif)
  995. {
  996. struct ath_vif *avp = (void *)vif->drv_priv;
  997. ath9k_set_beaconing_status(sc, false);
  998. ath_beacon_return(sc, avp);
  999. ath9k_set_beaconing_status(sc, true);
  1000. sc->sc_flags &= ~SC_OP_BEACONS;
  1001. }
  1002. static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  1003. {
  1004. struct ath9k_vif_iter_data *iter_data = data;
  1005. int i;
  1006. if (iter_data->hw_macaddr)
  1007. for (i = 0; i < ETH_ALEN; i++)
  1008. iter_data->mask[i] &=
  1009. ~(iter_data->hw_macaddr[i] ^ mac[i]);
  1010. switch (vif->type) {
  1011. case NL80211_IFTYPE_AP:
  1012. iter_data->naps++;
  1013. break;
  1014. case NL80211_IFTYPE_STATION:
  1015. iter_data->nstations++;
  1016. break;
  1017. case NL80211_IFTYPE_ADHOC:
  1018. iter_data->nadhocs++;
  1019. break;
  1020. case NL80211_IFTYPE_MESH_POINT:
  1021. iter_data->nmeshes++;
  1022. break;
  1023. case NL80211_IFTYPE_WDS:
  1024. iter_data->nwds++;
  1025. break;
  1026. default:
  1027. break;
  1028. }
  1029. }
  1030. /* Called with sc->mutex held. */
  1031. void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
  1032. struct ieee80211_vif *vif,
  1033. struct ath9k_vif_iter_data *iter_data)
  1034. {
  1035. struct ath_softc *sc = hw->priv;
  1036. struct ath_hw *ah = sc->sc_ah;
  1037. struct ath_common *common = ath9k_hw_common(ah);
  1038. /*
  1039. * Use the hardware MAC address as reference, the hardware uses it
  1040. * together with the BSSID mask when matching addresses.
  1041. */
  1042. memset(iter_data, 0, sizeof(*iter_data));
  1043. iter_data->hw_macaddr = common->macaddr;
  1044. memset(&iter_data->mask, 0xff, ETH_ALEN);
  1045. if (vif)
  1046. ath9k_vif_iter(iter_data, vif->addr, vif);
  1047. /* Get list of all active MAC addresses */
  1048. ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
  1049. iter_data);
  1050. }
  1051. /* Called with sc->mutex held. */
  1052. static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
  1053. struct ieee80211_vif *vif)
  1054. {
  1055. struct ath_softc *sc = hw->priv;
  1056. struct ath_hw *ah = sc->sc_ah;
  1057. struct ath_common *common = ath9k_hw_common(ah);
  1058. struct ath9k_vif_iter_data iter_data;
  1059. ath9k_calculate_iter_data(hw, vif, &iter_data);
  1060. /* Set BSSID mask. */
  1061. memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
  1062. ath_hw_setbssidmask(common);
  1063. /* Set op-mode & TSF */
  1064. if (iter_data.naps > 0) {
  1065. ath9k_hw_set_tsfadjust(ah, 1);
  1066. sc->sc_flags |= SC_OP_TSF_RESET;
  1067. ah->opmode = NL80211_IFTYPE_AP;
  1068. } else {
  1069. ath9k_hw_set_tsfadjust(ah, 0);
  1070. sc->sc_flags &= ~SC_OP_TSF_RESET;
  1071. if (iter_data.nmeshes)
  1072. ah->opmode = NL80211_IFTYPE_MESH_POINT;
  1073. else if (iter_data.nwds)
  1074. ah->opmode = NL80211_IFTYPE_AP;
  1075. else if (iter_data.nadhocs)
  1076. ah->opmode = NL80211_IFTYPE_ADHOC;
  1077. else
  1078. ah->opmode = NL80211_IFTYPE_STATION;
  1079. }
  1080. /*
  1081. * Enable MIB interrupts when there are hardware phy counters.
  1082. */
  1083. if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
  1084. if (ah->config.enable_ani)
  1085. ah->imask |= ATH9K_INT_MIB;
  1086. ah->imask |= ATH9K_INT_TSFOOR;
  1087. } else {
  1088. ah->imask &= ~ATH9K_INT_MIB;
  1089. ah->imask &= ~ATH9K_INT_TSFOOR;
  1090. }
  1091. ath9k_hw_set_interrupts(ah);
  1092. /* Set up ANI */
  1093. if (iter_data.naps > 0) {
  1094. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1095. if (!common->disable_ani) {
  1096. sc->sc_flags |= SC_OP_ANI_RUN;
  1097. ath_start_ani(common);
  1098. }
  1099. } else {
  1100. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1101. del_timer_sync(&common->ani.timer);
  1102. }
  1103. }
  1104. /* Called with sc->mutex held, vif counts set up properly. */
  1105. static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
  1106. struct ieee80211_vif *vif)
  1107. {
  1108. struct ath_softc *sc = hw->priv;
  1109. ath9k_calculate_summary_state(hw, vif);
  1110. if (ath9k_uses_beacons(vif->type)) {
  1111. int error;
  1112. /* This may fail because upper levels do not have beacons
  1113. * properly configured yet. That's OK, we assume it
  1114. * will be properly configured and then we will be notified
  1115. * in the info_changed method and set up beacons properly
  1116. * there.
  1117. */
  1118. ath9k_set_beaconing_status(sc, false);
  1119. error = ath_beacon_alloc(sc, vif);
  1120. if (!error)
  1121. ath_beacon_config(sc, vif);
  1122. ath9k_set_beaconing_status(sc, true);
  1123. }
  1124. }
  1125. static int ath9k_add_interface(struct ieee80211_hw *hw,
  1126. struct ieee80211_vif *vif)
  1127. {
  1128. struct ath_softc *sc = hw->priv;
  1129. struct ath_hw *ah = sc->sc_ah;
  1130. struct ath_common *common = ath9k_hw_common(ah);
  1131. int ret = 0;
  1132. ath9k_ps_wakeup(sc);
  1133. mutex_lock(&sc->mutex);
  1134. switch (vif->type) {
  1135. case NL80211_IFTYPE_STATION:
  1136. case NL80211_IFTYPE_WDS:
  1137. case NL80211_IFTYPE_ADHOC:
  1138. case NL80211_IFTYPE_AP:
  1139. case NL80211_IFTYPE_MESH_POINT:
  1140. break;
  1141. default:
  1142. ath_err(common, "Interface type %d not yet supported\n",
  1143. vif->type);
  1144. ret = -EOPNOTSUPP;
  1145. goto out;
  1146. }
  1147. if (ath9k_uses_beacons(vif->type)) {
  1148. if (sc->nbcnvifs >= ATH_BCBUF) {
  1149. ath_err(common, "Not enough beacon buffers when adding"
  1150. " new interface of type: %i\n",
  1151. vif->type);
  1152. ret = -ENOBUFS;
  1153. goto out;
  1154. }
  1155. }
  1156. if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
  1157. ((vif->type == NL80211_IFTYPE_ADHOC) &&
  1158. sc->nvifs > 0)) {
  1159. ath_err(common, "Cannot create ADHOC interface when other"
  1160. " interfaces already exist.\n");
  1161. ret = -EINVAL;
  1162. goto out;
  1163. }
  1164. ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
  1165. sc->nvifs++;
  1166. ath9k_do_vif_add_setup(hw, vif);
  1167. out:
  1168. mutex_unlock(&sc->mutex);
  1169. ath9k_ps_restore(sc);
  1170. return ret;
  1171. }
  1172. static int ath9k_change_interface(struct ieee80211_hw *hw,
  1173. struct ieee80211_vif *vif,
  1174. enum nl80211_iftype new_type,
  1175. bool p2p)
  1176. {
  1177. struct ath_softc *sc = hw->priv;
  1178. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1179. int ret = 0;
  1180. ath_dbg(common, CONFIG, "Change Interface\n");
  1181. mutex_lock(&sc->mutex);
  1182. ath9k_ps_wakeup(sc);
  1183. /* See if new interface type is valid. */
  1184. if ((new_type == NL80211_IFTYPE_ADHOC) &&
  1185. (sc->nvifs > 1)) {
  1186. ath_err(common, "When using ADHOC, it must be the only"
  1187. " interface.\n");
  1188. ret = -EINVAL;
  1189. goto out;
  1190. }
  1191. if (ath9k_uses_beacons(new_type) &&
  1192. !ath9k_uses_beacons(vif->type)) {
  1193. if (sc->nbcnvifs >= ATH_BCBUF) {
  1194. ath_err(common, "No beacon slot available\n");
  1195. ret = -ENOBUFS;
  1196. goto out;
  1197. }
  1198. }
  1199. /* Clean up old vif stuff */
  1200. if (ath9k_uses_beacons(vif->type))
  1201. ath9k_reclaim_beacon(sc, vif);
  1202. /* Add new settings */
  1203. vif->type = new_type;
  1204. vif->p2p = p2p;
  1205. ath9k_do_vif_add_setup(hw, vif);
  1206. out:
  1207. ath9k_ps_restore(sc);
  1208. mutex_unlock(&sc->mutex);
  1209. return ret;
  1210. }
  1211. static void ath9k_remove_interface(struct ieee80211_hw *hw,
  1212. struct ieee80211_vif *vif)
  1213. {
  1214. struct ath_softc *sc = hw->priv;
  1215. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1216. ath_dbg(common, CONFIG, "Detach Interface\n");
  1217. ath9k_ps_wakeup(sc);
  1218. mutex_lock(&sc->mutex);
  1219. sc->nvifs--;
  1220. /* Reclaim beacon resources */
  1221. if (ath9k_uses_beacons(vif->type))
  1222. ath9k_reclaim_beacon(sc, vif);
  1223. ath9k_calculate_summary_state(hw, NULL);
  1224. mutex_unlock(&sc->mutex);
  1225. ath9k_ps_restore(sc);
  1226. }
  1227. static void ath9k_enable_ps(struct ath_softc *sc)
  1228. {
  1229. struct ath_hw *ah = sc->sc_ah;
  1230. sc->ps_enabled = true;
  1231. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1232. if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
  1233. ah->imask |= ATH9K_INT_TIM_TIMER;
  1234. ath9k_hw_set_interrupts(ah);
  1235. }
  1236. ath9k_hw_setrxabort(ah, 1);
  1237. }
  1238. }
  1239. static void ath9k_disable_ps(struct ath_softc *sc)
  1240. {
  1241. struct ath_hw *ah = sc->sc_ah;
  1242. sc->ps_enabled = false;
  1243. ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
  1244. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1245. ath9k_hw_setrxabort(ah, 0);
  1246. sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
  1247. PS_WAIT_FOR_CAB |
  1248. PS_WAIT_FOR_PSPOLL_DATA |
  1249. PS_WAIT_FOR_TX_ACK);
  1250. if (ah->imask & ATH9K_INT_TIM_TIMER) {
  1251. ah->imask &= ~ATH9K_INT_TIM_TIMER;
  1252. ath9k_hw_set_interrupts(ah);
  1253. }
  1254. }
  1255. }
  1256. static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
  1257. {
  1258. struct ath_softc *sc = hw->priv;
  1259. struct ath_hw *ah = sc->sc_ah;
  1260. struct ath_common *common = ath9k_hw_common(ah);
  1261. struct ieee80211_conf *conf = &hw->conf;
  1262. ath9k_ps_wakeup(sc);
  1263. mutex_lock(&sc->mutex);
  1264. if (changed & IEEE80211_CONF_CHANGE_IDLE) {
  1265. sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
  1266. if (sc->ps_idle)
  1267. ath_cancel_work(sc);
  1268. }
  1269. /*
  1270. * We just prepare to enable PS. We have to wait until our AP has
  1271. * ACK'd our null data frame to disable RX otherwise we'll ignore
  1272. * those ACKs and end up retransmitting the same null data frames.
  1273. * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
  1274. */
  1275. if (changed & IEEE80211_CONF_CHANGE_PS) {
  1276. unsigned long flags;
  1277. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  1278. if (conf->flags & IEEE80211_CONF_PS)
  1279. ath9k_enable_ps(sc);
  1280. else
  1281. ath9k_disable_ps(sc);
  1282. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  1283. }
  1284. if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
  1285. if (conf->flags & IEEE80211_CONF_MONITOR) {
  1286. ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
  1287. sc->sc_ah->is_monitoring = true;
  1288. } else {
  1289. ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
  1290. sc->sc_ah->is_monitoring = false;
  1291. }
  1292. }
  1293. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  1294. struct ieee80211_channel *curchan = hw->conf.channel;
  1295. int pos = curchan->hw_value;
  1296. int old_pos = -1;
  1297. unsigned long flags;
  1298. if (ah->curchan)
  1299. old_pos = ah->curchan - &ah->channels[0];
  1300. if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
  1301. sc->sc_flags |= SC_OP_OFFCHANNEL;
  1302. else
  1303. sc->sc_flags &= ~SC_OP_OFFCHANNEL;
  1304. ath_dbg(common, CONFIG, "Set channel: %d MHz type: %d\n",
  1305. curchan->center_freq, conf->channel_type);
  1306. /* update survey stats for the old channel before switching */
  1307. spin_lock_irqsave(&common->cc_lock, flags);
  1308. ath_update_survey_stats(sc);
  1309. spin_unlock_irqrestore(&common->cc_lock, flags);
  1310. /*
  1311. * Preserve the current channel values, before updating
  1312. * the same channel
  1313. */
  1314. if (ah->curchan && (old_pos == pos))
  1315. ath9k_hw_getnf(ah, ah->curchan);
  1316. ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
  1317. curchan, conf->channel_type);
  1318. /*
  1319. * If the operating channel changes, change the survey in-use flags
  1320. * along with it.
  1321. * Reset the survey data for the new channel, unless we're switching
  1322. * back to the operating channel from an off-channel operation.
  1323. */
  1324. if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
  1325. sc->cur_survey != &sc->survey[pos]) {
  1326. if (sc->cur_survey)
  1327. sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
  1328. sc->cur_survey = &sc->survey[pos];
  1329. memset(sc->cur_survey, 0, sizeof(struct survey_info));
  1330. sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
  1331. } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
  1332. memset(&sc->survey[pos], 0, sizeof(struct survey_info));
  1333. }
  1334. if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
  1335. ath_err(common, "Unable to set channel\n");
  1336. mutex_unlock(&sc->mutex);
  1337. return -EINVAL;
  1338. }
  1339. /*
  1340. * The most recent snapshot of channel->noisefloor for the old
  1341. * channel is only available after the hardware reset. Copy it to
  1342. * the survey stats now.
  1343. */
  1344. if (old_pos >= 0)
  1345. ath_update_survey_nf(sc, old_pos);
  1346. }
  1347. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1348. ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
  1349. sc->config.txpowlimit = 2 * conf->power_level;
  1350. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  1351. sc->config.txpowlimit, &sc->curtxpow);
  1352. }
  1353. mutex_unlock(&sc->mutex);
  1354. ath9k_ps_restore(sc);
  1355. return 0;
  1356. }
  1357. #define SUPPORTED_FILTERS \
  1358. (FIF_PROMISC_IN_BSS | \
  1359. FIF_ALLMULTI | \
  1360. FIF_CONTROL | \
  1361. FIF_PSPOLL | \
  1362. FIF_OTHER_BSS | \
  1363. FIF_BCN_PRBRESP_PROMISC | \
  1364. FIF_PROBE_REQ | \
  1365. FIF_FCSFAIL)
  1366. /* FIXME: sc->sc_full_reset ? */
  1367. static void ath9k_configure_filter(struct ieee80211_hw *hw,
  1368. unsigned int changed_flags,
  1369. unsigned int *total_flags,
  1370. u64 multicast)
  1371. {
  1372. struct ath_softc *sc = hw->priv;
  1373. u32 rfilt;
  1374. changed_flags &= SUPPORTED_FILTERS;
  1375. *total_flags &= SUPPORTED_FILTERS;
  1376. sc->rx.rxfilter = *total_flags;
  1377. ath9k_ps_wakeup(sc);
  1378. rfilt = ath_calcrxfilter(sc);
  1379. ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
  1380. ath9k_ps_restore(sc);
  1381. ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
  1382. rfilt);
  1383. }
  1384. static int ath9k_sta_add(struct ieee80211_hw *hw,
  1385. struct ieee80211_vif *vif,
  1386. struct ieee80211_sta *sta)
  1387. {
  1388. struct ath_softc *sc = hw->priv;
  1389. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1390. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1391. struct ieee80211_key_conf ps_key = { };
  1392. ath_node_attach(sc, sta, vif);
  1393. if (vif->type != NL80211_IFTYPE_AP &&
  1394. vif->type != NL80211_IFTYPE_AP_VLAN)
  1395. return 0;
  1396. an->ps_key = ath_key_config(common, vif, sta, &ps_key);
  1397. return 0;
  1398. }
  1399. static void ath9k_del_ps_key(struct ath_softc *sc,
  1400. struct ieee80211_vif *vif,
  1401. struct ieee80211_sta *sta)
  1402. {
  1403. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1404. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1405. struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
  1406. if (!an->ps_key)
  1407. return;
  1408. ath_key_delete(common, &ps_key);
  1409. }
  1410. static int ath9k_sta_remove(struct ieee80211_hw *hw,
  1411. struct ieee80211_vif *vif,
  1412. struct ieee80211_sta *sta)
  1413. {
  1414. struct ath_softc *sc = hw->priv;
  1415. ath9k_del_ps_key(sc, vif, sta);
  1416. ath_node_detach(sc, sta);
  1417. return 0;
  1418. }
  1419. static void ath9k_sta_notify(struct ieee80211_hw *hw,
  1420. struct ieee80211_vif *vif,
  1421. enum sta_notify_cmd cmd,
  1422. struct ieee80211_sta *sta)
  1423. {
  1424. struct ath_softc *sc = hw->priv;
  1425. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1426. if (!sta->ht_cap.ht_supported)
  1427. return;
  1428. switch (cmd) {
  1429. case STA_NOTIFY_SLEEP:
  1430. an->sleeping = true;
  1431. ath_tx_aggr_sleep(sta, sc, an);
  1432. break;
  1433. case STA_NOTIFY_AWAKE:
  1434. an->sleeping = false;
  1435. ath_tx_aggr_wakeup(sc, an);
  1436. break;
  1437. }
  1438. }
  1439. static int ath9k_conf_tx(struct ieee80211_hw *hw,
  1440. struct ieee80211_vif *vif, u16 queue,
  1441. const struct ieee80211_tx_queue_params *params)
  1442. {
  1443. struct ath_softc *sc = hw->priv;
  1444. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1445. struct ath_txq *txq;
  1446. struct ath9k_tx_queue_info qi;
  1447. int ret = 0;
  1448. if (queue >= WME_NUM_AC)
  1449. return 0;
  1450. txq = sc->tx.txq_map[queue];
  1451. ath9k_ps_wakeup(sc);
  1452. mutex_lock(&sc->mutex);
  1453. memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
  1454. qi.tqi_aifs = params->aifs;
  1455. qi.tqi_cwmin = params->cw_min;
  1456. qi.tqi_cwmax = params->cw_max;
  1457. qi.tqi_burstTime = params->txop;
  1458. ath_dbg(common, CONFIG,
  1459. "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
  1460. queue, txq->axq_qnum, params->aifs, params->cw_min,
  1461. params->cw_max, params->txop);
  1462. ret = ath_txq_update(sc, txq->axq_qnum, &qi);
  1463. if (ret)
  1464. ath_err(common, "TXQ Update failed\n");
  1465. if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
  1466. if (queue == WME_AC_BE && !ret)
  1467. ath_beaconq_config(sc);
  1468. mutex_unlock(&sc->mutex);
  1469. ath9k_ps_restore(sc);
  1470. return ret;
  1471. }
  1472. static int ath9k_set_key(struct ieee80211_hw *hw,
  1473. enum set_key_cmd cmd,
  1474. struct ieee80211_vif *vif,
  1475. struct ieee80211_sta *sta,
  1476. struct ieee80211_key_conf *key)
  1477. {
  1478. struct ath_softc *sc = hw->priv;
  1479. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1480. int ret = 0;
  1481. if (ath9k_modparam_nohwcrypt)
  1482. return -ENOSPC;
  1483. if ((vif->type == NL80211_IFTYPE_ADHOC ||
  1484. vif->type == NL80211_IFTYPE_MESH_POINT) &&
  1485. (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
  1486. key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
  1487. !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
  1488. /*
  1489. * For now, disable hw crypto for the RSN IBSS group keys. This
  1490. * could be optimized in the future to use a modified key cache
  1491. * design to support per-STA RX GTK, but until that gets
  1492. * implemented, use of software crypto for group addressed
  1493. * frames is a acceptable to allow RSN IBSS to be used.
  1494. */
  1495. return -EOPNOTSUPP;
  1496. }
  1497. mutex_lock(&sc->mutex);
  1498. ath9k_ps_wakeup(sc);
  1499. ath_dbg(common, CONFIG, "Set HW Key\n");
  1500. switch (cmd) {
  1501. case SET_KEY:
  1502. if (sta)
  1503. ath9k_del_ps_key(sc, vif, sta);
  1504. ret = ath_key_config(common, vif, sta, key);
  1505. if (ret >= 0) {
  1506. key->hw_key_idx = ret;
  1507. /* push IV and Michael MIC generation to stack */
  1508. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1509. if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
  1510. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  1511. if (sc->sc_ah->sw_mgmt_crypto &&
  1512. key->cipher == WLAN_CIPHER_SUITE_CCMP)
  1513. key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
  1514. ret = 0;
  1515. }
  1516. break;
  1517. case DISABLE_KEY:
  1518. ath_key_delete(common, key);
  1519. break;
  1520. default:
  1521. ret = -EINVAL;
  1522. }
  1523. ath9k_ps_restore(sc);
  1524. mutex_unlock(&sc->mutex);
  1525. return ret;
  1526. }
  1527. static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  1528. {
  1529. struct ath_softc *sc = data;
  1530. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1531. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1532. struct ath_vif *avp = (void *)vif->drv_priv;
  1533. /*
  1534. * Skip iteration if primary station vif's bss info
  1535. * was not changed
  1536. */
  1537. if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
  1538. return;
  1539. if (bss_conf->assoc) {
  1540. sc->sc_flags |= SC_OP_PRIM_STA_VIF;
  1541. avp->primary_sta_vif = true;
  1542. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1543. common->curaid = bss_conf->aid;
  1544. ath9k_hw_write_associd(sc->sc_ah);
  1545. ath_dbg(common, CONFIG, "Bss Info ASSOC %d, bssid: %pM\n",
  1546. bss_conf->aid, common->curbssid);
  1547. ath_beacon_config(sc, vif);
  1548. /*
  1549. * Request a re-configuration of Beacon related timers
  1550. * on the receipt of the first Beacon frame (i.e.,
  1551. * after time sync with the AP).
  1552. */
  1553. sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
  1554. /* Reset rssi stats */
  1555. sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
  1556. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1557. if (!common->disable_ani) {
  1558. sc->sc_flags |= SC_OP_ANI_RUN;
  1559. ath_start_ani(common);
  1560. }
  1561. }
  1562. }
  1563. static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
  1564. {
  1565. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1566. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1567. struct ath_vif *avp = (void *)vif->drv_priv;
  1568. if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
  1569. return;
  1570. /* Reconfigure bss info */
  1571. if (avp->primary_sta_vif && !bss_conf->assoc) {
  1572. ath_dbg(common, CONFIG, "Bss Info DISASSOC %d, bssid %pM\n",
  1573. common->curaid, common->curbssid);
  1574. sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
  1575. avp->primary_sta_vif = false;
  1576. memset(common->curbssid, 0, ETH_ALEN);
  1577. common->curaid = 0;
  1578. }
  1579. ieee80211_iterate_active_interfaces_atomic(
  1580. sc->hw, ath9k_bss_iter, sc);
  1581. /*
  1582. * None of station vifs are associated.
  1583. * Clear bssid & aid
  1584. */
  1585. if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
  1586. ath9k_hw_write_associd(sc->sc_ah);
  1587. /* Stop ANI */
  1588. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1589. del_timer_sync(&common->ani.timer);
  1590. memset(&sc->caldata, 0, sizeof(sc->caldata));
  1591. }
  1592. }
  1593. static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
  1594. struct ieee80211_vif *vif,
  1595. struct ieee80211_bss_conf *bss_conf,
  1596. u32 changed)
  1597. {
  1598. struct ath_softc *sc = hw->priv;
  1599. struct ath_hw *ah = sc->sc_ah;
  1600. struct ath_common *common = ath9k_hw_common(ah);
  1601. struct ath_vif *avp = (void *)vif->drv_priv;
  1602. int slottime;
  1603. int error;
  1604. ath9k_ps_wakeup(sc);
  1605. mutex_lock(&sc->mutex);
  1606. if (changed & BSS_CHANGED_ASSOC) {
  1607. ath9k_config_bss(sc, vif);
  1608. ath_dbg(common, CONFIG, "BSSID: %pM aid: 0x%x\n",
  1609. common->curbssid, common->curaid);
  1610. }
  1611. if (changed & BSS_CHANGED_IBSS) {
  1612. /* There can be only one vif available */
  1613. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1614. common->curaid = bss_conf->aid;
  1615. ath9k_hw_write_associd(sc->sc_ah);
  1616. if (bss_conf->ibss_joined) {
  1617. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1618. if (!common->disable_ani) {
  1619. sc->sc_flags |= SC_OP_ANI_RUN;
  1620. ath_start_ani(common);
  1621. }
  1622. } else {
  1623. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1624. del_timer_sync(&common->ani.timer);
  1625. }
  1626. }
  1627. /* Enable transmission of beacons (AP, IBSS, MESH) */
  1628. if ((changed & BSS_CHANGED_BEACON) ||
  1629. ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
  1630. ath9k_set_beaconing_status(sc, false);
  1631. error = ath_beacon_alloc(sc, vif);
  1632. if (!error)
  1633. ath_beacon_config(sc, vif);
  1634. ath9k_set_beaconing_status(sc, true);
  1635. }
  1636. if (changed & BSS_CHANGED_ERP_SLOT) {
  1637. if (bss_conf->use_short_slot)
  1638. slottime = 9;
  1639. else
  1640. slottime = 20;
  1641. if (vif->type == NL80211_IFTYPE_AP) {
  1642. /*
  1643. * Defer update, so that connected stations can adjust
  1644. * their settings at the same time.
  1645. * See beacon.c for more details
  1646. */
  1647. sc->beacon.slottime = slottime;
  1648. sc->beacon.updateslot = UPDATE;
  1649. } else {
  1650. ah->slottime = slottime;
  1651. ath9k_hw_init_global_settings(ah);
  1652. }
  1653. }
  1654. /* Disable transmission of beacons */
  1655. if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
  1656. !bss_conf->enable_beacon) {
  1657. ath9k_set_beaconing_status(sc, false);
  1658. avp->is_bslot_active = false;
  1659. ath9k_set_beaconing_status(sc, true);
  1660. }
  1661. if (changed & BSS_CHANGED_BEACON_INT) {
  1662. /*
  1663. * In case of AP mode, the HW TSF has to be reset
  1664. * when the beacon interval changes.
  1665. */
  1666. if (vif->type == NL80211_IFTYPE_AP) {
  1667. sc->sc_flags |= SC_OP_TSF_RESET;
  1668. ath9k_set_beaconing_status(sc, false);
  1669. error = ath_beacon_alloc(sc, vif);
  1670. if (!error)
  1671. ath_beacon_config(sc, vif);
  1672. ath9k_set_beaconing_status(sc, true);
  1673. } else
  1674. ath_beacon_config(sc, vif);
  1675. }
  1676. mutex_unlock(&sc->mutex);
  1677. ath9k_ps_restore(sc);
  1678. }
  1679. static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  1680. {
  1681. struct ath_softc *sc = hw->priv;
  1682. u64 tsf;
  1683. mutex_lock(&sc->mutex);
  1684. ath9k_ps_wakeup(sc);
  1685. tsf = ath9k_hw_gettsf64(sc->sc_ah);
  1686. ath9k_ps_restore(sc);
  1687. mutex_unlock(&sc->mutex);
  1688. return tsf;
  1689. }
  1690. static void ath9k_set_tsf(struct ieee80211_hw *hw,
  1691. struct ieee80211_vif *vif,
  1692. u64 tsf)
  1693. {
  1694. struct ath_softc *sc = hw->priv;
  1695. mutex_lock(&sc->mutex);
  1696. ath9k_ps_wakeup(sc);
  1697. ath9k_hw_settsf64(sc->sc_ah, tsf);
  1698. ath9k_ps_restore(sc);
  1699. mutex_unlock(&sc->mutex);
  1700. }
  1701. static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  1702. {
  1703. struct ath_softc *sc = hw->priv;
  1704. mutex_lock(&sc->mutex);
  1705. ath9k_ps_wakeup(sc);
  1706. ath9k_hw_reset_tsf(sc->sc_ah);
  1707. ath9k_ps_restore(sc);
  1708. mutex_unlock(&sc->mutex);
  1709. }
  1710. static int ath9k_ampdu_action(struct ieee80211_hw *hw,
  1711. struct ieee80211_vif *vif,
  1712. enum ieee80211_ampdu_mlme_action action,
  1713. struct ieee80211_sta *sta,
  1714. u16 tid, u16 *ssn, u8 buf_size)
  1715. {
  1716. struct ath_softc *sc = hw->priv;
  1717. int ret = 0;
  1718. local_bh_disable();
  1719. switch (action) {
  1720. case IEEE80211_AMPDU_RX_START:
  1721. break;
  1722. case IEEE80211_AMPDU_RX_STOP:
  1723. break;
  1724. case IEEE80211_AMPDU_TX_START:
  1725. ath9k_ps_wakeup(sc);
  1726. ret = ath_tx_aggr_start(sc, sta, tid, ssn);
  1727. if (!ret)
  1728. ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1729. ath9k_ps_restore(sc);
  1730. break;
  1731. case IEEE80211_AMPDU_TX_STOP:
  1732. ath9k_ps_wakeup(sc);
  1733. ath_tx_aggr_stop(sc, sta, tid);
  1734. ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1735. ath9k_ps_restore(sc);
  1736. break;
  1737. case IEEE80211_AMPDU_TX_OPERATIONAL:
  1738. ath9k_ps_wakeup(sc);
  1739. ath_tx_aggr_resume(sc, sta, tid);
  1740. ath9k_ps_restore(sc);
  1741. break;
  1742. default:
  1743. ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
  1744. }
  1745. local_bh_enable();
  1746. return ret;
  1747. }
  1748. static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
  1749. struct survey_info *survey)
  1750. {
  1751. struct ath_softc *sc = hw->priv;
  1752. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1753. struct ieee80211_supported_band *sband;
  1754. struct ieee80211_channel *chan;
  1755. unsigned long flags;
  1756. int pos;
  1757. spin_lock_irqsave(&common->cc_lock, flags);
  1758. if (idx == 0)
  1759. ath_update_survey_stats(sc);
  1760. sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
  1761. if (sband && idx >= sband->n_channels) {
  1762. idx -= sband->n_channels;
  1763. sband = NULL;
  1764. }
  1765. if (!sband)
  1766. sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
  1767. if (!sband || idx >= sband->n_channels) {
  1768. spin_unlock_irqrestore(&common->cc_lock, flags);
  1769. return -ENOENT;
  1770. }
  1771. chan = &sband->channels[idx];
  1772. pos = chan->hw_value;
  1773. memcpy(survey, &sc->survey[pos], sizeof(*survey));
  1774. survey->channel = chan;
  1775. spin_unlock_irqrestore(&common->cc_lock, flags);
  1776. return 0;
  1777. }
  1778. static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
  1779. {
  1780. struct ath_softc *sc = hw->priv;
  1781. struct ath_hw *ah = sc->sc_ah;
  1782. mutex_lock(&sc->mutex);
  1783. ah->coverage_class = coverage_class;
  1784. ath9k_ps_wakeup(sc);
  1785. ath9k_hw_init_global_settings(ah);
  1786. ath9k_ps_restore(sc);
  1787. mutex_unlock(&sc->mutex);
  1788. }
  1789. static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
  1790. {
  1791. struct ath_softc *sc = hw->priv;
  1792. struct ath_hw *ah = sc->sc_ah;
  1793. struct ath_common *common = ath9k_hw_common(ah);
  1794. int timeout = 200; /* ms */
  1795. int i, j;
  1796. bool drain_txq;
  1797. mutex_lock(&sc->mutex);
  1798. cancel_delayed_work_sync(&sc->tx_complete_work);
  1799. if (ah->ah_flags & AH_UNPLUGGED) {
  1800. ath_dbg(common, ANY, "Device has been unplugged!\n");
  1801. mutex_unlock(&sc->mutex);
  1802. return;
  1803. }
  1804. if (sc->sc_flags & SC_OP_INVALID) {
  1805. ath_dbg(common, ANY, "Device not present\n");
  1806. mutex_unlock(&sc->mutex);
  1807. return;
  1808. }
  1809. for (j = 0; j < timeout; j++) {
  1810. bool npend = false;
  1811. if (j)
  1812. usleep_range(1000, 2000);
  1813. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  1814. if (!ATH_TXQ_SETUP(sc, i))
  1815. continue;
  1816. npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
  1817. if (npend)
  1818. break;
  1819. }
  1820. if (!npend)
  1821. break;
  1822. }
  1823. if (drop) {
  1824. ath9k_ps_wakeup(sc);
  1825. spin_lock_bh(&sc->sc_pcu_lock);
  1826. drain_txq = ath_drain_all_txq(sc, false);
  1827. spin_unlock_bh(&sc->sc_pcu_lock);
  1828. if (!drain_txq)
  1829. ath_reset(sc, false);
  1830. ath9k_ps_restore(sc);
  1831. ieee80211_wake_queues(hw);
  1832. }
  1833. ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
  1834. mutex_unlock(&sc->mutex);
  1835. }
  1836. static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
  1837. {
  1838. struct ath_softc *sc = hw->priv;
  1839. int i;
  1840. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  1841. if (!ATH_TXQ_SETUP(sc, i))
  1842. continue;
  1843. if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
  1844. return true;
  1845. }
  1846. return false;
  1847. }
  1848. static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
  1849. {
  1850. struct ath_softc *sc = hw->priv;
  1851. struct ath_hw *ah = sc->sc_ah;
  1852. struct ieee80211_vif *vif;
  1853. struct ath_vif *avp;
  1854. struct ath_buf *bf;
  1855. struct ath_tx_status ts;
  1856. bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
  1857. int status;
  1858. vif = sc->beacon.bslot[0];
  1859. if (!vif)
  1860. return 0;
  1861. avp = (void *)vif->drv_priv;
  1862. if (!avp->is_bslot_active)
  1863. return 0;
  1864. if (!sc->beacon.tx_processed && !edma) {
  1865. tasklet_disable(&sc->bcon_tasklet);
  1866. bf = avp->av_bcbuf;
  1867. if (!bf || !bf->bf_mpdu)
  1868. goto skip;
  1869. status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
  1870. if (status == -EINPROGRESS)
  1871. goto skip;
  1872. sc->beacon.tx_processed = true;
  1873. sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
  1874. skip:
  1875. tasklet_enable(&sc->bcon_tasklet);
  1876. }
  1877. return sc->beacon.tx_last;
  1878. }
  1879. static int ath9k_get_stats(struct ieee80211_hw *hw,
  1880. struct ieee80211_low_level_stats *stats)
  1881. {
  1882. struct ath_softc *sc = hw->priv;
  1883. struct ath_hw *ah = sc->sc_ah;
  1884. struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
  1885. stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
  1886. stats->dot11RTSFailureCount = mib_stats->rts_bad;
  1887. stats->dot11FCSErrorCount = mib_stats->fcs_bad;
  1888. stats->dot11RTSSuccessCount = mib_stats->rts_good;
  1889. return 0;
  1890. }
  1891. static u32 fill_chainmask(u32 cap, u32 new)
  1892. {
  1893. u32 filled = 0;
  1894. int i;
  1895. for (i = 0; cap && new; i++, cap >>= 1) {
  1896. if (!(cap & BIT(0)))
  1897. continue;
  1898. if (new & BIT(0))
  1899. filled |= BIT(i);
  1900. new >>= 1;
  1901. }
  1902. return filled;
  1903. }
  1904. static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
  1905. {
  1906. struct ath_softc *sc = hw->priv;
  1907. struct ath_hw *ah = sc->sc_ah;
  1908. if (!rx_ant || !tx_ant)
  1909. return -EINVAL;
  1910. sc->ant_rx = rx_ant;
  1911. sc->ant_tx = tx_ant;
  1912. if (ah->caps.rx_chainmask == 1)
  1913. return 0;
  1914. /* AR9100 runs into calibration issues if not all rx chains are enabled */
  1915. if (AR_SREV_9100(ah))
  1916. ah->rxchainmask = 0x7;
  1917. else
  1918. ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
  1919. ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
  1920. ath9k_reload_chainmask_settings(sc);
  1921. return 0;
  1922. }
  1923. static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
  1924. {
  1925. struct ath_softc *sc = hw->priv;
  1926. *tx_ant = sc->ant_tx;
  1927. *rx_ant = sc->ant_rx;
  1928. return 0;
  1929. }
  1930. struct ieee80211_ops ath9k_ops = {
  1931. .tx = ath9k_tx,
  1932. .start = ath9k_start,
  1933. .stop = ath9k_stop,
  1934. .add_interface = ath9k_add_interface,
  1935. .change_interface = ath9k_change_interface,
  1936. .remove_interface = ath9k_remove_interface,
  1937. .config = ath9k_config,
  1938. .configure_filter = ath9k_configure_filter,
  1939. .sta_add = ath9k_sta_add,
  1940. .sta_remove = ath9k_sta_remove,
  1941. .sta_notify = ath9k_sta_notify,
  1942. .conf_tx = ath9k_conf_tx,
  1943. .bss_info_changed = ath9k_bss_info_changed,
  1944. .set_key = ath9k_set_key,
  1945. .get_tsf = ath9k_get_tsf,
  1946. .set_tsf = ath9k_set_tsf,
  1947. .reset_tsf = ath9k_reset_tsf,
  1948. .ampdu_action = ath9k_ampdu_action,
  1949. .get_survey = ath9k_get_survey,
  1950. .rfkill_poll = ath9k_rfkill_poll_state,
  1951. .set_coverage_class = ath9k_set_coverage_class,
  1952. .flush = ath9k_flush,
  1953. .tx_frames_pending = ath9k_tx_frames_pending,
  1954. .tx_last_beacon = ath9k_tx_last_beacon,
  1955. .get_stats = ath9k_get_stats,
  1956. .set_antenna = ath9k_set_antenna,
  1957. .get_antenna = ath9k_get_antenna,
  1958. };