smsc911x.c 68 KB

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  1. /***************************************************************************
  2. *
  3. * Copyright (C) 2004-2008 SMSC
  4. * Copyright (C) 2005-2008 ARM
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version 2
  9. * of the License, or (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19. *
  20. ***************************************************************************
  21. * Rewritten, heavily based on smsc911x simple driver by SMSC.
  22. * Partly uses io macros from smc91x.c by Nicolas Pitre
  23. *
  24. * Supported devices:
  25. * LAN9115, LAN9116, LAN9117, LAN9118
  26. * LAN9215, LAN9216, LAN9217, LAN9218
  27. * LAN9210, LAN9211
  28. * LAN9220, LAN9221
  29. * LAN89218
  30. *
  31. */
  32. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  33. #include <linux/crc32.h>
  34. #include <linux/delay.h>
  35. #include <linux/errno.h>
  36. #include <linux/etherdevice.h>
  37. #include <linux/ethtool.h>
  38. #include <linux/init.h>
  39. #include <linux/interrupt.h>
  40. #include <linux/ioport.h>
  41. #include <linux/kernel.h>
  42. #include <linux/module.h>
  43. #include <linux/netdevice.h>
  44. #include <linux/platform_device.h>
  45. #include <linux/regulator/consumer.h>
  46. #include <linux/sched.h>
  47. #include <linux/timer.h>
  48. #include <linux/bug.h>
  49. #include <linux/bitops.h>
  50. #include <linux/irq.h>
  51. #include <linux/io.h>
  52. #include <linux/swab.h>
  53. #include <linux/phy.h>
  54. #include <linux/smsc911x.h>
  55. #include <linux/device.h>
  56. #include <linux/of.h>
  57. #include <linux/of_device.h>
  58. #include <linux/of_gpio.h>
  59. #include <linux/of_net.h>
  60. #include "smsc911x.h"
  61. #define SMSC_CHIPNAME "smsc911x"
  62. #define SMSC_MDIONAME "smsc911x-mdio"
  63. #define SMSC_DRV_VERSION "2008-10-21"
  64. MODULE_LICENSE("GPL");
  65. MODULE_VERSION(SMSC_DRV_VERSION);
  66. MODULE_ALIAS("platform:smsc911x");
  67. #if USE_DEBUG > 0
  68. static int debug = 16;
  69. #else
  70. static int debug = 3;
  71. #endif
  72. module_param(debug, int, 0);
  73. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  74. struct smsc911x_data;
  75. struct smsc911x_ops {
  76. u32 (*reg_read)(struct smsc911x_data *pdata, u32 reg);
  77. void (*reg_write)(struct smsc911x_data *pdata, u32 reg, u32 val);
  78. void (*rx_readfifo)(struct smsc911x_data *pdata,
  79. unsigned int *buf, unsigned int wordcount);
  80. void (*tx_writefifo)(struct smsc911x_data *pdata,
  81. unsigned int *buf, unsigned int wordcount);
  82. };
  83. #define SMSC911X_NUM_SUPPLIES 2
  84. struct smsc911x_data {
  85. void __iomem *ioaddr;
  86. unsigned int idrev;
  87. /* used to decide which workarounds apply */
  88. unsigned int generation;
  89. /* device configuration (copied from platform_data during probe) */
  90. struct smsc911x_platform_config config;
  91. /* This needs to be acquired before calling any of below:
  92. * smsc911x_mac_read(), smsc911x_mac_write()
  93. */
  94. spinlock_t mac_lock;
  95. /* spinlock to ensure register accesses are serialised */
  96. spinlock_t dev_lock;
  97. struct phy_device *phy_dev;
  98. struct mii_bus *mii_bus;
  99. int phy_irq[PHY_MAX_ADDR];
  100. unsigned int using_extphy;
  101. int last_duplex;
  102. int last_carrier;
  103. u32 msg_enable;
  104. unsigned int gpio_setting;
  105. unsigned int gpio_orig_setting;
  106. struct net_device *dev;
  107. struct napi_struct napi;
  108. unsigned int software_irq_signal;
  109. #ifdef USE_PHY_WORK_AROUND
  110. #define MIN_PACKET_SIZE (64)
  111. char loopback_tx_pkt[MIN_PACKET_SIZE];
  112. char loopback_rx_pkt[MIN_PACKET_SIZE];
  113. unsigned int resetcount;
  114. #endif
  115. /* Members for Multicast filter workaround */
  116. unsigned int multicast_update_pending;
  117. unsigned int set_bits_mask;
  118. unsigned int clear_bits_mask;
  119. unsigned int hashhi;
  120. unsigned int hashlo;
  121. /* register access functions */
  122. const struct smsc911x_ops *ops;
  123. /* regulators */
  124. struct regulator_bulk_data supplies[SMSC911X_NUM_SUPPLIES];
  125. };
  126. /* Easy access to information */
  127. #define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift))
  128. static inline u32 __smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
  129. {
  130. if (pdata->config.flags & SMSC911X_USE_32BIT)
  131. return readl(pdata->ioaddr + reg);
  132. if (pdata->config.flags & SMSC911X_USE_16BIT)
  133. return ((readw(pdata->ioaddr + reg) & 0xFFFF) |
  134. ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16));
  135. BUG();
  136. return 0;
  137. }
  138. static inline u32
  139. __smsc911x_reg_read_shift(struct smsc911x_data *pdata, u32 reg)
  140. {
  141. if (pdata->config.flags & SMSC911X_USE_32BIT)
  142. return readl(pdata->ioaddr + __smsc_shift(pdata, reg));
  143. if (pdata->config.flags & SMSC911X_USE_16BIT)
  144. return (readw(pdata->ioaddr +
  145. __smsc_shift(pdata, reg)) & 0xFFFF) |
  146. ((readw(pdata->ioaddr +
  147. __smsc_shift(pdata, reg + 2)) & 0xFFFF) << 16);
  148. BUG();
  149. return 0;
  150. }
  151. static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
  152. {
  153. u32 data;
  154. unsigned long flags;
  155. spin_lock_irqsave(&pdata->dev_lock, flags);
  156. data = pdata->ops->reg_read(pdata, reg);
  157. spin_unlock_irqrestore(&pdata->dev_lock, flags);
  158. return data;
  159. }
  160. static inline void __smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
  161. u32 val)
  162. {
  163. if (pdata->config.flags & SMSC911X_USE_32BIT) {
  164. writel(val, pdata->ioaddr + reg);
  165. return;
  166. }
  167. if (pdata->config.flags & SMSC911X_USE_16BIT) {
  168. writew(val & 0xFFFF, pdata->ioaddr + reg);
  169. writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2);
  170. return;
  171. }
  172. BUG();
  173. }
  174. static inline void
  175. __smsc911x_reg_write_shift(struct smsc911x_data *pdata, u32 reg, u32 val)
  176. {
  177. if (pdata->config.flags & SMSC911X_USE_32BIT) {
  178. writel(val, pdata->ioaddr + __smsc_shift(pdata, reg));
  179. return;
  180. }
  181. if (pdata->config.flags & SMSC911X_USE_16BIT) {
  182. writew(val & 0xFFFF,
  183. pdata->ioaddr + __smsc_shift(pdata, reg));
  184. writew((val >> 16) & 0xFFFF,
  185. pdata->ioaddr + __smsc_shift(pdata, reg + 2));
  186. return;
  187. }
  188. BUG();
  189. }
  190. static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
  191. u32 val)
  192. {
  193. unsigned long flags;
  194. spin_lock_irqsave(&pdata->dev_lock, flags);
  195. pdata->ops->reg_write(pdata, reg, val);
  196. spin_unlock_irqrestore(&pdata->dev_lock, flags);
  197. }
  198. /* Writes a packet to the TX_DATA_FIFO */
  199. static inline void
  200. smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf,
  201. unsigned int wordcount)
  202. {
  203. unsigned long flags;
  204. spin_lock_irqsave(&pdata->dev_lock, flags);
  205. if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
  206. while (wordcount--)
  207. __smsc911x_reg_write(pdata, TX_DATA_FIFO,
  208. swab32(*buf++));
  209. goto out;
  210. }
  211. if (pdata->config.flags & SMSC911X_USE_32BIT) {
  212. writesl(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount);
  213. goto out;
  214. }
  215. if (pdata->config.flags & SMSC911X_USE_16BIT) {
  216. while (wordcount--)
  217. __smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++);
  218. goto out;
  219. }
  220. BUG();
  221. out:
  222. spin_unlock_irqrestore(&pdata->dev_lock, flags);
  223. }
  224. /* Writes a packet to the TX_DATA_FIFO - shifted version */
  225. static inline void
  226. smsc911x_tx_writefifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
  227. unsigned int wordcount)
  228. {
  229. unsigned long flags;
  230. spin_lock_irqsave(&pdata->dev_lock, flags);
  231. if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
  232. while (wordcount--)
  233. __smsc911x_reg_write_shift(pdata, TX_DATA_FIFO,
  234. swab32(*buf++));
  235. goto out;
  236. }
  237. if (pdata->config.flags & SMSC911X_USE_32BIT) {
  238. writesl(pdata->ioaddr + __smsc_shift(pdata,
  239. TX_DATA_FIFO), buf, wordcount);
  240. goto out;
  241. }
  242. if (pdata->config.flags & SMSC911X_USE_16BIT) {
  243. while (wordcount--)
  244. __smsc911x_reg_write_shift(pdata,
  245. TX_DATA_FIFO, *buf++);
  246. goto out;
  247. }
  248. BUG();
  249. out:
  250. spin_unlock_irqrestore(&pdata->dev_lock, flags);
  251. }
  252. /* Reads a packet out of the RX_DATA_FIFO */
  253. static inline void
  254. smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf,
  255. unsigned int wordcount)
  256. {
  257. unsigned long flags;
  258. spin_lock_irqsave(&pdata->dev_lock, flags);
  259. if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
  260. while (wordcount--)
  261. *buf++ = swab32(__smsc911x_reg_read(pdata,
  262. RX_DATA_FIFO));
  263. goto out;
  264. }
  265. if (pdata->config.flags & SMSC911X_USE_32BIT) {
  266. readsl(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount);
  267. goto out;
  268. }
  269. if (pdata->config.flags & SMSC911X_USE_16BIT) {
  270. while (wordcount--)
  271. *buf++ = __smsc911x_reg_read(pdata, RX_DATA_FIFO);
  272. goto out;
  273. }
  274. BUG();
  275. out:
  276. spin_unlock_irqrestore(&pdata->dev_lock, flags);
  277. }
  278. /* Reads a packet out of the RX_DATA_FIFO - shifted version */
  279. static inline void
  280. smsc911x_rx_readfifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
  281. unsigned int wordcount)
  282. {
  283. unsigned long flags;
  284. spin_lock_irqsave(&pdata->dev_lock, flags);
  285. if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
  286. while (wordcount--)
  287. *buf++ = swab32(__smsc911x_reg_read_shift(pdata,
  288. RX_DATA_FIFO));
  289. goto out;
  290. }
  291. if (pdata->config.flags & SMSC911X_USE_32BIT) {
  292. readsl(pdata->ioaddr + __smsc_shift(pdata,
  293. RX_DATA_FIFO), buf, wordcount);
  294. goto out;
  295. }
  296. if (pdata->config.flags & SMSC911X_USE_16BIT) {
  297. while (wordcount--)
  298. *buf++ = __smsc911x_reg_read_shift(pdata,
  299. RX_DATA_FIFO);
  300. goto out;
  301. }
  302. BUG();
  303. out:
  304. spin_unlock_irqrestore(&pdata->dev_lock, flags);
  305. }
  306. /*
  307. * enable resources, currently just regulators.
  308. */
  309. static int smsc911x_enable_resources(struct platform_device *pdev)
  310. {
  311. struct net_device *ndev = platform_get_drvdata(pdev);
  312. struct smsc911x_data *pdata = netdev_priv(ndev);
  313. int ret = 0;
  314. ret = regulator_bulk_enable(ARRAY_SIZE(pdata->supplies),
  315. pdata->supplies);
  316. if (ret)
  317. netdev_err(ndev, "failed to enable regulators %d\n",
  318. ret);
  319. return ret;
  320. }
  321. /*
  322. * disable resources, currently just regulators.
  323. */
  324. static int smsc911x_disable_resources(struct platform_device *pdev)
  325. {
  326. struct net_device *ndev = platform_get_drvdata(pdev);
  327. struct smsc911x_data *pdata = netdev_priv(ndev);
  328. int ret = 0;
  329. ret = regulator_bulk_disable(ARRAY_SIZE(pdata->supplies),
  330. pdata->supplies);
  331. return ret;
  332. }
  333. /*
  334. * Request resources, currently just regulators.
  335. *
  336. * The SMSC911x has two power pins: vddvario and vdd33a, in designs where
  337. * these are not always-on we need to request regulators to be turned on
  338. * before we can try to access the device registers.
  339. */
  340. static int smsc911x_request_resources(struct platform_device *pdev)
  341. {
  342. struct net_device *ndev = platform_get_drvdata(pdev);
  343. struct smsc911x_data *pdata = netdev_priv(ndev);
  344. int ret = 0;
  345. /* Request regulators */
  346. pdata->supplies[0].supply = "vdd33a";
  347. pdata->supplies[1].supply = "vddvario";
  348. ret = regulator_bulk_get(&pdev->dev,
  349. ARRAY_SIZE(pdata->supplies),
  350. pdata->supplies);
  351. if (ret)
  352. netdev_err(ndev, "couldn't get regulators %d\n",
  353. ret);
  354. return ret;
  355. }
  356. /*
  357. * Free resources, currently just regulators.
  358. *
  359. */
  360. static void smsc911x_free_resources(struct platform_device *pdev)
  361. {
  362. struct net_device *ndev = platform_get_drvdata(pdev);
  363. struct smsc911x_data *pdata = netdev_priv(ndev);
  364. /* Free regulators */
  365. regulator_bulk_free(ARRAY_SIZE(pdata->supplies),
  366. pdata->supplies);
  367. }
  368. /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
  369. * and smsc911x_mac_write, so assumes mac_lock is held */
  370. static int smsc911x_mac_complete(struct smsc911x_data *pdata)
  371. {
  372. int i;
  373. u32 val;
  374. SMSC_ASSERT_MAC_LOCK(pdata);
  375. for (i = 0; i < 40; i++) {
  376. val = smsc911x_reg_read(pdata, MAC_CSR_CMD);
  377. if (!(val & MAC_CSR_CMD_CSR_BUSY_))
  378. return 0;
  379. }
  380. SMSC_WARN(pdata, hw, "Timed out waiting for MAC not BUSY. "
  381. "MAC_CSR_CMD: 0x%08X", val);
  382. return -EIO;
  383. }
  384. /* Fetches a MAC register value. Assumes mac_lock is acquired */
  385. static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset)
  386. {
  387. unsigned int temp;
  388. SMSC_ASSERT_MAC_LOCK(pdata);
  389. temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
  390. if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
  391. SMSC_WARN(pdata, hw, "MAC busy at entry");
  392. return 0xFFFFFFFF;
  393. }
  394. /* Send the MAC cmd */
  395. smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
  396. MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_));
  397. /* Workaround for hardware read-after-write restriction */
  398. temp = smsc911x_reg_read(pdata, BYTE_TEST);
  399. /* Wait for the read to complete */
  400. if (likely(smsc911x_mac_complete(pdata) == 0))
  401. return smsc911x_reg_read(pdata, MAC_CSR_DATA);
  402. SMSC_WARN(pdata, hw, "MAC busy after read");
  403. return 0xFFFFFFFF;
  404. }
  405. /* Set a mac register, mac_lock must be acquired before calling */
  406. static void smsc911x_mac_write(struct smsc911x_data *pdata,
  407. unsigned int offset, u32 val)
  408. {
  409. unsigned int temp;
  410. SMSC_ASSERT_MAC_LOCK(pdata);
  411. temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
  412. if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
  413. SMSC_WARN(pdata, hw,
  414. "smsc911x_mac_write failed, MAC busy at entry");
  415. return;
  416. }
  417. /* Send data to write */
  418. smsc911x_reg_write(pdata, MAC_CSR_DATA, val);
  419. /* Write the actual data */
  420. smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
  421. MAC_CSR_CMD_CSR_BUSY_));
  422. /* Workaround for hardware read-after-write restriction */
  423. temp = smsc911x_reg_read(pdata, BYTE_TEST);
  424. /* Wait for the write to complete */
  425. if (likely(smsc911x_mac_complete(pdata) == 0))
  426. return;
  427. SMSC_WARN(pdata, hw, "smsc911x_mac_write failed, MAC busy after write");
  428. }
  429. /* Get a phy register */
  430. static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx)
  431. {
  432. struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
  433. unsigned long flags;
  434. unsigned int addr;
  435. int i, reg;
  436. spin_lock_irqsave(&pdata->mac_lock, flags);
  437. /* Confirm MII not busy */
  438. if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
  439. SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_read???");
  440. reg = -EIO;
  441. goto out;
  442. }
  443. /* Set the address, index & direction (read from PHY) */
  444. addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6);
  445. smsc911x_mac_write(pdata, MII_ACC, addr);
  446. /* Wait for read to complete w/ timeout */
  447. for (i = 0; i < 100; i++)
  448. if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
  449. reg = smsc911x_mac_read(pdata, MII_DATA);
  450. goto out;
  451. }
  452. SMSC_WARN(pdata, hw, "Timed out waiting for MII read to finish");
  453. reg = -EIO;
  454. out:
  455. spin_unlock_irqrestore(&pdata->mac_lock, flags);
  456. return reg;
  457. }
  458. /* Set a phy register */
  459. static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx,
  460. u16 val)
  461. {
  462. struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
  463. unsigned long flags;
  464. unsigned int addr;
  465. int i, reg;
  466. spin_lock_irqsave(&pdata->mac_lock, flags);
  467. /* Confirm MII not busy */
  468. if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
  469. SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_write???");
  470. reg = -EIO;
  471. goto out;
  472. }
  473. /* Put the data to write in the MAC */
  474. smsc911x_mac_write(pdata, MII_DATA, val);
  475. /* Set the address, index & direction (write to PHY) */
  476. addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
  477. MII_ACC_MII_WRITE_;
  478. smsc911x_mac_write(pdata, MII_ACC, addr);
  479. /* Wait for write to complete w/ timeout */
  480. for (i = 0; i < 100; i++)
  481. if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
  482. reg = 0;
  483. goto out;
  484. }
  485. SMSC_WARN(pdata, hw, "Timed out waiting for MII write to finish");
  486. reg = -EIO;
  487. out:
  488. spin_unlock_irqrestore(&pdata->mac_lock, flags);
  489. return reg;
  490. }
  491. /* Switch to external phy. Assumes tx and rx are stopped. */
  492. static void smsc911x_phy_enable_external(struct smsc911x_data *pdata)
  493. {
  494. unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
  495. /* Disable phy clocks to the MAC */
  496. hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
  497. hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
  498. smsc911x_reg_write(pdata, HW_CFG, hwcfg);
  499. udelay(10); /* Enough time for clocks to stop */
  500. /* Switch to external phy */
  501. hwcfg |= HW_CFG_EXT_PHY_EN_;
  502. smsc911x_reg_write(pdata, HW_CFG, hwcfg);
  503. /* Enable phy clocks to the MAC */
  504. hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
  505. hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
  506. smsc911x_reg_write(pdata, HW_CFG, hwcfg);
  507. udelay(10); /* Enough time for clocks to restart */
  508. hwcfg |= HW_CFG_SMI_SEL_;
  509. smsc911x_reg_write(pdata, HW_CFG, hwcfg);
  510. }
  511. /* Autodetects and enables external phy if present on supported chips.
  512. * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY
  513. * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */
  514. static void smsc911x_phy_initialise_external(struct smsc911x_data *pdata)
  515. {
  516. unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
  517. if (pdata->config.flags & SMSC911X_FORCE_INTERNAL_PHY) {
  518. SMSC_TRACE(pdata, hw, "Forcing internal PHY");
  519. pdata->using_extphy = 0;
  520. } else if (pdata->config.flags & SMSC911X_FORCE_EXTERNAL_PHY) {
  521. SMSC_TRACE(pdata, hw, "Forcing external PHY");
  522. smsc911x_phy_enable_external(pdata);
  523. pdata->using_extphy = 1;
  524. } else if (hwcfg & HW_CFG_EXT_PHY_DET_) {
  525. SMSC_TRACE(pdata, hw,
  526. "HW_CFG EXT_PHY_DET set, using external PHY");
  527. smsc911x_phy_enable_external(pdata);
  528. pdata->using_extphy = 1;
  529. } else {
  530. SMSC_TRACE(pdata, hw,
  531. "HW_CFG EXT_PHY_DET clear, using internal PHY");
  532. pdata->using_extphy = 0;
  533. }
  534. }
  535. /* Fetches a tx status out of the status fifo */
  536. static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata)
  537. {
  538. unsigned int result =
  539. smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_;
  540. if (result != 0)
  541. result = smsc911x_reg_read(pdata, TX_STATUS_FIFO);
  542. return result;
  543. }
  544. /* Fetches the next rx status */
  545. static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata)
  546. {
  547. unsigned int result =
  548. smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_;
  549. if (result != 0)
  550. result = smsc911x_reg_read(pdata, RX_STATUS_FIFO);
  551. return result;
  552. }
  553. #ifdef USE_PHY_WORK_AROUND
  554. static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata)
  555. {
  556. unsigned int tries;
  557. u32 wrsz;
  558. u32 rdsz;
  559. ulong bufp;
  560. for (tries = 0; tries < 10; tries++) {
  561. unsigned int txcmd_a;
  562. unsigned int txcmd_b;
  563. unsigned int status;
  564. unsigned int pktlength;
  565. unsigned int i;
  566. /* Zero-out rx packet memory */
  567. memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE);
  568. /* Write tx packet to 118 */
  569. txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16;
  570. txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
  571. txcmd_a |= MIN_PACKET_SIZE;
  572. txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE;
  573. smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a);
  574. smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b);
  575. bufp = (ulong)pdata->loopback_tx_pkt & (~0x3);
  576. wrsz = MIN_PACKET_SIZE + 3;
  577. wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3);
  578. wrsz >>= 2;
  579. pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
  580. /* Wait till transmit is done */
  581. i = 60;
  582. do {
  583. udelay(5);
  584. status = smsc911x_tx_get_txstatus(pdata);
  585. } while ((i--) && (!status));
  586. if (!status) {
  587. SMSC_WARN(pdata, hw,
  588. "Failed to transmit during loopback test");
  589. continue;
  590. }
  591. if (status & TX_STS_ES_) {
  592. SMSC_WARN(pdata, hw,
  593. "Transmit encountered errors during loopback test");
  594. continue;
  595. }
  596. /* Wait till receive is done */
  597. i = 60;
  598. do {
  599. udelay(5);
  600. status = smsc911x_rx_get_rxstatus(pdata);
  601. } while ((i--) && (!status));
  602. if (!status) {
  603. SMSC_WARN(pdata, hw,
  604. "Failed to receive during loopback test");
  605. continue;
  606. }
  607. if (status & RX_STS_ES_) {
  608. SMSC_WARN(pdata, hw,
  609. "Receive encountered errors during loopback test");
  610. continue;
  611. }
  612. pktlength = ((status & 0x3FFF0000UL) >> 16);
  613. bufp = (ulong)pdata->loopback_rx_pkt;
  614. rdsz = pktlength + 3;
  615. rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3);
  616. rdsz >>= 2;
  617. pdata->ops->rx_readfifo(pdata, (unsigned int *)bufp, rdsz);
  618. if (pktlength != (MIN_PACKET_SIZE + 4)) {
  619. SMSC_WARN(pdata, hw, "Unexpected packet size "
  620. "during loop back test, size=%d, will retry",
  621. pktlength);
  622. } else {
  623. unsigned int j;
  624. int mismatch = 0;
  625. for (j = 0; j < MIN_PACKET_SIZE; j++) {
  626. if (pdata->loopback_tx_pkt[j]
  627. != pdata->loopback_rx_pkt[j]) {
  628. mismatch = 1;
  629. break;
  630. }
  631. }
  632. if (!mismatch) {
  633. SMSC_TRACE(pdata, hw, "Successfully verified "
  634. "loopback packet");
  635. return 0;
  636. } else {
  637. SMSC_WARN(pdata, hw, "Data mismatch "
  638. "during loop back test, will retry");
  639. }
  640. }
  641. }
  642. return -EIO;
  643. }
  644. static int smsc911x_phy_reset(struct smsc911x_data *pdata)
  645. {
  646. struct phy_device *phy_dev = pdata->phy_dev;
  647. unsigned int temp;
  648. unsigned int i = 100000;
  649. BUG_ON(!phy_dev);
  650. BUG_ON(!phy_dev->bus);
  651. SMSC_TRACE(pdata, hw, "Performing PHY BCR Reset");
  652. smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, BMCR_RESET);
  653. do {
  654. msleep(1);
  655. temp = smsc911x_mii_read(phy_dev->bus, phy_dev->addr,
  656. MII_BMCR);
  657. } while ((i--) && (temp & BMCR_RESET));
  658. if (temp & BMCR_RESET) {
  659. SMSC_WARN(pdata, hw, "PHY reset failed to complete");
  660. return -EIO;
  661. }
  662. /* Extra delay required because the phy may not be completed with
  663. * its reset when BMCR_RESET is cleared. Specs say 256 uS is
  664. * enough delay but using 1ms here to be safe */
  665. msleep(1);
  666. return 0;
  667. }
  668. static int smsc911x_phy_loopbacktest(struct net_device *dev)
  669. {
  670. struct smsc911x_data *pdata = netdev_priv(dev);
  671. struct phy_device *phy_dev = pdata->phy_dev;
  672. int result = -EIO;
  673. unsigned int i, val;
  674. unsigned long flags;
  675. /* Initialise tx packet using broadcast destination address */
  676. memset(pdata->loopback_tx_pkt, 0xff, ETH_ALEN);
  677. /* Use incrementing source address */
  678. for (i = 6; i < 12; i++)
  679. pdata->loopback_tx_pkt[i] = (char)i;
  680. /* Set length type field */
  681. pdata->loopback_tx_pkt[12] = 0x00;
  682. pdata->loopback_tx_pkt[13] = 0x00;
  683. for (i = 14; i < MIN_PACKET_SIZE; i++)
  684. pdata->loopback_tx_pkt[i] = (char)i;
  685. val = smsc911x_reg_read(pdata, HW_CFG);
  686. val &= HW_CFG_TX_FIF_SZ_;
  687. val |= HW_CFG_SF_;
  688. smsc911x_reg_write(pdata, HW_CFG, val);
  689. smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
  690. smsc911x_reg_write(pdata, RX_CFG,
  691. (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8);
  692. for (i = 0; i < 10; i++) {
  693. /* Set PHY to 10/FD, no ANEG, and loopback mode */
  694. smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR,
  695. BMCR_LOOPBACK | BMCR_FULLDPLX);
  696. /* Enable MAC tx/rx, FD */
  697. spin_lock_irqsave(&pdata->mac_lock, flags);
  698. smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_
  699. | MAC_CR_TXEN_ | MAC_CR_RXEN_);
  700. spin_unlock_irqrestore(&pdata->mac_lock, flags);
  701. if (smsc911x_phy_check_loopbackpkt(pdata) == 0) {
  702. result = 0;
  703. break;
  704. }
  705. pdata->resetcount++;
  706. /* Disable MAC rx */
  707. spin_lock_irqsave(&pdata->mac_lock, flags);
  708. smsc911x_mac_write(pdata, MAC_CR, 0);
  709. spin_unlock_irqrestore(&pdata->mac_lock, flags);
  710. smsc911x_phy_reset(pdata);
  711. }
  712. /* Disable MAC */
  713. spin_lock_irqsave(&pdata->mac_lock, flags);
  714. smsc911x_mac_write(pdata, MAC_CR, 0);
  715. spin_unlock_irqrestore(&pdata->mac_lock, flags);
  716. /* Cancel PHY loopback mode */
  717. smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, 0);
  718. smsc911x_reg_write(pdata, TX_CFG, 0);
  719. smsc911x_reg_write(pdata, RX_CFG, 0);
  720. return result;
  721. }
  722. #endif /* USE_PHY_WORK_AROUND */
  723. static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata)
  724. {
  725. struct phy_device *phy_dev = pdata->phy_dev;
  726. u32 afc = smsc911x_reg_read(pdata, AFC_CFG);
  727. u32 flow;
  728. unsigned long flags;
  729. if (phy_dev->duplex == DUPLEX_FULL) {
  730. u16 lcladv = phy_read(phy_dev, MII_ADVERTISE);
  731. u16 rmtadv = phy_read(phy_dev, MII_LPA);
  732. u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
  733. if (cap & FLOW_CTRL_RX)
  734. flow = 0xFFFF0002;
  735. else
  736. flow = 0;
  737. if (cap & FLOW_CTRL_TX)
  738. afc |= 0xF;
  739. else
  740. afc &= ~0xF;
  741. SMSC_TRACE(pdata, hw, "rx pause %s, tx pause %s",
  742. (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
  743. (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
  744. } else {
  745. SMSC_TRACE(pdata, hw, "half duplex");
  746. flow = 0;
  747. afc |= 0xF;
  748. }
  749. spin_lock_irqsave(&pdata->mac_lock, flags);
  750. smsc911x_mac_write(pdata, FLOW, flow);
  751. spin_unlock_irqrestore(&pdata->mac_lock, flags);
  752. smsc911x_reg_write(pdata, AFC_CFG, afc);
  753. }
  754. /* Update link mode if anything has changed. Called periodically when the
  755. * PHY is in polling mode, even if nothing has changed. */
  756. static void smsc911x_phy_adjust_link(struct net_device *dev)
  757. {
  758. struct smsc911x_data *pdata = netdev_priv(dev);
  759. struct phy_device *phy_dev = pdata->phy_dev;
  760. unsigned long flags;
  761. int carrier;
  762. if (phy_dev->duplex != pdata->last_duplex) {
  763. unsigned int mac_cr;
  764. SMSC_TRACE(pdata, hw, "duplex state has changed");
  765. spin_lock_irqsave(&pdata->mac_lock, flags);
  766. mac_cr = smsc911x_mac_read(pdata, MAC_CR);
  767. if (phy_dev->duplex) {
  768. SMSC_TRACE(pdata, hw,
  769. "configuring for full duplex mode");
  770. mac_cr |= MAC_CR_FDPX_;
  771. } else {
  772. SMSC_TRACE(pdata, hw,
  773. "configuring for half duplex mode");
  774. mac_cr &= ~MAC_CR_FDPX_;
  775. }
  776. smsc911x_mac_write(pdata, MAC_CR, mac_cr);
  777. spin_unlock_irqrestore(&pdata->mac_lock, flags);
  778. smsc911x_phy_update_flowcontrol(pdata);
  779. pdata->last_duplex = phy_dev->duplex;
  780. }
  781. carrier = netif_carrier_ok(dev);
  782. if (carrier != pdata->last_carrier) {
  783. SMSC_TRACE(pdata, hw, "carrier state has changed");
  784. if (carrier) {
  785. SMSC_TRACE(pdata, hw, "configuring for carrier OK");
  786. if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) &&
  787. (!pdata->using_extphy)) {
  788. /* Restore original GPIO configuration */
  789. pdata->gpio_setting = pdata->gpio_orig_setting;
  790. smsc911x_reg_write(pdata, GPIO_CFG,
  791. pdata->gpio_setting);
  792. }
  793. } else {
  794. SMSC_TRACE(pdata, hw, "configuring for no carrier");
  795. /* Check global setting that LED1
  796. * usage is 10/100 indicator */
  797. pdata->gpio_setting = smsc911x_reg_read(pdata,
  798. GPIO_CFG);
  799. if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_) &&
  800. (!pdata->using_extphy)) {
  801. /* Force 10/100 LED off, after saving
  802. * original GPIO configuration */
  803. pdata->gpio_orig_setting = pdata->gpio_setting;
  804. pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_;
  805. pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_
  806. | GPIO_CFG_GPIODIR0_
  807. | GPIO_CFG_GPIOD0_);
  808. smsc911x_reg_write(pdata, GPIO_CFG,
  809. pdata->gpio_setting);
  810. }
  811. }
  812. pdata->last_carrier = carrier;
  813. }
  814. }
  815. static int smsc911x_mii_probe(struct net_device *dev)
  816. {
  817. struct smsc911x_data *pdata = netdev_priv(dev);
  818. struct phy_device *phydev = NULL;
  819. int ret;
  820. /* find the first phy */
  821. phydev = phy_find_first(pdata->mii_bus);
  822. if (!phydev) {
  823. netdev_err(dev, "no PHY found\n");
  824. return -ENODEV;
  825. }
  826. SMSC_TRACE(pdata, probe, "PHY: addr %d, phy_id 0x%08X",
  827. phydev->addr, phydev->phy_id);
  828. ret = phy_connect_direct(dev, phydev,
  829. &smsc911x_phy_adjust_link, 0,
  830. pdata->config.phy_interface);
  831. if (ret) {
  832. netdev_err(dev, "Could not attach to PHY\n");
  833. return ret;
  834. }
  835. netdev_info(dev,
  836. "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
  837. phydev->drv->name, dev_name(&phydev->dev), phydev->irq);
  838. /* mask with MAC supported features */
  839. phydev->supported &= (PHY_BASIC_FEATURES | SUPPORTED_Pause |
  840. SUPPORTED_Asym_Pause);
  841. phydev->advertising = phydev->supported;
  842. pdata->phy_dev = phydev;
  843. pdata->last_duplex = -1;
  844. pdata->last_carrier = -1;
  845. #ifdef USE_PHY_WORK_AROUND
  846. if (smsc911x_phy_loopbacktest(dev) < 0) {
  847. SMSC_WARN(pdata, hw, "Failed Loop Back Test");
  848. return -ENODEV;
  849. }
  850. SMSC_TRACE(pdata, hw, "Passed Loop Back Test");
  851. #endif /* USE_PHY_WORK_AROUND */
  852. SMSC_TRACE(pdata, hw, "phy initialised successfully");
  853. return 0;
  854. }
  855. static int __devinit smsc911x_mii_init(struct platform_device *pdev,
  856. struct net_device *dev)
  857. {
  858. struct smsc911x_data *pdata = netdev_priv(dev);
  859. int err = -ENXIO, i;
  860. pdata->mii_bus = mdiobus_alloc();
  861. if (!pdata->mii_bus) {
  862. err = -ENOMEM;
  863. goto err_out_1;
  864. }
  865. pdata->mii_bus->name = SMSC_MDIONAME;
  866. snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
  867. pdev->name, pdev->id);
  868. pdata->mii_bus->priv = pdata;
  869. pdata->mii_bus->read = smsc911x_mii_read;
  870. pdata->mii_bus->write = smsc911x_mii_write;
  871. pdata->mii_bus->irq = pdata->phy_irq;
  872. for (i = 0; i < PHY_MAX_ADDR; ++i)
  873. pdata->mii_bus->irq[i] = PHY_POLL;
  874. pdata->mii_bus->parent = &pdev->dev;
  875. switch (pdata->idrev & 0xFFFF0000) {
  876. case 0x01170000:
  877. case 0x01150000:
  878. case 0x117A0000:
  879. case 0x115A0000:
  880. /* External PHY supported, try to autodetect */
  881. smsc911x_phy_initialise_external(pdata);
  882. break;
  883. default:
  884. SMSC_TRACE(pdata, hw, "External PHY is not supported, "
  885. "using internal PHY");
  886. pdata->using_extphy = 0;
  887. break;
  888. }
  889. if (!pdata->using_extphy) {
  890. /* Mask all PHYs except ID 1 (internal) */
  891. pdata->mii_bus->phy_mask = ~(1 << 1);
  892. }
  893. if (mdiobus_register(pdata->mii_bus)) {
  894. SMSC_WARN(pdata, probe, "Error registering mii bus");
  895. goto err_out_free_bus_2;
  896. }
  897. if (smsc911x_mii_probe(dev) < 0) {
  898. SMSC_WARN(pdata, probe, "Error registering mii bus");
  899. goto err_out_unregister_bus_3;
  900. }
  901. return 0;
  902. err_out_unregister_bus_3:
  903. mdiobus_unregister(pdata->mii_bus);
  904. err_out_free_bus_2:
  905. mdiobus_free(pdata->mii_bus);
  906. err_out_1:
  907. return err;
  908. }
  909. /* Gets the number of tx statuses in the fifo */
  910. static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata)
  911. {
  912. return (smsc911x_reg_read(pdata, TX_FIFO_INF)
  913. & TX_FIFO_INF_TSUSED_) >> 16;
  914. }
  915. /* Reads tx statuses and increments counters where necessary */
  916. static void smsc911x_tx_update_txcounters(struct net_device *dev)
  917. {
  918. struct smsc911x_data *pdata = netdev_priv(dev);
  919. unsigned int tx_stat;
  920. while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) {
  921. if (unlikely(tx_stat & 0x80000000)) {
  922. /* In this driver the packet tag is used as the packet
  923. * length. Since a packet length can never reach the
  924. * size of 0x8000, this bit is reserved. It is worth
  925. * noting that the "reserved bit" in the warning above
  926. * does not reference a hardware defined reserved bit
  927. * but rather a driver defined one.
  928. */
  929. SMSC_WARN(pdata, hw, "Packet tag reserved bit is high");
  930. } else {
  931. if (unlikely(tx_stat & TX_STS_ES_)) {
  932. dev->stats.tx_errors++;
  933. } else {
  934. dev->stats.tx_packets++;
  935. dev->stats.tx_bytes += (tx_stat >> 16);
  936. }
  937. if (unlikely(tx_stat & TX_STS_EXCESS_COL_)) {
  938. dev->stats.collisions += 16;
  939. dev->stats.tx_aborted_errors += 1;
  940. } else {
  941. dev->stats.collisions +=
  942. ((tx_stat >> 3) & 0xF);
  943. }
  944. if (unlikely(tx_stat & TX_STS_LOST_CARRIER_))
  945. dev->stats.tx_carrier_errors += 1;
  946. if (unlikely(tx_stat & TX_STS_LATE_COL_)) {
  947. dev->stats.collisions++;
  948. dev->stats.tx_aborted_errors++;
  949. }
  950. }
  951. }
  952. }
  953. /* Increments the Rx error counters */
  954. static void
  955. smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat)
  956. {
  957. int crc_err = 0;
  958. if (unlikely(rxstat & RX_STS_ES_)) {
  959. dev->stats.rx_errors++;
  960. if (unlikely(rxstat & RX_STS_CRC_ERR_)) {
  961. dev->stats.rx_crc_errors++;
  962. crc_err = 1;
  963. }
  964. }
  965. if (likely(!crc_err)) {
  966. if (unlikely((rxstat & RX_STS_FRAME_TYPE_) &&
  967. (rxstat & RX_STS_LENGTH_ERR_)))
  968. dev->stats.rx_length_errors++;
  969. if (rxstat & RX_STS_MCAST_)
  970. dev->stats.multicast++;
  971. }
  972. }
  973. /* Quickly dumps bad packets */
  974. static void
  975. smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktbytes)
  976. {
  977. unsigned int pktwords = (pktbytes + NET_IP_ALIGN + 3) >> 2;
  978. if (likely(pktwords >= 4)) {
  979. unsigned int timeout = 500;
  980. unsigned int val;
  981. smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_);
  982. do {
  983. udelay(1);
  984. val = smsc911x_reg_read(pdata, RX_DP_CTRL);
  985. } while ((val & RX_DP_CTRL_RX_FFWD_) && --timeout);
  986. if (unlikely(timeout == 0))
  987. SMSC_WARN(pdata, hw, "Timed out waiting for "
  988. "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val);
  989. } else {
  990. unsigned int temp;
  991. while (pktwords--)
  992. temp = smsc911x_reg_read(pdata, RX_DATA_FIFO);
  993. }
  994. }
  995. /* NAPI poll function */
  996. static int smsc911x_poll(struct napi_struct *napi, int budget)
  997. {
  998. struct smsc911x_data *pdata =
  999. container_of(napi, struct smsc911x_data, napi);
  1000. struct net_device *dev = pdata->dev;
  1001. int npackets = 0;
  1002. while (npackets < budget) {
  1003. unsigned int pktlength;
  1004. unsigned int pktwords;
  1005. struct sk_buff *skb;
  1006. unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata);
  1007. if (!rxstat) {
  1008. unsigned int temp;
  1009. /* We processed all packets available. Tell NAPI it can
  1010. * stop polling then re-enable rx interrupts */
  1011. smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_);
  1012. napi_complete(napi);
  1013. temp = smsc911x_reg_read(pdata, INT_EN);
  1014. temp |= INT_EN_RSFL_EN_;
  1015. smsc911x_reg_write(pdata, INT_EN, temp);
  1016. break;
  1017. }
  1018. /* Count packet for NAPI scheduling, even if it has an error.
  1019. * Error packets still require cycles to discard */
  1020. npackets++;
  1021. pktlength = ((rxstat & 0x3FFF0000) >> 16);
  1022. pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2;
  1023. smsc911x_rx_counterrors(dev, rxstat);
  1024. if (unlikely(rxstat & RX_STS_ES_)) {
  1025. SMSC_WARN(pdata, rx_err,
  1026. "Discarding packet with error bit set");
  1027. /* Packet has an error, discard it and continue with
  1028. * the next */
  1029. smsc911x_rx_fastforward(pdata, pktwords);
  1030. dev->stats.rx_dropped++;
  1031. continue;
  1032. }
  1033. skb = netdev_alloc_skb(dev, pktlength + NET_IP_ALIGN);
  1034. if (unlikely(!skb)) {
  1035. SMSC_WARN(pdata, rx_err,
  1036. "Unable to allocate skb for rx packet");
  1037. /* Drop the packet and stop this polling iteration */
  1038. smsc911x_rx_fastforward(pdata, pktwords);
  1039. dev->stats.rx_dropped++;
  1040. break;
  1041. }
  1042. skb->data = skb->head;
  1043. skb_reset_tail_pointer(skb);
  1044. /* Align IP on 16B boundary */
  1045. skb_reserve(skb, NET_IP_ALIGN);
  1046. skb_put(skb, pktlength - 4);
  1047. pdata->ops->rx_readfifo(pdata,
  1048. (unsigned int *)skb->head, pktwords);
  1049. skb->protocol = eth_type_trans(skb, dev);
  1050. skb_checksum_none_assert(skb);
  1051. netif_receive_skb(skb);
  1052. /* Update counters */
  1053. dev->stats.rx_packets++;
  1054. dev->stats.rx_bytes += (pktlength - 4);
  1055. }
  1056. /* Return total received packets */
  1057. return npackets;
  1058. }
  1059. /* Returns hash bit number for given MAC address
  1060. * Example:
  1061. * 01 00 5E 00 00 01 -> returns bit number 31 */
  1062. static unsigned int smsc911x_hash(char addr[ETH_ALEN])
  1063. {
  1064. return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
  1065. }
  1066. static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata)
  1067. {
  1068. /* Performs the multicast & mac_cr update. This is called when
  1069. * safe on the current hardware, and with the mac_lock held */
  1070. unsigned int mac_cr;
  1071. SMSC_ASSERT_MAC_LOCK(pdata);
  1072. mac_cr = smsc911x_mac_read(pdata, MAC_CR);
  1073. mac_cr |= pdata->set_bits_mask;
  1074. mac_cr &= ~(pdata->clear_bits_mask);
  1075. smsc911x_mac_write(pdata, MAC_CR, mac_cr);
  1076. smsc911x_mac_write(pdata, HASHH, pdata->hashhi);
  1077. smsc911x_mac_write(pdata, HASHL, pdata->hashlo);
  1078. SMSC_TRACE(pdata, hw, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
  1079. mac_cr, pdata->hashhi, pdata->hashlo);
  1080. }
  1081. static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata)
  1082. {
  1083. unsigned int mac_cr;
  1084. /* This function is only called for older LAN911x devices
  1085. * (revA or revB), where MAC_CR, HASHH and HASHL should not
  1086. * be modified during Rx - newer devices immediately update the
  1087. * registers.
  1088. *
  1089. * This is called from interrupt context */
  1090. spin_lock(&pdata->mac_lock);
  1091. /* Check Rx has stopped */
  1092. if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_)
  1093. SMSC_WARN(pdata, drv, "Rx not stopped");
  1094. /* Perform the update - safe to do now Rx has stopped */
  1095. smsc911x_rx_multicast_update(pdata);
  1096. /* Re-enable Rx */
  1097. mac_cr = smsc911x_mac_read(pdata, MAC_CR);
  1098. mac_cr |= MAC_CR_RXEN_;
  1099. smsc911x_mac_write(pdata, MAC_CR, mac_cr);
  1100. pdata->multicast_update_pending = 0;
  1101. spin_unlock(&pdata->mac_lock);
  1102. }
  1103. static int smsc911x_phy_disable_energy_detect(struct smsc911x_data *pdata)
  1104. {
  1105. int rc = 0;
  1106. if (!pdata->phy_dev)
  1107. return rc;
  1108. rc = phy_read(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS);
  1109. if (rc < 0) {
  1110. SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
  1111. return rc;
  1112. }
  1113. /*
  1114. * If energy is detected the PHY is already awake so is not necessary
  1115. * to disable the energy detect power-down mode.
  1116. */
  1117. if ((rc & MII_LAN83C185_EDPWRDOWN) &&
  1118. !(rc & MII_LAN83C185_ENERGYON)) {
  1119. /* Disable energy detect mode for this SMSC Transceivers */
  1120. rc = phy_write(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS,
  1121. rc & (~MII_LAN83C185_EDPWRDOWN));
  1122. if (rc < 0) {
  1123. SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
  1124. return rc;
  1125. }
  1126. mdelay(1);
  1127. }
  1128. return 0;
  1129. }
  1130. static int smsc911x_phy_enable_energy_detect(struct smsc911x_data *pdata)
  1131. {
  1132. int rc = 0;
  1133. if (!pdata->phy_dev)
  1134. return rc;
  1135. rc = phy_read(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS);
  1136. if (rc < 0) {
  1137. SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
  1138. return rc;
  1139. }
  1140. /* Only enable if energy detect mode is already disabled */
  1141. if (!(rc & MII_LAN83C185_EDPWRDOWN)) {
  1142. mdelay(100);
  1143. /* Enable energy detect mode for this SMSC Transceivers */
  1144. rc = phy_write(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS,
  1145. rc | MII_LAN83C185_EDPWRDOWN);
  1146. if (rc < 0) {
  1147. SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
  1148. return rc;
  1149. }
  1150. mdelay(1);
  1151. }
  1152. return 0;
  1153. }
  1154. static int smsc911x_soft_reset(struct smsc911x_data *pdata)
  1155. {
  1156. unsigned int timeout;
  1157. unsigned int temp;
  1158. int ret;
  1159. /*
  1160. * LAN9210/LAN9211/LAN9220/LAN9221 chips have an internal PHY that
  1161. * are initialized in a Energy Detect Power-Down mode that prevents
  1162. * the MAC chip to be software reseted. So we have to wakeup the PHY
  1163. * before.
  1164. */
  1165. if (pdata->generation == 4) {
  1166. ret = smsc911x_phy_disable_energy_detect(pdata);
  1167. if (ret) {
  1168. SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip");
  1169. return ret;
  1170. }
  1171. }
  1172. /* Reset the LAN911x */
  1173. smsc911x_reg_write(pdata, HW_CFG, HW_CFG_SRST_);
  1174. timeout = 10;
  1175. do {
  1176. udelay(10);
  1177. temp = smsc911x_reg_read(pdata, HW_CFG);
  1178. } while ((--timeout) && (temp & HW_CFG_SRST_));
  1179. if (unlikely(temp & HW_CFG_SRST_)) {
  1180. SMSC_WARN(pdata, drv, "Failed to complete reset");
  1181. return -EIO;
  1182. }
  1183. if (pdata->generation == 4) {
  1184. ret = smsc911x_phy_enable_energy_detect(pdata);
  1185. if (ret) {
  1186. SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip");
  1187. return ret;
  1188. }
  1189. }
  1190. return 0;
  1191. }
  1192. /* Sets the device MAC address to dev_addr, called with mac_lock held */
  1193. static void
  1194. smsc911x_set_hw_mac_address(struct smsc911x_data *pdata, u8 dev_addr[6])
  1195. {
  1196. u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4];
  1197. u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
  1198. (dev_addr[1] << 8) | dev_addr[0];
  1199. SMSC_ASSERT_MAC_LOCK(pdata);
  1200. smsc911x_mac_write(pdata, ADDRH, mac_high16);
  1201. smsc911x_mac_write(pdata, ADDRL, mac_low32);
  1202. }
  1203. static int smsc911x_open(struct net_device *dev)
  1204. {
  1205. struct smsc911x_data *pdata = netdev_priv(dev);
  1206. unsigned int timeout;
  1207. unsigned int temp;
  1208. unsigned int intcfg;
  1209. /* if the phy is not yet registered, retry later*/
  1210. if (!pdata->phy_dev) {
  1211. SMSC_WARN(pdata, hw, "phy_dev is NULL");
  1212. return -EAGAIN;
  1213. }
  1214. if (!is_valid_ether_addr(dev->dev_addr)) {
  1215. SMSC_WARN(pdata, hw, "dev_addr is not a valid MAC address");
  1216. return -EADDRNOTAVAIL;
  1217. }
  1218. /* Reset the LAN911x */
  1219. if (smsc911x_soft_reset(pdata)) {
  1220. SMSC_WARN(pdata, hw, "soft reset failed");
  1221. return -EIO;
  1222. }
  1223. smsc911x_reg_write(pdata, HW_CFG, 0x00050000);
  1224. smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740);
  1225. /* Increase the legal frame size of VLAN tagged frames to 1522 bytes */
  1226. spin_lock_irq(&pdata->mac_lock);
  1227. smsc911x_mac_write(pdata, VLAN1, ETH_P_8021Q);
  1228. spin_unlock_irq(&pdata->mac_lock);
  1229. /* Make sure EEPROM has finished loading before setting GPIO_CFG */
  1230. timeout = 50;
  1231. while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) &&
  1232. --timeout) {
  1233. udelay(10);
  1234. }
  1235. if (unlikely(timeout == 0))
  1236. SMSC_WARN(pdata, ifup,
  1237. "Timed out waiting for EEPROM busy bit to clear");
  1238. smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000);
  1239. /* The soft reset above cleared the device's MAC address,
  1240. * restore it from local copy (set in probe) */
  1241. spin_lock_irq(&pdata->mac_lock);
  1242. smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
  1243. spin_unlock_irq(&pdata->mac_lock);
  1244. /* Initialise irqs, but leave all sources disabled */
  1245. smsc911x_reg_write(pdata, INT_EN, 0);
  1246. smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
  1247. /* Set interrupt deassertion to 100uS */
  1248. intcfg = ((10 << 24) | INT_CFG_IRQ_EN_);
  1249. if (pdata->config.irq_polarity) {
  1250. SMSC_TRACE(pdata, ifup, "irq polarity: active high");
  1251. intcfg |= INT_CFG_IRQ_POL_;
  1252. } else {
  1253. SMSC_TRACE(pdata, ifup, "irq polarity: active low");
  1254. }
  1255. if (pdata->config.irq_type) {
  1256. SMSC_TRACE(pdata, ifup, "irq type: push-pull");
  1257. intcfg |= INT_CFG_IRQ_TYPE_;
  1258. } else {
  1259. SMSC_TRACE(pdata, ifup, "irq type: open drain");
  1260. }
  1261. smsc911x_reg_write(pdata, INT_CFG, intcfg);
  1262. SMSC_TRACE(pdata, ifup, "Testing irq handler using IRQ %d", dev->irq);
  1263. pdata->software_irq_signal = 0;
  1264. smp_wmb();
  1265. temp = smsc911x_reg_read(pdata, INT_EN);
  1266. temp |= INT_EN_SW_INT_EN_;
  1267. smsc911x_reg_write(pdata, INT_EN, temp);
  1268. timeout = 1000;
  1269. while (timeout--) {
  1270. if (pdata->software_irq_signal)
  1271. break;
  1272. msleep(1);
  1273. }
  1274. if (!pdata->software_irq_signal) {
  1275. netdev_warn(dev, "ISR failed signaling test (IRQ %d)\n",
  1276. dev->irq);
  1277. return -ENODEV;
  1278. }
  1279. SMSC_TRACE(pdata, ifup, "IRQ handler passed test using IRQ %d",
  1280. dev->irq);
  1281. netdev_info(dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
  1282. (unsigned long)pdata->ioaddr, dev->irq);
  1283. /* Reset the last known duplex and carrier */
  1284. pdata->last_duplex = -1;
  1285. pdata->last_carrier = -1;
  1286. /* Bring the PHY up */
  1287. phy_start(pdata->phy_dev);
  1288. temp = smsc911x_reg_read(pdata, HW_CFG);
  1289. /* Preserve TX FIFO size and external PHY configuration */
  1290. temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF);
  1291. temp |= HW_CFG_SF_;
  1292. smsc911x_reg_write(pdata, HW_CFG, temp);
  1293. temp = smsc911x_reg_read(pdata, FIFO_INT);
  1294. temp |= FIFO_INT_TX_AVAIL_LEVEL_;
  1295. temp &= ~(FIFO_INT_RX_STS_LEVEL_);
  1296. smsc911x_reg_write(pdata, FIFO_INT, temp);
  1297. /* set RX Data offset to 2 bytes for alignment */
  1298. smsc911x_reg_write(pdata, RX_CFG, (2 << 8));
  1299. /* enable NAPI polling before enabling RX interrupts */
  1300. napi_enable(&pdata->napi);
  1301. temp = smsc911x_reg_read(pdata, INT_EN);
  1302. temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_);
  1303. smsc911x_reg_write(pdata, INT_EN, temp);
  1304. spin_lock_irq(&pdata->mac_lock);
  1305. temp = smsc911x_mac_read(pdata, MAC_CR);
  1306. temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
  1307. smsc911x_mac_write(pdata, MAC_CR, temp);
  1308. spin_unlock_irq(&pdata->mac_lock);
  1309. smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
  1310. netif_start_queue(dev);
  1311. return 0;
  1312. }
  1313. /* Entry point for stopping the interface */
  1314. static int smsc911x_stop(struct net_device *dev)
  1315. {
  1316. struct smsc911x_data *pdata = netdev_priv(dev);
  1317. unsigned int temp;
  1318. /* Disable all device interrupts */
  1319. temp = smsc911x_reg_read(pdata, INT_CFG);
  1320. temp &= ~INT_CFG_IRQ_EN_;
  1321. smsc911x_reg_write(pdata, INT_CFG, temp);
  1322. /* Stop Tx and Rx polling */
  1323. netif_stop_queue(dev);
  1324. napi_disable(&pdata->napi);
  1325. /* At this point all Rx and Tx activity is stopped */
  1326. dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
  1327. smsc911x_tx_update_txcounters(dev);
  1328. /* Bring the PHY down */
  1329. if (pdata->phy_dev)
  1330. phy_stop(pdata->phy_dev);
  1331. SMSC_TRACE(pdata, ifdown, "Interface stopped");
  1332. return 0;
  1333. }
  1334. /* Entry point for transmitting a packet */
  1335. static int smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
  1336. {
  1337. struct smsc911x_data *pdata = netdev_priv(dev);
  1338. unsigned int freespace;
  1339. unsigned int tx_cmd_a;
  1340. unsigned int tx_cmd_b;
  1341. unsigned int temp;
  1342. u32 wrsz;
  1343. ulong bufp;
  1344. freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_;
  1345. if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD))
  1346. SMSC_WARN(pdata, tx_err,
  1347. "Tx data fifo low, space available: %d", freespace);
  1348. /* Word alignment adjustment */
  1349. tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16;
  1350. tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
  1351. tx_cmd_a |= (unsigned int)skb->len;
  1352. tx_cmd_b = ((unsigned int)skb->len) << 16;
  1353. tx_cmd_b |= (unsigned int)skb->len;
  1354. smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a);
  1355. smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b);
  1356. bufp = (ulong)skb->data & (~0x3);
  1357. wrsz = (u32)skb->len + 3;
  1358. wrsz += (u32)((ulong)skb->data & 0x3);
  1359. wrsz >>= 2;
  1360. pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
  1361. freespace -= (skb->len + 32);
  1362. skb_tx_timestamp(skb);
  1363. dev_kfree_skb(skb);
  1364. if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30))
  1365. smsc911x_tx_update_txcounters(dev);
  1366. if (freespace < TX_FIFO_LOW_THRESHOLD) {
  1367. netif_stop_queue(dev);
  1368. temp = smsc911x_reg_read(pdata, FIFO_INT);
  1369. temp &= 0x00FFFFFF;
  1370. temp |= 0x32000000;
  1371. smsc911x_reg_write(pdata, FIFO_INT, temp);
  1372. }
  1373. return NETDEV_TX_OK;
  1374. }
  1375. /* Entry point for getting status counters */
  1376. static struct net_device_stats *smsc911x_get_stats(struct net_device *dev)
  1377. {
  1378. struct smsc911x_data *pdata = netdev_priv(dev);
  1379. smsc911x_tx_update_txcounters(dev);
  1380. dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
  1381. return &dev->stats;
  1382. }
  1383. /* Entry point for setting addressing modes */
  1384. static void smsc911x_set_multicast_list(struct net_device *dev)
  1385. {
  1386. struct smsc911x_data *pdata = netdev_priv(dev);
  1387. unsigned long flags;
  1388. if (dev->flags & IFF_PROMISC) {
  1389. /* Enabling promiscuous mode */
  1390. pdata->set_bits_mask = MAC_CR_PRMS_;
  1391. pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
  1392. pdata->hashhi = 0;
  1393. pdata->hashlo = 0;
  1394. } else if (dev->flags & IFF_ALLMULTI) {
  1395. /* Enabling all multicast mode */
  1396. pdata->set_bits_mask = MAC_CR_MCPAS_;
  1397. pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_);
  1398. pdata->hashhi = 0;
  1399. pdata->hashlo = 0;
  1400. } else if (!netdev_mc_empty(dev)) {
  1401. /* Enabling specific multicast addresses */
  1402. unsigned int hash_high = 0;
  1403. unsigned int hash_low = 0;
  1404. struct netdev_hw_addr *ha;
  1405. pdata->set_bits_mask = MAC_CR_HPFILT_;
  1406. pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_);
  1407. netdev_for_each_mc_addr(ha, dev) {
  1408. unsigned int bitnum = smsc911x_hash(ha->addr);
  1409. unsigned int mask = 0x01 << (bitnum & 0x1F);
  1410. if (bitnum & 0x20)
  1411. hash_high |= mask;
  1412. else
  1413. hash_low |= mask;
  1414. }
  1415. pdata->hashhi = hash_high;
  1416. pdata->hashlo = hash_low;
  1417. } else {
  1418. /* Enabling local MAC address only */
  1419. pdata->set_bits_mask = 0;
  1420. pdata->clear_bits_mask =
  1421. (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
  1422. pdata->hashhi = 0;
  1423. pdata->hashlo = 0;
  1424. }
  1425. spin_lock_irqsave(&pdata->mac_lock, flags);
  1426. if (pdata->generation <= 1) {
  1427. /* Older hardware revision - cannot change these flags while
  1428. * receiving data */
  1429. if (!pdata->multicast_update_pending) {
  1430. unsigned int temp;
  1431. SMSC_TRACE(pdata, hw, "scheduling mcast update");
  1432. pdata->multicast_update_pending = 1;
  1433. /* Request the hardware to stop, then perform the
  1434. * update when we get an RX_STOP interrupt */
  1435. temp = smsc911x_mac_read(pdata, MAC_CR);
  1436. temp &= ~(MAC_CR_RXEN_);
  1437. smsc911x_mac_write(pdata, MAC_CR, temp);
  1438. } else {
  1439. /* There is another update pending, this should now
  1440. * use the newer values */
  1441. }
  1442. } else {
  1443. /* Newer hardware revision - can write immediately */
  1444. smsc911x_rx_multicast_update(pdata);
  1445. }
  1446. spin_unlock_irqrestore(&pdata->mac_lock, flags);
  1447. }
  1448. static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id)
  1449. {
  1450. struct net_device *dev = dev_id;
  1451. struct smsc911x_data *pdata = netdev_priv(dev);
  1452. u32 intsts = smsc911x_reg_read(pdata, INT_STS);
  1453. u32 inten = smsc911x_reg_read(pdata, INT_EN);
  1454. int serviced = IRQ_NONE;
  1455. u32 temp;
  1456. if (unlikely(intsts & inten & INT_STS_SW_INT_)) {
  1457. temp = smsc911x_reg_read(pdata, INT_EN);
  1458. temp &= (~INT_EN_SW_INT_EN_);
  1459. smsc911x_reg_write(pdata, INT_EN, temp);
  1460. smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_);
  1461. pdata->software_irq_signal = 1;
  1462. smp_wmb();
  1463. serviced = IRQ_HANDLED;
  1464. }
  1465. if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) {
  1466. /* Called when there is a multicast update scheduled and
  1467. * it is now safe to complete the update */
  1468. SMSC_TRACE(pdata, intr, "RX Stop interrupt");
  1469. smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_);
  1470. if (pdata->multicast_update_pending)
  1471. smsc911x_rx_multicast_update_workaround(pdata);
  1472. serviced = IRQ_HANDLED;
  1473. }
  1474. if (intsts & inten & INT_STS_TDFA_) {
  1475. temp = smsc911x_reg_read(pdata, FIFO_INT);
  1476. temp |= FIFO_INT_TX_AVAIL_LEVEL_;
  1477. smsc911x_reg_write(pdata, FIFO_INT, temp);
  1478. smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_);
  1479. netif_wake_queue(dev);
  1480. serviced = IRQ_HANDLED;
  1481. }
  1482. if (unlikely(intsts & inten & INT_STS_RXE_)) {
  1483. SMSC_TRACE(pdata, intr, "RX Error interrupt");
  1484. smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_);
  1485. serviced = IRQ_HANDLED;
  1486. }
  1487. if (likely(intsts & inten & INT_STS_RSFL_)) {
  1488. if (likely(napi_schedule_prep(&pdata->napi))) {
  1489. /* Disable Rx interrupts */
  1490. temp = smsc911x_reg_read(pdata, INT_EN);
  1491. temp &= (~INT_EN_RSFL_EN_);
  1492. smsc911x_reg_write(pdata, INT_EN, temp);
  1493. /* Schedule a NAPI poll */
  1494. __napi_schedule(&pdata->napi);
  1495. } else {
  1496. SMSC_WARN(pdata, rx_err, "napi_schedule_prep failed");
  1497. }
  1498. serviced = IRQ_HANDLED;
  1499. }
  1500. return serviced;
  1501. }
  1502. #ifdef CONFIG_NET_POLL_CONTROLLER
  1503. static void smsc911x_poll_controller(struct net_device *dev)
  1504. {
  1505. disable_irq(dev->irq);
  1506. smsc911x_irqhandler(0, dev);
  1507. enable_irq(dev->irq);
  1508. }
  1509. #endif /* CONFIG_NET_POLL_CONTROLLER */
  1510. static int smsc911x_set_mac_address(struct net_device *dev, void *p)
  1511. {
  1512. struct smsc911x_data *pdata = netdev_priv(dev);
  1513. struct sockaddr *addr = p;
  1514. /* On older hardware revisions we cannot change the mac address
  1515. * registers while receiving data. Newer devices can safely change
  1516. * this at any time. */
  1517. if (pdata->generation <= 1 && netif_running(dev))
  1518. return -EBUSY;
  1519. if (!is_valid_ether_addr(addr->sa_data))
  1520. return -EADDRNOTAVAIL;
  1521. dev->addr_assign_type &= ~NET_ADDR_RANDOM;
  1522. memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
  1523. spin_lock_irq(&pdata->mac_lock);
  1524. smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
  1525. spin_unlock_irq(&pdata->mac_lock);
  1526. netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
  1527. return 0;
  1528. }
  1529. /* Standard ioctls for mii-tool */
  1530. static int smsc911x_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  1531. {
  1532. struct smsc911x_data *pdata = netdev_priv(dev);
  1533. if (!netif_running(dev) || !pdata->phy_dev)
  1534. return -EINVAL;
  1535. return phy_mii_ioctl(pdata->phy_dev, ifr, cmd);
  1536. }
  1537. static int
  1538. smsc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
  1539. {
  1540. struct smsc911x_data *pdata = netdev_priv(dev);
  1541. cmd->maxtxpkt = 1;
  1542. cmd->maxrxpkt = 1;
  1543. return phy_ethtool_gset(pdata->phy_dev, cmd);
  1544. }
  1545. static int
  1546. smsc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
  1547. {
  1548. struct smsc911x_data *pdata = netdev_priv(dev);
  1549. return phy_ethtool_sset(pdata->phy_dev, cmd);
  1550. }
  1551. static void smsc911x_ethtool_getdrvinfo(struct net_device *dev,
  1552. struct ethtool_drvinfo *info)
  1553. {
  1554. strlcpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver));
  1555. strlcpy(info->version, SMSC_DRV_VERSION, sizeof(info->version));
  1556. strlcpy(info->bus_info, dev_name(dev->dev.parent),
  1557. sizeof(info->bus_info));
  1558. }
  1559. static int smsc911x_ethtool_nwayreset(struct net_device *dev)
  1560. {
  1561. struct smsc911x_data *pdata = netdev_priv(dev);
  1562. return phy_start_aneg(pdata->phy_dev);
  1563. }
  1564. static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev)
  1565. {
  1566. struct smsc911x_data *pdata = netdev_priv(dev);
  1567. return pdata->msg_enable;
  1568. }
  1569. static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
  1570. {
  1571. struct smsc911x_data *pdata = netdev_priv(dev);
  1572. pdata->msg_enable = level;
  1573. }
  1574. static int smsc911x_ethtool_getregslen(struct net_device *dev)
  1575. {
  1576. return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) *
  1577. sizeof(u32);
  1578. }
  1579. static void
  1580. smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs,
  1581. void *buf)
  1582. {
  1583. struct smsc911x_data *pdata = netdev_priv(dev);
  1584. struct phy_device *phy_dev = pdata->phy_dev;
  1585. unsigned long flags;
  1586. unsigned int i;
  1587. unsigned int j = 0;
  1588. u32 *data = buf;
  1589. regs->version = pdata->idrev;
  1590. for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32)))
  1591. data[j++] = smsc911x_reg_read(pdata, i);
  1592. for (i = MAC_CR; i <= WUCSR; i++) {
  1593. spin_lock_irqsave(&pdata->mac_lock, flags);
  1594. data[j++] = smsc911x_mac_read(pdata, i);
  1595. spin_unlock_irqrestore(&pdata->mac_lock, flags);
  1596. }
  1597. for (i = 0; i <= 31; i++)
  1598. data[j++] = smsc911x_mii_read(phy_dev->bus, phy_dev->addr, i);
  1599. }
  1600. static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata)
  1601. {
  1602. unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG);
  1603. temp &= ~GPIO_CFG_EEPR_EN_;
  1604. smsc911x_reg_write(pdata, GPIO_CFG, temp);
  1605. msleep(1);
  1606. }
  1607. static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op)
  1608. {
  1609. int timeout = 100;
  1610. u32 e2cmd;
  1611. SMSC_TRACE(pdata, drv, "op 0x%08x", op);
  1612. if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) {
  1613. SMSC_WARN(pdata, drv, "Busy at start");
  1614. return -EBUSY;
  1615. }
  1616. e2cmd = op | E2P_CMD_EPC_BUSY_;
  1617. smsc911x_reg_write(pdata, E2P_CMD, e2cmd);
  1618. do {
  1619. msleep(1);
  1620. e2cmd = smsc911x_reg_read(pdata, E2P_CMD);
  1621. } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout));
  1622. if (!timeout) {
  1623. SMSC_TRACE(pdata, drv, "TIMED OUT");
  1624. return -EAGAIN;
  1625. }
  1626. if (e2cmd & E2P_CMD_EPC_TIMEOUT_) {
  1627. SMSC_TRACE(pdata, drv, "Error occurred during eeprom operation");
  1628. return -EINVAL;
  1629. }
  1630. return 0;
  1631. }
  1632. static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata,
  1633. u8 address, u8 *data)
  1634. {
  1635. u32 op = E2P_CMD_EPC_CMD_READ_ | address;
  1636. int ret;
  1637. SMSC_TRACE(pdata, drv, "address 0x%x", address);
  1638. ret = smsc911x_eeprom_send_cmd(pdata, op);
  1639. if (!ret)
  1640. data[address] = smsc911x_reg_read(pdata, E2P_DATA);
  1641. return ret;
  1642. }
  1643. static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata,
  1644. u8 address, u8 data)
  1645. {
  1646. u32 op = E2P_CMD_EPC_CMD_ERASE_ | address;
  1647. u32 temp;
  1648. int ret;
  1649. SMSC_TRACE(pdata, drv, "address 0x%x, data 0x%x", address, data);
  1650. ret = smsc911x_eeprom_send_cmd(pdata, op);
  1651. if (!ret) {
  1652. op = E2P_CMD_EPC_CMD_WRITE_ | address;
  1653. smsc911x_reg_write(pdata, E2P_DATA, (u32)data);
  1654. /* Workaround for hardware read-after-write restriction */
  1655. temp = smsc911x_reg_read(pdata, BYTE_TEST);
  1656. ret = smsc911x_eeprom_send_cmd(pdata, op);
  1657. }
  1658. return ret;
  1659. }
  1660. static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev)
  1661. {
  1662. return SMSC911X_EEPROM_SIZE;
  1663. }
  1664. static int smsc911x_ethtool_get_eeprom(struct net_device *dev,
  1665. struct ethtool_eeprom *eeprom, u8 *data)
  1666. {
  1667. struct smsc911x_data *pdata = netdev_priv(dev);
  1668. u8 eeprom_data[SMSC911X_EEPROM_SIZE];
  1669. int len;
  1670. int i;
  1671. smsc911x_eeprom_enable_access(pdata);
  1672. len = min(eeprom->len, SMSC911X_EEPROM_SIZE);
  1673. for (i = 0; i < len; i++) {
  1674. int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data);
  1675. if (ret < 0) {
  1676. eeprom->len = 0;
  1677. return ret;
  1678. }
  1679. }
  1680. memcpy(data, &eeprom_data[eeprom->offset], len);
  1681. eeprom->len = len;
  1682. return 0;
  1683. }
  1684. static int smsc911x_ethtool_set_eeprom(struct net_device *dev,
  1685. struct ethtool_eeprom *eeprom, u8 *data)
  1686. {
  1687. int ret;
  1688. struct smsc911x_data *pdata = netdev_priv(dev);
  1689. smsc911x_eeprom_enable_access(pdata);
  1690. smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_);
  1691. ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data);
  1692. smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_);
  1693. /* Single byte write, according to man page */
  1694. eeprom->len = 1;
  1695. return ret;
  1696. }
  1697. static const struct ethtool_ops smsc911x_ethtool_ops = {
  1698. .get_settings = smsc911x_ethtool_getsettings,
  1699. .set_settings = smsc911x_ethtool_setsettings,
  1700. .get_link = ethtool_op_get_link,
  1701. .get_drvinfo = smsc911x_ethtool_getdrvinfo,
  1702. .nway_reset = smsc911x_ethtool_nwayreset,
  1703. .get_msglevel = smsc911x_ethtool_getmsglevel,
  1704. .set_msglevel = smsc911x_ethtool_setmsglevel,
  1705. .get_regs_len = smsc911x_ethtool_getregslen,
  1706. .get_regs = smsc911x_ethtool_getregs,
  1707. .get_eeprom_len = smsc911x_ethtool_get_eeprom_len,
  1708. .get_eeprom = smsc911x_ethtool_get_eeprom,
  1709. .set_eeprom = smsc911x_ethtool_set_eeprom,
  1710. };
  1711. static const struct net_device_ops smsc911x_netdev_ops = {
  1712. .ndo_open = smsc911x_open,
  1713. .ndo_stop = smsc911x_stop,
  1714. .ndo_start_xmit = smsc911x_hard_start_xmit,
  1715. .ndo_get_stats = smsc911x_get_stats,
  1716. .ndo_set_rx_mode = smsc911x_set_multicast_list,
  1717. .ndo_do_ioctl = smsc911x_do_ioctl,
  1718. .ndo_change_mtu = eth_change_mtu,
  1719. .ndo_validate_addr = eth_validate_addr,
  1720. .ndo_set_mac_address = smsc911x_set_mac_address,
  1721. #ifdef CONFIG_NET_POLL_CONTROLLER
  1722. .ndo_poll_controller = smsc911x_poll_controller,
  1723. #endif
  1724. };
  1725. /* copies the current mac address from hardware to dev->dev_addr */
  1726. static void __devinit smsc911x_read_mac_address(struct net_device *dev)
  1727. {
  1728. struct smsc911x_data *pdata = netdev_priv(dev);
  1729. u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH);
  1730. u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL);
  1731. dev->dev_addr[0] = (u8)(mac_low32);
  1732. dev->dev_addr[1] = (u8)(mac_low32 >> 8);
  1733. dev->dev_addr[2] = (u8)(mac_low32 >> 16);
  1734. dev->dev_addr[3] = (u8)(mac_low32 >> 24);
  1735. dev->dev_addr[4] = (u8)(mac_high16);
  1736. dev->dev_addr[5] = (u8)(mac_high16 >> 8);
  1737. }
  1738. /* Initializing private device structures, only called from probe */
  1739. static int __devinit smsc911x_init(struct net_device *dev)
  1740. {
  1741. struct smsc911x_data *pdata = netdev_priv(dev);
  1742. unsigned int byte_test;
  1743. unsigned int to = 100;
  1744. SMSC_TRACE(pdata, probe, "Driver Parameters:");
  1745. SMSC_TRACE(pdata, probe, "LAN base: 0x%08lX",
  1746. (unsigned long)pdata->ioaddr);
  1747. SMSC_TRACE(pdata, probe, "IRQ: %d", dev->irq);
  1748. SMSC_TRACE(pdata, probe, "PHY will be autodetected.");
  1749. spin_lock_init(&pdata->dev_lock);
  1750. spin_lock_init(&pdata->mac_lock);
  1751. if (pdata->ioaddr == 0) {
  1752. SMSC_WARN(pdata, probe, "pdata->ioaddr: 0x00000000");
  1753. return -ENODEV;
  1754. }
  1755. /*
  1756. * poll the READY bit in PMT_CTRL. Any other access to the device is
  1757. * forbidden while this bit isn't set. Try for 100ms
  1758. */
  1759. while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to)
  1760. udelay(1000);
  1761. if (to == 0) {
  1762. pr_err("Device not READY in 100ms aborting\n");
  1763. return -ENODEV;
  1764. }
  1765. /* Check byte ordering */
  1766. byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
  1767. SMSC_TRACE(pdata, probe, "BYTE_TEST: 0x%08X", byte_test);
  1768. if (byte_test == 0x43218765) {
  1769. SMSC_TRACE(pdata, probe, "BYTE_TEST looks swapped, "
  1770. "applying WORD_SWAP");
  1771. smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff);
  1772. /* 1 dummy read of BYTE_TEST is needed after a write to
  1773. * WORD_SWAP before its contents are valid */
  1774. byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
  1775. byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
  1776. }
  1777. if (byte_test != 0x87654321) {
  1778. SMSC_WARN(pdata, drv, "BYTE_TEST: 0x%08X", byte_test);
  1779. if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) {
  1780. SMSC_WARN(pdata, probe,
  1781. "top 16 bits equal to bottom 16 bits");
  1782. SMSC_TRACE(pdata, probe,
  1783. "This may mean the chip is set "
  1784. "for 32 bit while the bus is reading 16 bit");
  1785. }
  1786. return -ENODEV;
  1787. }
  1788. /* Default generation to zero (all workarounds apply) */
  1789. pdata->generation = 0;
  1790. pdata->idrev = smsc911x_reg_read(pdata, ID_REV);
  1791. switch (pdata->idrev & 0xFFFF0000) {
  1792. case 0x01180000:
  1793. case 0x01170000:
  1794. case 0x01160000:
  1795. case 0x01150000:
  1796. case 0x218A0000:
  1797. /* LAN911[5678] family */
  1798. pdata->generation = pdata->idrev & 0x0000FFFF;
  1799. break;
  1800. case 0x118A0000:
  1801. case 0x117A0000:
  1802. case 0x116A0000:
  1803. case 0x115A0000:
  1804. /* LAN921[5678] family */
  1805. pdata->generation = 3;
  1806. break;
  1807. case 0x92100000:
  1808. case 0x92110000:
  1809. case 0x92200000:
  1810. case 0x92210000:
  1811. /* LAN9210/LAN9211/LAN9220/LAN9221 */
  1812. pdata->generation = 4;
  1813. break;
  1814. default:
  1815. SMSC_WARN(pdata, probe, "LAN911x not identified, idrev: 0x%08X",
  1816. pdata->idrev);
  1817. return -ENODEV;
  1818. }
  1819. SMSC_TRACE(pdata, probe,
  1820. "LAN911x identified, idrev: 0x%08X, generation: %d",
  1821. pdata->idrev, pdata->generation);
  1822. if (pdata->generation == 0)
  1823. SMSC_WARN(pdata, probe,
  1824. "This driver is not intended for this chip revision");
  1825. /* workaround for platforms without an eeprom, where the mac address
  1826. * is stored elsewhere and set by the bootloader. This saves the
  1827. * mac address before resetting the device */
  1828. if (pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS) {
  1829. spin_lock_irq(&pdata->mac_lock);
  1830. smsc911x_read_mac_address(dev);
  1831. spin_unlock_irq(&pdata->mac_lock);
  1832. }
  1833. /* Reset the LAN911x */
  1834. if (smsc911x_soft_reset(pdata))
  1835. return -ENODEV;
  1836. /* Disable all interrupt sources until we bring the device up */
  1837. smsc911x_reg_write(pdata, INT_EN, 0);
  1838. ether_setup(dev);
  1839. dev->flags |= IFF_MULTICAST;
  1840. netif_napi_add(dev, &pdata->napi, smsc911x_poll, SMSC_NAPI_WEIGHT);
  1841. dev->netdev_ops = &smsc911x_netdev_ops;
  1842. dev->ethtool_ops = &smsc911x_ethtool_ops;
  1843. return 0;
  1844. }
  1845. static int __devexit smsc911x_drv_remove(struct platform_device *pdev)
  1846. {
  1847. struct net_device *dev;
  1848. struct smsc911x_data *pdata;
  1849. struct resource *res;
  1850. dev = platform_get_drvdata(pdev);
  1851. BUG_ON(!dev);
  1852. pdata = netdev_priv(dev);
  1853. BUG_ON(!pdata);
  1854. BUG_ON(!pdata->ioaddr);
  1855. BUG_ON(!pdata->phy_dev);
  1856. SMSC_TRACE(pdata, ifdown, "Stopping driver");
  1857. phy_disconnect(pdata->phy_dev);
  1858. pdata->phy_dev = NULL;
  1859. mdiobus_unregister(pdata->mii_bus);
  1860. mdiobus_free(pdata->mii_bus);
  1861. platform_set_drvdata(pdev, NULL);
  1862. unregister_netdev(dev);
  1863. free_irq(dev->irq, dev);
  1864. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  1865. "smsc911x-memory");
  1866. if (!res)
  1867. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1868. release_mem_region(res->start, resource_size(res));
  1869. iounmap(pdata->ioaddr);
  1870. (void)smsc911x_disable_resources(pdev);
  1871. smsc911x_free_resources(pdev);
  1872. free_netdev(dev);
  1873. return 0;
  1874. }
  1875. /* standard register acces */
  1876. static const struct smsc911x_ops standard_smsc911x_ops = {
  1877. .reg_read = __smsc911x_reg_read,
  1878. .reg_write = __smsc911x_reg_write,
  1879. .rx_readfifo = smsc911x_rx_readfifo,
  1880. .tx_writefifo = smsc911x_tx_writefifo,
  1881. };
  1882. /* shifted register access */
  1883. static const struct smsc911x_ops shifted_smsc911x_ops = {
  1884. .reg_read = __smsc911x_reg_read_shift,
  1885. .reg_write = __smsc911x_reg_write_shift,
  1886. .rx_readfifo = smsc911x_rx_readfifo_shift,
  1887. .tx_writefifo = smsc911x_tx_writefifo_shift,
  1888. };
  1889. #ifdef CONFIG_OF
  1890. static int __devinit smsc911x_probe_config_dt(
  1891. struct smsc911x_platform_config *config,
  1892. struct device_node *np)
  1893. {
  1894. const char *mac;
  1895. u32 width = 0;
  1896. if (!np)
  1897. return -ENODEV;
  1898. config->phy_interface = of_get_phy_mode(np);
  1899. mac = of_get_mac_address(np);
  1900. if (mac)
  1901. memcpy(config->mac, mac, ETH_ALEN);
  1902. of_property_read_u32(np, "reg-shift", &config->shift);
  1903. of_property_read_u32(np, "reg-io-width", &width);
  1904. if (width == 4)
  1905. config->flags |= SMSC911X_USE_32BIT;
  1906. else
  1907. config->flags |= SMSC911X_USE_16BIT;
  1908. if (of_get_property(np, "smsc,irq-active-high", NULL))
  1909. config->irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH;
  1910. if (of_get_property(np, "smsc,irq-push-pull", NULL))
  1911. config->irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL;
  1912. if (of_get_property(np, "smsc,force-internal-phy", NULL))
  1913. config->flags |= SMSC911X_FORCE_INTERNAL_PHY;
  1914. if (of_get_property(np, "smsc,force-external-phy", NULL))
  1915. config->flags |= SMSC911X_FORCE_EXTERNAL_PHY;
  1916. if (of_get_property(np, "smsc,save-mac-address", NULL))
  1917. config->flags |= SMSC911X_SAVE_MAC_ADDRESS;
  1918. return 0;
  1919. }
  1920. #else
  1921. static inline int smsc911x_probe_config_dt(
  1922. struct smsc911x_platform_config *config,
  1923. struct device_node *np)
  1924. {
  1925. return -ENODEV;
  1926. }
  1927. #endif /* CONFIG_OF */
  1928. static int __devinit smsc911x_drv_probe(struct platform_device *pdev)
  1929. {
  1930. struct device_node *np = pdev->dev.of_node;
  1931. struct net_device *dev;
  1932. struct smsc911x_data *pdata;
  1933. struct smsc911x_platform_config *config = pdev->dev.platform_data;
  1934. struct resource *res, *irq_res;
  1935. unsigned int intcfg = 0;
  1936. int res_size, irq_flags;
  1937. int retval;
  1938. pr_info("Driver version %s\n", SMSC_DRV_VERSION);
  1939. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  1940. "smsc911x-memory");
  1941. if (!res)
  1942. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1943. if (!res) {
  1944. pr_warn("Could not allocate resource\n");
  1945. retval = -ENODEV;
  1946. goto out_0;
  1947. }
  1948. res_size = resource_size(res);
  1949. irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  1950. if (!irq_res) {
  1951. pr_warn("Could not allocate irq resource\n");
  1952. retval = -ENODEV;
  1953. goto out_0;
  1954. }
  1955. if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) {
  1956. retval = -EBUSY;
  1957. goto out_0;
  1958. }
  1959. dev = alloc_etherdev(sizeof(struct smsc911x_data));
  1960. if (!dev) {
  1961. retval = -ENOMEM;
  1962. goto out_release_io_1;
  1963. }
  1964. SET_NETDEV_DEV(dev, &pdev->dev);
  1965. pdata = netdev_priv(dev);
  1966. dev->irq = irq_res->start;
  1967. irq_flags = irq_res->flags & IRQF_TRIGGER_MASK;
  1968. pdata->ioaddr = ioremap_nocache(res->start, res_size);
  1969. pdata->dev = dev;
  1970. pdata->msg_enable = ((1 << debug) - 1);
  1971. platform_set_drvdata(pdev, dev);
  1972. retval = smsc911x_request_resources(pdev);
  1973. if (retval)
  1974. goto out_return_resources;
  1975. retval = smsc911x_enable_resources(pdev);
  1976. if (retval)
  1977. goto out_disable_resources;
  1978. if (pdata->ioaddr == NULL) {
  1979. SMSC_WARN(pdata, probe, "Error smsc911x base address invalid");
  1980. retval = -ENOMEM;
  1981. goto out_disable_resources;
  1982. }
  1983. retval = smsc911x_probe_config_dt(&pdata->config, np);
  1984. if (retval && config) {
  1985. /* copy config parameters across to pdata */
  1986. memcpy(&pdata->config, config, sizeof(pdata->config));
  1987. retval = 0;
  1988. }
  1989. if (retval) {
  1990. SMSC_WARN(pdata, probe, "Error smsc911x config not found");
  1991. goto out_disable_resources;
  1992. }
  1993. /* assume standard, non-shifted, access to HW registers */
  1994. pdata->ops = &standard_smsc911x_ops;
  1995. /* apply the right access if shifting is needed */
  1996. if (pdata->config.shift)
  1997. pdata->ops = &shifted_smsc911x_ops;
  1998. retval = smsc911x_init(dev);
  1999. if (retval < 0)
  2000. goto out_disable_resources;
  2001. /* configure irq polarity and type before connecting isr */
  2002. if (pdata->config.irq_polarity == SMSC911X_IRQ_POLARITY_ACTIVE_HIGH)
  2003. intcfg |= INT_CFG_IRQ_POL_;
  2004. if (pdata->config.irq_type == SMSC911X_IRQ_TYPE_PUSH_PULL)
  2005. intcfg |= INT_CFG_IRQ_TYPE_;
  2006. smsc911x_reg_write(pdata, INT_CFG, intcfg);
  2007. /* Ensure interrupts are globally disabled before connecting ISR */
  2008. smsc911x_reg_write(pdata, INT_EN, 0);
  2009. smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
  2010. retval = request_irq(dev->irq, smsc911x_irqhandler,
  2011. irq_flags | IRQF_SHARED, dev->name, dev);
  2012. if (retval) {
  2013. SMSC_WARN(pdata, probe,
  2014. "Unable to claim requested irq: %d", dev->irq);
  2015. goto out_free_irq;
  2016. }
  2017. retval = register_netdev(dev);
  2018. if (retval) {
  2019. SMSC_WARN(pdata, probe, "Error %i registering device", retval);
  2020. goto out_free_irq;
  2021. } else {
  2022. SMSC_TRACE(pdata, probe,
  2023. "Network interface: \"%s\"", dev->name);
  2024. }
  2025. retval = smsc911x_mii_init(pdev, dev);
  2026. if (retval) {
  2027. SMSC_WARN(pdata, probe, "Error %i initialising mii", retval);
  2028. goto out_unregister_netdev_5;
  2029. }
  2030. spin_lock_irq(&pdata->mac_lock);
  2031. /* Check if mac address has been specified when bringing interface up */
  2032. if (is_valid_ether_addr(dev->dev_addr)) {
  2033. smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
  2034. SMSC_TRACE(pdata, probe,
  2035. "MAC Address is specified by configuration");
  2036. } else if (is_valid_ether_addr(pdata->config.mac)) {
  2037. memcpy(dev->dev_addr, pdata->config.mac, 6);
  2038. SMSC_TRACE(pdata, probe,
  2039. "MAC Address specified by platform data");
  2040. } else {
  2041. /* Try reading mac address from device. if EEPROM is present
  2042. * it will already have been set */
  2043. smsc_get_mac(dev);
  2044. if (is_valid_ether_addr(dev->dev_addr)) {
  2045. /* eeprom values are valid so use them */
  2046. SMSC_TRACE(pdata, probe,
  2047. "Mac Address is read from LAN911x EEPROM");
  2048. } else {
  2049. /* eeprom values are invalid, generate random MAC */
  2050. eth_hw_addr_random(dev);
  2051. smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
  2052. SMSC_TRACE(pdata, probe,
  2053. "MAC Address is set to random_ether_addr");
  2054. }
  2055. }
  2056. spin_unlock_irq(&pdata->mac_lock);
  2057. netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
  2058. return 0;
  2059. out_unregister_netdev_5:
  2060. unregister_netdev(dev);
  2061. out_free_irq:
  2062. free_irq(dev->irq, dev);
  2063. out_disable_resources:
  2064. (void)smsc911x_disable_resources(pdev);
  2065. out_return_resources:
  2066. smsc911x_free_resources(pdev);
  2067. platform_set_drvdata(pdev, NULL);
  2068. iounmap(pdata->ioaddr);
  2069. free_netdev(dev);
  2070. out_release_io_1:
  2071. release_mem_region(res->start, resource_size(res));
  2072. out_0:
  2073. return retval;
  2074. }
  2075. #ifdef CONFIG_PM
  2076. /* This implementation assumes the devices remains powered on its VDDVARIO
  2077. * pins during suspend. */
  2078. /* TODO: implement freeze/thaw callbacks for hibernation.*/
  2079. static int smsc911x_suspend(struct device *dev)
  2080. {
  2081. struct net_device *ndev = dev_get_drvdata(dev);
  2082. struct smsc911x_data *pdata = netdev_priv(ndev);
  2083. /* enable wake on LAN, energy detection and the external PME
  2084. * signal. */
  2085. smsc911x_reg_write(pdata, PMT_CTRL,
  2086. PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ |
  2087. PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_);
  2088. return 0;
  2089. }
  2090. static int smsc911x_resume(struct device *dev)
  2091. {
  2092. struct net_device *ndev = dev_get_drvdata(dev);
  2093. struct smsc911x_data *pdata = netdev_priv(ndev);
  2094. unsigned int to = 100;
  2095. /* Note 3.11 from the datasheet:
  2096. * "When the LAN9220 is in a power saving state, a write of any
  2097. * data to the BYTE_TEST register will wake-up the device."
  2098. */
  2099. smsc911x_reg_write(pdata, BYTE_TEST, 0);
  2100. /* poll the READY bit in PMT_CTRL. Any other access to the device is
  2101. * forbidden while this bit isn't set. Try for 100ms and return -EIO
  2102. * if it failed. */
  2103. while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to)
  2104. udelay(1000);
  2105. return (to == 0) ? -EIO : 0;
  2106. }
  2107. static const struct dev_pm_ops smsc911x_pm_ops = {
  2108. .suspend = smsc911x_suspend,
  2109. .resume = smsc911x_resume,
  2110. };
  2111. #define SMSC911X_PM_OPS (&smsc911x_pm_ops)
  2112. #else
  2113. #define SMSC911X_PM_OPS NULL
  2114. #endif
  2115. static const struct of_device_id smsc911x_dt_ids[] = {
  2116. { .compatible = "smsc,lan9115", },
  2117. { /* sentinel */ }
  2118. };
  2119. MODULE_DEVICE_TABLE(of, smsc911x_dt_ids);
  2120. static struct platform_driver smsc911x_driver = {
  2121. .probe = smsc911x_drv_probe,
  2122. .remove = __devexit_p(smsc911x_drv_remove),
  2123. .driver = {
  2124. .name = SMSC_CHIPNAME,
  2125. .owner = THIS_MODULE,
  2126. .pm = SMSC911X_PM_OPS,
  2127. .of_match_table = smsc911x_dt_ids,
  2128. },
  2129. };
  2130. /* Entry point for loading the module */
  2131. static int __init smsc911x_init_module(void)
  2132. {
  2133. SMSC_INITIALIZE();
  2134. return platform_driver_register(&smsc911x_driver);
  2135. }
  2136. /* entry point for unloading the module */
  2137. static void __exit smsc911x_cleanup_module(void)
  2138. {
  2139. platform_driver_unregister(&smsc911x_driver);
  2140. }
  2141. module_init(smsc911x_init_module);
  2142. module_exit(smsc911x_cleanup_module);