bnx2x_sp.h 34 KB

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  1. /* bnx2x_sp.h: Broadcom Everest network driver.
  2. *
  3. * Copyright (c) 2011-2012 Broadcom Corporation
  4. *
  5. * Unless you and Broadcom execute a separate written software license
  6. * agreement governing use of this software, this software is licensed to you
  7. * under the terms of the GNU General Public License version 2, available
  8. * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
  9. *
  10. * Notwithstanding the above, under no circumstances may you combine this
  11. * software in any way with any other Broadcom software provided under a
  12. * license other than the GPL, without Broadcom's express prior written
  13. * consent.
  14. *
  15. * Maintained by: Eilon Greenstein <eilong@broadcom.com>
  16. * Written by: Vladislav Zolotarov
  17. *
  18. */
  19. #ifndef BNX2X_SP_VERBS
  20. #define BNX2X_SP_VERBS
  21. struct bnx2x;
  22. struct eth_context;
  23. /* Bits representing general command's configuration */
  24. enum {
  25. RAMROD_TX,
  26. RAMROD_RX,
  27. /* Wait until all pending commands complete */
  28. RAMROD_COMP_WAIT,
  29. /* Don't send a ramrod, only update a registry */
  30. RAMROD_DRV_CLR_ONLY,
  31. /* Configure HW according to the current object state */
  32. RAMROD_RESTORE,
  33. /* Execute the next command now */
  34. RAMROD_EXEC,
  35. /*
  36. * Don't add a new command and continue execution of posponed
  37. * commands. If not set a new command will be added to the
  38. * pending commands list.
  39. */
  40. RAMROD_CONT,
  41. };
  42. typedef enum {
  43. BNX2X_OBJ_TYPE_RX,
  44. BNX2X_OBJ_TYPE_TX,
  45. BNX2X_OBJ_TYPE_RX_TX,
  46. } bnx2x_obj_type;
  47. /* Filtering states */
  48. enum {
  49. BNX2X_FILTER_MAC_PENDING,
  50. BNX2X_FILTER_VLAN_PENDING,
  51. BNX2X_FILTER_VLAN_MAC_PENDING,
  52. BNX2X_FILTER_RX_MODE_PENDING,
  53. BNX2X_FILTER_RX_MODE_SCHED,
  54. BNX2X_FILTER_ISCSI_ETH_START_SCHED,
  55. BNX2X_FILTER_ISCSI_ETH_STOP_SCHED,
  56. BNX2X_FILTER_FCOE_ETH_START_SCHED,
  57. BNX2X_FILTER_FCOE_ETH_STOP_SCHED,
  58. BNX2X_FILTER_MCAST_PENDING,
  59. BNX2X_FILTER_MCAST_SCHED,
  60. BNX2X_FILTER_RSS_CONF_PENDING,
  61. };
  62. struct bnx2x_raw_obj {
  63. u8 func_id;
  64. /* Queue params */
  65. u8 cl_id;
  66. u32 cid;
  67. /* Ramrod data buffer params */
  68. void *rdata;
  69. dma_addr_t rdata_mapping;
  70. /* Ramrod state params */
  71. int state; /* "ramrod is pending" state bit */
  72. unsigned long *pstate; /* pointer to state buffer */
  73. bnx2x_obj_type obj_type;
  74. int (*wait_comp)(struct bnx2x *bp,
  75. struct bnx2x_raw_obj *o);
  76. bool (*check_pending)(struct bnx2x_raw_obj *o);
  77. void (*clear_pending)(struct bnx2x_raw_obj *o);
  78. void (*set_pending)(struct bnx2x_raw_obj *o);
  79. };
  80. /************************* VLAN-MAC commands related parameters ***************/
  81. struct bnx2x_mac_ramrod_data {
  82. u8 mac[ETH_ALEN];
  83. };
  84. struct bnx2x_vlan_ramrod_data {
  85. u16 vlan;
  86. };
  87. struct bnx2x_vlan_mac_ramrod_data {
  88. u8 mac[ETH_ALEN];
  89. u16 vlan;
  90. };
  91. union bnx2x_classification_ramrod_data {
  92. struct bnx2x_mac_ramrod_data mac;
  93. struct bnx2x_vlan_ramrod_data vlan;
  94. struct bnx2x_vlan_mac_ramrod_data vlan_mac;
  95. };
  96. /* VLAN_MAC commands */
  97. enum bnx2x_vlan_mac_cmd {
  98. BNX2X_VLAN_MAC_ADD,
  99. BNX2X_VLAN_MAC_DEL,
  100. BNX2X_VLAN_MAC_MOVE,
  101. };
  102. struct bnx2x_vlan_mac_data {
  103. /* Requested command: BNX2X_VLAN_MAC_XX */
  104. enum bnx2x_vlan_mac_cmd cmd;
  105. /*
  106. * used to contain the data related vlan_mac_flags bits from
  107. * ramrod parameters.
  108. */
  109. unsigned long vlan_mac_flags;
  110. /* Needed for MOVE command */
  111. struct bnx2x_vlan_mac_obj *target_obj;
  112. union bnx2x_classification_ramrod_data u;
  113. };
  114. /*************************** Exe Queue obj ************************************/
  115. union bnx2x_exe_queue_cmd_data {
  116. struct bnx2x_vlan_mac_data vlan_mac;
  117. struct {
  118. /* TODO */
  119. } mcast;
  120. };
  121. struct bnx2x_exeq_elem {
  122. struct list_head link;
  123. /* Length of this element in the exe_chunk. */
  124. int cmd_len;
  125. union bnx2x_exe_queue_cmd_data cmd_data;
  126. };
  127. union bnx2x_qable_obj;
  128. union bnx2x_exeq_comp_elem {
  129. union event_ring_elem *elem;
  130. };
  131. struct bnx2x_exe_queue_obj;
  132. typedef int (*exe_q_validate)(struct bnx2x *bp,
  133. union bnx2x_qable_obj *o,
  134. struct bnx2x_exeq_elem *elem);
  135. typedef int (*exe_q_remove)(struct bnx2x *bp,
  136. union bnx2x_qable_obj *o,
  137. struct bnx2x_exeq_elem *elem);
  138. /**
  139. * @return positive is entry was optimized, 0 - if not, negative
  140. * in case of an error.
  141. */
  142. typedef int (*exe_q_optimize)(struct bnx2x *bp,
  143. union bnx2x_qable_obj *o,
  144. struct bnx2x_exeq_elem *elem);
  145. typedef int (*exe_q_execute)(struct bnx2x *bp,
  146. union bnx2x_qable_obj *o,
  147. struct list_head *exe_chunk,
  148. unsigned long *ramrod_flags);
  149. typedef struct bnx2x_exeq_elem *
  150. (*exe_q_get)(struct bnx2x_exe_queue_obj *o,
  151. struct bnx2x_exeq_elem *elem);
  152. struct bnx2x_exe_queue_obj {
  153. /*
  154. * Commands pending for an execution.
  155. */
  156. struct list_head exe_queue;
  157. /*
  158. * Commands pending for an completion.
  159. */
  160. struct list_head pending_comp;
  161. spinlock_t lock;
  162. /* Maximum length of commands' list for one execution */
  163. int exe_chunk_len;
  164. union bnx2x_qable_obj *owner;
  165. /****** Virtual functions ******/
  166. /**
  167. * Called before commands execution for commands that are really
  168. * going to be executed (after 'optimize').
  169. *
  170. * Must run under exe_queue->lock
  171. */
  172. exe_q_validate validate;
  173. /**
  174. * Called before removing pending commands, cleaning allocated
  175. * resources (e.g., credits from validate)
  176. */
  177. exe_q_remove remove;
  178. /**
  179. * This will try to cancel the current pending commands list
  180. * considering the new command.
  181. *
  182. * Returns the number of optimized commands or a negative error code
  183. *
  184. * Must run under exe_queue->lock
  185. */
  186. exe_q_optimize optimize;
  187. /**
  188. * Run the next commands chunk (owner specific).
  189. */
  190. exe_q_execute execute;
  191. /**
  192. * Return the exe_queue element containing the specific command
  193. * if any. Otherwise return NULL.
  194. */
  195. exe_q_get get;
  196. };
  197. /***************** Classification verbs: Set/Del MAC/VLAN/VLAN-MAC ************/
  198. /*
  199. * Element in the VLAN_MAC registry list having all currenty configured
  200. * rules.
  201. */
  202. struct bnx2x_vlan_mac_registry_elem {
  203. struct list_head link;
  204. /*
  205. * Used to store the cam offset used for the mac/vlan/vlan-mac.
  206. * Relevant for 57710 and 57711 only. VLANs and MACs share the
  207. * same CAM for these chips.
  208. */
  209. int cam_offset;
  210. /* Needed for DEL and RESTORE flows */
  211. unsigned long vlan_mac_flags;
  212. union bnx2x_classification_ramrod_data u;
  213. };
  214. /* Bits representing VLAN_MAC commands specific flags */
  215. enum {
  216. BNX2X_UC_LIST_MAC,
  217. BNX2X_ETH_MAC,
  218. BNX2X_ISCSI_ETH_MAC,
  219. BNX2X_NETQ_ETH_MAC,
  220. BNX2X_DONT_CONSUME_CAM_CREDIT,
  221. BNX2X_DONT_CONSUME_CAM_CREDIT_DEST,
  222. };
  223. struct bnx2x_vlan_mac_ramrod_params {
  224. /* Object to run the command from */
  225. struct bnx2x_vlan_mac_obj *vlan_mac_obj;
  226. /* General command flags: COMP_WAIT, etc. */
  227. unsigned long ramrod_flags;
  228. /* Command specific configuration request */
  229. struct bnx2x_vlan_mac_data user_req;
  230. };
  231. struct bnx2x_vlan_mac_obj {
  232. struct bnx2x_raw_obj raw;
  233. /* Bookkeeping list: will prevent the addition of already existing
  234. * entries.
  235. */
  236. struct list_head head;
  237. /* TODO: Add it's initialization in the init functions */
  238. struct bnx2x_exe_queue_obj exe_queue;
  239. /* MACs credit pool */
  240. struct bnx2x_credit_pool_obj *macs_pool;
  241. /* VLANs credit pool */
  242. struct bnx2x_credit_pool_obj *vlans_pool;
  243. /* RAMROD command to be used */
  244. int ramrod_cmd;
  245. /* copy first n elements onto preallocated buffer
  246. *
  247. * @param n number of elements to get
  248. * @param buf buffer preallocated by caller into which elements
  249. * will be copied. Note elements are 4-byte aligned
  250. * so buffer size must be able to accomodate the
  251. * aligned elements.
  252. *
  253. * @return number of copied bytes
  254. */
  255. int (*get_n_elements)(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *o,
  256. int n, u8 *buf);
  257. /**
  258. * Checks if ADD-ramrod with the given params may be performed.
  259. *
  260. * @return zero if the element may be added
  261. */
  262. int (*check_add)(struct bnx2x *bp,
  263. struct bnx2x_vlan_mac_obj *o,
  264. union bnx2x_classification_ramrod_data *data);
  265. /**
  266. * Checks if DEL-ramrod with the given params may be performed.
  267. *
  268. * @return true if the element may be deleted
  269. */
  270. struct bnx2x_vlan_mac_registry_elem *
  271. (*check_del)(struct bnx2x *bp,
  272. struct bnx2x_vlan_mac_obj *o,
  273. union bnx2x_classification_ramrod_data *data);
  274. /**
  275. * Checks if DEL-ramrod with the given params may be performed.
  276. *
  277. * @return true if the element may be deleted
  278. */
  279. bool (*check_move)(struct bnx2x *bp,
  280. struct bnx2x_vlan_mac_obj *src_o,
  281. struct bnx2x_vlan_mac_obj *dst_o,
  282. union bnx2x_classification_ramrod_data *data);
  283. /**
  284. * Update the relevant credit object(s) (consume/return
  285. * correspondingly).
  286. */
  287. bool (*get_credit)(struct bnx2x_vlan_mac_obj *o);
  288. bool (*put_credit)(struct bnx2x_vlan_mac_obj *o);
  289. bool (*get_cam_offset)(struct bnx2x_vlan_mac_obj *o, int *offset);
  290. bool (*put_cam_offset)(struct bnx2x_vlan_mac_obj *o, int offset);
  291. /**
  292. * Configures one rule in the ramrod data buffer.
  293. */
  294. void (*set_one_rule)(struct bnx2x *bp,
  295. struct bnx2x_vlan_mac_obj *o,
  296. struct bnx2x_exeq_elem *elem, int rule_idx,
  297. int cam_offset);
  298. /**
  299. * Delete all configured elements having the given
  300. * vlan_mac_flags specification. Assumes no pending for
  301. * execution commands. Will schedule all all currently
  302. * configured MACs/VLANs/VLAN-MACs matching the vlan_mac_flags
  303. * specification for deletion and will use the given
  304. * ramrod_flags for the last DEL operation.
  305. *
  306. * @param bp
  307. * @param o
  308. * @param ramrod_flags RAMROD_XX flags
  309. *
  310. * @return 0 if the last operation has completed successfully
  311. * and there are no more elements left, positive value
  312. * if there are pending for completion commands,
  313. * negative value in case of failure.
  314. */
  315. int (*delete_all)(struct bnx2x *bp,
  316. struct bnx2x_vlan_mac_obj *o,
  317. unsigned long *vlan_mac_flags,
  318. unsigned long *ramrod_flags);
  319. /**
  320. * Reconfigures the next MAC/VLAN/VLAN-MAC element from the previously
  321. * configured elements list.
  322. *
  323. * @param bp
  324. * @param p Command parameters (RAMROD_COMP_WAIT bit in
  325. * ramrod_flags is only taken into an account)
  326. * @param ppos a pointer to the cooky that should be given back in the
  327. * next call to make function handle the next element. If
  328. * *ppos is set to NULL it will restart the iterator.
  329. * If returned *ppos == NULL this means that the last
  330. * element has been handled.
  331. *
  332. * @return int
  333. */
  334. int (*restore)(struct bnx2x *bp,
  335. struct bnx2x_vlan_mac_ramrod_params *p,
  336. struct bnx2x_vlan_mac_registry_elem **ppos);
  337. /**
  338. * Should be called on a completion arival.
  339. *
  340. * @param bp
  341. * @param o
  342. * @param cqe Completion element we are handling
  343. * @param ramrod_flags if RAMROD_CONT is set the next bulk of
  344. * pending commands will be executed.
  345. * RAMROD_DRV_CLR_ONLY and RAMROD_RESTORE
  346. * may also be set if needed.
  347. *
  348. * @return 0 if there are neither pending nor waiting for
  349. * completion commands. Positive value if there are
  350. * pending for execution or for completion commands.
  351. * Negative value in case of an error (including an
  352. * error in the cqe).
  353. */
  354. int (*complete)(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *o,
  355. union event_ring_elem *cqe,
  356. unsigned long *ramrod_flags);
  357. /**
  358. * Wait for completion of all commands. Don't schedule new ones,
  359. * just wait. It assumes that the completion code will schedule
  360. * for new commands.
  361. */
  362. int (*wait)(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *o);
  363. };
  364. enum {
  365. BNX2X_LLH_CAM_ISCSI_ETH_LINE = 0,
  366. BNX2X_LLH_CAM_ETH_LINE,
  367. BNX2X_LLH_CAM_MAX_PF_LINE = NIG_REG_LLH1_FUNC_MEM_SIZE / 2
  368. };
  369. /** RX_MODE verbs:DROP_ALL/ACCEPT_ALL/ACCEPT_ALL_MULTI/ACCEPT_ALL_VLAN/NORMAL */
  370. /* RX_MODE ramrod spesial flags: set in rx_mode_flags field in
  371. * a bnx2x_rx_mode_ramrod_params.
  372. */
  373. enum {
  374. BNX2X_RX_MODE_FCOE_ETH,
  375. BNX2X_RX_MODE_ISCSI_ETH,
  376. };
  377. enum {
  378. BNX2X_ACCEPT_UNICAST,
  379. BNX2X_ACCEPT_MULTICAST,
  380. BNX2X_ACCEPT_ALL_UNICAST,
  381. BNX2X_ACCEPT_ALL_MULTICAST,
  382. BNX2X_ACCEPT_BROADCAST,
  383. BNX2X_ACCEPT_UNMATCHED,
  384. BNX2X_ACCEPT_ANY_VLAN
  385. };
  386. struct bnx2x_rx_mode_ramrod_params {
  387. struct bnx2x_rx_mode_obj *rx_mode_obj;
  388. unsigned long *pstate;
  389. int state;
  390. u8 cl_id;
  391. u32 cid;
  392. u8 func_id;
  393. unsigned long ramrod_flags;
  394. unsigned long rx_mode_flags;
  395. /*
  396. * rdata is either a pointer to eth_filter_rules_ramrod_data(e2) or to
  397. * a tstorm_eth_mac_filter_config (e1x).
  398. */
  399. void *rdata;
  400. dma_addr_t rdata_mapping;
  401. /* Rx mode settings */
  402. unsigned long rx_accept_flags;
  403. /* internal switching settings */
  404. unsigned long tx_accept_flags;
  405. };
  406. struct bnx2x_rx_mode_obj {
  407. int (*config_rx_mode)(struct bnx2x *bp,
  408. struct bnx2x_rx_mode_ramrod_params *p);
  409. int (*wait_comp)(struct bnx2x *bp,
  410. struct bnx2x_rx_mode_ramrod_params *p);
  411. };
  412. /********************** Set multicast group ***********************************/
  413. struct bnx2x_mcast_list_elem {
  414. struct list_head link;
  415. u8 *mac;
  416. };
  417. union bnx2x_mcast_config_data {
  418. u8 *mac;
  419. u8 bin; /* used in a RESTORE flow */
  420. };
  421. struct bnx2x_mcast_ramrod_params {
  422. struct bnx2x_mcast_obj *mcast_obj;
  423. /* Relevant options are RAMROD_COMP_WAIT and RAMROD_DRV_CLR_ONLY */
  424. unsigned long ramrod_flags;
  425. struct list_head mcast_list; /* list of struct bnx2x_mcast_list_elem */
  426. /** TODO:
  427. * - rename it to macs_num.
  428. * - Add a new command type for handling pending commands
  429. * (remove "zero semantics").
  430. *
  431. * Length of mcast_list. If zero and ADD_CONT command - post
  432. * pending commands.
  433. */
  434. int mcast_list_len;
  435. };
  436. enum {
  437. BNX2X_MCAST_CMD_ADD,
  438. BNX2X_MCAST_CMD_CONT,
  439. BNX2X_MCAST_CMD_DEL,
  440. BNX2X_MCAST_CMD_RESTORE,
  441. };
  442. struct bnx2x_mcast_obj {
  443. struct bnx2x_raw_obj raw;
  444. union {
  445. struct {
  446. #define BNX2X_MCAST_BINS_NUM 256
  447. #define BNX2X_MCAST_VEC_SZ (BNX2X_MCAST_BINS_NUM / 64)
  448. u64 vec[BNX2X_MCAST_VEC_SZ];
  449. /** Number of BINs to clear. Should be updated
  450. * immediately when a command arrives in order to
  451. * properly create DEL commands.
  452. */
  453. int num_bins_set;
  454. } aprox_match;
  455. struct {
  456. struct list_head macs;
  457. int num_macs_set;
  458. } exact_match;
  459. } registry;
  460. /* Pending commands */
  461. struct list_head pending_cmds_head;
  462. /* A state that is set in raw.pstate, when there are pending commands */
  463. int sched_state;
  464. /* Maximal number of mcast MACs configured in one command */
  465. int max_cmd_len;
  466. /* Total number of currently pending MACs to configure: both
  467. * in the pending commands list and in the current command.
  468. */
  469. int total_pending_num;
  470. u8 engine_id;
  471. /**
  472. * @param cmd command to execute (BNX2X_MCAST_CMD_X, see above)
  473. */
  474. int (*config_mcast)(struct bnx2x *bp,
  475. struct bnx2x_mcast_ramrod_params *p, int cmd);
  476. /**
  477. * Fills the ramrod data during the RESTORE flow.
  478. *
  479. * @param bp
  480. * @param o
  481. * @param start_idx Registry index to start from
  482. * @param rdata_idx Index in the ramrod data to start from
  483. *
  484. * @return -1 if we handled the whole registry or index of the last
  485. * handled registry element.
  486. */
  487. int (*hdl_restore)(struct bnx2x *bp, struct bnx2x_mcast_obj *o,
  488. int start_bin, int *rdata_idx);
  489. int (*enqueue_cmd)(struct bnx2x *bp, struct bnx2x_mcast_obj *o,
  490. struct bnx2x_mcast_ramrod_params *p, int cmd);
  491. void (*set_one_rule)(struct bnx2x *bp,
  492. struct bnx2x_mcast_obj *o, int idx,
  493. union bnx2x_mcast_config_data *cfg_data, int cmd);
  494. /** Checks if there are more mcast MACs to be set or a previous
  495. * command is still pending.
  496. */
  497. bool (*check_pending)(struct bnx2x_mcast_obj *o);
  498. /**
  499. * Set/Clear/Check SCHEDULED state of the object
  500. */
  501. void (*set_sched)(struct bnx2x_mcast_obj *o);
  502. void (*clear_sched)(struct bnx2x_mcast_obj *o);
  503. bool (*check_sched)(struct bnx2x_mcast_obj *o);
  504. /* Wait until all pending commands complete */
  505. int (*wait_comp)(struct bnx2x *bp, struct bnx2x_mcast_obj *o);
  506. /**
  507. * Handle the internal object counters needed for proper
  508. * commands handling. Checks that the provided parameters are
  509. * feasible.
  510. */
  511. int (*validate)(struct bnx2x *bp,
  512. struct bnx2x_mcast_ramrod_params *p, int cmd);
  513. /**
  514. * Restore the values of internal counters in case of a failure.
  515. */
  516. void (*revert)(struct bnx2x *bp,
  517. struct bnx2x_mcast_ramrod_params *p,
  518. int old_num_bins);
  519. int (*get_registry_size)(struct bnx2x_mcast_obj *o);
  520. void (*set_registry_size)(struct bnx2x_mcast_obj *o, int n);
  521. };
  522. /*************************** Credit handling **********************************/
  523. struct bnx2x_credit_pool_obj {
  524. /* Current amount of credit in the pool */
  525. atomic_t credit;
  526. /* Maximum allowed credit. put() will check against it. */
  527. int pool_sz;
  528. /*
  529. * Allocate a pool table statically.
  530. *
  531. * Currently the mamimum allowed size is MAX_MAC_CREDIT_E2(272)
  532. *
  533. * The set bit in the table will mean that the entry is available.
  534. */
  535. #define BNX2X_POOL_VEC_SIZE (MAX_MAC_CREDIT_E2 / 64)
  536. u64 pool_mirror[BNX2X_POOL_VEC_SIZE];
  537. /* Base pool offset (initialized differently */
  538. int base_pool_offset;
  539. /**
  540. * Get the next free pool entry.
  541. *
  542. * @return true if there was a free entry in the pool
  543. */
  544. bool (*get_entry)(struct bnx2x_credit_pool_obj *o, int *entry);
  545. /**
  546. * Return the entry back to the pool.
  547. *
  548. * @return true if entry is legal and has been successfully
  549. * returned to the pool.
  550. */
  551. bool (*put_entry)(struct bnx2x_credit_pool_obj *o, int entry);
  552. /**
  553. * Get the requested amount of credit from the pool.
  554. *
  555. * @param cnt Amount of requested credit
  556. * @return true if the operation is successful
  557. */
  558. bool (*get)(struct bnx2x_credit_pool_obj *o, int cnt);
  559. /**
  560. * Returns the credit to the pool.
  561. *
  562. * @param cnt Amount of credit to return
  563. * @return true if the operation is successful
  564. */
  565. bool (*put)(struct bnx2x_credit_pool_obj *o, int cnt);
  566. /**
  567. * Reads the current amount of credit.
  568. */
  569. int (*check)(struct bnx2x_credit_pool_obj *o);
  570. };
  571. /*************************** RSS configuration ********************************/
  572. enum {
  573. /* RSS_MODE bits are mutually exclusive */
  574. BNX2X_RSS_MODE_DISABLED,
  575. BNX2X_RSS_MODE_REGULAR,
  576. BNX2X_RSS_MODE_VLAN_PRI,
  577. BNX2X_RSS_MODE_E1HOV_PRI,
  578. BNX2X_RSS_MODE_IP_DSCP,
  579. BNX2X_RSS_SET_SRCH, /* Setup searcher, E1x specific flag */
  580. BNX2X_RSS_IPV4,
  581. BNX2X_RSS_IPV4_TCP,
  582. BNX2X_RSS_IPV6,
  583. BNX2X_RSS_IPV6_TCP,
  584. };
  585. struct bnx2x_config_rss_params {
  586. struct bnx2x_rss_config_obj *rss_obj;
  587. /* may have RAMROD_COMP_WAIT set only */
  588. unsigned long ramrod_flags;
  589. /* BNX2X_RSS_X bits */
  590. unsigned long rss_flags;
  591. /* Number hash bits to take into an account */
  592. u8 rss_result_mask;
  593. /* Indirection table */
  594. u8 ind_table[T_ETH_INDIRECTION_TABLE_SIZE];
  595. /* RSS hash values */
  596. u32 rss_key[10];
  597. /* valid only iff BNX2X_RSS_UPDATE_TOE is set */
  598. u16 toe_rss_bitmap;
  599. };
  600. struct bnx2x_rss_config_obj {
  601. struct bnx2x_raw_obj raw;
  602. /* RSS engine to use */
  603. u8 engine_id;
  604. /* Last configured indirection table */
  605. u8 ind_table[T_ETH_INDIRECTION_TABLE_SIZE];
  606. int (*config_rss)(struct bnx2x *bp,
  607. struct bnx2x_config_rss_params *p);
  608. };
  609. /*********************** Queue state update ***********************************/
  610. /* UPDATE command options */
  611. enum {
  612. BNX2X_Q_UPDATE_IN_VLAN_REM,
  613. BNX2X_Q_UPDATE_IN_VLAN_REM_CHNG,
  614. BNX2X_Q_UPDATE_OUT_VLAN_REM,
  615. BNX2X_Q_UPDATE_OUT_VLAN_REM_CHNG,
  616. BNX2X_Q_UPDATE_ANTI_SPOOF,
  617. BNX2X_Q_UPDATE_ANTI_SPOOF_CHNG,
  618. BNX2X_Q_UPDATE_ACTIVATE,
  619. BNX2X_Q_UPDATE_ACTIVATE_CHNG,
  620. BNX2X_Q_UPDATE_DEF_VLAN_EN,
  621. BNX2X_Q_UPDATE_DEF_VLAN_EN_CHNG,
  622. BNX2X_Q_UPDATE_SILENT_VLAN_REM_CHNG,
  623. BNX2X_Q_UPDATE_SILENT_VLAN_REM
  624. };
  625. /* Allowed Queue states */
  626. enum bnx2x_q_state {
  627. BNX2X_Q_STATE_RESET,
  628. BNX2X_Q_STATE_INITIALIZED,
  629. BNX2X_Q_STATE_ACTIVE,
  630. BNX2X_Q_STATE_MULTI_COS,
  631. BNX2X_Q_STATE_MCOS_TERMINATED,
  632. BNX2X_Q_STATE_INACTIVE,
  633. BNX2X_Q_STATE_STOPPED,
  634. BNX2X_Q_STATE_TERMINATED,
  635. BNX2X_Q_STATE_FLRED,
  636. BNX2X_Q_STATE_MAX,
  637. };
  638. /* Allowed commands */
  639. enum bnx2x_queue_cmd {
  640. BNX2X_Q_CMD_INIT,
  641. BNX2X_Q_CMD_SETUP,
  642. BNX2X_Q_CMD_SETUP_TX_ONLY,
  643. BNX2X_Q_CMD_DEACTIVATE,
  644. BNX2X_Q_CMD_ACTIVATE,
  645. BNX2X_Q_CMD_UPDATE,
  646. BNX2X_Q_CMD_UPDATE_TPA,
  647. BNX2X_Q_CMD_HALT,
  648. BNX2X_Q_CMD_CFC_DEL,
  649. BNX2X_Q_CMD_TERMINATE,
  650. BNX2X_Q_CMD_EMPTY,
  651. BNX2X_Q_CMD_MAX,
  652. };
  653. /* queue SETUP + INIT flags */
  654. enum {
  655. BNX2X_Q_FLG_TPA,
  656. BNX2X_Q_FLG_TPA_IPV6,
  657. BNX2X_Q_FLG_TPA_GRO,
  658. BNX2X_Q_FLG_STATS,
  659. BNX2X_Q_FLG_ZERO_STATS,
  660. BNX2X_Q_FLG_ACTIVE,
  661. BNX2X_Q_FLG_OV,
  662. BNX2X_Q_FLG_VLAN,
  663. BNX2X_Q_FLG_COS,
  664. BNX2X_Q_FLG_HC,
  665. BNX2X_Q_FLG_HC_EN,
  666. BNX2X_Q_FLG_DHC,
  667. BNX2X_Q_FLG_FCOE,
  668. BNX2X_Q_FLG_LEADING_RSS,
  669. BNX2X_Q_FLG_MCAST,
  670. BNX2X_Q_FLG_DEF_VLAN,
  671. BNX2X_Q_FLG_TX_SWITCH,
  672. BNX2X_Q_FLG_TX_SEC,
  673. BNX2X_Q_FLG_ANTI_SPOOF,
  674. BNX2X_Q_FLG_SILENT_VLAN_REM
  675. };
  676. /* Queue type options: queue type may be a compination of below. */
  677. enum bnx2x_q_type {
  678. /** TODO: Consider moving both these flags into the init()
  679. * ramrod params.
  680. */
  681. BNX2X_Q_TYPE_HAS_RX,
  682. BNX2X_Q_TYPE_HAS_TX,
  683. };
  684. #define BNX2X_PRIMARY_CID_INDEX 0
  685. #define BNX2X_MULTI_TX_COS_E1X 3 /* QM only */
  686. #define BNX2X_MULTI_TX_COS_E2_E3A0 2
  687. #define BNX2X_MULTI_TX_COS_E3B0 3
  688. #define BNX2X_MULTI_TX_COS 3 /* Maximum possible */
  689. struct bnx2x_queue_init_params {
  690. struct {
  691. unsigned long flags;
  692. u16 hc_rate;
  693. u8 fw_sb_id;
  694. u8 sb_cq_index;
  695. } tx;
  696. struct {
  697. unsigned long flags;
  698. u16 hc_rate;
  699. u8 fw_sb_id;
  700. u8 sb_cq_index;
  701. } rx;
  702. /* CID context in the host memory */
  703. struct eth_context *cxts[BNX2X_MULTI_TX_COS];
  704. /* maximum number of cos supported by hardware */
  705. u8 max_cos;
  706. };
  707. struct bnx2x_queue_terminate_params {
  708. /* index within the tx_only cids of this queue object */
  709. u8 cid_index;
  710. };
  711. struct bnx2x_queue_cfc_del_params {
  712. /* index within the tx_only cids of this queue object */
  713. u8 cid_index;
  714. };
  715. struct bnx2x_queue_update_params {
  716. unsigned long update_flags; /* BNX2X_Q_UPDATE_XX bits */
  717. u16 def_vlan;
  718. u16 silent_removal_value;
  719. u16 silent_removal_mask;
  720. /* index within the tx_only cids of this queue object */
  721. u8 cid_index;
  722. };
  723. struct rxq_pause_params {
  724. u16 bd_th_lo;
  725. u16 bd_th_hi;
  726. u16 rcq_th_lo;
  727. u16 rcq_th_hi;
  728. u16 sge_th_lo; /* valid iff BNX2X_Q_FLG_TPA */
  729. u16 sge_th_hi; /* valid iff BNX2X_Q_FLG_TPA */
  730. u16 pri_map;
  731. };
  732. /* general */
  733. struct bnx2x_general_setup_params {
  734. /* valid iff BNX2X_Q_FLG_STATS */
  735. u8 stat_id;
  736. u8 spcl_id;
  737. u16 mtu;
  738. u8 cos;
  739. };
  740. struct bnx2x_rxq_setup_params {
  741. /* dma */
  742. dma_addr_t dscr_map;
  743. dma_addr_t sge_map;
  744. dma_addr_t rcq_map;
  745. dma_addr_t rcq_np_map;
  746. u16 drop_flags;
  747. u16 buf_sz;
  748. u8 fw_sb_id;
  749. u8 cl_qzone_id;
  750. /* valid iff BNX2X_Q_FLG_TPA */
  751. u16 tpa_agg_sz;
  752. u16 sge_buf_sz;
  753. u8 max_sges_pkt;
  754. u8 max_tpa_queues;
  755. u8 rss_engine_id;
  756. /* valid iff BNX2X_Q_FLG_MCAST */
  757. u8 mcast_engine_id;
  758. u8 cache_line_log;
  759. u8 sb_cq_index;
  760. /* valid iff BXN2X_Q_FLG_SILENT_VLAN_REM */
  761. u16 silent_removal_value;
  762. u16 silent_removal_mask;
  763. };
  764. struct bnx2x_txq_setup_params {
  765. /* dma */
  766. dma_addr_t dscr_map;
  767. u8 fw_sb_id;
  768. u8 sb_cq_index;
  769. u8 cos; /* valid iff BNX2X_Q_FLG_COS */
  770. u16 traffic_type;
  771. /* equals to the leading rss client id, used for TX classification*/
  772. u8 tss_leading_cl_id;
  773. /* valid iff BNX2X_Q_FLG_DEF_VLAN */
  774. u16 default_vlan;
  775. };
  776. struct bnx2x_queue_setup_params {
  777. struct bnx2x_general_setup_params gen_params;
  778. struct bnx2x_txq_setup_params txq_params;
  779. struct bnx2x_rxq_setup_params rxq_params;
  780. struct rxq_pause_params pause_params;
  781. unsigned long flags;
  782. };
  783. struct bnx2x_queue_setup_tx_only_params {
  784. struct bnx2x_general_setup_params gen_params;
  785. struct bnx2x_txq_setup_params txq_params;
  786. unsigned long flags;
  787. /* index within the tx_only cids of this queue object */
  788. u8 cid_index;
  789. };
  790. struct bnx2x_queue_state_params {
  791. struct bnx2x_queue_sp_obj *q_obj;
  792. /* Current command */
  793. enum bnx2x_queue_cmd cmd;
  794. /* may have RAMROD_COMP_WAIT set only */
  795. unsigned long ramrod_flags;
  796. /* Params according to the current command */
  797. union {
  798. struct bnx2x_queue_update_params update;
  799. struct bnx2x_queue_setup_params setup;
  800. struct bnx2x_queue_init_params init;
  801. struct bnx2x_queue_setup_tx_only_params tx_only;
  802. struct bnx2x_queue_terminate_params terminate;
  803. struct bnx2x_queue_cfc_del_params cfc_del;
  804. } params;
  805. };
  806. struct bnx2x_queue_sp_obj {
  807. u32 cids[BNX2X_MULTI_TX_COS];
  808. u8 cl_id;
  809. u8 func_id;
  810. /*
  811. * number of traffic classes supported by queue.
  812. * The primary connection of the queue suppotrs the first traffic
  813. * class. Any further traffic class is suppoted by a tx-only
  814. * connection.
  815. *
  816. * Therefore max_cos is also a number of valid entries in the cids
  817. * array.
  818. */
  819. u8 max_cos;
  820. u8 num_tx_only, next_tx_only;
  821. enum bnx2x_q_state state, next_state;
  822. /* bits from enum bnx2x_q_type */
  823. unsigned long type;
  824. /* BNX2X_Q_CMD_XX bits. This object implements "one
  825. * pending" paradigm but for debug and tracing purposes it's
  826. * more convinient to have different bits for different
  827. * commands.
  828. */
  829. unsigned long pending;
  830. /* Buffer to use as a ramrod data and its mapping */
  831. void *rdata;
  832. dma_addr_t rdata_mapping;
  833. /**
  834. * Performs one state change according to the given parameters.
  835. *
  836. * @return 0 in case of success and negative value otherwise.
  837. */
  838. int (*send_cmd)(struct bnx2x *bp,
  839. struct bnx2x_queue_state_params *params);
  840. /**
  841. * Sets the pending bit according to the requested transition.
  842. */
  843. int (*set_pending)(struct bnx2x_queue_sp_obj *o,
  844. struct bnx2x_queue_state_params *params);
  845. /**
  846. * Checks that the requested state transition is legal.
  847. */
  848. int (*check_transition)(struct bnx2x *bp,
  849. struct bnx2x_queue_sp_obj *o,
  850. struct bnx2x_queue_state_params *params);
  851. /**
  852. * Completes the pending command.
  853. */
  854. int (*complete_cmd)(struct bnx2x *bp,
  855. struct bnx2x_queue_sp_obj *o,
  856. enum bnx2x_queue_cmd);
  857. int (*wait_comp)(struct bnx2x *bp,
  858. struct bnx2x_queue_sp_obj *o,
  859. enum bnx2x_queue_cmd cmd);
  860. };
  861. /********************** Function state update *********************************/
  862. /* Allowed Function states */
  863. enum bnx2x_func_state {
  864. BNX2X_F_STATE_RESET,
  865. BNX2X_F_STATE_INITIALIZED,
  866. BNX2X_F_STATE_STARTED,
  867. BNX2X_F_STATE_TX_STOPPED,
  868. BNX2X_F_STATE_MAX,
  869. };
  870. /* Allowed Function commands */
  871. enum bnx2x_func_cmd {
  872. BNX2X_F_CMD_HW_INIT,
  873. BNX2X_F_CMD_START,
  874. BNX2X_F_CMD_STOP,
  875. BNX2X_F_CMD_HW_RESET,
  876. BNX2X_F_CMD_TX_STOP,
  877. BNX2X_F_CMD_TX_START,
  878. BNX2X_F_CMD_MAX,
  879. };
  880. struct bnx2x_func_hw_init_params {
  881. /* A load phase returned by MCP.
  882. *
  883. * May be:
  884. * FW_MSG_CODE_DRV_LOAD_COMMON_CHIP
  885. * FW_MSG_CODE_DRV_LOAD_COMMON
  886. * FW_MSG_CODE_DRV_LOAD_PORT
  887. * FW_MSG_CODE_DRV_LOAD_FUNCTION
  888. */
  889. u32 load_phase;
  890. };
  891. struct bnx2x_func_hw_reset_params {
  892. /* A load phase returned by MCP.
  893. *
  894. * May be:
  895. * FW_MSG_CODE_DRV_LOAD_COMMON_CHIP
  896. * FW_MSG_CODE_DRV_LOAD_COMMON
  897. * FW_MSG_CODE_DRV_LOAD_PORT
  898. * FW_MSG_CODE_DRV_LOAD_FUNCTION
  899. */
  900. u32 reset_phase;
  901. };
  902. struct bnx2x_func_start_params {
  903. /* Multi Function mode:
  904. * - Single Function
  905. * - Switch Dependent
  906. * - Switch Independent
  907. */
  908. u16 mf_mode;
  909. /* Switch Dependent mode outer VLAN tag */
  910. u16 sd_vlan_tag;
  911. /* Function cos mode */
  912. u8 network_cos_mode;
  913. };
  914. struct bnx2x_func_tx_start_params {
  915. struct priority_cos traffic_type_to_priority_cos[MAX_TRAFFIC_TYPES];
  916. u8 dcb_enabled;
  917. u8 dcb_version;
  918. u8 dont_add_pri_0_en;
  919. };
  920. struct bnx2x_func_state_params {
  921. struct bnx2x_func_sp_obj *f_obj;
  922. /* Current command */
  923. enum bnx2x_func_cmd cmd;
  924. /* may have RAMROD_COMP_WAIT set only */
  925. unsigned long ramrod_flags;
  926. /* Params according to the current command */
  927. union {
  928. struct bnx2x_func_hw_init_params hw_init;
  929. struct bnx2x_func_hw_reset_params hw_reset;
  930. struct bnx2x_func_start_params start;
  931. struct bnx2x_func_tx_start_params tx_start;
  932. } params;
  933. };
  934. struct bnx2x_func_sp_drv_ops {
  935. /* Init tool + runtime initialization:
  936. * - Common Chip
  937. * - Common (per Path)
  938. * - Port
  939. * - Function phases
  940. */
  941. int (*init_hw_cmn_chip)(struct bnx2x *bp);
  942. int (*init_hw_cmn)(struct bnx2x *bp);
  943. int (*init_hw_port)(struct bnx2x *bp);
  944. int (*init_hw_func)(struct bnx2x *bp);
  945. /* Reset Function HW: Common, Port, Function phases. */
  946. void (*reset_hw_cmn)(struct bnx2x *bp);
  947. void (*reset_hw_port)(struct bnx2x *bp);
  948. void (*reset_hw_func)(struct bnx2x *bp);
  949. /* Init/Free GUNZIP resources */
  950. int (*gunzip_init)(struct bnx2x *bp);
  951. void (*gunzip_end)(struct bnx2x *bp);
  952. /* Prepare/Release FW resources */
  953. int (*init_fw)(struct bnx2x *bp);
  954. void (*release_fw)(struct bnx2x *bp);
  955. };
  956. struct bnx2x_func_sp_obj {
  957. enum bnx2x_func_state state, next_state;
  958. /* BNX2X_FUNC_CMD_XX bits. This object implements "one
  959. * pending" paradigm but for debug and tracing purposes it's
  960. * more convinient to have different bits for different
  961. * commands.
  962. */
  963. unsigned long pending;
  964. /* Buffer to use as a ramrod data and its mapping */
  965. void *rdata;
  966. dma_addr_t rdata_mapping;
  967. /* this mutex validates that when pending flag is taken, the next
  968. * ramrod to be sent will be the one set the pending bit
  969. */
  970. struct mutex one_pending_mutex;
  971. /* Driver interface */
  972. struct bnx2x_func_sp_drv_ops *drv;
  973. /**
  974. * Performs one state change according to the given parameters.
  975. *
  976. * @return 0 in case of success and negative value otherwise.
  977. */
  978. int (*send_cmd)(struct bnx2x *bp,
  979. struct bnx2x_func_state_params *params);
  980. /**
  981. * Checks that the requested state transition is legal.
  982. */
  983. int (*check_transition)(struct bnx2x *bp,
  984. struct bnx2x_func_sp_obj *o,
  985. struct bnx2x_func_state_params *params);
  986. /**
  987. * Completes the pending command.
  988. */
  989. int (*complete_cmd)(struct bnx2x *bp,
  990. struct bnx2x_func_sp_obj *o,
  991. enum bnx2x_func_cmd cmd);
  992. int (*wait_comp)(struct bnx2x *bp, struct bnx2x_func_sp_obj *o,
  993. enum bnx2x_func_cmd cmd);
  994. };
  995. /********************** Interfaces ********************************************/
  996. /* Queueable objects set */
  997. union bnx2x_qable_obj {
  998. struct bnx2x_vlan_mac_obj vlan_mac;
  999. };
  1000. /************** Function state update *********/
  1001. void bnx2x_init_func_obj(struct bnx2x *bp,
  1002. struct bnx2x_func_sp_obj *obj,
  1003. void *rdata, dma_addr_t rdata_mapping,
  1004. struct bnx2x_func_sp_drv_ops *drv_iface);
  1005. int bnx2x_func_state_change(struct bnx2x *bp,
  1006. struct bnx2x_func_state_params *params);
  1007. enum bnx2x_func_state bnx2x_func_get_state(struct bnx2x *bp,
  1008. struct bnx2x_func_sp_obj *o);
  1009. /******************* Queue State **************/
  1010. void bnx2x_init_queue_obj(struct bnx2x *bp,
  1011. struct bnx2x_queue_sp_obj *obj, u8 cl_id, u32 *cids,
  1012. u8 cid_cnt, u8 func_id, void *rdata,
  1013. dma_addr_t rdata_mapping, unsigned long type);
  1014. int bnx2x_queue_state_change(struct bnx2x *bp,
  1015. struct bnx2x_queue_state_params *params);
  1016. /********************* VLAN-MAC ****************/
  1017. void bnx2x_init_mac_obj(struct bnx2x *bp,
  1018. struct bnx2x_vlan_mac_obj *mac_obj,
  1019. u8 cl_id, u32 cid, u8 func_id, void *rdata,
  1020. dma_addr_t rdata_mapping, int state,
  1021. unsigned long *pstate, bnx2x_obj_type type,
  1022. struct bnx2x_credit_pool_obj *macs_pool);
  1023. void bnx2x_init_vlan_obj(struct bnx2x *bp,
  1024. struct bnx2x_vlan_mac_obj *vlan_obj,
  1025. u8 cl_id, u32 cid, u8 func_id, void *rdata,
  1026. dma_addr_t rdata_mapping, int state,
  1027. unsigned long *pstate, bnx2x_obj_type type,
  1028. struct bnx2x_credit_pool_obj *vlans_pool);
  1029. void bnx2x_init_vlan_mac_obj(struct bnx2x *bp,
  1030. struct bnx2x_vlan_mac_obj *vlan_mac_obj,
  1031. u8 cl_id, u32 cid, u8 func_id, void *rdata,
  1032. dma_addr_t rdata_mapping, int state,
  1033. unsigned long *pstate, bnx2x_obj_type type,
  1034. struct bnx2x_credit_pool_obj *macs_pool,
  1035. struct bnx2x_credit_pool_obj *vlans_pool);
  1036. int bnx2x_config_vlan_mac(struct bnx2x *bp,
  1037. struct bnx2x_vlan_mac_ramrod_params *p);
  1038. int bnx2x_vlan_mac_move(struct bnx2x *bp,
  1039. struct bnx2x_vlan_mac_ramrod_params *p,
  1040. struct bnx2x_vlan_mac_obj *dest_o);
  1041. /********************* RX MODE ****************/
  1042. void bnx2x_init_rx_mode_obj(struct bnx2x *bp,
  1043. struct bnx2x_rx_mode_obj *o);
  1044. /**
  1045. * Send and RX_MODE ramrod according to the provided parameters.
  1046. *
  1047. * @param bp
  1048. * @param p Command parameters
  1049. *
  1050. * @return 0 - if operation was successfull and there is no pending completions,
  1051. * positive number - if there are pending completions,
  1052. * negative - if there were errors
  1053. */
  1054. int bnx2x_config_rx_mode(struct bnx2x *bp,
  1055. struct bnx2x_rx_mode_ramrod_params *p);
  1056. /****************** MULTICASTS ****************/
  1057. void bnx2x_init_mcast_obj(struct bnx2x *bp,
  1058. struct bnx2x_mcast_obj *mcast_obj,
  1059. u8 mcast_cl_id, u32 mcast_cid, u8 func_id,
  1060. u8 engine_id, void *rdata, dma_addr_t rdata_mapping,
  1061. int state, unsigned long *pstate,
  1062. bnx2x_obj_type type);
  1063. /**
  1064. * Configure multicast MACs list. May configure a new list
  1065. * provided in p->mcast_list (BNX2X_MCAST_CMD_ADD), clean up
  1066. * (BNX2X_MCAST_CMD_DEL) or restore (BNX2X_MCAST_CMD_RESTORE) a current
  1067. * configuration, continue to execute the pending commands
  1068. * (BNX2X_MCAST_CMD_CONT).
  1069. *
  1070. * If previous command is still pending or if number of MACs to
  1071. * configure is more that maximum number of MACs in one command,
  1072. * the current command will be enqueued to the tail of the
  1073. * pending commands list.
  1074. *
  1075. * @param bp
  1076. * @param p
  1077. * @param command to execute: BNX2X_MCAST_CMD_X
  1078. *
  1079. * @return 0 is operation was sucessfull and there are no pending completions,
  1080. * negative if there were errors, positive if there are pending
  1081. * completions.
  1082. */
  1083. int bnx2x_config_mcast(struct bnx2x *bp,
  1084. struct bnx2x_mcast_ramrod_params *p, int cmd);
  1085. /****************** CREDIT POOL ****************/
  1086. void bnx2x_init_mac_credit_pool(struct bnx2x *bp,
  1087. struct bnx2x_credit_pool_obj *p, u8 func_id,
  1088. u8 func_num);
  1089. void bnx2x_init_vlan_credit_pool(struct bnx2x *bp,
  1090. struct bnx2x_credit_pool_obj *p, u8 func_id,
  1091. u8 func_num);
  1092. /****************** RSS CONFIGURATION ****************/
  1093. void bnx2x_init_rss_config_obj(struct bnx2x *bp,
  1094. struct bnx2x_rss_config_obj *rss_obj,
  1095. u8 cl_id, u32 cid, u8 func_id, u8 engine_id,
  1096. void *rdata, dma_addr_t rdata_mapping,
  1097. int state, unsigned long *pstate,
  1098. bnx2x_obj_type type);
  1099. /**
  1100. * Updates RSS configuration according to provided parameters.
  1101. *
  1102. * @param bp
  1103. * @param p
  1104. *
  1105. * @return 0 in case of success
  1106. */
  1107. int bnx2x_config_rss(struct bnx2x *bp,
  1108. struct bnx2x_config_rss_params *p);
  1109. /**
  1110. * Return the current ind_table configuration.
  1111. *
  1112. * @param bp
  1113. * @param ind_table buffer to fill with the current indirection
  1114. * table content. Should be at least
  1115. * T_ETH_INDIRECTION_TABLE_SIZE bytes long.
  1116. */
  1117. void bnx2x_get_rss_ind_table(struct bnx2x_rss_config_obj *rss_obj,
  1118. u8 *ind_table);
  1119. #endif /* BNX2X_SP_VERBS */